1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-03 08:05:40 +00:00
Commit Graph

6011 Commits

Author SHA1 Message Date
Thomas Harte
0bf1a87f4c
Merge pull request #710 from TomHarte/STOP
Ensure that an interrupt from a STOP doesn't return to the STOP.
2020-01-01 15:00:11 -05:00
Thomas Harte
b184426f2b Ensure that an interrupt from a STOP doesn't return to the STOP. 2020-01-01 14:51:47 -05:00
Thomas Harte
2456fb120d
Merge pull request #709 from TomHarte/MoreMouse
Adds Atari ST mouse support for absolute positioning and inverted scales.
2020-01-01 13:56:25 -05:00
Thomas Harte
23ed9ad2de Corrects application of negative relative scale. 2020-01-01 13:22:21 -05:00
Thomas Harte
017681a97c Now honours permitted mouse range. 2020-01-01 12:48:38 -05:00
Thomas Harte
153f60735d Banishes redefined macro warning. 2020-01-01 12:38:30 -05:00
Thomas Harte
90b899c00e Attempts to implement absolute mouse positioning mode.
Along with mouse direction.
2020-01-01 12:29:33 -05:00
Thomas Harte
5ce8d7c0e5
Merge pull request #708 from TomHarte/KeyboardLogs
Adds necessary logging for further IKYB work.
2019-12-30 23:41:38 -05:00
Thomas Harte
c11fe25537 Merge branch 'master' into EnchantedWoods 2019-12-30 23:32:45 -05:00
Thomas Harte
c4edd635c5
Merge pull request #707 from TomHarte/STGraphicsAgain
Further improves the ST graphics subsystem
2019-12-30 23:31:21 -05:00
Thomas Harte
0a12893d63 Shunts vsync back down to top of frame.
It's guess after guess, basically.
2019-12-30 23:01:31 -05:00
Thomas Harte
8e777c299f Switches to latching video interrupts until acknowledged.
Seems to fix Cisco Heat, at least. I have no idea whether I'm latching the correct thing, whether IACK should clear both or only one, etc.
2019-12-30 23:00:55 -05:00
Thomas Harte
09513ec14c Gets explicit about constexpr expectations here. 2019-12-30 22:58:19 -05:00
Thomas Harte
e23d1a2958 Restores vsync active. 2019-12-29 22:03:36 -05:00
Thomas Harte
6449403f6a Corrects pending_events_ test for sequence points.
Simplifies around as possible.
2019-12-29 21:53:45 -05:00
Thomas Harte
c8fe66092b Attempts to correct insertion logic (and mostly bypasses it). 2019-12-29 21:42:41 -05:00
Thomas Harte
b33218c61e Fixes reload test, which really needs to sense the CRT-headed vsync output.
i.e. not the one heading back to the CPU.
2019-12-29 20:55:34 -05:00
Thomas Harte
8ce26e7182 Adds a delay on vsync visibility (i.e. as to generating an interrupt). 2019-12-29 19:03:08 -05:00
Thomas Harte
47068ee081 Ensures visible hsync end generates a sequence point. 2019-12-29 17:51:50 -05:00
Thomas Harte
5361ee2526 Adds specific Union Demo test. 2019-12-29 17:48:43 -05:00
Thomas Harte
214b6a254a Adds a delay on visibility of the hsync signal, and a test on address reload. 2019-12-29 17:37:09 -05:00
Thomas Harte
93f6964d8a Introduces some preliminary line length unit tests.
Thereby fixes one potential issue with load_ toggling.
2019-12-28 22:50:34 -05:00
Thomas Harte
13f11e071a Simplifies border colour change propagation.
I'm not sure it was even technically correct as was.
2019-12-28 10:45:10 -05:00
Thomas Harte
f7825dd2a2 Pulls out address reload position as a separate constant. 2019-12-28 10:36:50 -05:00
Thomas Harte
a9d1f5d925 Pulls out address reload as something I can position independently.
Sadly receding it by 3 did not have the effect I was hoping for, of receding Enchanted Land's first register tweaking.
2019-12-27 23:47:19 -05:00
Thomas Harte
2757e5d600 Removes untrue comment. 2019-12-27 22:51:11 -05:00
Thomas Harte
5026de9653 Rejigs the video stream to ensure shifter really is continuous.
... and definitively to avoid potential buffer overruns. Or, at least, to have a mechanism in place definitively to avoid them. Which will be tested and debugged as necessary.

Also simplifies the colour burst and border/pixels selection logic.
2019-12-27 22:47:34 -05:00
Thomas Harte
5fa8e046d8 It's inaccurrate to call this _the_ shifter. So don't. 2019-12-27 19:03:10 -05:00
Thomas Harte
ec9357e080
Merge pull request #706 from TomHarte/Vic20Flags
Permits Vic-20 memory to be specified in banks;
2019-12-26 23:04:56 -05:00
Thomas Harte
f8dd33b645 Adds necessary header for strcmp. 2019-12-26 22:53:09 -05:00
Thomas Harte
de43e86310 Permits Vic-20 memory to be specified in banks; adds recognition of TheC64-style file tags to specify them. 2019-12-26 22:49:48 -05:00
Thomas Harte
314973a5ef
Merge pull request #704 from TomHarte/RTR
Corrects implementation of RTR
2019-12-25 20:47:21 -05:00
Thomas Harte
d26ce65236 Introduces an RTR test. 2019-12-25 19:50:12 -05:00
Thomas Harte
1de4f179c0 Adds more thorough comment on the bus program used. 2019-12-25 19:49:49 -05:00
Thomas Harte
3cb5684d95 Fixes RTR: the whole top half of the SR should be preserved.
Specifically, the 68000 Reference Manual says: "The supervisor portion of the status register is unaffected." Clearly when I first read that I misread it as the supervisor _flag_ (rather than _portion_) should be preserved.
2019-12-25 19:49:20 -05:00
Thomas Harte
a9a92de954 Adds a bunch of shout-outs for unimplemented behaviour. 2019-12-25 15:32:33 -05:00
Thomas Harte
daacd6805e
Merge pull request #703 from TomHarte/Sup133
Fixed: the final track field in an MSA is inclusive, not exclusive.
2019-12-24 23:30:04 -05:00
Thomas Harte
54fe01b532 Fixed: the final track is inclusive, not exclusive. 2019-12-24 23:08:16 -05:00
Thomas Harte
42dd70dbff
Merge pull request #702 from TomHarte/NZStory
Corrects WD track-zero and write-protect flags.
2019-12-24 22:22:24 -05:00
Thomas Harte
e59de71d79 Disables status logging, at least until next needed. 2019-12-24 21:44:50 -05:00
Thomas Harte
a8ba3607b7 Adds (and disables) a minor additional piece of logging. 2019-12-24 21:43:39 -05:00
Thomas Harte
4205e95883 Switches to capture of the track 0 flag during a type 1 operation. 2019-12-24 21:43:20 -05:00
Thomas Harte
f633cf4c3f Adds a basic implementation of the non-instantaneous index pulse. 2019-12-24 21:05:17 -05:00
Thomas Harte
dfa6b11737 Adds responsibility for an ongoing index pulse to the drive. 2019-12-24 20:53:37 -05:00
Thomas Harte
42926e72cc Adjusted: Flag::WriteProtect works in real time for a type-1 status. 2019-12-24 19:57:12 -05:00
Thomas Harte
80cb06eb33 It provisionally seems as though spin_up should be reset by a force interrupt? 2019-12-24 19:37:37 -05:00
Thomas Harte
5068328a15 Fixes debugging output. 2019-12-24 19:15:58 -05:00
Thomas Harte
adc2b77833 Enhances with constexpr. 2019-12-24 18:53:50 -05:00
Thomas Harte
99415217dc
Merge pull request #701 from TomHarte/TestsSyntax
Corrects syntax errors in test suite.
2019-12-23 22:15:16 -05:00
Thomas Harte
48d519d475 Merge branch 'master' into TestsSyntax 2019-12-23 22:13:55 -05:00