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Author SHA1 Message Date
Thomas Harte
4632be4fe5 Wires up the final IWM signal, SEL, preparatory to an implementation. 2019-05-30 12:08:00 -04:00
Thomas Harte
b3d2b4cd37 Fixes the interrupt return address. 2019-05-29 20:27:46 -04:00
Thomas Harte
c86fe9ada9 Ensures replace_write_values works in release builds. 2019-05-29 19:00:53 -04:00
Thomas Harte
ecf93b7822 Eliminates some type conversion warnings. 2019-05-29 14:56:50 -04:00
Thomas Harte
541b75ee6e Further fixes PEA, and OR/AND/EOR Dn, (An). 2019-05-29 14:37:15 -04:00
Thomas Harte
77b08febdb Corrects PEA and adds an additional debugging aid. 2019-05-29 12:47:17 -04:00
Thomas Harte
fcda376f33 Removes three further type conversion warnings. 2019-05-28 21:56:49 -04:00
Thomas Harte
0848fc7e03 Ensures the Mac uses auto vectored interrupts. 2019-05-28 16:24:41 -04:00
Thomas Harte
3bb8d6717f Ensures A7 is correct at end of an UNLINK. 2019-05-28 16:02:42 -04:00
Thomas Harte
5e2496d59c Simplifies and corrects MOVE logic. 2019-05-28 15:17:03 -04:00
Thomas Harte
c52da9d802 Adds some logging preparatory to a MOVE change. 2019-05-28 15:05:42 -04:00
Thomas Harte
1d3dde32f2 Ensures final byte of data can be accessed. 2019-05-09 07:24:26 -04:00
Thomas Harte
0b999ce0e4 Attempts to fix register-relative JSRs. 2019-05-09 06:43:07 -04:00
Thomas Harte
b04bd7069d Corrects Scc and DBcc (xxx).l and (xxx).w. 2019-05-09 06:28:55 -04:00
Thomas Harte
249b0fbb32 Corrects PC on stack after an illegal instruction. 
Also fixed LOG_TRACE functionality.
 2019-05-08 22:36:25 -04:00
Thomas Harte
41740fb45e Implements video position feedback. 
At a substantial performance cost for now, but I'll worry about that once things are working.
 2019-05-08 16:54:19 -04:00
Thomas Harte
0ad88508f7 Removes ROM mirroring above $600000. 2019-05-08 15:07:03 -04:00
Thomas Harte
8293b18278 Adds a TODO on what I think might be an incorrect implementation? 2019-05-08 15:06:40 -04:00
Thomas Harte
2ba0364850 Adds the shift register interrupt. 2019-05-08 15:02:07 -04:00
Thomas Harte
8b72043f33 Ensures no uninitialised variables. 2019-05-08 14:54:54 -04:00
Thomas Harte
2e7bc0b98a Attempts the shift register. 2019-05-08 14:54:40 -04:00
Thomas Harte
f0f9722ca6 Takes a first crack at the keyboard's serial protocol. 
Albeit that without a working shift register in the VIA, this shouldn't really work yet.
 2019-05-08 14:20:28 -04:00
Thomas Harte
b5ef88902b Edges further towards a functioning keyboard. 2019-05-08 13:58:52 -04:00
Thomas Harte
8278809383 Attempts to get more rigorous on communicating outward control line changes. 2019-05-08 13:33:22 -04:00
Thomas Harte
4367459cf2 Takes a first go at handshake and pulse modes. 2019-05-08 12:48:29 -04:00
Thomas Harte
254132b83d Eliminates 6522Base in pursuit of working handshake modes. 
Specifically: this means that the places from which the BusHandler may be called are more numerous.
 2019-05-08 12:35:17 -04:00
Thomas Harte
7b466e6d0a Begins work on a functioning keyboard. 2019-05-08 12:34:26 -04:00
Thomas Harte
7e6d4f5a3e Adds emulation of the real-time clock. 2019-05-08 00:12:19 -04:00
Thomas Harte
ce099a297a Eliminates RAM writes in ROM area. 
I no longer think that logic is correct.
 2019-05-07 17:16:22 -04:00
Thomas Harte
949c848815 Broadens address decoding. 
To no obvious change in output.
 2019-05-06 22:57:29 -04:00
Thomas Harte
9bf9b9ea8c Ensures unmapped peripherals return a consistent value. 2019-05-06 21:32:10 -04:00
Thomas Harte
d8ed8b66f3 Improves carry/extend for ROXL and ROXR. 2019-05-06 21:14:16 -04:00
Thomas Harte
a131d39451 I now believe only the 6522 is on the synchronous bus. 2019-05-06 14:10:13 -04:00
Thomas Harte
b540f58457 Sets a more appropriate display type. 2019-05-05 23:22:05 -04:00
Thomas Harte
4f5a38b5c5 Adds support for the alternate video buffer. 2019-05-05 23:05:24 -04:00
Thomas Harte
cefc3af08b Corrects RAM read decoding when the ROM overlay is enabled. 2019-05-05 22:48:40 -04:00
Thomas Harte
e6ed50383c Corrects PEA and MOVE.l (An)[+], (xxx).L; also adds an extra test that caught the latter. 2019-05-05 22:47:54 -04:00
Thomas Harte
96facc103a Adds an IWM shim and corrects graphics output. 
... now that there is some.
 2019-05-05 21:55:34 -04:00
Thomas Harte
407bbfb379 Pretending the Disk II is an IWM doesn't seem to achieve much. 2019-05-05 18:12:25 -04:00
Thomas Harte
a99ebda513 Takes a first shot at (inverted) Mac video output. 2019-05-04 22:27:58 -04:00
Thomas Harte
537b604fc9 It looks like writes should always go to RAM. 
Now I see the screen buffer being filled with `0xffff`s, along with what is probably disk motor control data.
 2019-05-04 17:29:30 -04:00
Thomas Harte
98bc570bf7 Adds further boilerplate around VIA and IWM decoding. 2019-05-04 17:12:26 -04:00
Thomas Harte
181b77c490 Adds decoding of IWM accesses and respect for the ROM overlay bit. 2019-05-04 16:38:01 -04:00
Thomas Harte
bc9eb82e6f Adds in VIA access decoding, and a note to self on video. 
The Mac now proceeds to try to talk to the IWM.
 2019-05-04 14:23:37 -04:00
Thomas Harte
29fc024ecd Starts negotiating the Macintosh memory map. 2019-05-04 12:33:27 -04:00
Thomas Harte
c1695d0910 Adds various notes to self. 2019-05-03 23:55:28 -04:00
Thomas Harte
6d6a4e79c9 Adds the absolute basics to include a 6522 in the Macintosh. 
Not yet wired to anything.
 2019-05-03 23:40:22 -04:00
Thomas Harte
417a3e1540 Adds missing call to flush. 2019-05-03 23:31:12 -04:00
Thomas Harte
fa8c804d47 Makes explicit a few implicit type conversions. 
There's plenty more down this well, alas.
 2019-05-03 23:26:03 -04:00
Thomas Harte
68392ce6f5 Adds enough of a concept of Mac video to get a properly initialised display. 
Completely empty at present, naturally. Also this is the very first time I've run my 68000 at live speed. From just one data point, it's not terrible. Phew!
 2019-05-03 23:25:42 -04:00