Thomas Harte
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e28829bd1b
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Corrected CRTC timing, gave it someone to talk to and a means with which to talk.
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2017-07-31 20:14:46 -04:00 |
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Thomas Harte
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68ceeab610
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Created a 6845 class and started pushing data at it and clocking it. It doesn't currently have the concept of a bus but will do, hence the in-header implementation.
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2017-07-31 19:56:59 -04:00 |
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Thomas Harte
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68dca9d047
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Made a first attempt at ROM paging, with pretty much the same scheme that'll be needed for 128kb support.
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2017-07-31 19:37:28 -04:00 |
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Thomas Harte
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d88ca151f4
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Added a first attempt at output port decoding. Just logging for now.
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2017-07-31 19:25:10 -04:00 |
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Thomas Harte
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3c90218c3d
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With a very basic stab at something a bit like the memory map (sans paging), execution begins.
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2017-07-31 19:15:43 -04:00 |
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Thomas Harte
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afd409c883
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Ensured that ROM images are loaded and passed to the Amstrad CPC.
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2017-07-31 18:44:49 -04:00 |
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Thomas Harte
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9c04d851e4
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Added the basics necessary to get the CPU ticking over, at a nominal 4Mhz but with the wait states that I currently believe to be accurate.
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2017-07-31 07:29:50 -04:00 |
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Thomas Harte
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1d6fe11906
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Added an instance of Outputs::CRT::CRT. So progress is now: select CDT, up comes a blank window.
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2017-07-31 07:16:51 -04:00 |
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Thomas Harte
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c0f1313830
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Performed sufficient wiring to get to the point where attempting to load a CDT creates an instance of the Amstrad CPC and then fails only because the thing vends a nullptr CRT.
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2017-07-30 22:05:29 -04:00 |
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