Thomas Harte
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da082673d7
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Drives now have a finite number of heads.
The Amstrad volunteers itself to be single sided. Everything else stays as it was.
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2017-09-15 21:18:36 -04:00 |
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Thomas Harte
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42616da7ff
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Adjusts the Oric Microdisc to propagate motor control more widely.
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2017-09-11 22:15:54 -04:00 |
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Thomas Harte
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0622187ddf
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Strips Controller of all capabilities now housed on the Drive.
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2017-09-10 19:23:23 -04:00 |
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Thomas Harte
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90c7056d12
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Started devolving timed event loop logic down to the drives, moving them closer to modelling real life.
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2017-09-10 14:43:20 -04:00 |
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Thomas Harte
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4abd62e62b
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Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty.
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2017-07-27 22:05:29 -04:00 |
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Thomas Harte
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55ecb0c022
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Converted the Microdisc into a ClockReceiver.
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2017-07-24 21:51:13 -04:00 |
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Thomas Harte
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8a2bdb8d22
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Converted the TimedEventLoop and the things that sit atop it into ClockReceivers.
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2017-07-24 21:19:05 -04:00 |
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Thomas Harte
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e01f3f06c8
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Completed curly bracket movement.
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2017-03-26 14:34:47 -04:00 |
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Thomas Harte
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90151e2094
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Fixed to ensure a known initial control register value, which has taken effect.
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2016-12-28 18:49:32 -05:00 |
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Thomas Harte
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a568172758
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Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.
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2016-12-28 18:29:37 -05:00 |
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Thomas Harte
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c304db0f5a
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Deintegrated the busy flag and the interrupt request line, as the latter is reset by status reads. Which also means I can start reporting the WD INTRQ line status directly from the Microdisc. That appears to be correct, rather than honouring the Microdisc IRQ select there.
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2016-12-06 21:16:29 -05:00 |
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Thomas Harte
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81ee834530
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As well as a bunch of logging, reinstated rotation position preservation across tracks.
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2016-12-02 18:36:47 -05:00 |
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Thomas Harte
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93c573bfa9
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Implemented missing status bits (other than the index hole), and a head loading delay for the Microdisc.
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2016-12-01 21:13:16 -05:00 |
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Thomas Harte
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442986ee2c
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Introduced a head loading path for 1793 machines.
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2016-12-01 20:12:22 -05:00 |
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Thomas Harte
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82899f2f47
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Ensured flag setting is atomic, removed duplication of interrupt request versus busy, found better names for the personality testers, unified delegate protocol.
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2016-12-01 07:41:52 -05:00 |
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Thomas Harte
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9b6c5e814a
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Now that it can be more explicit, this should admit that it's '93-based, not '73.
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2016-11-28 16:22:35 -05:00 |
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Thomas Harte
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2f459690d4
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It would appear the 1770 and 1773 actually differ in relation to the (non-sensical) ability not to spin-up for a Type 2, and whether a side compare can occur. So the WD1770 class now requires a personality to be specified. Which it singly fails to honour.
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2016-11-26 23:29:30 +08:00 |
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Thomas Harte
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e9d6566e9c
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Of course, changing the IRQ enable may immediately change the IRQ line. Signal if so.
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2016-11-26 09:35:44 +08:00 |
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Thomas Harte
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54246c8f1a
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Interrupt enabling works the other way around I think, and both registers with only one bit defined should probably return '1' in all other places?
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2016-11-25 21:24:59 +08:00 |
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Thomas Harte
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5c019ad1c0
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Okay, so it looks like both ROM paging flags are the opposite of what I previously had.
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2016-11-25 20:42:40 +08:00 |
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Thomas Harte
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7c2d9f3752
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This seems to be right, per http://wiki.defence-force.org/doku.php?id=oric:hardware:floppy_disk_controller_wd1793
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2016-11-22 22:35:43 +08:00 |
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Thomas Harte
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0c3644f350
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Made a second parse at logic. We'll see.
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2016-11-22 22:12:32 +08:00 |
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Thomas Harte
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13a608a8c2
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Added what may be correct paging logic.
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2016-11-22 22:09:52 +08:00 |
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Thomas Harte
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363db695e8
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Started implementation of the Microdisc selection logic.
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2016-11-22 08:12:53 +08:00 |
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