109 Commits

Author	SHA1	Message	Date
Thomas Harte	ffb5149890	Reinstate real CMOS RAM results.	2024-03-28 14:27:07 -04:00
Thomas Harte	4fcb85d132	Cleave off most remaining reasons for failure.	2024-03-28 10:32:27 -04:00
Thomas Harte	f175dcea58	Hack in some more potential debugging help.	2024-03-27 22:37:37 -04:00
Thomas Harte	f38bca37a2	Take another run at MEMC. ... I hadn't spotted that it is valid to map different logical pages to the same physical page with different protection levels.	2024-03-27 10:44:40 -04:00
Thomas Harte	8b04d0e3ef	Enhance and better-document I2C states.	2024-03-26 21:52:29 -04:00
Thomas Harte	a3931674dc	Seemingly navigate I2C correctly.	2024-03-26 21:33:46 -04:00
Thomas Harte	3ba12630ab	Quieten.	2024-03-26 12:27:37 -04:00
Thomas Harte	342d90c929	Advance CMOS/I2C to a seemingly-valid read.	2024-03-26 12:24:24 -04:00
Thomas Harte	f46af4b702	OS 3.11 seems to be able to get into BASIC.	2024-03-25 22:10:35 -04:00
Thomas Harte	b112987556	Do well enough at other colour depths.	2024-03-25 22:09:55 -04:00
Thomas Harte	fc880ac130	Double down on trans mode.	2024-03-25 21:32:56 -04:00
Thomas Harte	a2d95cb982	Shuffle notes.	2024-03-25 21:31:59 -04:00
Thomas Harte	d2776071e4	Speed up debug mode.	2024-03-25 21:31:33 -04:00
Thomas Harte	72a645ec1e	Fix trans; take further crack at MEMC permissions.	2024-03-25 15:50:59 -04:00
Thomas Harte	1154ffd072	Add a 'drive in use' indicator LED.	2024-03-25 15:03:54 -04:00
Thomas Harte	8ba9708942	Hopefully resolve the mystery of the latch writes.	2024-03-25 14:54:30 -04:00
Thomas Harte	521fca6089	Expose full bus to IOC dependents; add notes.	2024-03-25 11:07:44 -04:00
Thomas Harte	ae684edbe1	Formally decode bank/offset/type.	2024-03-25 10:16:36 -04:00
Thomas Harte	fa0a9aa611	Eliminate 'has_moved_rom_'.	2024-03-24 22:36:11 -04:00
Thomas Harte	5da9e0486a	Simplify control flow.	2024-03-24 22:30:26 -04:00
Thomas Harte	6980fd760c	Add further heavily-manual debugging aids.	2024-03-24 22:18:30 -04:00
Thomas Harte	c1602cc8fe	The keyboard and interrupts are currently trusted.	2024-03-23 21:49:52 -04:00
Thomas Harte	189dd176de	Reguess state machine, fixing startup display.	2024-03-23 21:38:35 -04:00
Thomas Harte	3cf262d1f7	Improve terminology, add more documentation.	2024-03-23 21:12:01 -04:00
Thomas Harte	ccfc389274	Quieten where now confident.	2024-03-23 21:03:06 -04:00
Thomas Harte	0e07f802ac	Use BACK state; accept other ACKs at any time.	2024-03-23 21:02:35 -04:00
Thomas Harte	c720f3910a	Avoid implicit sign cast.	2024-03-23 20:13:25 -04:00
Thomas Harte	4215edd11b	Reduce noise.	2024-03-23 20:12:56 -04:00
Thomas Harte	09a61cf1a7	Don't expect an ACK after identifying.	2024-03-23 20:12:38 -04:00
Thomas Harte	5967ad0865	Sketch out whole protocol, albeit faulty.	2024-03-23 17:08:03 -04:00
Thomas Harte	eb34c38332	Add very faulty key input.	2024-03-23 15:58:48 -04:00
Thomas Harte	5ccb18225a	Provide key states to the keyboard.	2024-03-23 15:43:04 -04:00
Thomas Harte	58bbce1a15	Avoid display errors upon back-pressure.	2024-03-22 22:01:12 -04:00
Thomas Harte	9ea3e547ee	Fix IRQ/FIQ return addresses.	2024-03-22 21:42:34 -04:00
Thomas Harte	fb5fdc9f10	Actually apply video divider.	2024-03-22 10:24:24 -04:00
Thomas Harte	de7b7818f4	Add 4bpp output.	2024-03-22 10:18:25 -04:00
Thomas Harte	c4e6b18294	Manage pixel buffers.	2024-03-22 10:10:13 -04:00
Thomas Harte	ae6cf69449	Move responsibility for clock division; reinstate vsync interrupt.	2024-03-22 10:01:34 -04:00
Thomas Harte	4a2dcff028	Endeavour to map colours properly.	2024-03-21 21:53:50 -04:00
Thomas Harte	aa6acec8fa	Don't hoard cycles per line value.	2024-03-21 21:47:27 -04:00
Thomas Harte	4ac4da908c	Reduce TODOs, do _something_ with border colour.	2024-03-21 21:40:11 -04:00
Thomas Harte	66e62857c4	Give ostensibly clean timing to the CRT.	2024-03-21 21:29:53 -04:00
Thomas Harte	bbc0d8b050	Count time in phase correctly.	2024-03-21 21:15:25 -04:00
Thomas Harte	0f8bc416d1	Make first, faulty step into displaying a field.	2024-03-21 21:10:55 -04:00
Thomas Harte	2ec235170e	Finish the thought on magic constants.	2024-03-21 20:45:17 -04:00
Thomas Harte	2de1a2dd0d	Install and properly clock a CRT.	2024-03-21 20:41:24 -04:00
Thomas Harte	1f49c3b113	Give sound and video somewhere to read from.	2024-03-21 20:22:20 -04:00
Thomas Harte	5c645fb3c2	Switch to a fixed output clock; retain addresses.	2024-03-21 11:51:29 -04:00
Thomas Harte	40b5227f0b	Deliver all addresses to the video outputter.	2024-03-21 11:24:47 -04:00
Thomas Harte	847dba8f07	Divide input pixel rate.	2024-03-21 11:03:28 -04:00