Thomas Harte
ab02f82470
Merge pull request #543 from TomHarte/CFBundleTypeOSTypes
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Removes `LSItemContentTypes` so as not to reject files.
2018-09-09 17:49:16 -04:00
Thomas Harte
1e3318816c
Removes LSItemContentTypes so as not to reject files.
2018-09-09 17:47:03 -04:00
Thomas Harte
3a3dec92c7
Merge pull request #540 from MaddTheSane/plistFix
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Remove LSItemContentTypes
2018-09-09 10:07:19 -04:00
Thomas Harte
5a5fc1ae1a
Merge pull request #541 from TomHarte/Annunciator3
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Implements the two undocumented annunciator 3 graphics modes
2018-09-09 10:06:52 -04:00
Thomas Harte
8d79a1e381
Corrected fat low-res implementation.
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As per comment of awanderin that "the odd addresses don't get their pixels auto-shifted by the hardware as with normal lo-res".
2018-09-09 10:06:21 -04:00
Thomas Harte
d70f5da94e
Attempts an implementation of the undocumented low res + annunciator 3 graphics mode.
2018-09-08 20:51:15 -04:00
C.W. Betts
05d4274019
Remove LSItemContentTypes: they should be unique identifiers, not generic types like public.item or public.data.
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This can result in strange icons showing up in the wrong places.
Also added a category type.
2018-09-07 16:39:52 -06:00
Thomas Harte
afeec09902
Gets explicit about DHIRES being annunciator 3; implements four-colour high res mode.
2018-09-06 23:23:19 -04:00
Thomas Harte
0526ac2ee2
Slightly increases const correctness.
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The converters from source data to output pixels do not modify the source data. It's a shame there's no `restrict` in C++.
2018-09-05 11:36:40 -04:00
Thomas Harte
6725ee2190
Merge pull request #539 from TomHarte/40ColumnTextCorruption
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Corrects 40-column alternative text mode corruption
2018-09-05 10:27:09 -04:00
Thomas Harte
8b661fb90f
Introduces an extra level of indirection for text mapping.
2018-09-05 10:26:08 -04:00
Thomas Harte
dab7d3db1b
Merge branch 'master' into 40ColumnTextCorruption
2018-08-30 20:24:47 -04:00
Thomas Harte
1cba3d48d9
Merge pull request #538 from TomHarte/AppleDecodingAgain
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Correction: 0xc011 et al get the keyboard value in bits 0 to 6...
2018-08-30 20:19:48 -04:00
Thomas Harte
d53b38ec7e
Correction: 0xc011 et al get the keyboard value in bits 0 to 6 and the switch value in bit 7.
2018-08-30 20:18:36 -04:00
Thomas Harte
5d0f47eda2
Merge pull request #536 from TomHarte/AppleDecoding
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Adds mirrors for keyboard input and the audio toggle.
2018-08-27 21:14:48 -04:00
Thomas Harte
2e04c4442c
Adds mirrors for keyboard input and the audio toggle.
2018-08-27 21:14:21 -04:00
Thomas Harte
f639cdc8ad
Merge pull request #535 from TomHarte/DSKFixes
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Corrects Apple DSK track length, inter-track skew, and Pro-DOS volume number.
2018-08-27 21:07:11 -04:00
Thomas Harte
71ec7624ca
Corrects Apple DSK track length, inter-track skew, and Pro-DOS volume number.
2018-08-27 20:56:25 -04:00
Thomas Harte
0599d9602e
Ensures no out-of-bounds accesses to inverses on a IIe.
2018-08-26 23:02:31 -04:00
Thomas Harte
234bef2a88
Adds default to make it explicit that fetch_address is initialised.
2018-08-24 22:26:03 -04:00
Thomas Harte
adb574e1cd
Merge pull request #529 from TomHarte/AppleDelay
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Corrects Apple II video defects
2018-08-24 22:11:41 -04:00
Thomas Harte
1f491e764e
Nudges visible area slightly to the right.
2018-08-24 22:08:11 -04:00
Thomas Harte
114a43a662
Corrects improper indexing for byte shift.
2018-08-24 21:58:43 -04:00
Thomas Harte
5547c39c91
Corrects documentation.
2018-08-24 20:06:40 -04:00
Thomas Harte
97a89aaf4d
Factors out the stuff of deferred action interleaving, as I suspect it'll come in handy.
2018-08-24 20:04:26 -04:00
Thomas Harte
61e46399dc
About face! There should be no delay on serialisation, but a delay on interpretation-affecting soft switches.
2018-08-22 21:56:45 -04:00
Thomas Harte
e802f6ecc2
Rearranges draw loop around a fixed-size 568-sample line buffer.
2018-08-19 22:31:04 -04:00
Thomas Harte
4209f0e044
Moves memory collection into a separate loop.
2018-08-18 21:54:24 -04:00
Thomas Harte
33576aa2c4
Uses const to ensure output_* are properly constrained.
2018-08-18 21:36:48 -04:00
Thomas Harte
17bf1a64bf
Moves the stuff of generating pixels out of the main loop.
2018-08-18 18:44:31 -04:00
Thomas Harte
f8d46f8f3d
Merge branch 'master' into AppleDelay
2018-08-18 14:11:21 -04:00
Thomas Harte
8787d85e64
Eliminates #undefs as being (i) unnecessary, now this is a source file; and (ii) incomplete in any case.
2018-08-17 22:24:42 -04:00
Thomas Harte
7f0f17f435
Merge pull request #523 from TomHarte/Further65C02
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Further corrects 65C02 behaviour
2018-08-17 21:58:38 -04:00
Thomas Harte
0e7f54f375
Implements STP and WAI, and ensures all unimplemented 65C02 instructions are NOP for all 65C02s.
2018-08-17 21:49:06 -04:00
Thomas Harte
b3bdfa9f46
Corrected: it's three-cycle 65C02 branches that ignore interrupts, not two.
2018-08-16 20:47:49 -04:00
Thomas Harte
592ec69d36
Causes the 65C02 not to accept interrupts immediately after untaken branches.
2018-08-15 22:42:04 -04:00
Thomas Harte
60e00ddd02
Correction: the test for not skipping an operand fetch requires a 65C02.
2018-08-15 22:07:17 -04:00
Thomas Harte
6806193dc2
Ensures that "Read/Modify/Write instructions absolute indexed in same page" take only six cycles on a 65C02.
2018-08-15 19:17:37 -04:00
Thomas Harte
c35dca783f
Ensures that page-crossing indexing no longer causes an extra read of an invalid address on the 65C02.
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It rereads the last byte of the instruction stream instead.
2018-08-15 18:47:53 -04:00
Thomas Harte
901e0d65b9
Documents all 6502 micro-operations.
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Also makes sure 1-cycle NOPs really, definitely are one cycle only on a 65C02 and eliminates OperationCopyOperandFromA as a redundant copy of OperationSTA.
2018-08-14 22:17:53 -04:00
Thomas Harte
ddf45a0010
Ensures NMI and RST reset D on 65C02s.
2018-08-14 19:49:14 -04:00
Thomas Harte
1eca4463b3
Ensures NMI can no longer usurp BRK on 65C02s.
2018-08-14 19:33:48 -04:00
Thomas Harte
be01203cc1
Starts to expand the range of supported 6502s.
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This fully implements the NES 6502 because, well, it's virtually no extra work, and ensures that RDY takes effect on write cycles on 65C02s.
2018-08-13 22:17:22 -04:00
Thomas Harte
4d1d19a464
Introduces an intermediate buffer for Apple II video data.
2018-08-12 20:36:08 -04:00
Thomas Harte
760817eb3b
Merge pull request #521 from TomHarte/AppleVideo
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Fixes Apple II double low resolution graphics
2018-08-11 23:20:40 -04:00
Thomas Harte
cb47575860
Eliminates stdout chatter.
2018-08-11 22:57:54 -04:00
Thomas Harte
434d184503
Corrects deserialisation order in double low res mode.
2018-08-11 22:53:06 -04:00
Thomas Harte
7374c665e8
Corrects regression in video flushing.
2018-08-11 19:57:39 -04:00
Thomas Harte
10c930a59d
Merge pull request #520 from TomHarte/EnhancedIIe
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Adds Enhanced IIe emulation.
2018-08-11 19:42:47 -04:00
Thomas Harte
60ab6f0c2a
Entrusts IIe-esque character logic fully to the ROM.
2018-08-11 18:45:39 -04:00
Thomas Harte
a13eb351da
Implements the Enhanced IIe, other than some text selection errors.
2018-08-11 10:26:30 -04:00
Thomas Harte
4b91910fab
Removes erroneous addition.
2018-08-10 23:27:09 -04:00
Thomas Harte
f46d52364c
Merge pull request #519 from TomHarte/65C02
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Makes an initial pass at 65C02 emulation
2018-08-10 23:21:45 -04:00
Thomas Harte
878c63dcd2
Ensures ADC and SBC decimal take an extra cycle on the 65C02.
2018-08-10 22:52:55 -04:00
Thomas Harte
261fb3d4f8
Implements proper test for ADC/SBC 65C02 NZ, though not yet the proper timing.
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This gets Klaus Dorman's test to pass.
2018-08-10 22:42:35 -04:00
Thomas Harte
b63e0cff72
Improves has-completed test.
2018-08-10 22:27:01 -04:00
Thomas Harte
5d6e479338
Implements RMB and SMB, and fixes SBC (zero).
2018-08-10 22:13:51 -04:00
Thomas Harte
90094529a5
Implements TSB and TRB, and adds the extra BIT instructions.
2018-08-10 22:04:45 -04:00
Thomas Harte
aed4c0539e
Implements STZ.
2018-08-10 21:17:02 -04:00
Thomas Harte
8b50ab2593
Corrects (zero) behaviour.
2018-08-10 21:12:55 -04:00
Thomas Harte
95164b79c9
Attempted implementation of (zp) addressing mode.
2018-08-09 21:51:14 -04:00
Thomas Harte
6f838fe190
Implements INA and DEA.
2018-08-08 22:30:19 -04:00
Thomas Harte
bb680b40d8
Implements the 65C02's JMPs.
2018-08-08 22:26:57 -04:00
Thomas Harte
e3f6da6994
Implements the 65C02 NOPs.
2018-08-08 20:00:14 -04:00
Thomas Harte
e46bde35f5
Implements BBS and BBR.
2018-08-07 21:52:17 -04:00
Thomas Harte
32338bea4d
Implements BRA.
2018-08-06 22:37:30 -04:00
Thomas Harte
5c881bd19d
Implements PLX, PLY, PHX and PHY.
2018-08-06 22:00:23 -04:00
Thomas Harte
1a44ef0469
Introduces Klaus Dorman's 65C02 tests. All failing.
2018-08-06 21:48:43 -04:00
Thomas Harte
ebce9a2e51
Fixes test target.
2018-08-06 21:15:13 -04:00
Thomas Harte
633af4d404
The operations table is now per-instance.
2018-08-06 20:47:14 -04:00
Thomas Harte
76a73c835c
Forces 6502 consumers to declare which model — the original, 65C02 or 65SC02.
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All present machines use a regular 6502.
2018-08-06 20:06:07 -04:00
Thomas Harte
c1d1c451ef
Merge pull request #518 from TomHarte/MacInsertDisplay
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Tweaks the Mac UI
2018-08-06 19:12:17 -04:00
Thomas Harte
3be30d8c71
Tries once again to introduce file type icons.
2018-08-06 19:08:27 -04:00
Thomas Harte
d4c1244485
Adds a hint for users.
2018-08-06 18:56:59 -04:00
Thomas Harte
c61b9dca17
Ensures the Mac doesn't show the 'Insert...' option for machines that can't accept an insertion.
2018-08-06 18:52:42 -04:00
Thomas Harte
39bf682016
Adds mentions of the IIe.
2018-08-06 12:03:54 -04:00
Thomas Harte
60ac9b49ea
Merge pull request #517 from TomHarte/MacInsertUI
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Completes Mac UI 'Insert...' change
2018-08-05 22:58:16 -04:00
Thomas Harte
a8bb18e2cf
Merge branch 'master' into MacInsertUI
2018-08-05 22:57:28 -04:00
Thomas Harte
1852786609
Merge pull request #516 from TomHarte/MacInsertUI
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Adds an 'Insert...' menu option.
2018-08-05 22:51:00 -04:00
Thomas Harte
31df8c7e91
Corrects improper NSWindowController sheet stack manipulation.
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As a result, 'Insert...' now seems to work properly.
2018-08-05 22:47:51 -04:00
Thomas Harte
832939f5b7
Merge branch 'master' into MacInsertUI
2018-08-05 22:39:00 -04:00
Thomas Harte
c2d9e1ec81
Merge pull request #515 from TomHarte/POPImage
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Adds an Apple II screenshot to the readme.
2018-08-05 17:58:53 -04:00
Thomas Harte
673b915ee8
Reduces post-table image size a little.
2018-08-05 17:57:37 -04:00
Thomas Harte
032a62dfff
Adds An Apple II screenshot to the mix.
2018-08-05 17:56:10 -04:00
Thomas Harte
f2d78182a3
Merge pull request #514 from TomHarte/VideoFixes
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Fixes various IIe video deficiencies.
2018-08-05 17:49:13 -04:00
Thomas Harte
de68e70246
Fixes various IIe video deficiencies.
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Specifically:
* the double-high resolution switches should be read/write; and
* the other IIe-specific switches should cause a video update for real-time effect.
2018-08-05 17:47:23 -04:00
Thomas Harte
e07447eb9a
Merge pull request #513 from TomHarte/JoystickRange
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Significant improves Apple II joystick compatibility
2018-08-05 17:37:38 -04:00
Thomas Harte
5cdeb58571
Makes digital to analogue conversion more extreme.
2018-08-05 17:36:20 -04:00
Thomas Harte
ce14cc8677
Flips meaning of analogue input bits, correcting most joystick titles.
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Mysteriously, some functioned correctly before this. But they continue to do so.
2018-08-05 17:36:01 -04:00
Thomas Harte
bcd0479074
This in principle completes the insert action.
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With the caveat that 'New...' machines seem to have blocked the window's panel queue somehow.
2018-08-05 13:12:02 -04:00
Thomas Harte
d72dd8c4ff
Merge branch 'master' into macInsertUI
2018-08-05 11:54:26 -04:00
Thomas Harte
f7ce86fef8
Merge pull request #512 from TomHarte/80Text
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Extends correct text handling to 80-column mode.
2018-08-04 22:28:59 -04:00
Thomas Harte
55f2fccf5e
Extends correct text handling to 80-column mode.
2018-08-04 22:25:29 -04:00
Thomas Harte
c939a274be
Makes first attempt to connect up an in-machine open panel.
2018-08-04 22:21:23 -04:00
Thomas Harte
101fb5d7bf
Merge pull request #511 from TomHarte/ColecoSizeCheck
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Relaxes ColecoVision cartridge image size check
2018-08-04 21:47:30 -04:00
Thomas Harte
3c51e335c3
Makes extra sure not to try to read from an empty characters list.
2018-08-04 21:40:26 -04:00
Thomas Harte
33ea90678c
Relaxes ColecoVision cartridge size test.
2018-08-04 21:40:02 -04:00
Thomas Harte
11ae2c64ba
Merge pull request #502 from TomHarte/IIe
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Extends Apple II emulation to include the IIe
2018-08-04 21:02:45 -04:00
Thomas Harte
26624d7652
Fixes vertical blank signal; it should be the other way around.
2018-08-04 20:57:02 -04:00
Thomas Harte
85fb4773b0
Tweaks Apple key mapping and implements reset_all_keys.
2018-08-04 20:31:37 -04:00
Thomas Harte
099d66804e
Makes colour burst phase explicit.
2018-08-04 19:29:34 -04:00
Thomas Harte
086596c28e
Adds reading of vertical blank and implements the full IIe keyboard logic.
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i.e. there are now two Apple keys, and shift isn't assumed.
2018-08-04 19:17:04 -04:00
Thomas Harte
3aeb4213fe
Implements the C010 read value.
2018-08-04 17:57:02 -04:00
Thomas Harte
558b96bc05
Corrects IIe text display.
2018-08-04 16:52:29 -04:00
Thomas Harte
e97cc40a2c
Corrects typo in Cx-page ROM paging.
2018-08-04 12:44:58 -04:00
Thomas Harte
94503ed771
Disables the macOS Apple II options panel, since it now has no options.
2018-08-04 12:37:55 -04:00
Thomas Harte
c4f86cc324
The Disk II now being its proper speed, withdraws the quickload option.
2018-08-03 21:20:21 -04:00
Thomas Harte
70c4d6b9b3
Adds a one second delay between controller and drive motor off.
2018-08-03 21:13:18 -04:00
Thomas Harte
78c7137427
Avoids observer communication if motor status hasn't changed.
2018-08-03 21:11:22 -04:00
Thomas Harte
74a2f717b3
Turns down the composite signal amplitude a little, to help colour distinctness.
2018-08-01 18:52:42 -04:00
Thomas Harte
98bb5bd9f1
Ensures flux bits are observable for two cycles rather than one; it should be 1us.
2018-07-31 23:01:11 -04:00
Thomas Harte
c91eaaf8da
Takes a stab at double low-res graphics.
2018-07-31 21:45:09 -04:00
Thomas Harte
a36f37d240
Introduces a 1/14th delay in output of double high res.
2018-07-31 21:29:51 -04:00
Thomas Harte
c773d3501a
Implements the INTC8ROM switch.
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Finally causing the Zellyn tests to pass! Is this nightmare behind me?
2018-07-31 19:00:46 -04:00
Thomas Harte
5810f9b3f9
Fixes high resolution address range and switching logic.
2018-07-30 23:23:18 -04:00
Thomas Harte
3f56683342
Fixes order of deserialisation between auxiliary and base RAM.
2018-07-30 23:08:45 -04:00
Thomas Harte
16ccbdefd6
Of course, | has higher precedence than ?. Classic!
2018-07-30 23:08:22 -04:00
Thomas Harte
a533d09fe7
Sets the IIe as the default model.
2018-07-30 23:07:34 -04:00
Thomas Harte
e9aaa5bbdf
Factors out the page-mapping function.
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For one less potential source of failure.
2018-07-30 22:23:48 -04:00
Thomas Harte
ecb26e3281
Corrections: slot_C3_rom_ works the other way around; 80STORE doesn't affect most of RAM but does always affect the text screen.
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Also factored out `set_zero_page_paging` for consistency.
2018-07-30 19:54:25 -04:00
Thomas Harte
5aa0b17720
Improves IIe paging further.
2018-07-29 23:02:27 -04:00
Thomas Harte
632b37ecec
Attempts an implementation of auxiliary memory.
2018-07-29 10:41:12 -04:00
Thomas Harte
c905de2e40
Restores IIe ROM-over-card paging.
2018-07-28 13:31:25 -04:00
Thomas Harte
bc2afe69e1
Accepting that memory mapping on a IIe is more complicated than I anticiapted, introduces mapping for all pages.
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Also picks a name for the Unenhanced Apple IIe ROM.
2018-07-28 13:02:49 -04:00
Thomas Harte
894998b163
Merge branch 'master' into IIe
2018-07-28 10:54:04 -04:00
Thomas Harte
51192d8397
Merge pull request #508 from TomHarte/Whitespace
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Eliminates various blank lines.
2018-07-28 10:53:17 -04:00
Thomas Harte
3c33ccd730
Eliminates various blank lines.
2018-07-28 10:52:34 -04:00
Thomas Harte
3e35109d63
Merge pull request #507 from TomHarte/BetterBMPDestination
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Use `xdg-user-dir PICTURES` instead of $HOME for screenshots
2018-07-28 10:48:28 -04:00
Thomas Harte
99c770eab4
Ensure that the output of xdg-user-dir is properly filtered.
2018-07-28 10:45:50 -04:00
Thomas Harte
34aa78b7ce
Attempts to use xdg-user-dir PICTURES in preference to $HOME for pictures.
2018-07-28 09:14:18 -04:00
Thomas Harte
8cca9c2055
Merge branch 'master' into IIe
2018-07-27 23:52:39 -04:00
Thomas Harte
85ce21c79f
Merge pull request #505 from TomHarte/MacScreenshots
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Attempts to introduce screenshot capture for macOS.
2018-07-27 23:43:13 -04:00
Thomas Harte
d19d949b9c
Removes unnecessary import.
2018-07-27 23:41:55 -04:00
Thomas Harte
1cb3713b84
Attempts to introduce screenshot capture for macOS.
2018-07-27 23:37:24 -04:00
Thomas Harte
689850d698
Merge pull request #504 from TomHarte/SDLBMPByteOrder
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Ensures SDL is properly informed of buffer byte order.
2018-07-27 18:53:16 -04:00
Thomas Harte
c572a52049
Ensures SDL is properly informed of buffer byte order.
2018-07-27 18:51:38 -04:00
Thomas Harte
41765e00c4
Merge branch 'master' into IIe
2018-07-26 21:24:46 -04:00
Thomas Harte
080aa0acc5
Merge pull request #503 from TomHarte/SDLScreenshots
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Adds screenshot saving upon ctrl+shift+d.
2018-07-26 20:58:35 -04:00
Thomas Harte
5e7c46a72a
Adds screenshot saving upon ctrl+shift+d.
2018-07-26 20:53:12 -04:00
Thomas Harte
5f2b9b2d5a
Implements the alternative zero page soft switch.
2018-07-25 22:10:21 -04:00
Thomas Harte
5c4506a9db
Talks the IIe into proceeding to a beep and an improperly-formed logo.
2018-07-25 21:43:12 -04:00
Thomas Harte
55a6431fb3
Puts in enough logic to be able to launch a non-functional IIe.
2018-07-25 18:58:34 -04:00
Thomas Harte
ede2696a77
Edges further towards implementing the IIe video subsystem.
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All video-specific switches are in place, and mostly honoured, and a IIe machine configuration is advertised at least.
2018-07-24 22:15:42 -04:00
Thomas Harte
59b9e39022
Starts the process of supporting the Apple IIe graphics modes.
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Albeit that I'm not yet even up on the proper soft switches.
2018-07-23 22:14:41 -04:00
Thomas Harte
6b2970f2f2
Ensures no-hat input doesn't override analogue axes.
2018-07-22 17:29:37 -04:00
Thomas Harte
6a73fe7d65
Merge pull request #500 from TomHarte/MacJoysticks
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Implements initial joystick support for the Mac
2018-07-22 16:56:40 -04:00
Thomas Harte
1362906f94
Wires joystick support all the way through to machines.
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Ensures there's only one joystick manager, which is shared by all machines, with input going only to the key window.
2018-07-22 16:55:47 -04:00
Thomas Harte
8f4042c4bb
Permits joysticks to be queried for number of fire buttons.
2018-07-22 16:52:58 -04:00
Thomas Harte
c05b6397b0
Attempts a full implementation of the joystick manager.
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So it currently vends a list of existing joysticks plus their states. More work will be required for a UI — e.g. there is no way to identify one joystick from another — but this'll do for now.
2018-07-22 15:23:26 -04:00
Thomas Harte
8d18808efe
Walks a few steps further along device inspection.
2018-07-20 23:33:04 -04:00
Thomas Harte
09950d9414
Gamely starts to create a HID input manager for joysticks/pads/etc.
2018-07-19 22:43:01 -04:00
Thomas Harte
badbbdf155
Merge pull request #498 from TomHarte/DisplayBorder
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Resolves border issues in fullscreen mode
2018-07-16 22:01:08 -04:00
Thomas Harte
2832792fed
Corrects improper use of doubles.
2018-07-16 21:55:19 -04:00
Thomas Harte
efa45b9504
Adds a right gutter to clip persistence errors.
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Also uncovers and corrects a long-standing centring error.
2018-07-16 21:52:31 -04:00
Thomas Harte
523749edf8
Merge branch 'master' into DisplayBorder
2018-07-16 20:00:52 -04:00
Thomas Harte
5a0499e8a7
Merge pull request #499 from TomHarte/EditorConfig
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Adds a .editorconfig to aid Github display.
2018-07-16 20:00:27 -04:00
Thomas Harte
258c8b5900
Adds a .editorconfig to aid Github display.
2018-07-16 19:59:03 -04:00
Thomas Harte
24b861f056
Eliminates make_unique as this is presently a C++11 project.
2018-07-15 22:52:36 -04:00
Thomas Harte
29f7f4d432
Adds missing #include.
2018-07-15 22:47:50 -04:00
Thomas Harte
21080a1149
Merge branch 'master' into DisplayBorder
2018-07-15 22:31:33 -04:00
Thomas Harte
1d068fd09b
Merge pull request #497 from TomHarte/RobocopSprites
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Ensures only the first 8px of sprites is output in 8x8 mode.
2018-07-15 22:30:42 -04:00
Thomas Harte
92065813ef
Ensures only the first 8px of sprites is output in 8x8 mode.
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Also adds a little extra documentation.
2018-07-15 22:21:29 -04:00
Thomas Harte
3e9ef6b8cb
Adds indicator lights for the SDL port.
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To complete #426
2018-07-15 20:19:06 -04:00
Thomas Harte
c9451a5382
Introduces an object for drawing OpenGL rectangles.
2018-07-14 17:42:23 -04:00
Thomas Harte
2be3b027db
Merge branch 'master' into DisplayBorder
2018-07-14 13:13:29 -04:00
Thomas Harte
e339d169c5
Ensures the joystick doesn't obstruct tape input.
2018-07-12 22:10:05 -04:00
Thomas Harte
87001f86ee
Merge pull request #495 from TomHarte/MSXJoysticks
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Adds joystick support for the MSX.
2018-07-12 21:44:26 -04:00
Thomas Harte
58484e8f37
Adds joystick support for the MSX.
2018-07-12 21:42:47 -04:00
Thomas Harte
94f68f9d55
Merge pull request #494 from TomHarte/CustomInfoBlock
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Corrects TZX custom info block parsing.
2018-07-11 22:22:49 -04:00
Thomas Harte
3f6944de54
Corrects custom info block parsing.
2018-07-11 22:21:35 -04:00
Thomas Harte
00cb4d26b3
Corrects typo.
2018-07-11 19:52:55 -04:00
Thomas Harte
774d8668bf
Merge pull request #493 from TomHarte/SpecificROMs
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Clarifies startup procedure for machines
2018-07-10 22:15:40 -04:00
Thomas Harte
8503589828
Corrects failure to retain OS.
2018-07-10 22:05:50 -04:00
Thomas Harte
0f95ef2059
Merge branch 'SpecificROMs' of github.com:TomHarte/CLK into SpecificROMs
2018-07-10 21:54:45 -04:00
Thomas Harte
efd812cf22
Ensures no buffer overrun when installing the OS ROM.
2018-07-10 21:54:36 -04:00
Thomas Harte
736e14c83e
Ensures no buffer overrun when installing the OS ROM.
2018-07-10 21:49:38 -04:00
Thomas Harte
57f161e64c
Corrects documentation of the media target.
2018-07-10 21:42:09 -04:00
Thomas Harte
0897210969
Neither cartridge machine should be a media target; their media can't be changed at runtime.
2018-07-10 21:40:13 -04:00
Thomas Harte
7e58a44771
Renames ConfigurationTarget to MediaTarget as per its newly-reduced interface.
2018-07-10 21:32:28 -04:00
Thomas Harte
e8f847d288
Fixes CRC generator used to verify Acorn programs.
2018-07-10 20:01:31 -04:00
Thomas Harte
a0f817108e
Minor style fix.
2018-07-10 20:01:11 -04:00
Thomas Harte
3862fdb44c
Simplifies initialisation procedure for all machines.
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With the side effect of allowing every machine to try to load only the ROMs that it needs.
2018-07-10 20:00:46 -04:00
Thomas Harte
3e2d271566
Merge pull request #491 from TomHarte/CPCClip
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[Re-]recalibrates CRT retrace period and affected view windows.
2018-07-05 22:38:20 -04:00
Thomas Harte
c97c5fa03a
[Re-]recalibrates CRT retrace period and affected view windows.
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In the hope of moving the CPC closer to the real CTM visible area.
2018-07-05 22:07:18 -04:00
Thomas Harte
fa63f7ffc3
Merge pull request #490 from TomHarte/NIBTails
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Ensures NIB tracks aren't truncated
2018-07-03 21:38:31 -04:00
Thomas Harte
bfccadd356
Corrects comment typo.
2018-07-03 21:38:04 -04:00
Thomas Harte
5b3512f1df
Attempts to pick an intelligent place to pad out tracks.
2018-07-03 20:10:22 -04:00
Thomas Harte
6e34e60f8a
Ensures no data is dropped in transcribing a NIB to real track data.
2018-07-03 20:01:07 -04:00
Thomas Harte
a391d0f4ae
Merge pull request #489 from TomHarte/OricDiskII
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Simplifies disk track storage and writing implementation
2018-07-02 22:09:58 -04:00
Thomas Harte
abc5c50b2e
Added some additional exposition.
2018-07-02 21:51:53 -04:00
Thomas Harte
1fcb461c42
Ensures that segments are written in a properly-circular fashion.
2018-07-02 19:35:49 -04:00
Thomas Harte
abca38a548
Makes an initial removal of PCMPatchedTrack. Farewell, old friend.
2018-07-01 22:49:57 -04:00
Thomas Harte
b4be2cd063
Implements PCMTrack::add_segment. Thereby completes PCMTrack::resampled_clone.
2018-07-01 18:28:25 -04:00
Thomas Harte
2d83eeb9c4
Further minor style improvements.
2018-07-01 17:59:43 -04:00
Thomas Harte
4d9e897cc3
Corrects addressing for deserialisation of bytes.
2018-07-01 15:58:56 -04:00
Thomas Harte
be664b5695
Ensures that start positions are properly related to sectors.
2018-07-01 15:53:48 -04:00
Thomas Harte
c3751066b7
Ensures segments are properly sized.
2018-07-01 15:43:31 -04:00
Thomas Harte
77feee8197
Applies minor style improvements.
2018-07-01 15:38:42 -04:00
Thomas Harte
f75af3b45e
Adds some extra exposition.
2018-07-01 14:41:17 -04:00
Thomas Harte
1471a35bb8
Reserves a more appropriate amount of data.
2018-07-01 14:40:48 -04:00
Thomas Harte
555c2a4377
Makes a first sweep at converting the storage underlying PCMSegment to vector<bool>.
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This is to remove another pain point, in preparation for the work immediately forthcoming but also work as-yet unknown.
2018-07-01 12:05:41 -04:00
Thomas Harte
16bef0dcd5
Starts the movement towards a world without PCMPatchedTrack.
2018-06-30 20:03:18 -04:00
Thomas Harte
cd464fc7de
Corrects status logging.
2018-06-26 20:53:08 -04:00
Thomas Harte
5b88207477
Merge pull request #488 from TomHarte/AYClarification
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Removes unused AY state and implements AND output readback.
2018-06-26 19:31:50 -04:00
Thomas Harte
df8c896193
Removes unused state and implements AND output readback.
2018-06-26 19:31:16 -04:00
Thomas Harte
5d3e1f7084
Merge pull request #487 from TomHarte/SpuriousKeyboard
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Corrects a misreported value when reading the AY if not in reading mode
2018-06-25 20:49:32 -04:00
Thomas Harte
59f8eeb05a
Ensures the AY goes high impedance when not in read mode.
2018-06-25 20:48:24 -04:00
Thomas Harte
0b14850467
Corrects some comments.
2018-06-24 23:02:36 -04:00
Thomas Harte
f72e260915
Merge pull request #486 from TomHarte/AppleIIEqualisation
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Ensures the Apple II retains horizontal sync for its entire display
2018-06-24 11:27:57 -04:00
Thomas Harte
640a84d456
Shift the h-within-v pulse to eliminate a curved top line.
2018-06-24 11:27:18 -04:00
Thomas Harte
04f6cb1750
Merge branch 'master' into AppleIIEqualisation
2018-06-23 23:10:29 -04:00
Thomas Harte
87d688b7e3
Merge pull request #485 from TomHarte/FurtherTweaks
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Various tweaks: Mac UI and CPC window size
2018-06-23 23:10:07 -04:00
Thomas Harte
26141a59b0
Moves all default Mac window positions up by 50px.
2018-06-23 23:09:34 -04:00
Thomas Harte
a93f8103ad
Zooms out the CPC a little more.
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To fix the maximum amount of content that I can, at least for now.
2018-06-23 22:15:34 -04:00
Thomas Harte
4a3d7c338a
Moves the activity window down to start at approximately the same top as the options window.
2018-06-23 22:14:44 -04:00
Thomas Harte
55ab305dbf
Introduces equalisation pulses for the Apple II.
2018-06-23 22:11:39 -04:00
Thomas Harte
e48ba89721
Merge pull request #484 from TomHarte/MachinePickerLocation
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Cleans up the Mac UI
2018-06-23 19:45:49 -04:00
Thomas Harte
9bb55b6b61
Ensures that 'Activity' view has minimum acceptable height.
2018-06-23 19:44:35 -04:00
Thomas Harte
c33308bdc5
Attempts to improve relative default window positions.
2018-06-23 18:59:19 -04:00
Thomas Harte
44a33941bf
Undoes Xcode's folder renaming.
2018-06-23 18:55:17 -04:00
Thomas Harte
cc34cd2133
Merge pull request #481 from TomHarte/CPCJoysticks
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Introduces joystick support for the CPC.
2018-06-23 17:09:32 -04:00
Thomas Harte
52c9f9e89e
Merge branch 'master' into CPCJoysticks
2018-06-23 16:43:49 -04:00
Thomas Harte
2363deb19c
Merge pull request #483 from TomHarte/BetterClip
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Picks more appropriate cropping now that I'm obeying HSYNC-as-blank.
2018-06-23 16:42:44 -04:00
Thomas Harte
1c6af279b2
Picks more appropriate cropping now that I'm obeying HSYNC-as-blank.
2018-06-23 16:40:17 -04:00
Thomas Harte
6e96275e1c
Merge pull request #482 from TomHarte/PixelCapture
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Ensures the pixel collection test is inline with other decisions.
2018-06-23 16:19:04 -04:00
Thomas Harte
9968342a11
Ensures the pixel collection test is inline with other decisions.
2018-06-23 16:18:33 -04:00
Thomas Harte
c248ecde48
Introduces joystick support for the CPC.
2018-06-21 22:46:10 -04:00
Thomas Harte
370952ab33
Merge pull request #480 from TomHarte/Blank
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Corrects left-border handling on the CPC
2018-06-21 20:08:09 -04:00
Thomas Harte
154c89e041
Introduces a missing separator.
2018-06-21 20:01:04 -04:00
Thomas Harte
d45f1a793d
Introduces composite/RGB selection for the Amstrad CPC.
2018-06-21 20:00:49 -04:00
Thomas Harte
9800951f18
Merge branch 'master' into Blank
2018-06-21 19:41:04 -04:00
Thomas Harte
17251997c2
Merge pull request #479 from TomHarte/8272Logging
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Returns sanity to 8272 logging.
2018-06-21 19:40:42 -04:00
Thomas Harte
5ab4cfee84
Factors out repeated hex-size setting.
2018-06-21 19:27:54 -04:00
Thomas Harte
a9eb0d02c6
Returns sanity to 8272 logging.
2018-06-20 23:02:32 -04:00
Thomas Harte
1f8b69a5b0
Attempts to honour the full CRTC 'sync' period, placing blank and the colour burst.
2018-06-20 22:38:54 -04:00
Thomas Harte
8b83f58d7a
Merge pull request #478 from TomHarte/CPCTimingTests
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Differentiates reasons for a read to be four cycles.
2018-06-20 21:39:12 -04:00
Thomas Harte
9a91ae38c1
Differentiates reasons for a read to be four cycles.
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Specifically, puts the enforced wait either before or after checking the wait line. More research may be required; it feels more likely to me that a forced post wait should complete the read then wait, but would that still count as a single machine cycle?
2018-06-20 21:34:21 -04:00
Thomas Harte
ad57caed5e
Merge pull request #476 from TomHarte/LongLines
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Increases permissible error in scanline length.
2018-06-19 22:25:37 -04:00
Thomas Harte
283ed8dbae
Increases permissible error in scanline length.
2018-06-19 22:24:11 -04:00
Thomas Harte
acb74185d5
Revokes test logging.
2018-06-19 19:39:09 -04:00
Thomas Harte
7a5d16ccf8
Merge pull request #475 from TomHarte/VisibleActivity
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Shows activity indicators on the Mac
2018-06-18 22:49:33 -04:00
Thomas Harte
adca862166
Finally makes an initial pass at logging macros.
2018-06-18 22:37:19 -04:00
Thomas Harte
1bdc718527
Ensures the MSX reports the proper number of drives.
2018-06-18 22:15:52 -04:00
Thomas Harte
685a80f95b
Ensures the Electron Plus 3 properly announces drives to an activity observer.
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Does away with lazy allocation as not all that helpful, and liable to cause complexity.
2018-06-18 21:49:57 -04:00
Thomas Harte
62eef8cb40
Reinstates proper ready behaviour.
2018-06-18 21:35:39 -04:00
Thomas Harte
6ed3a49fe1
Made failed attempt to apply height constraint.
2018-06-18 21:35:22 -04:00
Thomas Harte
17702bfb89
Causes GUI LEDs to reflect their underlying activity.
2018-06-18 21:22:51 -04:00
Thomas Harte
292e02702a
Progresses very slightly to being able to show up to four activity indicator names.
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Blinking to come.
2018-06-17 22:52:17 -04:00
Thomas Harte
5a56d8a5d0
Exposes a list of machine LEDs to Swift.
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Also gets explicit about nullability on the Objective-C side.
2018-06-17 18:53:56 -04:00
Thomas Harte
3da1d5700c
Merge pull request #472 from TomHarte/SDLJoystick
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Connects SDL joystick input to joystick machines.
2018-06-16 22:26:19 -04:00
Thomas Harte
d437e06e15
Adds support for digital hat input as an alternative to analogue sticks.
2018-06-16 22:25:46 -04:00
Thomas Harte
6a3702a5c7
Reduces space for floating point accuracy errors.
2018-06-16 22:22:40 -04:00
Thomas Harte
83a654540a
Fixes threshold for positive movement.
2018-06-16 22:22:14 -04:00
Thomas Harte
678bd93c52
Connects SDL joystick input to joystick machines.
2018-06-14 22:37:44 -04:00
Thomas Harte
1bf0c1891a
Merge pull request #471 from TomHarte/FadeAwayNotRadiate
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Hides persistent low-part colour channel errors.
2018-06-14 20:45:41 -04:00
Thomas Harte
b899a22c7d
Hides persistent low-part colour channel errors.
2018-06-14 20:40:27 -04:00
Thomas Harte
1bd6bbca8d
Merge pull request #468 from TomHarte/PALColour
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Tweaks blending back to appease interlaced video
2018-06-14 18:28:06 -04:00
Thomas Harte
14a2e470e4
Corrects overbrightness issue with autogeneration of PAL composite from an RGB source.
2018-06-14 18:25:48 -04:00
Thomas Harte
41dcf1de42
Increases blur again just a little more, after consideration of interlaced output.
2018-06-14 18:25:04 -04:00
Thomas Harte
0c65385c82
Undoes older interpretation of alternating phase.
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I now understand, hopefully, that it's only the phase of the second colour component that alternates. That has the pointwise effect of reversing the colour signal. Hence the effect of phase errors cancelling themselves out up on successive lines up to a point.
2018-06-14 18:24:32 -04:00
Thomas Harte
4aaf43150a
Merge pull request #467 from TomHarte/Sharpness
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Decreases inter-frame blur.
2018-06-14 17:43:16 -04:00
Thomas Harte
f05ee525cb
Tweaks blurriness downward.
2018-06-14 17:41:17 -04:00
Thomas Harte
1172c4fd97
Merge pull request #466 from TomHarte/CPCKeyboard
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Improves key state handling under SDL when switching to/from full screen
2018-06-14 17:26:11 -04:00
Thomas Harte
15deef50c8
Adds a key reset upon screen mode changes in SDL.
2018-06-14 17:24:16 -04:00
Thomas Harte
7728adfc5a
Eliminates repetition of the 10 constant.
2018-06-14 17:23:47 -04:00
Thomas Harte
eff67f2250
Merge pull request #465 from TomHarte/SDLSwitch
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Changes SDL full screen/window toggle and allows ROM path to be specified
2018-06-13 21:36:36 -04:00
Thomas Harte
64e3cf5de2
Ensured all usage messages reflect latest usage.
2018-06-13 21:31:13 -04:00
Thomas Harte
31a6d620e8
Revokes make_unique; I had forgotten that's a C++14 feature.
2018-06-13 21:24:12 -04:00
Thomas Harte
dfd37e7dec
Switches full-screen command and adds user-specifiable ROM paths.
2018-06-13 21:21:52 -04:00
Thomas Harte
8d8f244bf5
Merge pull request #461 from TomHarte/Joystick
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Introduces Joystick support for the Apple II
2018-06-13 19:34:26 -04:00
Thomas Harte
037b4802db
Eliminates unused usings.
2018-06-13 19:26:59 -04:00
Thomas Harte
51da21b844
Formally introduces keyboard-as-joystick for the Mac, and fixes discovered joystick issues.
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Specifically:
* digital to analogue conversion not returning to centre;
* Apple II axes being the wrong way around; and
* Apple II buttons using improper selection logic.
2018-06-13 19:22:34 -04:00
Thomas Harte
0be19d8de7
Ensures analogue channels which are already charging don't abide by c070.
2018-06-13 18:16:02 -04:00
Thomas Harte
f26e4734b3
Adds use of joystick input in the Apple II.
2018-06-12 22:21:43 -04:00
Thomas Harte
f1b430338e
Makes the Apple II a joystick machine.
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Albeit that the values supplied to its joysticks do not currently make it into the emulated state.
2018-06-11 22:16:32 -04:00
Thomas Harte
2954373115
Introduces an intermediary for digital <-> analogue conversion.
2018-06-11 21:35:03 -04:00
Thomas Harte
42d21ea3a9
Merge branch 'master' into Joystick
2018-06-10 21:08:59 -04:00
Thomas Harte
7d761f145f
Corrects typo that mapped Apple II options to the Electron.
2018-06-10 21:05:14 -04:00
Thomas Harte
27657fcde0
Adds necessary header for assert.
2018-06-10 21:02:19 -04:00
Thomas Harte
3ea2a4ccb8
Moves the joystick class towards accepting analogue inputs.
2018-06-10 20:45:52 -04:00
Thomas Harte
a1c60152d4
Merge pull request #460 from TomHarte/RWTSAcceleration
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Introduces optional quick loading of Apple DOS 3.3 programs
2018-06-10 18:41:23 -04:00
Thomas Harte
69da00fcfb
Modifies test slightly for usual RWTS16 location.
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Also eliminates messy print logging.
2018-06-10 18:41:09 -04:00
Thomas Harte
c4108efc5c
Adds a more accurate option description for the Apple II.
2018-06-10 18:32:22 -04:00
Thomas Harte
d576ff1172
Exposes DOS 3.3 acceleration as an option.
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Albeit with an unhelpful label in the macOS GUI for now.
2018-06-10 18:28:29 -04:00
Thomas Harte
af54666c23
Implements RWTS acceleration.
2018-06-10 17:58:16 -04:00
Thomas Harte
e0b75b6e3d
Corrects logic for avoiding overwrite.
2018-06-09 21:47:51 -04:00
Thomas Harte
12c59ede09
Adds writeback of track location.
2018-06-09 20:34:12 -04:00
Thomas Harte
b4d0d4fff6
Starts building out some fast-loading infrastructure for DOS 3.3.
2018-06-09 17:29:14 -04:00
Thomas Harte
a694844190
Moves gap 1 into proper ownership.
2018-06-09 17:28:08 -04:00
Thomas Harte
28f2d331a8
Switches to more realistic gaps.
2018-06-09 13:06:45 -04:00
Thomas Harte
dde9b73a22
Creates the through-path that will be necessary for RWTS acceleration.
2018-06-09 12:51:53 -04:00
Thomas Harte
fb4bb21bf6
Ensures an objective copy of the bus address is kept, and forwarded to cards.
2018-06-08 20:12:15 -04:00
Thomas Harte
744c35b617
Caps the number of sync bytes inserted at five.
2018-06-06 21:52:26 -04:00
Thomas Harte
9ac21a4e71
Switches to ignoring the byte count, trusting the bit count entirely.
2018-06-06 21:51:55 -04:00
Thomas Harte
94359e9c75
Merge pull request #458 from TomHarte/ApplePhase
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Corrects NTSC Q phase
2018-06-03 08:11:43 -04:00
Thomas Harte
076fa55651
Corrects: flux set is no-flux incoming.
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This restores good sleeping behaviour.
2018-06-03 08:11:17 -04:00
Thomas Harte
d380595ad4
Unrolls the loops for slightly fewer conditionals.
2018-06-03 07:27:03 -04:00
Thomas Harte
d84b8700a3
Switches the Apple II to one byte per pixel.
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Just trying to get it right for now; optimisation to come.
2018-06-02 22:03:45 -04:00
Thomas Harte
80b281d9f1
Switches back to whole bytes per pixel, owing to persistent precision problems at 1bpp.
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Also fixes the inaccurately-named `cycles_since_update_`.
2018-06-02 18:25:00 -04:00
Thomas Harte
69dc3cc4d8
Switches to using the same varying for byte and subpixel selection.
2018-06-01 22:52:29 -04:00
Thomas Harte
1a9cea050e
Minor: ensure AY registers *read* as 0 from reset, as well as being 0.
2018-06-01 19:48:42 -04:00
Thomas Harte
0833412df9
Corrects port for ZON-X reads.
2018-06-01 19:45:37 -04:00
Thomas Harte
35e84ff1a8
Corrects NTSC quadrature phase.
2018-05-31 21:40:46 -04:00
Thomas Harte
8dd7c6ef23
Eliminates 'reversed_c' as I no longer believe low-resolution colour numbers are reversed.
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Also gets explicit about phase.
2018-05-29 22:30:45 -04:00
Thomas Harte
a26ab7086d
Merge pull request #456 from TomHarte/TristateSleeper
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Commutes `Sleeper` to `ClockingHint::Source`
2018-05-28 18:25:21 -04:00
Thomas Harte
b2464598d0
Forces the Apple II bus handler call inline.
2018-05-28 18:21:01 -04:00
Thomas Harte
6812a001d8
Teaches the Oric to apply a lighter Disk II touch when possible.
2018-05-28 18:20:43 -04:00
Thomas Harte
6c16754a6b
Strips further improper constexprs.
2018-05-28 17:48:55 -04:00
Thomas Harte
75f9e3caeb
Resolves incorrect bracketing.
2018-05-28 17:48:35 -04:00
Thomas Harte
ad5afe21ee
Removes constexpr from things which are not const. Duh.
2018-05-28 17:28:57 -04:00
Thomas Harte
8a566cc1dd
Experimentally goes to town on constexpr.
2018-05-28 17:20:11 -04:00
Thomas Harte
928aab13dc
Introduces more granular clocking announcements to the Disk II.
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As well as making it accept the clock rate it'll actually receive, to supply to the drives, so that they spin at the proper speed.
2018-05-28 17:19:29 -04:00
Thomas Harte
f3fe711542
Attempts to reduce FDC costs.
2018-05-27 23:55:04 -04:00
Thomas Harte
db8d8d8404
Commutes Sleeper to ClockingHint::Source, making state more granular.
2018-05-27 23:17:06 -04:00
Thomas Harte
6220ccb5d3
Merge pull request #455 from TomHarte/HumptyDumpty
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Relaxes .p validation even further
2018-05-27 17:01:07 -04:00
Thomas Harte
20843305dd
Removes unused calculation of vars.
2018-05-27 13:31:30 -04:00
Thomas Harte
8f6c0f6a8d
Eliminates vars test.
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At least Humpty Dumpty is a working .p that doesn't satisfy the test.
2018-05-26 19:05:35 -04:00
Thomas Harte
ede2df7e70
Merge pull request #452 from TomHarte/NIBWriting
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Adds write support for NIBs
2018-05-25 18:40:35 -04:00
Thomas Harte
d45231c1a8
Introduces an additional validation test.
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Thereby satisfying the TODO.
2018-05-25 18:40:15 -04:00
Thomas Harte
772812b35f
Corrects improper textual reference to interface names.
2018-05-25 18:31:20 -04:00
Thomas Harte
f443fd44b5
Introduces support for writing NIBs.
2018-05-25 18:30:55 -04:00
Thomas Harte
79c60b8984
Adds necessary import for memcpy.
2018-05-24 21:58:50 -04:00
Thomas Harte
2dc2c2ce79
Merge pull request #449 from TomHarte/WOZWriting
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Implements write support for WOZ files
2018-05-24 21:48:28 -04:00
Thomas Harte
523ca3264b
Implements write support for WOZ files.
2018-05-24 21:44:31 -04:00
Thomas Harte
4036c60b45
Merge branch 'master' into WOZWriting
2018-05-24 19:01:04 -04:00
Thomas Harte
7d652e53e2
Merge pull request #450 from TomHarte/OricMicrodisc
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Corrects meaning of the Microdisc's paging control.
2018-05-24 18:58:07 -04:00
Thomas Harte
7c3dd55e5c
Corrects typo and improves exposition.
2018-05-24 18:57:35 -04:00
Thomas Harte
1b43381be0
Corrects meaning of the Microdisc's paging control.
2018-05-24 18:53:02 -04:00
Thomas Harte
8f78e5039e
Factors out track seeking.
2018-05-24 18:45:00 -04:00
Thomas Harte
57ee6d4e41
Merge branch 'master' into WOZWriting
2018-05-23 22:32:30 -04:00
Thomas Harte
2868b1eca7
Adds missing import for memcpy.
2018-05-23 22:31:35 -04:00
Thomas Harte
a4d7703efd
Adds missing #include.
2018-05-23 22:28:00 -04:00
Thomas Harte
ca4bc92c33
Adds WOZ CRC checking.
2018-05-23 22:22:17 -04:00
Thomas Harte
853261364e
Generalised CRC generation and created specific subclasses for the CCITT CRC16 and CRC32.
2018-05-23 22:21:57 -04:00
Thomas Harte
d3c5e4267f
Merge pull request #447 from TomHarte/DiskIIWriting
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Substantially improves Disk II emulation, including write support
2018-05-22 21:54:16 -04:00
Thomas Harte
086b801c29
Mildly rearranges to avoid unnecessary call.
2018-05-22 21:50:07 -04:00
Thomas Harte
f9c25372c2
Ensures cards get messaged regardless of memory area.
2018-05-22 21:49:34 -04:00
Thomas Harte
ea92363e6c
Attempts to get the Apple II to honour the AppleII::Card select constraints appropriately.
2018-05-22 20:34:59 -04:00
Thomas Harte
015f692bd3
The Disk II card now commutes Disk II sleep activity to select constraints.
2018-05-22 19:51:39 -04:00
Thomas Harte
80d34f5511
Specs out a new AppleII::Card interface.
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Doesn't yet fully implement it on the Apple II side though.
2018-05-21 20:54:53 -04:00
Thomas Harte
e482929da8
Enhances the Disk II's ability to sleep.
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Also enables Disk II sleep observation in the Oric.
2018-05-19 23:15:28 -04:00
Thomas Harte
4952657b31
Factors out physical to logical sector conversion.
2018-05-19 22:59:59 -04:00
Thomas Harte
46fae1a761
Corrected: now maps in the proper direction.
2018-05-19 22:50:33 -04:00
Thomas Harte
a09fb01d71
Makes an attempt at write support for Apple DSK files.
2018-05-19 22:30:52 -04:00
Thomas Harte
7cee3b7449
Resolves potential overflow / sign corruption.
2018-05-19 22:28:29 -04:00
Thomas Harte
8263c48a1d
Added a guarantee that the TrackSerialiser won't modify tracks it receives.
2018-05-18 23:03:28 -04:00
Thomas Harte
ed06533e60
Implements write support out of the Disk II.
2018-05-18 22:07:58 -04:00
Thomas Harte
7b7beb13a3
Eliminates the fiction of setting and getting registers.
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The Disk II seems lower level than that; it will read the data bus whenever it likes, it is the programmer's responsibility to keep up with that. It also reserves the right not to load the bus regardless of whether it receives a read or write access.
2018-05-17 21:39:11 -04:00
Thomas Harte
c46007332a
Switches to returning the shift register contents on every even read.
2018-05-17 20:18:34 -04:00
Thomas Harte
908d3b0ee5
Slightly wrong as to the details, but gets the controller trying to output.
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At an initial look, I think the shift register should end up on the data bus for all odd accesses. Need to investigate more thoroughly.
2018-05-16 22:37:22 -04:00
Thomas Harte
8a031b1137
Eliminates 'data' register as it doesn't exist; rejigs state machine command set.
2018-05-16 22:09:59 -04:00
Thomas Harte
1aba9f807e
Ensures proper upward propagation of sleeping from first start.
2018-05-16 22:07:54 -04:00
Thomas Harte
4c49963988
Switches to proper handling of the motor control and write protection.
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Per Understanding the Apple II the drive looks write protected while phase 1 is enabled.
2018-05-16 21:44:09 -04:00
Thomas Harte
821d40fe74
Reinstitutes the cap on maximum updating time.
2018-05-16 21:42:05 -04:00
Thomas Harte
6ab1cf9325
Merge pull request #446 from TomHarte/MachinePickerLayout
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Corrects various placement inconsistencies in the machine picker
2018-05-16 19:21:57 -04:00
Thomas Harte
076c0a48e9
Slightly tweaks initial size that this doesn't resize when switching to the Vic selection page.
2018-05-16 19:19:50 -04:00
Thomas Harte
fde613a5c4
Corrects various placement inconsistencies.
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Hopefully to move into line with Apple's HID standards.
2018-05-16 19:15:49 -04:00
Thomas Harte
44ad0970be
Merge pull request #445 from TomHarte/ColecoVisionDelay
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Imposes a three-cycle penalty for SN76489 access.
2018-05-16 19:06:33 -04:00
Thomas Harte
b3f4d0ed8c
Imposes a three-cycle penalty for SN76489 access.
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This is my reading of (i) the SN76489 data sheet; plus (ii) the ColecoVision schematic.
2018-05-16 19:06:03 -04:00
Thomas Harte
bfdd3468ea
Merge pull request #444 from TomHarte/AppleAudio
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Introduces a low-pass filter for the Apple II
2018-05-15 21:33:52 -04:00
Thomas Harte
f7decd80b6
As an initial step, ensured latency doesn't pile up endlessly.
2018-05-15 21:12:43 -04:00
Thomas Harte
7c2721d54d
Adjusted number again. But we'll see.
2018-05-15 20:43:13 -04:00
Thomas Harte
8907d0a9a7
Adds a low-pass filter to the Apple II's audio.
2018-05-14 21:56:14 -04:00
Thomas Harte
6c8e6e9303
Merge pull request #443 from TomHarte/DiskGainNoise
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Ensures generation of random noise if too many zeroes exist on a disk.
2018-05-14 20:03:52 -04:00
Thomas Harte
85c4e009f3
Undoes reformatting error.
2018-05-14 20:03:32 -04:00
Thomas Harte
76802b5e38
Eliminates arc4random.
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It seems not to be as portable as I'd hoped.
2018-05-14 20:01:20 -04:00
Thomas Harte
9f2f388e5a
Ensures generation of random noise if too many zeroes exist on a disk surface.
2018-05-14 19:17:34 -04:00
Thomas Harte
729f53d84f
Goes explicit with the Apple II.
2018-05-14 09:43:24 -04:00
Thomas Harte
d2d7ab5d04
Merge pull request #441 from TomHarte/AppleDSKFixes
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Corrects various Apple DSK handling errors.
2018-05-13 22:42:21 -04:00
Thomas Harte
5107c7c23d
Ensures all keypresses are entered as upper case.
2018-05-13 22:40:28 -04:00
Thomas Harte
4dbd1f1358
Corrects Disk II ROM visibility.
2018-05-13 22:36:02 -04:00
Thomas Harte
7996040f35
Rejigs segment conjugation to avoid potential accidental empty byte.
2018-05-13 22:30:44 -04:00
Thomas Harte
0055efb720
Corrects failure of expression in track size expansion.
2018-05-13 22:29:36 -04:00
Thomas Harte
dfa5eef20d
Switches the command to issue to capitals; the Pravetz redefines lowercase as non-Latin.
2018-05-13 19:30:44 -04:00
Thomas Harte
3053acb4f3
Merge pull request #440 from TomHarte/VapourLock
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Attempts to implement vapour lock bus behaviour.
2018-05-13 18:55:13 -04:00
Thomas Harte
dea9892a85
Attempts to implement vapour lock bus behaviour.
2018-05-13 18:53:32 -04:00
Thomas Harte
b9b6327707
Merge pull request #439 from TomHarte/ASCII
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Eliminates all non-ASCII codes from all crossplatform code
2018-05-13 16:06:08 -04:00
Thomas Harte
84ae2964fd
Switches to explicit unicode entry points.
2018-05-13 16:02:46 -04:00
Thomas Harte
149b940f84
Commutes the pound sign to a proper unicode value.
2018-05-13 15:50:56 -04:00
Thomas Harte
7226d8d4f7
Eliminates all instances of µ.
2018-05-13 15:46:14 -04:00
Thomas Harte
ad9b0cd4e3
Eliminates all endashes.
2018-05-13 15:43:03 -04:00
Thomas Harte
484e640d43
Removes stray non-ASCII typo.
2018-05-13 15:37:35 -04:00
Thomas Harte
5d6b5d9f10
Eliminates all emdashes in cross-platform code.
2018-05-13 15:34:31 -04:00
Thomas Harte
0b771ce61a
Removes all instances of the copyright symbol.
2018-05-13 15:19:52 -04:00
Thomas Harte
72e07d4e83
Merge pull request #438 from TomHarte/OricTyper
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Corrects Oric text pasting.
2018-05-13 14:14:13 -04:00
Thomas Harte
2252c29495
Switches the Oric to string insertion at the time of consumption.
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To avoid issues around keyboard scanning being decoupled from consumption via IRQ, but not buffered. Keys pressed while BASIC is otherwise busy are just lost.
2018-05-13 14:02:46 -04:00
Thomas Harte
39c0bc6c47
Factors string serialisation with \n\r conversion out of the Apple II and reuses it with the Oric.
2018-05-13 13:57:19 -04:00
Thomas Harte
8f1a516a2c
Merge pull request #437 from TomHarte/AppleIIPaste
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Implements `type_string` for the Apple II.
2018-05-13 11:32:45 -04:00
Thomas Harte
a6b8e88406
Implements type_string for the Apple II.
2018-05-13 11:30:04 -04:00
Thomas Harte
c19b50619f
Merge pull request #436 from TomHarte/MacPaste
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Corrects Mac paste pathway.
2018-05-13 11:14:59 -04:00
Thomas Harte
3747d96b22
Corrects Mac paste pathway.
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Also updates documentation around CSOpenGLView.
2018-05-13 11:12:03 -04:00
Thomas Harte
8b23a08fc4
Merge pull request #434 from TomHarte/RelaxedParsing
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Removes requirement for correct sector epilogues.
2018-05-12 23:39:22 -04:00
Thomas Harte
3fdefb94e4
Removes requirement for correct sector epilogues.
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It's now a length test that at present accepts 6-and-2 sectors only.
2018-05-12 23:03:08 -04:00
Thomas Harte
49592ebaf3
Ensures initialisation of scanner and that sectors overlapping the end of track are captured.
2018-05-12 18:42:07 -04:00
Thomas Harte
f410dcb3f3
Ensures proper test: not having a number of sectors that is a multiple of the track count.
2018-05-12 18:05:33 -04:00
Thomas Harte
bd27f61a03
Corrects various impossible-in-real-life compiler warnings.
2018-05-12 18:02:16 -04:00
Thomas Harte
d703328114
Adds missing #include for memcpy.
2018-05-12 17:54:13 -04:00
Thomas Harte
afe222cb16
Merge pull request #433 from TomHarte/ActivityReceiver
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Introduces infrastructure for sending and receiving 'activity' notifications
2018-05-12 17:45:06 -04:00
Thomas Harte
d0fd4dd4db
The MSX is now an activity source.
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Completing the set.
2018-05-12 17:32:53 -04:00
Thomas Harte
3ba6b6f1ee
Makes the Oric an event source.
2018-05-11 23:05:36 -04:00
Thomas Harte
bc464e247f
The 1540 and, by extension, the Vic-20 are now activity sources.
2018-05-11 22:24:33 -04:00
Thomas Harte
c23f6d8d19
Corrects type for array accesses.
2018-05-11 21:46:30 -04:00
Thomas Harte
39d779edf0
Makes CPC an activity source.
2018-05-11 21:45:46 -04:00
Thomas Harte
0cb5362c6f
Disambiguates whether Step will occur in addition to below zero/beyond maximum.
2018-05-11 21:44:08 -04:00
Thomas Harte
a43ca0db35
Makes the Apple II an activity source.
2018-05-10 22:17:13 -04:00
Thomas Harte
9089bf6535
Adds step events.
2018-05-10 21:58:14 -04:00
Thomas Harte
ef19a03efc
Drives can now deliver activity events.
2018-05-10 21:54:10 -04:00
Thomas Harte
85e1610627
Merge branch 'master' into ActivityReceiver
2018-05-10 20:49:32 -04:00
Thomas Harte
d16ae84d0b
Reduces number of Apple II video flushes, to reduce processing cost.
2018-05-10 20:48:57 -04:00
Thomas Harte
95f859cf5c
Merge branch 'master' into ActivityReceiver
2018-05-10 20:26:50 -04:00
Thomas Harte
578a5b3e69
Ensures NDEBUG is set for release builds.
2018-05-09 22:27:57 -04:00
Thomas Harte
25f7e3af31
Removes dead debugging aid. What a klutz!
2018-05-09 22:24:20 -04:00
Thomas Harte
86192b18d1
Merge pull request #431 from TomHarte/DiskIIRemap
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Shuffles the Disk II ROM at load time into B.A.P. form.
2018-05-09 22:10:29 -04:00
Thomas Harte
c3144382c5
Shuffles the Disk II ROM at load time into B.A.P. form.
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Only if required. In order to support various potential forms of supplied ROM.
2018-05-09 22:03:59 -04:00
Thomas Harte
6bb9b7be04
Merge pull request #430 from TomHarte/PravetzPaging
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Corrects Pravetz 8DOS startup.
2018-05-09 20:30:34 -04:00
Thomas Harte
8ee34fafa6
Switches default DSK volume to 254. That seems to resolve Pravetz booting issues.
2018-05-09 20:28:58 -04:00
Thomas Harte
312171fa59
Pulls out a couple of repeating constants.
2018-05-09 20:28:25 -04:00
Thomas Harte
a8dbfb0569
Adds direct link to 'releases' tab.
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It has been explained to me that people who do not often come to Github are having difficulty finding the releases. This might help.
2018-05-09 10:32:16 -04:00
Thomas Harte
b09b4b4433
Merge pull request #429 from TomHarte/Pravetz
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Makes attempt to implement support for the Pravetz 8D + 8DOS.
2018-05-08 22:53:51 -04:00
Thomas Harte
45bd24ada0
Corrects tags for Oric machine selection.
2018-05-08 22:53:27 -04:00
Thomas Harte
c3a2f7717b
Makes attempt to implement support for the Pravetz 8D + 8DOS.
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i.e. the Disk II wired up to the Oric, with some ROM swaps.
2018-05-08 22:05:43 -04:00
Thomas Harte
70e6c3b2f6
Introduces the ActivityObserver protocol for LEDs, drive events, etc.
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The Electron's caps lock LED is the test case.
2018-05-07 21:57:54 -04:00
Thomas Harte
d1b889aa61
Merge pull request #424 from TomHarte/TrackDivision
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Makes disk head position explicitly something with sub-integral precision.
2018-05-06 23:19:56 -04:00
Thomas Harte
f65c65569a
Makes disk head position explicitly something with sub-integral precision.
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Also as a drive-by fix, corrects accidental assumption of 10 sectors for all MFMSectorDump descendants.
2018-05-06 23:17:36 -04:00
Thomas Harte
1139caa83f
Merge pull request #423 from TomHarte/LanguageCard
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Implements the Apple II language card
2018-05-06 16:18:15 -04:00
Thomas Harte
d613c3c187
Adds an implementation of the language card.
2018-05-06 16:17:11 -04:00
Thomas Harte
36f8b165cf
Makes the epilogue test a bit more thorough.
2018-05-05 20:52:42 -04:00
Thomas Harte
d6e8b34942
Ensures media is passed on from the Disk II analyser.
2018-05-05 20:32:47 -04:00
Thomas Harte
4c4ab25d0e
Attempts to rationalise Apple II address decoding.
2018-05-05 20:24:03 -04:00
Thomas Harte
9ff34d90f4
Merge pull request #422 from TomHarte/DiskIIAnalyser
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Introduces an analyser for Disk II-esque files.
2018-05-05 19:35:24 -04:00
Thomas Harte
9593e0f7fe
Updates SContruct file for Disk II analysis.
2018-05-05 19:34:22 -04:00
Thomas Harte
1293d8b69e
Corrects various indentation errors.
2018-05-05 19:32:20 -04:00
Thomas Harte
3e0055737e
Adds a genuine attempt to discern Pravetz disks from Apple.
2018-05-05 19:32:08 -04:00
Thomas Harte
ba7fbc4032
Reroutes all Disk II types through the Disk II analyser and returns actual sector from the Apple GCR parser results.
2018-05-05 16:37:33 -04:00
Thomas Harte
c36d7b4972
Makes first attempt at 6 and 2 decoder.
2018-05-04 23:11:12 -04:00
Thomas Harte
1c0b5bb02b
Corrects phoney switch of 'run' build to release.
2018-05-04 18:04:23 -04:00
Thomas Harte
0dece80b5d
Improves documentation.
2018-05-04 18:02:55 -04:00
Thomas Harte
e3b4aebf1a
Introduces the Disk II as a unique media target platform.
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As it makes a little more sense to analyse Apple GCR images to determine target platform than it does to have the potential platforms vote over them.
Also starts on the parser that'll be necessary for making a decision.
2018-05-04 18:02:36 -04:00
Thomas Harte
2e20191c01
Relocates and cleans up what is currently written of Apple GCR handling as the encoder.
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A decoder will be forthcoming.
2018-05-03 22:40:45 -04:00
Thomas Harte
59718e132b
Fixes macOS 10.10 warning.
2018-05-03 22:39:34 -04:00
Thomas Harte
4d070fbfe3
Merge pull request #421 from TomHarte/AppleConfiguration
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Introduces configuration options for the Apple II.
2018-05-03 19:38:29 -04:00
Thomas Harte
723ee88043
Introduces configuration options for the Apple II.
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Specifically: II or II+? Disk II 13- or 16-sector? Or not at all?
2018-05-03 19:37:32 -04:00
Thomas Harte
65ba9ee6e7
Merge pull request #420 from TomHarte/DSKDos33
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Corrects handling of Apple II DSK files.
2018-05-02 21:45:56 -04:00
Thomas Harte
fcc750784a
Switches interleaving logic around: having inspected some NIBs sectors are numbered in order, but scatter read from the image.
2018-05-02 21:28:18 -04:00
Thomas Harte
3787d094ec
Deals with potential precision pitfall.
2018-05-02 21:26:39 -04:00
Thomas Harte
4b4ea4a103
Corrects final two bytes of Apple GCR low nibble encoding.
2018-05-02 21:06:18 -04:00
Thomas Harte
af0cf0d40a
Merge pull request #419 from TomHarte/ZXLineCounter
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Simplifies the test for resetting the ZX80/81 line counter.
2018-05-01 22:04:39 -04:00
Thomas Harte
eecea93b3b
Simplifies the test for resetting the ZX80/81 line counter.
2018-05-01 21:31:37 -04:00
Thomas Harte
ac4948c4b1
Merge pull request #417 from TomHarte/DiskII
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Adds attempt at Disk II emulation.
2018-05-01 20:34:40 -04:00
Thomas Harte
5e34c1b6b8
Switches to producing a single segment for NIBs and DSKs.
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I've now seemingly verified that the values read back by the CPU are those I'm intending to produce, so I'm at a loss.
2018-05-01 20:31:42 -04:00
Thomas Harte
05e31d7594
Mutates testComplicatedTrackSeek into an actual test.
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Which frustratingly passes.
2018-05-01 19:52:12 -04:00
Thomas Harte
f4097290c2
Made various corrections following a quick for-loop constness audit.
2018-04-30 22:23:57 -04:00
Thomas Harte
9da481b060
Slightly simplifies syntax.
2018-04-30 22:08:51 -04:00
Thomas Harte
79002d6962
Adds an additional assert.
2018-04-30 22:07:54 -04:00
Thomas Harte
dbd9282efc
Experimentally switches to doubles for TimedEventLoop time tracking.
2018-04-30 22:07:17 -04:00
Thomas Harte
b32538f3c8
Adds an additional test.
2018-04-30 22:05:44 -04:00
Thomas Harte
e7618bb32e
Corrects types (/chickens out).
2018-04-30 22:04:05 -04:00
Thomas Harte
aacf26f05d
Removed logged comment.
2018-04-30 22:03:09 -04:00
Thomas Harte
265bc80d44
Attempts to introduce sleeping to the Disk II.
2018-04-29 17:52:29 -04:00
Thomas Harte
10c0e687f5
Attempts to introduce sleeping for the Disk II.
2018-04-29 17:51:10 -04:00
Thomas Harte
a9d4fe0b41
Introduces filetype wiring for DO and PO files.
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Also corrects sector numbering logic to ensure there is a sector 15.
2018-04-29 16:34:10 -04:00
Thomas Harte
5cd15147eb
Introduces interleaving of sector numbers.
2018-04-29 16:18:14 -04:00
Thomas Harte
c62db6665a
Corrects storage of lower two bit pairs.
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It turns out the non-integral result of 256/3 is handled differently than my guess.
2018-04-29 11:20:23 -04:00
Thomas Harte
fabcb261dc
Corrects data prologue usage and off-by-one error in checksum placement.
2018-04-28 23:17:06 -04:00
Thomas Harte
45cf28e0eb
Corrects sync lengths.
2018-04-28 15:48:49 -04:00
Thomas Harte
5b35c88be2
Corrections: data segments now correctly announce their number of bits, and tracks aren't oversized.
2018-04-28 15:47:50 -04:00
Thomas Harte
7f03f5d02f
Makes a first attempt at six-and-two encoding for DSKs.
2018-04-28 15:18:48 -04:00
Thomas Harte
b98d5b790a
Finally unifies disk image file exceptions, and adds a placeholder for Apple DSK.
2018-04-27 23:18:45 -04:00
Thomas Harte
5c74044e62
Unifies constants.
2018-04-27 21:38:08 -04:00
Thomas Harte
992a99d792
Improves validation of suspected sync regions.
2018-04-27 19:53:35 -04:00
Thomas Harte
41075356e2
Makes a first attempt at NIB support.
2018-04-26 22:49:07 -04:00
Thomas Harte
850a394eb5
Corrects graphics 'carry' — the potential holdover into delayed bytes.
2018-04-26 19:26:43 -04:00
Thomas Harte
244721a6f8
Corrects graphics mode address generation.
2018-04-25 22:26:01 -04:00
Thomas Harte
d59db504a3
Adjusted stepper logic; some disks load now.
2018-04-25 21:59:18 -04:00
Thomas Harte
c90e122eb2
Switches casts around to avoid potential undefined behaviour of left-shifting signed numbers.
2018-04-25 19:59:32 -04:00
Thomas Harte
4c6dc597f4
Converts Time::get into a template, introduces a via-a-double fallback for the timed event loop.
2018-04-25 19:54:39 -04:00
Thomas Harte
b4f6dee954
Ensures the contextually-proper boot and state machine ROMs are requested.
2018-04-24 20:25:02 -07:00
Thomas Harte
2685e9087e
Changes the default-assigned Disk II card slot from 7 to 6.
2018-04-24 20:24:44 -07:00
Thomas Harte
376b26c1e4
Simplifies the rotational multiplier upon construction, to mitigate against scale issues later.
2018-04-24 20:16:14 -07:00
Thomas Harte
7061537ff5
Makes joined-up attempt to run data through the Disk II.
2018-04-24 19:44:45 -07:00
Thomas Harte
2f2390b5aa
Adds F12 as a reset key, triggers cards upon a flush.
2018-04-24 09:03:30 -07:00
Thomas Harte
99de8f1c5c
Inverts the pulse strobe.
2018-04-24 09:03:03 -07:00
Thomas Harte
af61bbc3e2
Attempts actual performance of the state machine.
2018-04-24 08:29:05 -07:00
Thomas Harte
56d88f23ef
Teeters closer and closer to trying actually to run the Disk II state machine.
2018-04-23 22:29:36 -07:00
Thomas Harte
4bff44377a
Attempts to route Disk II requests to the thing itself.
2018-04-23 22:11:31 -07:00
Thomas Harte
7463edaa1b
Attempts to bring card support to the Apple II, and adds a 'has disk' flag.
2018-04-23 21:14:45 -07:00
Thomas Harte
e92e06a5f4
Doubled down on the ROMMachine::ROMFetcher typedef.
2018-04-23 20:20:14 -07:00
Thomas Harte
4cbe5068a9
Works further towards NIB, but still isn't close.
2018-04-23 20:01:12 -07:00
Thomas Harte
38b2302b59
Corrects minor documentation errors.
2018-04-23 19:59:19 -07:00
Thomas Harte
bce0702745
Makes some faulty steps further towards providing Apple GCR assistance.
2018-04-23 19:59:03 -07:00
Thomas Harte
d447e81abd
Adds provisional support for WOZ files.
2018-04-23 19:57:45 -07:00
Thomas Harte
6592745e53
Adds the bare minimum to respond to attempts to open NIB files with an Apple II.
2018-04-21 21:21:57 -07:00
Thomas Harte
e87a3cffd4
Merge branch 'master' into DiskII
2018-04-21 15:02:18 -07:00
Thomas Harte
fa0b6e8a08
Merge pull request #416 from TomHarte/AppleAudio
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Corrects Apple II output audio.
2018-04-21 18:01:59 -04:00
Thomas Harte
074b4c3500
Eliminates repeating cause of misuse.
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Raises the question as to whether an async task queue should be required at construction; let's see how things look as the project develops.
2018-04-21 15:01:18 -07:00
Thomas Harte
5968c9a391
Corrects Apple II output audio.
2018-04-21 14:56:50 -07:00
Thomas Harte
72bc5f8d7b
Adds a class to contain the Disk II and begins Apple GCR conversion routines.
2018-04-21 14:33:42 -07:00
Thomas Harte
0a0d81cd5a
Merge pull request #415 from TomHarte/SconsOmissions
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Updates SConstruct file to include the Apple II.
2018-04-20 11:00:00 -04:00
Thomas Harte
75e9c3678b
Adds the missing Apple II static analyser.
2018-04-20 10:58:57 -04:00
Thomas Harte
aebe8a64a2
Removes empty printf.
2018-04-20 10:58:23 -04:00
Thomas Harte
1aacf437b5
Adds omitted paths to SConstruct.
2018-04-20 10:56:59 -04:00
Thomas Harte
7e8e3fdd39
Merge pull request #414 from TomHarte/AppleII
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Adds provisional Apple II emulation
2018-04-19 22:31:02 -04:00
Thomas Harte
b8ae283049
Implements correct text inverse/flashing.
2018-04-19 22:14:22 -04:00
Thomas Harte
6621e54952
Shortens the name for the Electron tab, owing to limited space.
2018-04-19 20:54:16 -04:00
Thomas Harte
e03a403a51
Adds exposition.
2018-04-19 20:41:09 -04:00
Thomas Harte
ba43b3e6b8
Reverses bit order of graphics stream; apparently the ROM is backwards.
2018-04-19 20:39:38 -04:00
Thomas Harte
b4a2d1395c
Ensures left and right cursor keys work.
2018-04-18 22:23:31 -04:00
Thomas Harte
f5ae8d0f79
Attempts to be more rigorous about clock rates.
2018-04-18 21:52:22 -04:00
Thomas Harte
5f1c210746
Simplifies and corrects low-resolution colour generation.
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Possibly disproving the premise for this whole experiment, all colours seem immediately to work correctly. Hmmm.
2018-04-18 21:41:11 -04:00
Thomas Harte
f6c2f6e896
Slightly adjusts colour burst logic to fix transition lines in mixed mode.
2018-04-18 20:39:12 -04:00
Thomas Harte
6547560e52
Gives the CRT the ability to move iCoordinate multiplication outside of the fragment loop.
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That resolves precision issues, as were plaguing the Apple II.
2018-04-18 19:29:03 -04:00
Thomas Harte
a167e3849b
Allows multiple ROMs to be inserted into the Electron.
2018-04-18 18:13:30 -04:00
Thomas Harte
f22c23cb4c
Attempts to bring audio to the Apple II.
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By factoring the audio toggle out from the MSX.
2018-04-17 22:28:13 -04:00
Thomas Harte
a07c99d778
Completes first draft of Apple II video hardware.
2018-04-17 22:04:02 -04:00
Thomas Harte
1c605d58e3
Removes the CRT requirement for an integral relationship between cycles and samples.
2018-04-16 20:00:56 -04:00
Thomas Harte
6a79ce9eb1
Adds enough to the Apple II's video that I can see what's going on with soft switches.
2018-04-15 21:55:26 -04:00
Thomas Harte
465c38f03c
Extends the keyboard protocol and adds keyboard input to the Apple II.
2018-04-15 21:11:30 -04:00
Thomas Harte
be05d51e07
Now gives something a lot like the proper character output.
2018-04-15 20:31:04 -04:00
Thomas Harte
9bc470027e
Put enough in place to get a visual representation of video memory.
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Not the correct one, and so as to indicate that the machine isn't booting, surprisingly.
2018-04-15 19:35:08 -04:00
Thomas Harte
335c633884
Retrenches temporarily to full 8bpp output; introduces extra half a colour cycle of pause.
2018-04-15 18:54:05 -04:00
Thomas Harte
cd26f11818
Fixes documentation misstatement.
2018-04-15 18:00:51 -04:00
Thomas Harte
abe47b6ed8
Makes first attempt at a stable display area. Not entirely successful.
2018-04-15 18:00:40 -04:00
Thomas Harte
61659faeaa
Adds the necessary call-outs to allow implementation of video generation.
2018-04-15 15:13:07 -04:00
Thomas Harte
71adb964e5
The Apple II now has a functioning processor, ROM and RAM.
2018-04-14 21:41:26 -04:00
Thomas Harte
e599e65087
Switches to use of the TargetList typedef wherever possible.
2018-04-14 19:46:38 -04:00
Thomas Harte
7efee9b52b
Does the bare minimum to create a class skeleton for Apple II implementation.
2018-04-14 19:46:15 -04:00
Thomas Harte
079dc671e1
Rationalises per-machine static analyser call pattern, and adds Apple II as an option.
2018-04-14 12:12:12 -04:00
Thomas Harte
a32a7d1374
Merge pull request #413 from TomHarte/VicPAL
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Adjusts PAL Vic timing.
2018-04-12 21:38:18 -04:00
Thomas Harte
467cd5450f
Adjusts PAL Vic timing.
2018-04-12 21:12:09 -04:00
Thomas Harte
1580874a55
Merge pull request #412 from TomHarte/VideoRestriction
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Reintroduces accessible memory restrictions on the VIC.
2018-04-11 22:07:42 -04:00
Thomas Harte
15f7cbe8c1
Corrects capitalisation.
2018-04-11 22:06:50 -04:00
Thomas Harte
428b6145fa
Converts 6560 to more project normative templated form.
2018-04-11 22:00:42 -04:00
Thomas Harte
3ad0b31db8
Limits regions accessible to the 6560 to those built into the machine.
2018-04-11 21:35:23 -04:00
Thomas Harte
8d4d5d1f46
Merge pull request #410 from TomHarte/VicNTSC
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Corrects NTSC VIC raster register timing.
2018-04-11 10:29:46 -04:00
Thomas Harte
4c8a68c6a4
Implements late-0 with proper timing, and NTSC interlaced raster count timing.
2018-04-11 08:00:37 -04:00
Thomas Harte
0b4b6f4aec
Tweaks luminances and reintroduces late-to-zero line counts.
2018-04-10 23:05:18 -04:00
Thomas Harte
bb4db6b382
Ensures that 'choose' responds to enter.
2018-04-08 18:52:46 -04:00
Thomas Harte
94b1c37fb2
Slightly simplifies bus decoding.
2018-04-08 18:51:37 -04:00
Thomas Harte
cf6f6c5c15
Eliminates the full_frame_counter_ and slightly tweaks NTSC raster timing.
2018-04-08 18:51:20 -04:00
Thomas Harte
f541986333
Switches to more normative preincrement.
2018-04-08 18:50:42 -04:00
Thomas Harte
44513d6912
Ensures a 1540 is requested if any disks are present.
2018-04-08 17:37:39 -04:00
Thomas Harte
b20cbcd5fe
Causes the Vic-20 to obey its own has_c1540 flag.
2018-04-08 17:35:02 -04:00
Thomas Harte
1c5972f7b0
Ensures NTSC raster count rollover; previously it was positing a line '261' for half of '0'.
2018-04-08 16:18:41 -04:00
Thomas Harte
28947bb3c4
Merge pull request #409 from TomHarte/BitShader
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Switches ZX80/81 video bit unpacking to the GPU.
2018-04-08 10:35:43 -04:00
Thomas Harte
865c47a1ac
Names the magic constants.
2018-04-08 10:35:07 -04:00
Thomas Harte
3821679efd
Switches to bit unpacking on the GPU.
2018-04-07 22:17:47 -04:00
Thomas Harte
506b4da6c3
Merge pull request #408 from TomHarte/MixerBalance
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Enhances the CompoundSource so that constituents can have different volumes.
2018-04-07 14:32:47 -04:00
Thomas Harte
10f637d2cf
Enhances the CompoundSource so that constituents can have different volumes.
2018-04-07 14:30:02 -04:00
Thomas Harte
0bab7c88f0
Merge pull request #407 from TomHarte/NameImplications
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Allows the Vic-20 analyser to act on 'NTSC' in a filename.
2018-04-06 20:10:56 -04:00
Thomas Harte
78c612ca17
Adds a missing import, removes a redundant conversion.
2018-04-06 20:07:10 -04:00
Thomas Harte
e1c4035812
Switches away from C strings and allows Vic-20 region inference from filenames.
2018-04-06 17:42:24 -04:00
Thomas Harte
eb6d6c8033
Merge pull request #406 from TomHarte/NewFixes
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Tweaks the 'new machine' dialogue for ZX memory size
2018-04-05 22:02:10 -04:00
Thomas Harte
7bf88565ce
Resizes to fit all options.
2018-04-05 21:59:19 -04:00
Thomas Harte
ee10155296
Adds advice and withdraws the ZX 64kb option.
2018-04-05 21:57:26 -04:00
Thomas Harte
cc49140f6f
Merge pull request #405 from TomHarte/VicFraming
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Introduces different clipping zones for NTSC and PAL output.
2018-04-05 21:26:07 -04:00
Thomas Harte
3e846f89a1
Introduces different clipping zones for NTSC and PAL output.
2018-04-05 21:25:19 -04:00
Thomas Harte
5782cab2a0
Minor whitespace fix.
2018-04-05 21:15:25 -04:00
Thomas Harte
8c511e2b76
Merge pull request #404 from TomHarte/ProperShaderSetup
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Ensures the SVideo shader gets all proper `enable_vertex_attribute_with_pointer`s.
2018-04-05 21:13:26 -04:00
Thomas Harte
ec72fb3baf
Ensures the SVideo shader gets all proper enable_vertex_attribute_with_pointers.
2018-04-05 21:12:28 -04:00
Thomas Harte
bab1440f5c
Merge pull request #403 from TomHarte/VicRange
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Causes the 6560 to obey `set_sample_volume_range`.
2018-04-05 21:06:09 -04:00
Thomas Harte
60c1da6a66
Causes the 6560 to obey set_sample_volume_range.
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Thereby resolves a clipping issue.
2018-04-05 21:04:46 -04:00
Thomas Harte
a849b3f2e4
Merge pull request #402 from TomHarte/AudioCutoff
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Ensures artificial audio frequency limits are honoured.
2018-04-05 19:05:48 -04:00
Thomas Harte
dbe3c5c3f8
Ensures artificial frequency limits are honoured.
2018-04-05 18:40:07 -04:00
Thomas Harte
60cf6b3cfd
Merge pull request #401 from TomHarte/VideoQuirks
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Corrects composite output of the ZX80/81 and the Oric
2018-04-04 19:23:45 -04:00
Thomas Harte
5044aac337
Sizes up default window size better to fit machine selector.
2018-04-04 19:18:22 -04:00
Thomas Harte
36e0cb29c0
Ensures proper propagation of video choice through the Oric.
2018-04-04 19:14:42 -04:00
Thomas Harte
c0b4dd65da
Mades the expected video signal usage explicit.
2018-04-04 19:01:18 -04:00
Thomas Harte
d061ea232b
Ensures no attempt to compile an SVideo shader without appropriate source.
2018-04-04 19:01:01 -04:00
Thomas Harte
49feca4ddf
Merge pull request #400 from TomHarte/NewCrash
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Introduces a rudimentary 'new' dialogue for the Mac
2018-04-03 23:24:00 -04:00
Thomas Harte
46b1c57bf4
Enables the titlebar, inexplicably allowing the sheet to obtain focus.
2018-04-03 23:22:26 -04:00
Thomas Harte
eaf1482182
Reverts the once-again-unused document controller.
2018-04-03 23:11:19 -04:00
Thomas Harte
d3418550eb
Attempts explicitly to disable promise of saving.
2018-04-03 23:06:48 -04:00
Thomas Harte
3ffa9e2751
Ensures complete machine picker state is preserved.
2018-04-03 23:01:12 -04:00
Thomas Harte
c697dd78f0
Ensures a new machine starts as first responder.
2018-04-03 22:22:39 -04:00
Thomas Harte
7dac791290
Causes the machine picker to show as a sheet.
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Albeit with some user experience issues lingering.
2018-04-03 18:47:07 -04:00
Thomas Harte
cde2faeda6
Makes an unsuccessful attempt to show the new machine dialogue as a sheet.
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Also corrects the 'open' case versus recent changes.
2018-04-02 23:31:36 -04:00
Thomas Harte
69f520428d
Makes a first, ugly attempt at a 'new machine' dialogue for the Mac.
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Which has implied getting much more specific about MSX disk drive attachment, and has prompted an excuse to offer the ZX80 with the ZX81 ROM.
2018-04-02 22:42:41 -04:00
Thomas Harte
80c84ddd75
Merge pull request #398 from TomHarte/SVideoOption
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Exposes S-Video as a user-selectable option
2018-04-01 13:30:41 -04:00
Thomas Harte
fca8a58b36
Exposes S-Video option in the Mac UI.
2018-04-01 13:29:04 -04:00
Thomas Harte
33084899d0
Provides s-video as a command-line option.
2018-03-31 22:14:34 -04:00
Thomas Harte
7b381a8b6b
Merge pull request #397 from TomHarte/Vic20FastTape
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Improves Vic-20 fast tape ownership and simplifies memory logic.
2018-03-31 21:05:22 -04:00
Thomas Harte
9c75689a8d
Increased verbosity.
2018-03-31 20:58:16 -04:00
Thomas Harte
0ee40e8556
Reintroduces 90% crop for VIC output.
2018-03-31 20:57:45 -04:00
Thomas Harte
8b45377b89
Simplifies storage underlying Vic memory.
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In the hope of avoiding non-obvious bugs.
2018-03-31 18:54:40 -04:00
Thomas Harte
f6fb368d88
Allows the fast-tape mechanism to take ownership of tape handling.
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Any successful fast tape interaction will now permanently pause the tape until a failed interaction occurs. This may or may not be a good idea.
2018-03-30 21:22:52 -04:00
Thomas Harte
183a5379de
Merge pull request #396 from TomHarte/SVideo
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Adds support for s-video.
2018-03-30 18:25:28 -04:00
Thomas Harte
912791d3d4
Causes the s-video path correctly to function.
2018-03-30 18:24:18 -04:00
Thomas Harte
163a61dd63
Corrects SVideo-as-composite output; the Atari and Vic-20 now both supply svideo.
2018-03-30 13:16:18 -04:00
Thomas Harte
207d462dbf
Attempts to provide an implementation of SVideo support.
2018-03-30 12:41:20 -04:00
Thomas Harte
33281b9d89
Introduces S-Video as a video signal type at the interface level.
2018-03-30 10:25:41 -04:00
Thomas Harte
389979923e
Performs update to and satisfaction of Xcode 9.3's preferred warnings.
2018-03-30 10:25:01 -04:00
Thomas Harte
067174965e
Merge pull request #395 from TomHarte/TEDEsqueColours
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Introduces Vic luminances sourced from the TED manual.
2018-03-30 09:39:02 -04:00
Thomas Harte
286259c83b
Adds missing 6560 update hooks.
2018-03-29 20:49:36 -04:00
Thomas Harte
e1aa3e5a7f
Imports chrominances from the TED documentation. They seem to apply to the VIC-I also.
2018-03-29 20:04:37 -04:00
Thomas Harte
78e1c2851a
Merge pull request #393 from TomHarte/Vic20Faster
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Introduces some minor Vic-20 optimisations.
2018-03-27 22:04:40 -04:00
Thomas Harte
0869213c55
Cuts detritus.
2018-03-27 22:00:13 -04:00
Thomas Harte
f3fe16215a
Reintroduces options for the Vic-20, now tape loading speed only.
2018-03-27 21:55:43 -04:00
Thomas Harte
ec353ce663
Makes minor Vic-20 optimisations.
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Specifically: the 6560 is updated only upon writes (more nuance can arrive), and tape sleeps are observed.
2018-03-27 21:52:52 -04:00
Thomas Harte
b7ff5ef9dd
Merge pull request #392 from TomHarte/VicPalette
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Tweaks VIC palette, especially PAL.
2018-03-26 21:25:12 -04:00
Thomas Harte
3b26e0a7c5
Tweaks NTSC colour generation.
2018-03-26 21:22:06 -04:00
Thomas Harte
6d464557a0
Reintroduces a warm-up run for the C1540.
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That simulates the normal real-life scenario of switching the drive on slightly before the computer, and causes it to function correctly from immediate fast typing on an American Vic.
Also switches a couple of casts within the C1540 to functional style.
2018-03-26 21:06:07 -04:00
Thomas Harte
a776bec46a
Tweaks PAL colours for the 6560 to be closer to screenshots found online.
2018-03-26 19:02:16 -04:00
Thomas Harte
a2da51c30b
Commutes Vic-20 machine configuration options to its Target.
2018-03-26 19:01:57 -04:00
Thomas Harte
8067bf548a
Merge pull request #390 from TomHarte/VicOptions
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Ensures the Vic-20 doesn't show the ZX80/81 options panel on macOS.
2018-03-25 16:07:13 -04:00
Thomas Harte
62b0645ed0
Ensures the Vic-20 doesn't show the ZX80/81 options panel on macOS.
2018-03-25 16:04:44 -04:00
Thomas Harte
39a94874ae
Merge pull request #389 from TomHarte/VicAnalysis
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Strips back Vic-20 static analysis to the bare minimum.
2018-03-25 13:42:59 -04:00
Thomas Harte
e15d6717a1
Strips back Vic-20 static analysis to the bare minimum.
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Also corrects an unsafe assumption in fast loading.
2018-03-25 13:37:33 -04:00
Thomas Harte
37ef46e7bb
Merge branch 'SDLTravis' of github.com:TomHarte/CLK into SDLTravis
2018-03-23 21:52:27 -04:00
Thomas Harte
70c09b3031
Attempted to draft a travis.yml for SDL.
2018-03-23 21:51:15 -04:00
Thomas Harte
9378fbb0df
Attempted to draft a travis.yml for SDL.
2018-03-23 21:40:46 -04:00
Thomas Harte
2118b9c0cd
Merge pull request #385 from TomHarte/OricHFE
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Corrects nullptr references in the CPC static analyser.
2018-03-23 18:40:13 -04:00
Thomas Harte
d0c53de250
Corrects nullptr references in the CPC static analyser.
2018-03-23 18:39:37 -04:00
Thomas Harte
d98507eab0
Merge pull request #384 from TomHarte/PlentifulIcons
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Fills out the application icon set.
2018-03-23 18:33:02 -04:00
Thomas Harte
760c75103e
Fills out the application icon set.
2018-03-23 18:29:18 -04:00
Thomas Harte
4407fd2f1f
Merge pull request #383 from TomHarte/D64Crash
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Ensures the rom fetcher is properly provided to the C1540.
2018-03-23 18:22:37 -04:00
Thomas Harte
7fcd243be0
Ensures the rom fetcher is properly recorded for potential provision to the C1540.
2018-03-23 18:20:17 -04:00
Thomas Harte
3165e9d82e
Merge pull request #382 from TomHarte/Headers
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Introduces missing #includes.
2018-03-23 18:08:55 -04:00
Thomas Harte
6656a08c60
Introduces missing #includes.
2018-03-23 18:05:51 -04:00
Thomas Harte
76661c0b51
Merge pull request #375 from TomHarte/UndefinedBehaviour
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Resolves various pieces of undefined behaviour.
2018-03-22 22:01:19 -04:00
Thomas Harte
3bb496f9ae
Enforces a maximum sector size to avoid impossible sizes.
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Such as 128 * 2^255.
2018-03-22 22:00:26 -04:00
Thomas Harte
45be1c19df
Resolves undefined behaviour of a signed shift left.
2018-03-22 21:59:39 -04:00
Thomas Harte
a301964bd0
Ensures all audio queues are fully merged before machine destruction.
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Thereby avoids a race condition.
2018-03-22 21:59:19 -04:00
Thomas Harte
eea6858121
Resolves undefined behaviour from uninitialised limited-range values.
2018-03-22 21:58:42 -04:00
Thomas Harte
2a320fdf56
Merge pull request #374 from TomHarte/HFEFixup
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Corrects two errors in all-machine HFE offering.
2018-03-22 20:24:24 -04:00
Thomas Harte
4695296ef2
Corrects bit mask for offering HFE around.
2018-03-22 20:23:39 -04:00
Thomas Harte
0fdbbeca1d
Ensures the Commodore parser properly rejects non-GCR disks.
2018-03-22 20:23:21 -04:00
Thomas Harte
34cc39ad65
Merge pull request #373 from TomHarte/SpeakerCritical
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Moves all LowpassSpeaker delegate calls outside of critical sections.
2018-03-22 20:07:20 -04:00
Thomas Harte
3d0c832a21
Moves all LowpassSpeaker delegate calls outside of critical sections.
2018-03-22 19:01:20 -04:00
Thomas Harte
1acdab9448
Expanded potential HFE targets to everything other than the MSX.
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The MSX does not yet perform any sanity checks on disks. That's TODO.
2018-03-22 18:55:52 -04:00
Thomas Harte
93e85c5c4a
The CPC now accepts disks only if it can make sense of them.
2018-03-22 18:52:43 -04:00
Thomas Harte
ab98189d25
Merge pull request #372 from TomHarte/MultiJoystick
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Implements multimachine joystick support.
2018-03-22 11:09:38 -04:00
Thomas Harte
cd0fb7624b
Pulls delegate messages out of the critical sections.
2018-03-22 11:08:07 -04:00
Thomas Harte
bae38497bb
Implements multitarget joysticks.
2018-03-22 11:07:52 -04:00
Thomas Harte
29921bfa8d
Merge pull request #371 from TomHarte/NanosecondMachines
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Devolves time -> clock rate mapping to machines.
2018-03-22 10:08:58 -04:00
Thomas Harte
2712702461
Makes get_clock_rate protected. It's now an implementation detail.
2018-03-22 10:01:18 -04:00
Thomas Harte
a3fa9440d1
Renames method better to communicate purpose.
2018-03-22 09:49:36 -04:00
Thomas Harte
6419b0e619
Reintroduces CSMachineDelegate, allowing the Mac port to switch output audio rate dynamically.
2018-03-22 09:48:19 -04:00
Thomas Harte
58e5b6e3f1
Updates SDL kiosk mode to the death of CRTMachineDelegate.
2018-03-22 09:23:27 -04:00
Thomas Harte
682c3d8079
Adds new hook for watching audio output rate changes.
2018-03-22 09:23:01 -04:00
Thomas Harte
da3d65c18f
Devolves time to cycle conversion to machines.
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Thereby avoids a whole bunch of complicated machinations that would otherwise have been required of the multimachine.
2018-03-21 22:18:13 -04:00
Thomas Harte
ece3a05504
Merge pull request #370 from TomHarte/OricDiskDetection
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Causes the Oric properly to evaluate disks offered to it.
2018-03-21 20:51:12 -04:00
Thomas Harte
927697b0f0
Causes the Oric properly to evaluate disks offered to it.
2018-03-21 20:48:21 -04:00
Thomas Harte
74dfc80b0f
Merge pull request #369 from TomHarte/AnalyserUnion
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Encapsulates per-platform analyser result fields.
2018-03-09 16:13:17 -05:00
Thomas Harte
a7f229bc4b
Adds missing files.
2018-03-09 16:10:17 -05:00
Thomas Harte
89bec2919f
Encapsulates machine configuration properties for all remaining platforms.
2018-03-09 16:07:29 -05:00
Thomas Harte
78eaecb29e
Provides the proper framework for encapsulation of analyser target specifics.
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... while making them a safe container for objects too. Uses the ZX80/81 as the pilot platform.
2018-03-09 15:36:11 -05:00
Thomas Harte
d410aea856
Merge pull request #368 from TomHarte/DiamondInheritance
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Eliminates diamond inheritance of KeyboardMachine::Machine by typers.
2018-03-09 15:19:54 -05:00
Thomas Harte
6b1eef572b
Eliminates diamond inheritance of KeyboardMachine::Machine by typers.
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Specifically by pulling the key action stuff into a purely abstract class [/interface]. Takes the opportunity to unpublish a bunch of machine details.
2018-03-09 15:19:02 -05:00
Thomas Harte
719f5d79c2
Merge pull request #367 from TomHarte/DynamicVolume
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Introduces formal setting of the output volume to `SampleSource`.
2018-03-09 14:10:55 -05:00
Thomas Harte
48737a32a7
Introduces formal setting of the output volume to SampleSource.
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Previously every output device was making its own decision. Which is increasingly less sustainable due to the CompoundSource.
2018-03-09 13:23:18 -05:00
Thomas Harte
53f05efb2d
Merge pull request #366 from TomHarte/MoreMemptr
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Improves Z80 memptr behaviour.
2018-03-09 10:05:57 -05:00
Thomas Harte
0e73ba4b3e
Introduces proper 5/3 SCF/CCF behaviour for the Z80.
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While also `const`ing a bunch of things.
2018-03-09 09:47:00 -05:00
Thomas Harte
f0f9d5a6af
Corrects memptr leakage via BIT, and ld (de/bc/nn), A behaviour.
2018-03-08 20:30:22 -05:00
Thomas Harte
03501df9e5
Merge pull request #365 from TomHarte/CartridgeDetermination
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Works towards eliminating the special cases for Atari 2600 ROM handling.
2018-03-08 18:40:58 -05:00
Thomas Harte
dd6f85d4db
Merge pull request #364 from TomHarte/TimingUpfront
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Ensures the Coleco & MSX account for instruction lengths prior to outward accesses.
2018-03-07 17:29:32 -05:00
Thomas Harte
1804ea6849
Ensures the ColecoVision and MSX account for instruction lengths in advance when timing secondary components.
2018-03-07 17:00:18 -05:00
Thomas Harte
c8657e08f4
Merge remote-tracking branch 'origin/master' into CartridgeDetermination
2018-03-07 16:42:16 -05:00
Thomas Harte
a942e1319b
Merge pull request #363 from TomHarte/ZonX
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Introduces ZonX emulation and corrects a minor ColecoVision AY timing issue.
2018-03-07 16:23:51 -05:00
Thomas Harte
9e0a56b4f0
Withdraws the 2600 from .rom consideration.
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Will return when it is performing more sanity checks; for the time being I don't want it constantly forcing multimachines.
2018-03-07 16:21:17 -05:00
Thomas Harte
9abc020818
Corrects potential ColecoVision SGM AY timing issues.
2018-03-07 16:16:58 -05:00
Thomas Harte
2dade8d353
Introduces ZonX emulation for the ZX81.
2018-03-07 16:16:29 -05:00
Thomas Harte
1100dc6993
Opens up .bin and .rom to all cartridge platforms, and adds a confidence estimate to the Atari 2600.
2018-03-07 14:26:07 -05:00
Thomas Harte
f212b18511
Declares a confidence for the ColecoVision equal to the probability that the special bytes are wrong.
2018-03-07 14:25:25 -05:00
Thomas Harte
a6ca69550f
Standardises machines that aren't making a real guess on reporting a confidence of 0.5.
2018-03-07 14:24:52 -05:00
Thomas Harte
2452641844
Introduces a fast workaround to avert a MultiMachine where it would instantly end.
2018-03-06 19:08:02 -05:00
Thomas Harte
c82af4b814
Introduces get_confidence for the ColecoVision.
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Based almost entirely on joypad accesses for now.
2018-03-06 19:06:35 -05:00
Thomas Harte
fdef914137
Corrects test target regression.
2018-03-06 18:32:21 -05:00
Thomas Harte
dfcc502a88
Merge pull request #360 from TomHarte/SDLJoystick
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Introduces keyboard-as-joystick fallback for the SDL target.
2018-03-04 17:28:05 -05:00
Thomas Harte
1c6faaae88
Introduces keyboard-as-joystick fallback for the SDL target.
2018-03-04 17:26:32 -05:00
Thomas Harte
35c8a0dd8c
Merge pull request #359 from TomHarte/MentionColecoVision
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Adds the ColecoVision to the declared list of machines.
2018-03-03 19:05:05 -05:00
Thomas Harte
38feedaf6a
Adds the ColecoVision.
2018-03-03 19:03:54 -05:00
Thomas Harte
0a2f908af4
Merge pull request #358 from TomHarte/TMSPhase
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Picks a phase for the TMS empirically.
2018-03-03 13:56:10 -05:00
Thomas Harte
705d53cc21
Picks a phase for the TMS empirically.
2018-03-03 13:53:00 -05:00
Thomas Harte
35b18d58af
Merge pull request #357 from TomHarte/SuperGameModule
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Adds Super Game Module support for the ColecoVision.
2018-03-03 13:14:48 -05:00
Thomas Harte
3c5a8d9ff3
Adds Super Game Module support for the ColecoVision.
2018-03-03 13:08:33 -05:00
Thomas Harte
7ca02be578
Merge pull request #356 from TomHarte/Multicolour
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Implements multicolour mode on the TMS.
2018-03-02 23:10:31 -05:00
Thomas Harte
ea13c7dd32
Implements multicolour mode on the TMS.
2018-03-02 23:08:01 -05:00
Thomas Harte
fdfd72a42c
Merge pull request #355 from TomHarte/MegaCart
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Adds MegaCart support for the ColecoVision.
2018-03-02 19:21:26 -05:00
Thomas Harte
da97bf95c0
Loosens ColecoVision cartridge size test to allow for slightly broken images.
2018-03-02 19:20:37 -05:00
Thomas Harte
bdfc36427c
Implements MegaCart support.
2018-03-02 18:40:01 -05:00
Thomas Harte
74dfe56d2b
Expands documentation of NMI setting.
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Given that it was previously incorrect, explains logic behind request_status_ and last_request_status_ setting. Also takes the opportunity to ensure that NMI is 'sampled' at the same time as IRQ; whether the next thing should be the NMI routine now occurs one cycle before the end of any instruction. That's an assumption for now. Testing to come.
2018-03-02 11:10:02 -05:00
Thomas Harte
6cce9aa54e
Merge pull request #353 from TomHarte/ColecoVision
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Adds provisional emulation of the ColecoVision
2018-03-01 22:33:34 -05:00
Thomas Harte
ba68b7247b
Adds latest files to SConstruct.
2018-03-01 22:19:50 -05:00
Thomas Harte
b02e4fbbf6
Corrects NMI receipt to be genuinely edge triggered.
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Previously a caller that signalled NMI set multiple times would trigger multiple NMIs.
2018-03-01 22:04:56 -05:00
Thomas Harte
59b4c7314d
Merge branch 'master' into ColecoVision
2018-03-01 22:01:26 -05:00
Thomas Harte
d328589bd0
Merge pull request #354 from TomHarte/MSXTiming
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Corrects a counting error in the MSX.
2018-03-01 22:00:53 -05:00
Thomas Harte
b05d2b26bf
Corrects a counting error in the MSX.
2018-03-01 21:59:51 -05:00
Thomas Harte
86239469e7
Allows SN76489 consumers to apply an additional divider that reduces computation.
2018-03-01 18:51:05 -05:00
Thomas Harte
7890506b16
Gives the SN76489 its proper dividers and personalities.
2018-02-28 22:36:03 -05:00
Thomas Harte
83f73c3f02
Installs additional safeguards against unsafe deconstruction.
2018-02-28 22:15:22 -05:00
Thomas Harte
87760297fc
Fixes underpumping of SN76489.
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Audio works now. Though I still need properly to confirm who owns dividers in practice. I think probably all division should be within the SN.
2018-02-27 22:59:29 -05:00
Thomas Harte
5b854d51e7
Corrects out-of-bounds access.
2018-02-27 22:45:45 -05:00
Thomas Harte
d4df101ab6
Makes a first attempt at implementing the SN76489.
2018-02-27 22:25:12 -05:00
Thomas Harte
0ad2676640
Adds a class for the SN76489 and wires it into the ColecoVision.
2018-02-26 22:04:34 -05:00
Thomas Harte
a074ee2071
Possibly fixes ColecoVision input mapping.
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Also provides symbolic input from the Mac.
2018-02-25 22:47:47 -05:00
Thomas Harte
204d5cc964
Extends JoystickMachine protocol to cover ColecoVision use case.
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Also thereby implements input on the ColecoVision, in theory at least. No input is being fed though, so...
2018-02-25 19:08:50 -05:00
Thomas Harte
23d15a4d6c
The ColecoVision now accepts and loads cartridges.
2018-02-24 18:26:44 -05:00
Thomas Harte
23c47e21de
Proceeds the ColecoVision to booting.
2018-02-24 18:14:38 -05:00
Thomas Harte
5530b96446
Wired up a class and analyser for a ColecoVision.
2018-02-23 22:47:15 -05:00
Thomas Harte
99d28a172b
Merge pull request #352 from TomHarte/TZXCompletion
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Makes an attempt at implementing all missing TZX 1.20 blocks.
2018-02-22 21:37:46 -05:00
Thomas Harte
d83178f29d
Makes an attempt at implementing all missing TZX 1.20 blocks.
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Towards that aim, simplifies CSW handling so that even regular RLE compression uses a static grab of file contents.
2018-02-22 21:28:12 -05:00
Thomas Harte
d9d5ffdaa2
Merge pull request #351 from TomHarte/TMSFlip
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Optimises the inner TMS loops slightly.
2018-02-21 21:33:04 -05:00
Thomas Harte
cabad6fc05
Optimises the inner TMS loops slightly.
2018-02-21 21:29:17 -05:00
Thomas Harte
a4dc9c0403
Merge pull request #350 from TomHarte/MinorMSXOptimisations
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Introduces modest MSX optimisations
2018-02-19 20:53:20 -05:00
Thomas Harte
270723ae72
Forces the MSX's perform_machine_cycle into the Z80.
2018-02-19 19:54:42 -05:00
Thomas Harte
b215cf83d5
Eliminates implicit update queue flush, as unnecessary.
2018-02-19 19:54:18 -05:00
Thomas Harte
f237dcf904
Avoids deadlock when one bestEffortUpdate action implies another.
2018-02-19 18:44:12 -05:00
Thomas Harte
fc81bfa59b
Eliminates tape player call when tape is not playing.
2018-02-19 18:36:31 -05:00
Thomas Harte
832ac173ae
Merge pull request #349 from TomHarte/CheaperTapeChecks
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Reduces cost of checking for fast-tape usage
2018-02-19 16:58:03 -05:00
Thomas Harte
3673cfe9be
Pulls method call for tape fast loading checks out of inner loop for the Vic, Electron and ZX80/81.
2018-02-19 16:57:24 -05:00
Thomas Harte
6aaef97158
Breaks Mac machine shutdown deadlock.
2018-02-19 16:48:03 -05:00
Thomas Harte
b0ab617393
Simplifies inner loop test for MSX fast loading.
2018-02-19 16:24:47 -05:00
Thomas Harte
6780b0bf11
Corrects error preventing fast loading preference from making it to machines on the Mac.
2018-02-19 16:24:28 -05:00
Thomas Harte
9c0a440c38
Merge pull request #347 from TomHarte/DynamicAnalysis
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Introduces dynamic selection of MSX MegaROM type
2018-02-19 16:10:46 -05:00
Thomas Harte
2439f5aee5
Corrects some whitespace errors.
2018-02-19 16:06:46 -05:00
Thomas Harte
8265f289bd
Improves documentation within the new parts.
2018-02-19 16:03:17 -05:00
Thomas Harte
9728bea0a7
Updates scons file and corrects missing headers; backports to C++11.
2018-02-19 05:13:41 -08:00
Thomas Harte
fc9e84c72e
Eliminates unsafe optimisation.
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Also likely to be unhelpful as and when multiple machines are in play.
2018-02-18 22:09:27 -05:00
Thomas Harte
7d75e864b1
Ensures thread safety of usages of bestEffortLock.
2018-02-18 22:09:03 -05:00
Thomas Harte
a005dabbe3
Corrects some minor outstanding data races.
2018-02-18 16:37:07 -05:00
Thomas Harte
c8a4432c63
Makes an attempt to transfer audio outputs during dynamic analysis.
2018-02-18 15:23:15 -05:00
Thomas Harte
7b420d56e3
Removed state mirroring in the machine-specific Mac UI classes.
2018-02-14 21:46:50 -05:00
Thomas Harte
ddf1bf3cbf
Reintroduces options selection for the Mac.
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For everything except the Vic-20, anyway. That has a somewhat outdated notion of what an options panel should be, corresponding to the work yet to do on its analyser.
2018-02-12 21:46:21 -05:00
Thomas Harte
7ea4ca00dc
Ensures perform_parallel doesn't lock up if all machines complete prior to reaching condition.wait.
2018-02-11 21:06:51 -05:00
Thomas Harte
6b8c223804
Adds an extra termination condition for the multimachine.
2018-02-11 21:05:59 -05:00
Thomas Harte
23105956d6
Fixes spurious unrecognised miss detection for the ASCII mappers.
2018-02-11 20:51:39 -05:00
Thomas Harte
d751b7e2cb
Marginally reformats for current style.
2018-02-11 20:32:59 -05:00
Thomas Harte
f02989649c
Corrects effect of pc_is_outside_bios.
2018-02-11 20:32:45 -05:00
Thomas Harte
dcf313a833
Changes equivocal semantics.
2018-02-11 20:32:21 -05:00
Thomas Harte
9960121b08
Introduces an exit condition for the multi machine.
2018-02-11 20:24:08 -05:00
Thomas Harte
8eea55b51c
Simplifies perform_parallel slightly.
2018-02-10 23:39:30 -05:00
Thomas Harte
e1cab52c84
Ensures thread safety of access to machines array.
2018-02-10 19:38:26 -05:00
Thomas Harte
eb39617ad0
Allows cartridges to filter based on the actor talking to them; corrects outstanding_machines access error.
2018-02-10 17:11:16 -05:00
Thomas Harte
43b682a5af
Adds multiple target versions of all the DynamicMachine-vended types.
2018-02-09 16:31:05 -05:00
Thomas Harte
043fd5d404
Merge branch 'DynamicAnalysis' of github.com:TomHarte/CLK into DynamicAnalysis
2018-02-09 09:12:05 -05:00
Thomas Harte
d63a95983d
Adds a couple of hard-stop conditions to the MSX, and respect for hard stops.
2018-02-09 09:10:56 -05:00
Thomas Harte
4cf258f952
Parallelises MultiMachine running, and ensures errors propagate.
2018-02-08 20:33:57 -05:00
Thomas Harte
4e720d57b2
With debugging hooks still on display, makes first attempt at dynamic analysis.
2018-02-01 07:53:52 -05:00
Thomas Harte
c12aaea747
Attempts to get as far as running the MultiMachine.
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In doing so, fixes the long-standing bug that machines that output audio but don't have a listener produce a divide by zero.
2018-01-30 22:23:06 -05:00
Thomas Harte
ca48497e87
Pulls DynamicMachine out of MachineForTarget and adds MultiConfigurationTarget as a first multiplexer.
2018-01-29 21:49:49 -05:00
Thomas Harte
d493ea4bca
Introduces a multimachine to handle multi-target static analyser outputs.
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Non-functional as of yet.
2018-01-28 22:22:21 -05:00
Thomas Harte
e025674eb2
The MSX analyser is now smart enough not to be definitive when it's uncertain.
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The cartridge type has also migrated to being a property of the cartridge, prefiguring my intention to discard the static analyser union.
2018-01-25 22:16:46 -05:00
Thomas Harte
f2519f4fd7
Decided to focus on 'confidence' over 'probability'.
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Besides anything else, it individualises the measure. E.g. two targets can each have a confidence of 0.8 without each giving the wrong answer about probability.
2018-01-25 19:02:16 -05:00
Thomas Harte
db914d8c56
Removes redundant second configuration.
2018-01-25 18:50:23 -05:00
Thomas Harte
66faed4008
Gives MachineForTargets complete responsibility for initial machine state.
2018-01-25 18:28:19 -05:00
Thomas Harte
11abc99ef8
Introduces the extra level of indirection necessary to make Analyser::Static::Target polymorphic.
2018-01-24 22:35:54 -05:00
Thomas Harte
21efb32b6f
Integrates the static and nascent dynamic analyser namespaces.
2018-01-24 21:48:44 -05:00
Thomas Harte
622a04aec8
Starts stripping the Mac port of its special machine knowledge.
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Partly to force myself into moving that stuff into the cross-platform area, but mainly so that dynamic analysis can work equally from day one.
2018-01-24 20:14:15 -05:00
Thomas Harte
d360b2c62d
Standardises the static analyser on std::vector and slightly widens passageway to a machine.
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The SDL target would now be fooled by a hypothetical multi-target, the Mac not yet.
2018-01-23 22:18:16 -05:00
Thomas Harte
6a112edc18
Corrects 16kb ASCII mapper.
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Also increases hit position acceptance for the 8kb ASCII.
2018-01-22 22:13:16 -05:00
Thomas Harte
8fb4409ebb
Adds hasty attempt at dynamic analysis to the MSX ROM handlers.
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Logging for now, for further experimentation.
2018-01-22 21:50:56 -05:00
Thomas Harte
d213341d9c
Introduces the counters upon which I expect dynamic analysis to rest.
2018-01-22 21:39:23 -05:00
Thomas Harte
c2f1306d85
Updates copyright year.
2018-01-18 21:11:30 -05:00
Thomas Harte
2143ea6f12
Merge pull request #344 from TomHarte/MacICON
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Introduces an icon for the Mac.
2018-01-18 18:08:44 -08:00
Thomas Harte
edb30b3c6c
Introduces an icon for the Mac.
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About which I have yet to decide my full feelings.
2018-01-18 21:01:30 -05:00
Thomas Harte
234e4f6f66
Merge pull request #343 from TomHarte/MSXROMs
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Allows 8kb and not-quite-multiple-of-8kb MSX ROMs
2018-01-18 16:57:05 -08:00
Thomas Harte
ce2d3c6e82
Resolves implicit conversion warning.
2018-01-17 22:02:16 -05:00
Thomas Harte
46c76b9c07
Switches to using the boilerplate public.item for all macOS UTIs.
2018-01-17 22:01:38 -05:00
Thomas Harte
583c3cfe7d
Allows the MSX to load ROMs that aren't quite multiples of 8kb.
2018-01-16 22:27:41 -05:00
Thomas Harte
e13312dcc5
Removed stray new line.
2018-01-16 21:46:31 -05:00
Thomas Harte
d9e49c0d5f
Merge pull request #340 from TomHarte/MSXDocs
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Adds the MSX to README.md.
2018-01-16 16:47:57 -08:00
Thomas Harte
8a370cc1ac
Adds the MSX to README.md.
2018-01-16 19:46:29 -05:00
Thomas Harte
cdae0fa593
Merge pull request #339 from TomHarte/AcornROMs
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Allows the Electron to load 8kb ROMs.
2018-01-15 18:28:19 -08:00
Thomas Harte
765c0d4ff8
Allows the Electron to load 8kb ROMs.
2018-01-15 21:27:45 -05:00
Thomas Harte
4cf2e16b5c
Merge pull request #338 from TomHarte/MSXComposite
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onsolidates Mac presentation of composite video selection.
2018-01-15 15:38:45 -08:00
Thomas Harte
9cbd61e709
Replaces CRT quantity assert with test.
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Primarily to handle television/composite target switches that can unsync the buffers.
2018-01-15 18:37:09 -05:00
Thomas Harte
0202c7afb2
Consolidates Mac presentation of composite video selection.
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Moves handling of an RGB/composite into `MachinePanel`, eliminating the need for `ElectronOptionsPanel` and `OricOptionsPanel`; similarly merges the MSX and Electron options panels so as to provide television/monitor selection for the MSX.
2018-01-15 18:36:22 -05:00
Thomas Harte
c187c5a637
Merge pull request #337 from TomHarte/DoublePhase
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Corrects calculation of intermediate buffer width multiplier.
2018-01-15 13:57:26 -08:00
Thomas Harte
23c34a8c14
Corrects calculation of intermediate buffer width multiplier.
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Specifically: I had failed to factor in that the multiplied-up input frequency might be less than than the full width of the bitmap.
The Atari and MSX in particular now look much better.
2018-01-15 16:52:40 -05:00
Thomas Harte
93ece2aec7
"Doubles" the bandwidth given to composite signals.
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Because I suspect it may inadvertently have been halved previously. I'm investigating.
2018-01-14 20:44:53 -05:00
Thomas Harte
e12ab8fe2e
Merge pull request #336 from TomHarte/TMSGamma
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Sets TMS input gamma.
2018-01-13 19:20:32 -08:00
Thomas Harte
2fe0ceb52a
Sets TMS input gamma.
2018-01-13 22:19:41 -05:00
Thomas Harte
f354c12c81
Merge pull request #335 from TomHarte/BetterTape
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Makes MSX tape parsing more tolerant to phase.
2018-01-10 18:56:44 -08:00
Thomas Harte
def82cba49
Makes MSX tape parsing more tolerant to phase.
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Also reintroduces proper file type association for TSX on the Mac.
2018-01-10 21:54:15 -05:00
Thomas Harte
e7bc7b94c9
Merge pull request #334 from TomHarte/DMK
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Adds support for the DMK file format
2018-01-09 19:22:00 -08:00
Thomas Harte
aafdff49be
Implements the ugly stuff of converting a DMK back to flux.
2018-01-09 22:13:04 -05:00
Thomas Harte
4ef583813a
Minor tidying of PCMSegment and Oric MFM DSK.
2018-01-09 22:12:34 -05:00
Thomas Harte
9f97fb738e
Merge branch 'master' into DMK
2018-01-09 19:42:27 -05:00
Thomas Harte
4e124047c6
Introduces enough DMK support to progress to failure to parse a track.
2018-01-08 21:57:11 -05:00
Thomas Harte
6eb56a1564
Corrects various comment typos.
2018-01-08 20:55:40 -05:00
Thomas Harte
35fc0a5c16
Corrects assumption of double sidedness.
2018-01-08 09:35:29 -05:00
Thomas Harte
b36c917810
Merge pull request #331 from TomHarte/MSXFloppy
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Adds floppy emulation for the MSX
2018-01-07 19:25:11 -08:00
Thomas Harte
a5ac8c824e
Removes logging and unnecessary get_drive_is_ready.
2018-01-07 21:59:59 -05:00
Thomas Harte
0ccc104027
Corrects start sector and track interleaving for MSX DSK.
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MSX DSKs start with sector 1; Acorn disks still begin with sector 0. Also it turns out that MSX DSKs are indeed interleaved.
2018-01-07 21:59:18 -05:00
Thomas Harte
8be6cb827b
Implements MSX interrupt/data request reading register.
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The disk ROM now appears to accept on-disk bytes, but still announces an IO failure.
2018-01-07 20:28:34 -05:00
Thomas Harte
2f59226300
Fixes: DiskROM drive motor control, track_for_sectors' sides.
2018-01-07 20:02:40 -05:00
Thomas Harte
793ef68206
Implements unconditional force interrupt for the WD.
2018-01-07 19:42:38 -05:00
Thomas Harte
513c067f94
Makes an attempt to rope in the WD1770 for MSX disk ROM emulation.
2018-01-07 19:12:52 -05:00
Thomas Harte
999a0c22d4
Adds superficial support for MSX .DSK.
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In the sense that the file format itself is properly parsed, but the MSX doesn't actually yet have disk hardware.
2018-01-07 16:35:57 -05:00
Thomas Harte
5d0832613f
Merge pull request #330 from TomHarte/SCC
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Adds emulation of the Konami SCC
2018-01-07 07:14:05 -08:00
Thomas Harte
2ffde4c3c2
Corrects SCC volume errors.
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Which were leading to substantial overflow.
2018-01-07 09:59:00 -05:00
Thomas Harte
57ddfcd645
Corrects AY counter type.
2018-01-06 23:16:01 -05:00
Thomas Harte
fc16e8eb8c
Makes first attempt at actually implementing the SCC.
2018-01-06 23:15:42 -05:00
Thomas Harte
655b971976
Establishes that there is such as a thing as a Konami SCC.
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Creates one, ensures it appears in memory when intended to, lets it handle reads and writes. It currently does nothing.
2018-01-06 20:15:55 -05:00
Thomas Harte
3e1d8ea082
Adds is_silent to SampleSource plus shortcut processing to CompoundSource.
2018-01-06 18:50:26 -05:00
Thomas Harte
772c320d5a
Merge pull request #329 from TomHarte/TMSTopLine
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Corrects bad TMS sprite selections on the top row of the screen.
2018-01-06 13:26:33 -08:00
Thomas Harte
bcc7ad0c30
Corrects bad TMS sprite selections on the top row of the screen.
2018-01-06 16:26:11 -05:00
Thomas Harte
73b4e1722b
Merge pull request #328 from TomHarte/MSXROMs
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Introduces a basic attempt at MSX MegaROM support
2018-01-06 12:55:00 -08:00
Thomas Harte
185cd3c123
Expands and documents MSX::MemoryMap and MSX::ROMSlotHandler.
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Hopefully to cover all intended use cases.
2018-01-06 15:51:29 -05:00
Thomas Harte
ed564cb810
Implements the main four cartridge banking schemes.
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Slightly proof of concept for now.
2018-01-04 22:18:18 -05:00
Thomas Harte
b78ece1f1e
Adds an attempt to catch LD (xx), A / [CALL/JP] pairs.
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Also corrects use of std::stable_sort. Results are still largely incorrect though.
2018-01-02 22:18:10 -05:00
Thomas Harte
c8367a017f
Cleans up test and makes attempt to factor in cartridge type popularity.
2018-01-01 21:21:05 -05:00
Thomas Harte
344a12566b
Tweaks a couple of expected cartridge types.
2018-01-01 20:14:56 -05:00
Thomas Harte
c07113ea95
Ensures no illegal accesses while testing MSX ROM type detection.
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Specifically: the static analyser doesn't even correctly identify everything that is an MSX ROM yet, let alone then properly determine type.
2018-01-01 17:38:26 -05:00
Thomas Harte
bc2879c412
Corrects the MSX ROM unit test.
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I.e. the test is correct now, for those SHAs I could find. The static analyser is still wrong just slightly less than half the time.
2018-01-01 17:35:13 -05:00
Thomas Harte
1d47b55729
Ensures the selected cartridge start address is recorded in the cartridge.
2018-01-01 16:38:49 -05:00
Thomas Harte
db25b4554b
Introduces failing tests of the MSX static analyser.
2018-01-01 16:38:26 -05:00
Thomas Harte
05b95ea2e0
Corrects Xcode tests.
2018-01-01 16:04:13 -05:00
Thomas Harte
250f7bf6b0
Makes attempt to support 48kb ROMs.
2018-01-01 11:25:27 -05:00
Thomas Harte
34db35b500
Merge pull request #327 from TomHarte/Z80Disassembler
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Introduces a Z80 disassembler.
2017-12-31 18:39:01 -08:00
Thomas Harte
f75590253d
Introduces necessary header for std::sort.
2017-12-31 21:36:24 -05:00
Thomas Harte
4f6abc9059
Introduces missing header.
2017-12-31 21:34:35 -05:00
Thomas Harte
c70dbc6a49
Introduces the most basic attempt to guess MSX cartridge type.
2017-12-31 21:23:30 -05:00
Thomas Harte
1c255b9e7d
Generalises some of the disassembler, and provides Z80 logic to create a [first attempt at a] Z80 disassembler.
2017-12-31 18:49:35 -05:00
Thomas Harte
188bfa9c18
Merge pull request #326 from TomHarte/TyperTermination
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Ensures typers terminate.
2017-12-30 10:49:53 -08:00
Thomas Harte
c7f8f37822
Ensures typers terminate.
2017-12-30 13:46:30 -05:00
Thomas Harte
4a19dbb8cb
Merge pull request #325 from TomHarte/ContentTypes
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Adds document type UTIs.
2017-12-30 10:41:14 -08:00
Thomas Harte
bf0601123b
Adds some document type UTIs.
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Will need to survey all the other Mac emulators to get a complete list, I guess.
2017-12-30 13:36:29 -05:00
Thomas Harte
9339f3413f
Liberalises the end-of-file test for MSX ASCII.
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From: must be back padded with 0x1a to merely must contain 0x1a.
2017-12-29 20:54:10 -05:00
Thomas Harte
c18517be4b
Ensures that the fast loading option successfully flows from the Mac interface.
2017-12-29 19:07:22 -05:00
Thomas Harte
eef34adcbd
Merge pull request #324 from TomHarte/MSXAnalysis
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Introduces basic tape analysis for the MSX
2017-12-29 15:45:21 -08:00
Thomas Harte
769d9dfbb9
Adds missing header.
2017-12-29 18:41:26 -05:00
Thomas Harte
6a0bb83716
Corrects typos in the SDL main.
2017-12-29 18:40:32 -05:00
Thomas Harte
6da8a3e24b
Causes the MSX to respond to the appropriate standard configuration options.
2017-12-29 18:36:42 -05:00
Thomas Harte
e349161a53
Rejigs the typing relationship so that use of a typer is not strongly implied by the interface.
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Simultaneously implements typing on the MSX by direct insertion into the key buffer.
2017-12-29 18:30:46 -05:00
Thomas Harte
d5b1a9d918
Moves the typer functionality behind a functionality-based naming scheme, eliminates its C-style memory management.
2017-12-29 15:26:03 -05:00
Thomas Harte
76af0228dd
Corrects longstanding survival of camel case in the analyser's loadingCommand.
2017-12-29 15:15:29 -05:00
Thomas Harte
2cc1a2684a
Introduces [over-]analysis of cassette contents prior to starting the MSX, and simplifies ROM checking.
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So a proper loading command is now known.
2017-12-29 15:11:10 -05:00
Thomas Harte
98a9d57c0b
Imputes the alignment requirement for CAS headers.
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Also stops adding a spurious 0xff as the final byte on the tape.
2017-12-29 10:42:18 -05:00
Thomas Harte
c481293aca
Liberalises CAS interpretation.
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It seems to be an even weirder file format than I thought; it can contain only ROM-formatted data but seemingly often contains blobs that the ROM cannot write.
2017-12-29 09:56:58 -05:00
Thomas Harte
5fd0a2b9ea
Attempts to pull reimplementations of TAPION and TAPIN better into line with originals.
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Also improves whole flow of the fast tape hack that uses them.
2017-12-28 22:48:04 -05:00
Thomas Harte
11b73a9c0b
Adds preliminary, non-error-checking wiring in of MSX parser alternatives to TAPION and TAPIN.
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As both a prototype of the pending fast tape loading, and to provide for exact behaviour comparison.
2017-12-26 22:31:34 -05:00
Thomas Harte
c4950574ea
Introduces an attempted reimplementation of the MSX BIOS's two main tape reading entry points.
2017-12-26 22:19:37 -05:00
Thomas Harte
0b297f2972
Adds some appropriate costs to the tape players.
2017-12-26 22:13:28 -05:00
Thomas Harte
f9f870ad2d
Merge pull request #323 from TomHarte/MSXCAS
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Adds support for the MSX .CAS file format.
2017-12-23 17:00:02 -08:00
Thomas Harte
cbba6a5595
Ensures final few bytes of a CAS file aren't dropped.
2017-12-23 19:54:42 -05:00
Thomas Harte
0a079b0f94
Attempts to fix failure to distinguish end-of-file.
2017-12-23 19:32:24 -05:00
Thomas Harte
9a7e974579
Corrects skipping of every other file, and transition from bytes back into header.
2017-12-23 19:20:04 -05:00
Thomas Harte
f4d414d6e4
Removes stray line break.
2017-12-23 18:42:04 -05:00
Thomas Harte
b4bfcd4279
Switches to an attempt to break the .CAS into files ahead of time.
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Hopefully the better to insert appropriate lengths of header and gap.
2017-12-23 18:41:50 -05:00
Thomas Harte
e8ddff0ee0
Makes a first, messy, attempt at serialising CAS files into audio.
2017-12-21 22:34:03 -05:00
Thomas Harte
b61fab9df7
Merge pull request #322 from TomHarte/MSXTapes
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Introduces TSX support for the MSX.
2017-12-20 18:43:54 -08:00
Thomas Harte
28fb1ce2ae
Removes unnecessary logging.
2017-12-20 21:39:17 -05:00
Thomas Harte
b9b107ee85
Switches KeyGrave and KeyQuote, correcting a disarrangement.
2017-12-20 21:16:54 -05:00
Thomas Harte
f17758e7f9
Attempts better to deal with large numbers.
2017-12-20 21:03:24 -05:00
Thomas Harte
0bb24075b6
Immediate fixes: TSX is seemingly TZX 1.21; the tape motor control works the other way around.
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Input is not yet being recognised.
2017-12-19 22:17:42 -05:00
Thomas Harte
db6d9b59d0
Attempts to implement TSX support for the MSX.
2017-12-19 21:53:04 -05:00
Thomas Harte
51e82c10c5
Merge pull request #321 from TomHarte/MSXKeyTaps
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Introduces the MSX keyboard toggle sample source.
2017-12-19 18:19:42 -08:00
Thomas Harte
2d892da225
Introduces the MSX keyboard toggle sample source.
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In support of which, it also introduces a means of sample source composition.
2017-12-19 21:08:10 -05:00
Thomas Harte
b99ba2bc02
Merge pull request #320 from TomHarte/AudioRejig
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Separates the audio pipeline into its component parts
2017-12-18 18:50:36 -08:00
Thomas Harte
d36e9d0b0d
Reintroduces cstring.h to a few files that previously got it implicitly.
2017-12-18 21:47:30 -05:00
Thomas Harte
2dc1d4443e
Separates LowpassFilter and SampleSource.
2017-12-18 21:39:23 -05:00
Thomas Harte
f8a2459c91
Corrects two lingering adaptation errors in the Vic-20.
2017-12-17 21:43:08 -05:00
Thomas Harte
ac80d10cd8
Separates the component parts of running an audio stream: task deferral, filtering and generation.
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Walking towards improving opportunities for composition.
2017-12-17 21:26:06 -05:00
Thomas Harte
eb6b612052
Adds DeferringAsyncTaskQueue as a base concurrency primitive.
2017-12-15 22:14:09 -05:00
Thomas Harte
d66a33f249
Merge pull request #319 from TomHarte/TMSTests
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Corrects a couple of lingering TMS issues and tidies it up
2017-12-14 18:20:13 -08:00
Thomas Harte
ec4c259695
Removes unused file.
2017-12-14 21:19:09 -05:00
Thomas Harte
ad50b6b1fb
Corrects TMS' get_time_until_interrupt when the next interrupt is exactly a frame away.
2017-12-14 21:12:51 -05:00
Thomas Harte
3da323c657
Corrects lingering free TMS read.
2017-12-14 20:30:56 -05:00
Thomas Harte
aca7842ca4
Better documents and tidies the TMS9918.
2017-12-14 20:27:26 -05:00
Thomas Harte
38c912b968
Merge pull request #318 from TomHarte/TMSVRAMTiming
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Attempts real VRAM access timings for the TMS9918a
2017-12-13 19:56:56 -08:00
Thomas Harte
7a52e7d6d2
Provides an empty value for the interrupt cycle.
2017-12-13 22:44:03 -05:00
Thomas Harte
c36de4f640
Attempts real VRAM access timings, correcting a frame timing error as I go.
2017-12-13 22:37:27 -05:00
Thomas Harte
504772bcda
Merge pull request #317 from TomHarte/SpriteGlitching
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Corrects occasional TMS sprite glitching.
2017-12-12 19:20:27 -08:00
Thomas Harte
5d0c33d545
Corrects occasional TMS sprite glitching.
2017-12-12 22:19:33 -05:00
Thomas Harte
7bc1bcd493
Merge pull request #316 from TomHarte/SpriteTopLine
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Adds one-before-the-graphics as a line for TMS video collection.
2017-12-12 18:36:03 -08:00
Thomas Harte
b0616ee10c
Adds one-before-the-graphics as a line for video collection.
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Thereby corrects sprites on line 0.
2017-12-12 21:35:33 -05:00
Thomas Harte
da57df55e8
Merge pull request #315 from TomHarte/MSX
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Introduces very provisional MSX 1 emulation
2017-12-12 18:30:09 -08:00
Thomas Harte
4daea1121b
Gives up on C-BIOS for a while, to get to an acceptable merge point.
2017-12-12 21:19:33 -05:00
Thomas Harte
afcdd64d5e
Switches to a less easy-to-confuse storage arrangement for MSX memory slots.
2017-12-11 21:09:53 -05:00
Thomas Harte
798cdba979
8255: update_outputs now affects only those ports designated as outputs.
2017-12-10 17:55:37 -05:00
Thomas Harte
f957344ac4
Corrects TMS failure to show background through tile layer.
2017-12-09 23:15:04 -05:00
Thomas Harte
b3fbd0f352
Tidies up some of the TMS' magic constants.
2017-12-09 23:08:07 -05:00
Thomas Harte
042edc72f7
Adjusts TMS declared timing so as to be in-phase with an NTSC clock, and adopts an alternative palette.
2017-12-09 22:28:34 -05:00
Thomas Harte
943418c434
Reformulates TMS sprite plotting to set the collision flag and to support magnified sprites.
2017-12-09 20:30:12 -05:00
Thomas Harte
7d7e2538bd
Introduces a computationally simplified inner loop for TMS graphics modes, modelled on that for text.
2017-12-09 16:02:33 -05:00
Thomas Harte
7a544731e2
Makes minor tidiness improvements to the TMS.
2017-12-08 22:20:21 -05:00
Thomas Harte
e1914b4f16
Attempts to add a proper intermediate buffer for sprites to allow the split of collection and output.
2017-12-08 22:12:39 -05:00
Thomas Harte
202958303e
Merge branch 'MSX' of github.com:TomHarte/CLK into MSX
2017-12-06 21:58:29 -05:00
Thomas Harte
57b060ac3c
Updates SConstruct for the incoming MSX changes.
2017-12-06 18:56:26 -08:00
Thomas Harte
8653eb8b55
Corrects various latent errors in optimised TMS video collection.
2017-12-06 20:24:29 -05:00
Thomas Harte
a4f0a260fd
Reformulates the TMS graphics mode fetch loop to try to eliminate heavy conditionality. Temporarily introduces some sprite selection issues.
2017-12-05 22:39:03 -05:00
Thomas Harte
d4a53e82bb
Replaces manual retread of memcpy with standard memcpy.
2017-12-05 18:21:34 -05:00
Thomas Harte
6eedc99286
Makes substantial optimisations to text mode.
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Character optimisations to come.
2017-12-04 22:18:51 -05:00
Thomas Harte
ec266d6c8e
Ensures the AY stops listening to the bus after each read or write.
2017-12-04 19:18:54 -05:00
Thomas Harte
e3a5218e78
Fixes AY and random port input for the MSX.
2017-12-03 22:25:18 -05:00
Thomas Harte
a473338abe
Makes minor type conversion fixes.
2017-12-03 22:24:48 -05:00
Thomas Harte
ae21782adc
Corrects two Cartridge type mismatches.
2017-12-03 15:43:59 -05:00
Thomas Harte
ee44d671e7
Steps towards exposing the MSX in Cocoa builds.
2017-12-03 15:42:54 -05:00
Thomas Harte
3766bef962
Eliminates some redundant white space.
2017-12-03 14:52:42 -05:00
Thomas Harte
ad3df36c20
Corrects sprite information collection to cover all four.
2017-12-03 14:51:55 -05:00
Thomas Harte
38b11893e8
Takes first steps towards sprite display on the TMS.
2017-12-02 22:13:43 -05:00
Thomas Harte
e4534775b0
Cleans up and zooms in on the TMS slightly.
2017-12-02 17:48:31 -05:00
Thomas Harte
fe7fc6b22e
Enables AY output from the MSX.
2017-12-02 16:30:43 -05:00
Thomas Harte
fe0cdc8d69
Corrects colour fetching in TMS Graphics II to be a function of row.
2017-12-02 16:10:29 -05:00
Thomas Harte
7f8a13a409
Adds bare minimum to get accepted 16- and 32kb cartridges to start on the MSX.
2017-12-02 16:06:04 -05:00
Thomas Harte
ca26ce8400
Slightly corrects style errors in the Cartridge hierarchy, and introduces mapping of .ROM to the MSX when appropriate.
2017-12-02 16:01:30 -05:00
Thomas Harte
d3dd8f3f2a
Implements screen 2 addressing.
2017-12-02 14:05:52 -05:00
Thomas Harte
3c8d2d579d
Resolves remaining sources of text mode instability.
2017-11-30 22:48:07 -05:00
Thomas Harte
edcbb3dfed
Tidies code a little and thereby uncovers and corrects one cause of output instability.
2017-11-30 22:19:53 -05:00
Thomas Harte
9c8158753e
Makes a first attempt at displaying text mode.
2017-11-30 21:35:26 -05:00
Thomas Harte
5da9cb2957
Introduces most of a keyboard mapping for the MSX.
2017-11-30 19:27:53 -05:00
Thomas Harte
54c845b6e2
Adds just enough logic to make every host key look like '0' to the MSX.
2017-11-29 22:07:30 -05:00
Thomas Harte
ee84f33ab5
Ensures that the 9918 admits that it is the source of interrupts.
2017-11-29 21:33:43 -05:00
Thomas Harte
f0f149c018
Simplified paging logic.
2017-11-29 20:49:02 -05:00
Thomas Harte
7dfbe4bb93
Ensures proper Boolean startup values for IFF1 and IFF2.
2017-11-29 20:32:55 -05:00
Thomas Harte
aa4eef41d8
Seeks to introduce MSX interrupts.
2017-11-29 20:31:55 -05:00
Thomas Harte
69ec8a362e
Makes an attempt to perform MSX memory paging.
2017-11-28 21:56:15 -05:00
Thomas Harte
ecd7d4731b
Advances emulation to showing what looks like appropriate text on screen.
2017-11-28 21:27:15 -05:00
Thomas Harte
563aa051e4
Simplifies code a little and gives something on screen.
2017-11-28 21:19:28 -05:00
Thomas Harte
642bb8333f
Introduces something of a first attempt at graphics collection and display. An unsuccessful attempt.
2017-11-28 21:10:30 -05:00
Thomas Harte
c558e86e03
Adds border colour output.
2017-11-27 22:05:40 -05:00
Thomas Harte
dbb14ea2e2
Corrects counting deficiencies that could produce an unstable display.
2017-11-27 21:36:12 -05:00
Thomas Harte
173e16b107
Corrects the 9918 so that it terminates.
2017-11-27 19:48:04 -05:00
Thomas Harte
7d2adad67e
Adds the absolute most basic version of in-frame time keeping, to display a white square.
2017-11-27 19:43:33 -05:00
Thomas Harte
d33612def5
Ensures the MSX provides a clock to the VDP.
2017-11-26 20:07:30 -05:00
Thomas Harte
9cb6ca3440
Adds elementary decoding of VDP accesses.
2017-11-26 20:01:11 -05:00
Thomas Harte
e957e40b14
Shifts 8255 logging up into its own port handler. That's probably fine for now.
2017-11-26 18:59:29 -05:00
Thomas Harte
7a8a43a96a
Adds just enough of the MSX memory map for the Z80 to appear to try to do useful things.
2017-11-26 18:34:40 -05:00
Thomas Harte
0eb5dd9688
Introduces the fundamentals of bus routing for the MSX.
2017-11-26 16:47:59 -05:00
Thomas Harte
a14b53a9ab
Adds a TMS9918 skeleton plus enough in the MSX to get to a blank screen in SDL/kiosk mode.
2017-11-26 13:28:26 -05:00
Thomas Harte
576d554a2c
Expands upon the MSX skeleton.
2017-11-25 13:33:51 -05:00
Thomas Harte
68a2895753
Adds enough static analyser to get to the MSX itself as the point of failure in SDL/kiosk mode.
2017-11-25 13:18:24 -05:00
Thomas Harte
f90b3f06aa
Merge branch 'master' into MSX
2017-11-25 08:19:24 -05:00
Thomas Harte
f067fa9923
Merge pull request #310 from TomHarte/ROMSafety
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Simplifies CPC ROM input mechanism.
2017-11-25 05:19:00 -08:00
Thomas Harte
ee9f89ccb5
Simplifies CPC ROM input mechanism.
2017-11-25 08:18:01 -05:00
Thomas Harte
573a9c6fb2
Merge pull request #309 from TomHarte/ROMSafety
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Ensures all vectors loaded from disk are the expected size.
2017-11-25 05:17:23 -08:00
Thomas Harte
a46a37fba9
Ensures all vectors loaded from disk are the expected size.
2017-11-24 22:22:32 -05:00
Thomas Harte
324b57c054
Adds inclusion of the 3/4 of the MSX's support chips that are currently implemented.
2017-11-24 22:05:50 -05:00
Thomas Harte
ae50ca9ab2
Moves the MSX class to the appropriate place and gives it a Z80.
2017-11-24 21:59:54 -05:00
Thomas Harte
6e4bde00d3
Merge branch 'master' into MSX
2017-11-24 21:50:38 -05:00
Thomas Harte
d4d0dd87c9
Merge pull request #307 from TomHarte/MacDynamic
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Adapts the Mac port to use a Machine::DynamicMachine.
2017-11-24 18:43:27 -08:00
Thomas Harte
221c05ca76
Adapts the Mac port to use a Machine::DynamicMachine, thereby eliminating plenty of duplication.
2017-11-24 21:36:22 -05:00
Thomas Harte
ff21ff90eb
Introduces MSX ROMs and an MSX class.
2017-11-24 20:43:26 -05:00
Thomas Harte
fcf295fd68
Merge pull request #306 from TomHarte/ShaderUniforms
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Formalises naming of shader inputs and related guarantees.
2017-11-24 16:28:30 -08:00
Thomas Harte
2008dec1ed
Adds exceptions for bad enumeration values.
2017-11-24 19:27:49 -05:00
Thomas Harte
b4f3c41aae
Formalises naming of shader inputs and related guarantees.
2017-11-24 18:45:24 -05:00
Thomas Harte
90c4e3726f
Merge pull request #305 from TomHarte/MacCleanup
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Withdraws genericised selection and ROM provision interfaces.
2017-11-24 14:58:49 -08:00
Thomas Harte
c83b3cefbc
Eliminates the generalised special case selectors and ROM suppliers from the CPC, Vic-20, Electron and ZX80/81.
2017-11-24 17:55:28 -05:00
Thomas Harte
a8ac51da73
Eliminates the Oric's non-reflective inputs for selections, and the Oric-specific ROM setter.
2017-11-24 16:59:00 -05:00
Thomas Harte
bc65ba3f9b
Merge pull request #303 from mattgodbolt/fixes-for-uninitialized-errors
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Initialize all `const` members.
2017-11-24 12:19:55 -08:00
Thomas Harte
79674fdbd3
Merge pull request #304 from mattgodbolt/gitignore
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Add a .gitignore file to ignore the built `clksignal` binary
2017-11-24 12:19:25 -08:00
Matt Godbolt
adea4711f1
Add a .gitignore file to ignore the built clksignal binary
2017-11-24 12:12:48 -06:00
Matt Godbolt
bded406caa
Initialize all const members.
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Without this change, GCC versions >4.8 will error with things like:
```
./CLK/Outputs/CRT/Internals/CRTOpenGL.cpp:154:2:error: uninitialized const member
'Outputs::CRT::OpenGLOutputBuilder::draw_frame(unsigned int, unsigned int, bool)::RenderStage::target'
```
2017-11-24 12:09:10 -06:00
Thomas Harte
85085a6375
Merge pull request #302 from TomHarte/OricStartup
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Ensures Oric video output starts up and changes validly.
2017-11-23 13:23:31 -08:00
Thomas Harte
d122d598d3
Merge branch 'OricStartup' of github.com:TomHarte/CLK into OricStartup
2017-11-23 16:20:19 -05:00
Thomas Harte
d6192b8c58
Ensures Oric video output starts up and changes validly.
2017-11-23 16:19:41 -05:00
Thomas Harte
f02d4dbb59
Ensures Oric video output starts up and changes validly.
2017-11-23 16:17:52 -05:00
Thomas Harte
f3818991f6
Merge pull request #301 from TomHarte/ElectronMode3
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Corrects Electron Mode 3 timing.
2017-11-23 13:07:15 -08:00
Thomas Harte
c7dd6247f0
Corrects Electron Mode 3 timing.
2017-11-23 16:06:05 -05:00
Thomas Harte
99e17600d7
Updated as per slow appropriate of the full 'Clock Signal'.
2017-11-22 20:44:06 -05:00
Thomas Harte
1d821ad459
Corrected name of build tool.
2017-11-22 20:11:02 -05:00
Thomas Harte
c60a9ee3c3
Merge pull request #298 from TomHarte/ReadMeUpdates
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Provided exposition of new platform support.
2017-11-22 17:08:58 -08:00
Thomas Harte
ffcbd1e94d
Provided exposition of new platform support.
2017-11-22 20:08:07 -05:00
Thomas Harte
6c8b503402
Merge pull request #297 from TomHarte/Instructions
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Adds build instructions and references the special SDL key combinations.
2017-11-22 17:04:01 -08:00
Thomas Harte
55e1d25966
Adds build instructions and references the special SDL key combinations.
2017-11-22 20:03:28 -05:00
Thomas Harte
0bdd776114
Merge pull request #296 from TomHarte/SDLAudioRejig
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Switches to using the supply-on-demand audio route through SDL.
2017-11-22 16:45:01 -08:00
Thomas Harte
c1b7bceec8
Switches to using the supply-on-demand audio route through SDL.
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This gives an additional hook from which machine updates can be hooked, so separates that buffer size from any implicit frame rate assumptions.
2017-11-22 19:36:39 -05:00
Thomas Harte
dc4f58e40c
Hides the mouse cursor when in SDL fullscreen mode.
2017-11-21 21:52:32 -05:00
Thomas Harte
3b8cdd620c
Merge pull request #295 from TomHarte/SDLPaste
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Adds acceptance of paste and fullscreen toggle to SDL target.
2017-11-21 18:50:17 -08:00
Thomas Harte
3365ff0200
Adds type recipient as a dynamic type, and accepts paste and fullscreen toggle in SDL.
2017-11-21 21:44:29 -05:00
Thomas Harte
89c3e2ba5a
Merge pull request #294 from TomHarte/Vic20Startup
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Corrects application Vic-20 startup issues.
2017-11-21 18:26:16 -08:00
Thomas Harte
c6306db47c
Ensures the 6560 is fully initialised by setup_output.
2017-11-21 21:24:06 -05:00
Thomas Harte
8ddc64c82a
Ensures well-defined default speaker clock rate values.
2017-11-21 21:18:58 -05:00
Thomas Harte
b887cb7255
Merge pull request #293 from TomHarte/ROMExposition
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Adds user-facing information about which ROMs a machine attempted to load if it fails.
2017-11-21 16:24:23 -08:00
Thomas Harte
d54ee2af82
Adds user-facing information about which ROMs a machine attempted to load if it fails.
2017-11-21 19:22:33 -05:00
Thomas Harte
723c113186
Merge pull request #292 from TomHarte/Help
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Introduces command-line help and reduces code duplicity in those options.
2017-11-20 19:01:06 -08:00
Thomas Harte
c368c4443e
Improves both internal and external exposition for the SDL version.
2017-11-20 21:59:53 -05:00
Thomas Harte
7b25b03cd5
Formally standardises machine options and introduces a --help option for the SDL target.
2017-11-20 21:55:32 -05:00
Thomas Harte
9961d13e2d
Merge pull request #290 from TomHarte/DragAndDrop
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Adds drag and drop receivership to the SDL target.
2017-11-19 15:21:25 -08:00
Thomas Harte
29b5ccc767
Removes redundant logging on the Mac.
2017-11-19 18:05:39 -05:00
Thomas Harte
90af395df2
Adds support for receiving dragged and dropped files under SDL.
2017-11-19 18:05:31 -05:00
Thomas Harte
6f8d4d6c5c
Merge pull request #282 from TomHarte/BooleanSelections
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Boolean selections
2017-11-18 18:16:33 -08:00
Thomas Harte
63381ff505
Fixes accidental typographic quote in SConstruct.
2017-11-18 21:13:55 -05:00
Thomas Harte
2ea050556b
Adds transcoding of ostensible list selections to Boolean selections, and vice versa.
2017-11-18 21:09:26 -05:00
Thomas Harte
8dcac6561e
Merge pull request #281 from TomHarte/MachineOptions
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Introduces reflective machine options and a command-line parser for them.
2017-11-18 17:03:53 -08:00
Thomas Harte
90d33949f9
Adds a mapping of backspace for the Electron.
2017-11-18 20:02:04 -05:00
Thomas Harte
d3e68914dd
Removes uninteresting logging.
2017-11-18 20:00:40 -05:00
Thomas Harte
82ad0354c4
Adds configuration options to the Vic-20, Oric and ZX80/81.
2017-11-18 19:48:10 -05:00
Thomas Harte
073e439518
Adds a basic argument parser, allowing machine options to be set.
2017-11-18 19:34:38 -05:00
Thomas Harte
27b123549b
Adds missing #include.
2017-11-17 23:15:37 -05:00
Thomas Harte
de9db724a7
Introduces Configurable::Device and implements it for the Electron.
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Configurable::Device covers devices that have user-facing configuration options, listing them and accepting them.
2017-11-17 23:02:00 -05:00
Thomas Harte
532ea35ee9
Merge pull request #280 from TomHarte/AttributeBindings
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Corrects intermediate shader attribute bindings.
2017-11-16 17:20:23 -08:00
Thomas Harte
e9ddec35d6
Corrects intermediate shader attribute bindings.
2017-11-16 20:19:54 -05:00
Thomas Harte
7647f8089b
Merge pull request #279 from TomHarte/StringStream
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Substitutes std::osringstream for C-esque `asprintf`.
2017-11-15 18:49:16 -08:00
Thomas Harte
f00f0353a6
Removes unnecessary temporaries.
2017-11-15 21:48:10 -05:00
Thomas Harte
e19ae5d43d
Merge branch 'StringStream' of github.com:TomHarte/CLK into StringStream
2017-11-15 21:30:16 -05:00
Thomas Harte
0a9622435c
Merge branch 'StringStream' of github.com:TomHarte/CLK into StringStream
2017-11-15 21:30:04 -05:00
Thomas Harte
f704932475
Merge branch 'StringStream' of github.com:TomHarte/CLK into StringStream
2017-11-15 21:29:22 -05:00
Thomas Harte
d0f096a20b
Substitutes std::osringstream for C-esque asprintf.
2017-11-15 21:28:48 -05:00
Thomas Harte
949d0f3928
Substitutes std::osringstream for C-esque asprintf.
2017-11-15 21:25:01 -05:00
Thomas Harte
a2d48223c3
Merge pull request #278 from TomHarte/OpenGL32
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Adds an explicit request for OpenGL 3.2 under SDL.
2017-11-14 16:02:33 -08:00
Thomas Harte
fc080c773f
Adds an explicit request for OpenGL 3.2.
2017-11-14 18:59:18 -05:00
Thomas Harte
adb3811847
Ensures deterministic initial state for the atomic flag.
2017-11-13 22:51:42 -05:00
Thomas Harte
dbbea78b76
Merge branch 'master' of github.com:TomHarte/CLK
2017-11-13 22:40:05 -05:00
Thomas Harte
fd96e3e657
Eliminates all unused #ifdef GL_NV_texture_barrier code.
2017-11-13 22:39:18 -05:00
Thomas Harte
06d81b3a97
Eliminates all unused #ifdef GL_NV_texture_barrier code.
2017-11-13 22:38:33 -05:00
Thomas Harte
88551607a6
Ensures the GL error flag is cleared after a potential error-raising call.
2017-11-13 22:31:41 -05:00
Thomas Harte
2a9dccff26
Fixes typo.
2017-11-13 22:28:11 -05:00
Thomas Harte
1027f85683
Merge pull request #277 from TomHarte/MappingFallback
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Adds a fallback route for the array builder if it can't map a buffer.
2017-11-13 19:27:48 -08:00
Thomas Harte
9bb9cb4a65
Adds a fallback route for the array builder if it can't map a buffer.
2017-11-13 22:27:04 -05:00
Thomas Harte
2de80646ec
Merge pull request #276 from TomHarte/SafeTextureTarget
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Updates style of OpenGL::TextureTarget for instance variable names and RAII.
2017-11-13 19:13:32 -08:00
Thomas Harte
bf4ed57f68
Updates style of OpenGL::TextureTarget for instance variable names and preference for RAII.
2017-11-13 22:04:13 -05:00
Thomas Harte
9578f3dc44
Merge pull request #275 from TomHarte/SDLLogging
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Adds some very basic logging to the SDL target.
2017-11-12 21:24:39 -05:00
Thomas Harte
a97c478a34
Adds some very basic logging to the SDL target.
2017-11-12 21:23:48 -05:00
Thomas Harte
e0113d5dce
Merge pull request #274 from TomHarte/TargetFramebuffer
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Attempts more cleanly to deal with window resizing in SDL.
2017-11-12 19:48:23 -05:00
Thomas Harte
980cf541d2
Attempts more cleanly to deal with window resizing in SDL.
2017-11-12 19:47:18 -05:00
Thomas Harte
69c983f9ee
Merge pull request #273 from TomHarte/TargetFramebuffer
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Allows a CRT machine owner to set the target frame buffer for OpenGL output.
2017-11-12 19:30:06 -05:00
Thomas Harte
70039d22f1
Allows a CRT machine owner to set the target frame buffer for OpenGL output, breaking the assumption that it'll be zero.
2017-11-12 19:29:22 -05:00
Thomas Harte
ebdb80c908
Merge pull request #272 from TomHarte/UnusedResults
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Resolves all GCC warnings
2017-11-12 17:55:23 -05:00
Thomas Harte
0eaac99d74
Avoids implicit signed/unsigned comparison in the G64 reader.
2017-11-12 17:48:11 -05:00
Thomas Harte
792061a82b
Corrects warnings in the CSW, CPC DSK, ZX8081 data encoding, and PRG and binary cartridges.
2017-11-12 17:46:06 -05:00
Thomas Harte
d2ba7d7430
Corrects GCC warnings in Commodore::File and the FileHolder.
2017-11-12 17:38:21 -05:00
Thomas Harte
8713cfa613
Ensured all asprintf return values are checked.
2017-11-12 17:29:20 -05:00
Thomas Harte
aa77be1c10
Introduces missing include.
2017-11-12 17:20:37 -05:00
Thomas Harte
e6aa2321cd
Merge branch 'UnusedResults' of github.com:TomHarte/CLK into UnusedResults
2017-11-12 17:17:49 -05:00
Thomas Harte
c827d14d97
Corrects various GCC warnings across the 6560, CPC, TIA, Oric video and elsewhere.
2017-11-12 17:17:27 -05:00
Thomas Harte
2979d19621
Enables all warnings for the SDL build.
2017-11-12 16:46:10 -05:00
Thomas Harte
282e5c9d3e
For GCC's benefit, added impossible default options.
2017-11-12 16:45:31 -05:00
Thomas Harte
ede47d4ba7
Improves type safety within CSW file support.
2017-11-12 16:42:53 -05:00
Thomas Harte
5408efe9b5
Flags obvious default options within the 6560, Vic-20 and DynamicMachine.
2017-11-12 16:41:09 -05:00
Thomas Harte
d6141cb020
Increases number of warnings in Xcode.
2017-11-12 16:37:39 -05:00
Thomas Harte
198d0fd1de
Makes it obvious to GCC that a return result is always supplied.
2017-11-12 16:37:18 -05:00
Thomas Harte
6d80856f02
Attempts to eliminate warnings around a meaningless value and an unused label in the 8272.
2017-11-12 16:34:51 -05:00
Thomas Harte
4778616fd7
Eliminates unused result and unused label.
2017-11-12 16:30:23 -05:00
Thomas Harte
2e025d85eb
Added check in SDL main that the expected number of bytes is read.
2017-11-12 16:26:42 -05:00
Thomas Harte
61f2191c86
Merge branch 'PragmaMark'
2017-11-12 16:11:36 -05:00
Thomas Harte
c1eab8d5f3
Corrects a pragma mark that escaped detection through typo.
2017-11-12 16:11:24 -05:00
Thomas Harte
91d2d59ae5
Merge pull request #271 from TomHarte/PragmaMark
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Commutes cross-platform `#pragma mark`s to `//MARK:`s.
2017-11-12 16:02:18 -05:00
Thomas Harte
5aef81cf24
Commutes cross-platform #pragma marks to //MARK:s.
2017-11-12 15:59:11 -05:00
Thomas Harte
3550196bed
Merge pull request #270 from TomHarte/TrackCloning
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Corrects `insert` explicitly to supply a `shared_ptr` rather than a raw one.
2017-11-11 18:23:49 -05:00
Thomas Harte
bce58683fa
Corrects insert explicitly to supply a shared_ptr rather than a raw one.
2017-11-11 18:22:41 -05:00
Thomas Harte
c91a5875b2
Merge pull request #269 from TomHarte/StdNamespace
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Starts doubling down on <cX> over <X.h> for C includes, plus appropriate namespace usage.
2017-11-11 15:32:50 -05:00
Thomas Harte
2e15fab651
Doubles down on <cX> over <X.h> for C includes, and usage of the namespace for those types and functions.
2017-11-11 15:28:40 -05:00
Thomas Harte
6a176082a0
Switches a couple of overlooked C-style casts to functional style.
2017-11-11 12:41:49 -05:00
Thomas Harte
fd346bac3e
Merge pull request #267 from TomHarte/AudioCleanup
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Resolves dangling C-isms in my FIR filter, and introduces composition.
2017-11-11 12:38:45 -05:00
Thomas Harte
25e9dcc800
Merge pull request #268 from TomHarte/SerialPortVIAInitialisation
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Resolvws out-of-order initialisation within the C1540.
2017-11-11 12:37:48 -05:00
Thomas Harte
792cbb1536
Resolvws out-of-order initialisation within the C1540.
2017-11-11 12:35:51 -05:00
Thomas Harte
2e12370251
Resolves some of the dangling C-isms remaining in my FIR filter, and introduces filter composition.
2017-11-11 12:30:45 -05:00
Thomas Harte
7adc25694a
Merge pull request #266 from TomHarte/SDLScons
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Introduces an SCons build file and corrects remaining Ubuntu build errors
2017-11-10 23:43:44 -05:00
Thomas Harte
ca80da7fbe
Merge branch 'SDLScons' of github.com:TomHarte/CLK into SDLScons
2017-11-10 23:17:05 -05:00
Thomas Harte
f853d87884
Switches SConstruct build file to producing an optimised result.
2017-11-10 23:16:05 -05:00
Thomas Harte
524087805f
Switches SConstruct build file to producing an optimised result.
2017-11-10 23:11:40 -05:00
Thomas Harte
916eb96b47
Makes buffer size restriction explicit in the Vic-20.
2017-11-10 22:59:11 -05:00
Thomas Harte
4add2c1051
Corrects order-of-initialisation errors in the TIA.
2017-11-10 22:57:43 -05:00
Thomas Harte
cb0f58ab7a
Corrects order-of-initialisation errors in the CPC (again), TextureBuilder, TextureTarget, Z80, MFM parser and binary tape player.
2017-11-10 22:57:03 -05:00
Thomas Harte
d9e56711ce
Corrects order-of-initialisation errors in the Amstrad CPC, Vic-20, Oric, Commodore File, MFM disk controller, UEF and Commodore tape parser.
2017-11-10 22:47:10 -05:00
Thomas Harte
d60692b6fd
Corrects order of initialisation for the Typer and Oric video.
2017-11-10 22:35:05 -05:00
Thomas Harte
5b6ea35d96
Corrects initialisation ordering for the ZX80/81, C1540 and AY-3-8910.
2017-11-10 22:31:27 -05:00
Thomas Harte
4cbc87a17d
Corrects out-of-order initialisations for the 1770, Atari 2600 joystick, Pitfall II bus extender, Microdisc and 6502.
2017-11-10 22:20:44 -05:00
Thomas Harte
46e7c199b2
Corrects improper initialisation order of the Commodore .tap and CRTMachine::Machine.
2017-11-10 22:08:40 -05:00
Thomas Harte
ff7ba526fb
Corrects improper initialisation order on the 6560.
2017-11-10 22:05:35 -05:00
Thomas Harte
a825da3715
Reinstates missing include file.
2017-11-10 22:02:02 -05:00
Thomas Harte
fabaf4e607
Adds missing include files, corrects bad include paths and eliminates the Clang-specific __undefined.
2017-11-10 21:56:53 -05:00
Thomas Harte
153067c018
Adds missing files to SConstruct.
2017-11-10 21:56:15 -05:00
Thomas Harte
f7f2736d4d
Corrects missing includes in the SerialBus, Electron Video and Typer.
2017-11-10 20:37:18 -05:00
Thomas Harte
a16ca65825
Adds object files and SConstruct intermediaries to .gitignore.
2017-11-10 20:36:47 -05:00
Thomas Harte
cb015c83e1
Eliminated C99-style struct initialisations.
2017-11-10 19:14:19 -05:00
Thomas Harte
2203499215
Enables -Wreorder and corrects a few of the more trivial fixes thereby suggested.
2017-11-09 22:14:22 -05:00
Thomas Harte
c0055a5a5f
Further builds up SConstruct, correcting many missed imports and a couple of improper uses of C99 in C++ code.
2017-11-09 22:04:49 -05:00
Thomas Harte
62218e81bf
Fixes the FIR filter again from the Apple side.
2017-11-08 22:48:44 -05:00
Thomas Harte
c45d4831ec
Introduces an SConstruct file and corrects those errors and warnings that arise in Ubuntu.
2017-11-08 22:36:41 -05:00
Thomas Harte
9fd33bdfde
Merge pull request #265 from TomHarte/Whitespace
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Eliminates a large number of instance of end-of-line white space.
2017-11-07 22:54:46 -05:00
Thomas Harte
6e1d69581c
Eliminates a variety of end-of-line spaces.
2017-11-07 22:54:22 -05:00
Thomas Harte
f95515ae81
Eliminates a large number of instance of end-of-line tabs.
2017-11-07 22:51:06 -05:00
Thomas Harte
09c855a659
Merge pull request #264 from TomHarte/SDLKiosk
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SDL kiosk
2017-11-07 22:44:48 -05:00
Thomas Harte
16c96b605a
Xcode 9.1 auto-change.
2017-11-07 22:43:25 -05:00
Thomas Harte
e10d369e53
Ensures that execution doesn't proceed if ROMs are missing.
2017-11-07 22:32:59 -05:00
Thomas Harte
0d1b63a8c5
Switches the Objective-C machine bindings to use the set_rom_fetcher path for supplying ROMs, simplifying and unifying.
2017-11-07 22:29:57 -05:00
Thomas Harte
ddcdd07dd0
Modifies the Vic-20 and C1540 to bring them into the realm of self-ROM fetching.
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Hence enables Vic-20 support within kiosk mode as currently drafted.
2017-11-07 21:19:51 -05:00
Thomas Harte
35da3edf60
Implements install_roms on the Electron, Oric and ZX80/81.
2017-11-06 22:14:15 -05:00
Thomas Harte
d605022ea3
Moves output setup to after the machine has been configured as its target.
2017-11-06 22:13:38 -05:00
Thomas Harte
0da78065ce
Eliminates some dangling cases of undefined initial state in the TIA.
2017-11-06 22:12:39 -05:00
Thomas Harte
4b68c372c6
Adds a first attempt at audio via SDL.
2017-11-05 22:29:25 -05:00
Thomas Harte
13406fedd8
Explains commenting.
2017-11-05 21:29:20 -05:00
Thomas Harte
a209ae76ca
Adds keyboard input from SDL.
2017-11-05 21:16:14 -05:00
Thomas Harte
0116d7f071
Added a platform-neutral route for feeding ROMs to machines, in a platform-dependant fashion; implemented for the CPC.
2017-11-05 20:12:01 -05:00
Thomas Harte
512e877d06
Ensures proper initialisation of the delegate pointer.
2017-11-05 20:11:18 -05:00
Thomas Harte
1e1efcdcb8
Pushes far enough along the path of having the SDL version do work that it becomes obvious I've never figured out the correct course of action if there is no sound output.
2017-11-05 12:49:28 -05:00
Thomas Harte
bc2f58e9de
Starts the process of adding an SDL-based 'kiosk' (i.e. TV UI, or even UI-less for now) mode.
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Specifically, introduces to the Mac side of things an SDL target with, so far, enough logic to create a window and pump SDL's events, after having decided which machine and configuration it should use.
2017-11-04 19:36:46 -04:00
Thomas Harte
fd10c42433
Merge pull request #263 from TomHarte/WriteableDSK
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Makes CPC-style .DSK files writeable
2017-11-03 21:59:06 -04:00
Thomas Harte
794437f20f
Corrects fixed buffer size error in FileHolder::check_signature.
2017-11-03 21:43:31 -04:00
Thomas Harte
23d5849cda
Attempts to map recognised [M]FM errors back to FDC status codes.
2017-11-03 21:29:42 -04:00
Thomas Harte
5070a8414f
Improves FileHolder documentation
2017-11-03 21:29:15 -04:00
Thomas Harte
5a3ca0e447
Adds output for modified CPC DSKs.
2017-11-03 21:10:22 -04:00
Thomas Harte
e384c50580
Switches FileHolder to have a usage much closer to FILE *.
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Thereby opens a route for file format implementations such as that appearing for CPC DSK that create an in-memory copy and perform a full rewrite.
2017-11-02 22:32:00 -04:00
Thomas Harte
b9734278f6
Provides an up-front evaluation of performance versus objectices via README.MD.
2017-11-02 12:22:27 -04:00
Thomas Harte
f807a6b608
Generalises the concept of multiple samplings of an FM/MFM sector, simplifying CPC DSK support and paving the way for generic weak/fuzzy bit support.
2017-10-31 21:32:28 -04:00
Thomas Harte
833f8c02a4
Switches the CPC DSK implementation to building an in-memory version of the structure up front.
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Preparatory to making these things writeable.
2017-10-31 19:41:16 -04:00
Thomas Harte
0248c6a282
Merge pull request #262 from TomHarte/BookEnds
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Adds a facility for 'bookending' data runs, eliminating an occasional Electron rendering error
2017-10-23 18:36:54 -04:00
Thomas Harte
218b976dbc
Adds through route for setting a texture bookender, and exploits it from the Electron.
2017-10-23 18:35:37 -04:00
Thomas Harte
513903890e
Corrects definition of Bookender and provides the default implementation.
2017-10-22 17:24:41 -04:00
Thomas Harte
1157bde453
Sketches interface for a GPU data bookender, to avoid stray errors with packed pixel formats.
2017-10-22 10:48:10 -04:00
Thomas Harte
46345c6a3e
Merge pull request #261 from TomHarte/UIntCasts
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Continues the process of conversion to functional casts.
2017-10-21 22:53:14 -04:00
Thomas Harte
c13f8e5390
Corrects a couple of cast conversion errors.
2017-10-21 22:42:19 -04:00
Thomas Harte
ad9df4bb90
Commutes uint8_t *, uint16_t *, uint32_t *, size_t, off_t and long to functional-style casts.
2017-10-21 22:30:15 -04:00
Thomas Harte
e983854e71
Converts all uint8_t and uint16_t casts to the functional style.
2017-10-21 21:50:53 -04:00
Thomas Harte
ec999446e8
Commutes int and unsigned casts to the functional style.
2017-10-21 21:00:40 -04:00
Thomas Harte
5e3e91373a
Switches all unsigned int and double casts to functional style.
2017-10-21 19:49:04 -04:00
Thomas Harte
c52348d8d7
Merge pull request #260 from TomHarte/KeyboardCleanup
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Cleans up after keyboard formalisation.
2017-10-21 10:53:46 -04:00
Thomas Harte
9e0907ee76
Completes clean-up of post-formalisation per-machine keyboard code.
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At least for now. Standardising on how column + row is encoded might be helpful.
2017-10-21 10:52:35 -04:00
Thomas Harte
9ad4025138
Relocates things that were in Machines/ for machine usage.
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Leaving only those things intended to be visible interface.
2017-10-21 10:30:02 -04:00
Thomas Harte
405f58d6a3
Corrects write guard names.
2017-10-21 10:21:40 -04:00
Thomas Harte
afbd1c425c
Merge pull request #259 from TomHarte/Vic20Keyboard
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Consolidates Vic-20 keyboard code.
2017-10-19 22:28:11 -04:00
Thomas Harte
b2c1b83fcd
Consolidates Vic-20 keyboard code.
2017-10-19 22:27:30 -04:00
Thomas Harte
8d2b9a581a
Merge pull request #256 from TomHarte/UniversalInput
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Standardises the host-side interface for joystick and keyboard input
2017-10-19 22:15:47 -04:00
Thomas Harte
1825af0dd3
Eliminates dead code in the Vic-20 and Inputs::Joystick.
2017-10-19 22:15:21 -04:00
Thomas Harte
c2f6799f0c
Implements Vic-20 restore key.
2017-10-19 22:02:34 -04:00
Thomas Harte
b5b6219cb7
Slightly simplifies TextureBuilder arithmetic.
2017-10-19 22:02:00 -04:00
Thomas Harte
185a699279
Fixes off-by-one keyboard state accumulation error.
2017-10-19 22:01:24 -04:00
Thomas Harte
96b8f9ae9f
Merge branch 'master' into UniversalInput
2017-10-17 22:54:17 -04:00
Thomas Harte
88e2350b8f
Prevents undefined behaviour from the CPC's timer.
2017-10-17 22:53:52 -04:00
Thomas Harte
5c141af734
Prevents undefined behaviour from the CPC's timer.
2017-10-17 22:40:32 -04:00
Thomas Harte
da580e4186
Merge branch 'master' into UniversalInput
2017-10-17 22:36:22 -04:00
Thomas Harte
57ee09dffb
Merge pull request #258 from TomHarte/UndefinedBehaviour
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Corrects large swathes of undefined behaviour
2017-10-17 22:35:59 -04:00
Thomas Harte
7c8e830b90
Adjusted the Acorn tape parser to avoid signed left shifts.
2017-10-17 22:34:49 -04:00
Thomas Harte
ba5f668338
Ensured full CRT instance initialisation.
2017-10-17 22:34:10 -04:00
Thomas Harte
2c1e99858b
Fixed HalfCycles to allow conversion from Cycles without relying on undefined behaviour.
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Specifically: left shifting a negative number.
2017-10-17 22:22:51 -04:00
Thomas Harte
7f2febeec9
Ensures complete DPLL initial state assignment.
2017-10-17 22:13:37 -04:00
Thomas Harte
2d7a4fe5f0
Switches the MFM shifter to unsigned accumulation.
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Since left shifting signed numbers is undefined behaviour.
2017-10-17 22:12:04 -04:00
Thomas Harte
91b867a7b3
Ensures full 8272 instance state initialisation.
2017-10-17 22:11:01 -04:00
Thomas Harte
3944e734d3
Ensures full 6845 instance state initialisation and uses an unsigned shifter.
2017-10-17 22:10:28 -04:00
Thomas Harte
ce78d9d12c
Introduces buffer alignment when writing to textures.
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To avoid cross-boundary writes and hopefully to eke out a little better performance.
2017-10-17 22:09:48 -04:00
Thomas Harte
edbc60a3fb
Various undefined behaviour fixes.
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Primarily around uninitialised variables, but also with an attempted use of a negative pointer.
2017-10-17 21:29:19 -04:00
Thomas Harte
6ea3ff62df
Merge branch 'master' into UniversalInput
2017-10-17 21:28:40 -04:00
Thomas Harte
88959571f1
Merge pull request #257 from TomHarte/CPMReading
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Corrects CPM reader buffer overwrites
2017-10-17 20:54:02 -04:00
Thomas Harte
b4583e976e
Corrects buffer overwrites resulting from failure to treat a number of records of 0x80 as a special case.
2017-10-17 20:52:16 -04:00
Thomas Harte
92d9805f09
Removes dead Objective-C protocol references.
2017-10-17 20:51:40 -04:00
Thomas Harte
0c2dd62328
Various undefined behaviour fixes.
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Primarily around uninitialised variables, but also with an attempted use of a negative pointer.
2017-10-17 20:50:46 -04:00
Thomas Harte
3f4d90d775
Corrects buffer overwrites resulting from failure to treat a number of records of 0x80 as a special case.
2017-10-17 20:49:12 -04:00
Thomas Harte
542ec4312f
Switched the Objective-C code to using dynamic_cast alone to decide whether to post keyboard or joystick events.
2017-10-15 21:25:56 -04:00
Thomas Harte
18798c9886
Corrects joystick memory leaks.
2017-10-15 20:49:47 -04:00
Thomas Harte
7aaf27389c
Commutes the Atari 2600 to the JoystickMachine interface.
2017-10-15 20:44:59 -04:00
Thomas Harte
ee179aa7bd
Introduces a joystick analogue to the shared keyboard interface, and implements it for the Vic-20.
2017-10-14 22:36:31 -04:00
Thomas Harte
3a05ce36de
Adds a reference to the calling keyboard in reset_all_keys.
2017-10-14 22:07:11 -04:00
Thomas Harte
4f289ab10b
Corrects some deficiencies in Vic-20 keyboard mapping.
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... albeit without yet being clear on the wiring behind restore.
2017-10-12 22:33:00 -04:00
Thomas Harte
78ee46270b
Transfers possession of keyboard mappings from the Mac side over to individual machines.
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Specifically by establishing an intermediate representation of a useful mix between the American and British IBM and Mac keyboard layouts, and routing through that.
2017-10-12 22:25:02 -04:00
Thomas Harte
edb632af52
Sketches first design for generalising keyboard input.
2017-10-09 22:26:39 -04:00
Thomas Harte
19c03a08a6
Merge pull request #255 from TomHarte/BatchDriveUpdates
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Rewires so as to give disk images visibility of large change sets rather than per-sector track rewrites.
2017-10-07 19:42:14 -04:00
Thomas Harte
44cdc124af
Switches to providing a full record of changes to disk images, rather than feeding them a track at a time.
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Gets explicit about `override`s while doing so, to ensure full adaptation.
2017-10-07 19:37:36 -04:00
Thomas Harte
b37787a414
Ensures lifetime-linked track flushing without relying on virtual calls within a destructor.
2017-10-07 19:14:18 -04:00
Thomas Harte
53b99ea248
Uses Disk::flush_tracks to elide replacement of dirty tracks.
2017-10-06 22:07:42 -04:00
Thomas Harte
97a2be71e3
Introduces flush_tracks to Drive, while switching its interface to using Track::Address and adjusting associated integer types.
2017-10-06 21:45:12 -04:00
Thomas Harte
f623bff5c3
Removes unnecessary call.
2017-10-06 18:48:51 -04:00
Thomas Harte
2511fc8401
Merge pull request #254 from TomHarte/C++BestEffortUpdater
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Commutes the best-effort updater into C++11.
2017-10-05 18:28:46 -04:00
Thomas Harte
d37ec9e5b0
Attempts to ensure good behaviour if dealt an adjustable clock, and consts where possible.
2017-10-05 18:23:56 -04:00
Thomas Harte
95c82f5b36
Merge branch 'C++BestEffortUpdater' of github.com:TomHarte/CLK into C++BestEffortUpdater
2017-10-05 18:17:52 -04:00
Thomas Harte
ec202ed8be
Merge branch 'master' into C++BestEffortUpdater
2017-10-05 18:17:35 -04:00
Thomas Harte
7190225603
Merge branch 'master' into C++BestEffortUpdater
2017-10-05 18:12:33 -04:00
Thomas Harte
52e7cabd4e
Merge pull request #253 from TomHarte/Swift4UnitTests
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Removes usages of deprecated Swift initialiser within unit tests.
2017-10-05 18:12:12 -04:00
Thomas Harte
064f1dfdbc
Removes usages of deprecated initialiser.
2017-10-05 18:10:47 -04:00
Thomas Harte
f40e1fd840
Commutes the best-effort updater into C++11.
2017-10-05 18:09:58 -04:00
Thomas Harte
e194a2a015
Removes usages of deprecated initialiser.
2017-10-05 16:45:13 -04:00
Thomas Harte
c39759333a
Merge pull request #252 from TomHarte/Casts
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Begins this project's conversion to functional-style casts.
2017-10-03 22:05:22 -04:00
Thomas Harte
edb9fd301c
Begins this project's conversion to functional-style casts.
2017-10-03 22:04:15 -04:00
Thomas Harte
ea5023ac26
Merge pull request #251 from TomHarte/HFEWriteable
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Makes HFE files writeable
2017-10-03 21:32:05 -04:00
Thomas Harte
0fb363ea0e
Adds writing support for HFEs.
2017-10-03 21:24:20 -04:00
Thomas Harte
1cc85615d5
Factors HFE track seeking out from the track fetching method.
2017-10-03 20:33:55 -04:00
Thomas Harte
7b01c1bee6
Revokes direct visibility of is_read_only_ to subclasses of FileHolder.
2017-10-03 19:36:06 -04:00
Thomas Harte
35705c5345
Factors out bit reversing from the HFE class.
2017-10-03 19:12:45 -04:00
Thomas Harte
f41da83d97
Seeks to eliminate race conditions on the best-effort updater.
2017-09-30 21:34:43 -04:00
Thomas Harte
cd1e5dea4d
Merge pull request #250 from TomHarte/TrackToBits
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Refactors MFM support, breaking it into components
2017-09-30 20:31:43 -04:00
Thomas Harte
ef605eda51
Factors out commonalities in SSD/DSD and ADF implementations.
2017-09-30 20:30:15 -04:00
Thomas Harte
2f48ee59fa
Merge branch 'TrackToBits' of github.com:TomHarte/CLK into TrackToBits
2017-09-30 20:12:56 -04:00
Thomas Harte
f86729c4ac
Ensures safe machine release upon window closure.
2017-09-30 20:12:46 -04:00
Thomas Harte
5f99f4442c
Ensures safe machine release upon window closure.
2017-09-30 20:07:04 -04:00
Thomas Harte
326857a84d
Corrects FM/MFM selection when looking for sectors.
2017-09-29 22:48:00 -04:00
Thomas Harte
5dd3945695
Factors out the more egregious similarities between ADF and SSD.
2017-09-29 22:07:23 -04:00
Thomas Harte
19eb975c73
Adds an intermediate step in CP/M directory parsing.
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To reduce amount of time spent allocating and reallocating buffers.
2017-09-29 21:38:16 -04:00
Thomas Harte
698ffca51b
Recasts the [M]FM parser in terms of the new factoring.
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Temporarily breaks SSD writing support.
2017-09-29 20:08:36 -04:00
Thomas Harte
fe3cc5c57c
Removes dead pragma.
2017-09-28 20:47:25 -04:00
Thomas Harte
f488854720
Switches Oric MFM DSK serialisation to feeding a track serialisation to a shifter.
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Thereby eliminates the parser's need to offer get_track.
2017-09-27 22:14:50 -04:00
Thomas Harte
51c0c45e04
Turns MFM bit length into a globally-available constant.
2017-09-27 21:30:09 -04:00
Thomas Harte
c3e1489a8e
Introduces Track::Address, a parallel to Sector::Address to enable more uniform storage.
2017-09-27 21:29:06 -04:00
Thomas Harte
e3420f62c6
Switches the Acorn ADF implementation to using the new track_serialisation/sectors_from_segment route for decomposition of a track into sectors.
2017-09-26 22:05:33 -04:00
Thomas Harte
970c80f2e3
Adds TrackSerialiser.cpp to the project and reorders section.
2017-09-26 22:03:42 -04:00
Thomas Harte
9f4a407f94
Switches the track serialiser to a more standard header + implementation separation.
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Also introduces a full priming of the PLL before deserialisation begins.
2017-09-26 22:01:32 -04:00
Thomas Harte
5dda897334
Changes function name to sector_size — into line with idioms.
2017-09-26 22:00:19 -04:00
Thomas Harte
3982e375e3
Introduces a route from a PCMSegment to a list of [M]FM sectors.
2017-09-25 19:57:11 -04:00
Thomas Harte
a8524daecb
Marks the move constructor as noexcept, to improve usage with vector.
2017-09-25 19:53:22 -04:00
Thomas Harte
d1ce764201
Provides SectorsFromSegment, a bitstream to sector converter.
2017-09-24 22:41:16 -04:00
Thomas Harte
8875982e1f
Ensures Sectors are move constructible (and still default constructible), and adds proper const qualifiers to Sector::Address.
2017-09-24 22:40:38 -04:00
Thomas Harte
3319a4f589
Isolates those Sector fields that describe its address and makes them usable as a set key.
2017-09-24 21:57:21 -04:00
Thomas Harte
c7f27b2db4
Renames MFM.[c/h]pp as per its new remit: encoding only.
2017-09-24 21:40:43 -04:00
Thomas Harte
631f630549
Severs the MFM parser from the overweight single MFM.hpp.
2017-09-24 20:31:19 -04:00
Thomas Harte
2a08bd9ecc
Factors shifting plus stateful [M]FM token recognition out of the MFMDiskController.
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Given the proliferation of MFM-related classes, establishes a subdirectory for them.
2017-09-24 20:07:56 -04:00
Thomas Harte
f789ee4ff0
Introduces a track to segment decoder.
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This will be needed to make formats like G64 and HFE writeable, but probably also will be usable to speed up static analysis.
2017-09-23 22:39:19 -04:00
Thomas Harte
a295b42497
Merge pull request #248 from TomHarte/BetterCPCShot
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Adds a better example of correct-aspect-ratio CPC output
2017-09-22 23:05:01 -04:00
Thomas Harte
d8337492cc
Bowdlerised images.
2017-09-22 23:02:17 -04:00
Thomas Harte
15c8debc16
Added larger CPC screenshots.
2017-09-22 22:58:18 -04:00
Thomas Harte
67af153c16
Merge pull request #247 from TomHarte/WriteableHFE
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Cleans up the `Disk` hierarchy
2017-09-22 22:55:22 -04:00
Thomas Harte
d72dad2d1a
Severs the DiskImage implementation from its public header file.
2017-09-22 22:46:31 -04:00
Thomas Harte
698e4fe550
Tidies the Disk file hierarchy.
2017-09-22 22:39:23 -04:00
Thomas Harte
b5406b90cd
Introduces a new class hierarchy for disk images.
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Increasing independence of format-specific stuff and generic caching without mangling them into a common namespace, and allowing in some cases for a decrease in read/write blocking.
2017-09-22 20:28:11 -04:00
Thomas Harte
05a93ba237
Merge pull request #246 from TomHarte/MainThreadBackingSize
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Ensures self.bounds and -convertSizeToBacking: are called only on the main queue.
2017-09-20 20:00:45 -04:00
Thomas Harte
77548d14db
Ensures self.bounds and -convertSizeToBacking: are called only on the main queue.
2017-09-20 19:59:34 -04:00
Thomas Harte
b85dd608e7
Merge pull request #245 from TomHarte/Xcode9
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Updates to Swift 4 and Xcode 9's recommended project settings.
2017-09-20 19:54:31 -04:00
Thomas Harte
231f13d810
Updates to Swift 4 and Xcode 9's recommended project settings.
2017-09-19 23:06:37 -04:00
Thomas Harte
704bfa114c
Merge pull request #244 from TomHarte/FasterStartup
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Improves CPC analysis times
2017-09-16 22:07:43 -04:00
Thomas Harte
44a56724cb
Speeds up byte decoding within sectors for the ahead-of-time MFM parser.
2017-09-16 20:28:24 -04:00
Thomas Harte
5fbea625ae
Switches the CPC static analyser to maintaining a vector of pointers rather than a complete copy of files.
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Hence saves a lot of copying and moving — around a second's worth when dealing with the selected test disk.
2017-09-16 20:15:06 -04:00
Thomas Harte
ac57b37e96
Eliminates repetition of the 'untypable character' test.
2017-09-16 19:46:41 -04:00
Thomas Harte
e3e9baeaa4
Merge pull request #243 from TomHarte/Detection
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Adds a test that file extension also be typeable.
2017-09-16 19:11:53 -04:00
Thomas Harte
e071123f90
Adds a test that file extension also be typeable.
2017-09-16 19:10:17 -04:00
Thomas Harte
98adb01721
Merge pull request #242 from TomHarte/8272ReadyInterruption
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Improves CPC disk emulation
2017-09-16 18:28:00 -04:00
Thomas Harte
d6a5f9a29e
Revokes unnecessary change.
2017-09-16 18:24:13 -04:00
Thomas Harte
0d84b4b9dd
Removes some redundant end_writing calls.
2017-09-16 17:09:17 -04:00
Thomas Harte
a85909198f
Adds defences against double calls to end writing.
2017-09-16 17:07:36 -04:00
Thomas Harte
98751e6ac8
Ensures that all result phases are exactly the intended length by replacing accumulation with assignment.
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Also attempts a different version of control mark behaviour. Experiments.
2017-09-15 22:59:26 -04:00
Thomas Harte
da082673d7
Drives now have a finite number of heads.
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The Amstrad volunteers itself to be single sided. Everything else stays as it was.
2017-09-15 21:18:36 -04:00
Thomas Harte
35fe4d50d4
Adds command termination upon drive becoming unready, and copies head and drive selection into ST0.
2017-09-15 20:26:41 -04:00
Thomas Harte
b835cb73e2
Merge pull request #241 from TomHarte/DriveEvents
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Devolves `TimedEventLoop` ownership from disk controllers to drives
2017-09-15 19:15:44 -04:00
Thomas Harte
662d031e3c
Adds exposition on the meaning of a disk controller being in write mode.
2017-09-15 19:14:36 -04:00
Thomas Harte
bf20c717fb
The Drive now no longer produces input when in writing mode — other than announcing the index hole.
2017-09-14 22:32:13 -04:00
Thomas Harte
4d4a0cf1d2
Puts the disk controller back into the loop with knowledge about reading mode, and uses that knowledge to cut off the PLL.
2017-09-14 22:30:40 -04:00
Thomas Harte
b62f3e726a
Adds a start-of-execution-phase get-out for drives that aren't ready.
2017-09-12 20:43:53 -04:00
Thomas Harte
82b13e98f2
Implements the real hardware ready test for Drives — motor on plus two index holes.
2017-09-11 22:27:50 -04:00
Thomas Harte
9ac831b09c
Added an additional protection against overflow.
2017-09-11 22:24:24 -04:00
Thomas Harte
42616da7ff
Adjusts the Oric Microdisc to propagate motor control more widely.
2017-09-11 22:15:54 -04:00
Thomas Harte
2f13517f38
Adjusts the 1770 not to talk directly to the drive about motor status.
2017-09-11 22:10:56 -04:00
Thomas Harte
fb9fd26af7
Updates the 1540 for the slightly-more modern world of decoupled drives and disks (!).
2017-09-11 22:08:10 -04:00
Thomas Harte
d3c385b471
Separates the 8272's drive selection signalling from actual drive ownership.
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Thereby returns working motor control to the CPC.
2017-09-11 21:25:26 -04:00
Thomas Harte
96bf133924
Withdraws requirement for DiskController users to specify a PLL multiplier or to provide rotation speed.
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In the latter case because it's no longer of any interest to the controller, and in the former because I'd rather it be picked automatically.
2017-09-10 22:56:05 -04:00
Thomas Harte
6d6cac429d
Fixes extra time accumulation during track running.
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Introduces a bunch of further asserts, which aided me in determining the fix, i.e. that Drives being responsible for their own setup_track could double-pump the event loop.
2017-09-10 22:44:14 -04:00
Thomas Harte
dc0b65f9c9
Corrects initial event loop timing state.
2017-09-10 20:51:21 -04:00
Thomas Harte
8882aa496f
Corrected wiring to get advance signals through to Drive event delegates.
2017-09-10 20:51:05 -04:00
Thomas Harte
0622187ddf
Strips Controller of all capabilities now housed on the Drive.
2017-09-10 19:23:23 -04:00
Thomas Harte
523e1288fa
Updates the MFM parser to use SingleTrackDisk rather than the equivalent withdrawn Drive functionality.
2017-09-10 17:34:52 -04:00
Thomas Harte
1a96cce26f
Implements SingleTrackDisk, a Disk that contains only a single, specified, track.
2017-09-10 17:34:14 -04:00
Thomas Harte
a4e275e1fc
Provides an implementation of Drive's new interface.
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Mostly lifted from DiskController. `set_disk_with_track` has been withdrawn in favour of providing a suitable wrapper `Disk` subclass, as being an unnecessary complexity and intermingling of concerns.
2017-09-10 17:33:01 -04:00
Thomas Harte
6075064400
Adds the ability to query a TimedEventLoop for its input clock rate.
2017-09-10 17:31:43 -04:00
Thomas Harte
ff6e65cca9
Introduces necessary storage and interface for writing.
2017-09-10 16:23:31 -04:00
Thomas Harte
90d2347c90
Extended to permit subclasses that are interested to get sub-run_for information about event times.
2017-09-10 14:44:38 -04:00
Thomas Harte
90c7056d12
Started devolving timed event loop logic down to the drives, moving them closer to modelling real life.
2017-09-10 14:43:20 -04:00
Thomas Harte
fed2bc9fc9
Merge pull request #240 from TomHarte/C1540
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Simplifies the published C1540 interface and corrects a transcription bug.
2017-09-05 21:22:25 -04:00
Thomas Harte
ff510f3b84
Explicitly disallows copying of VIAs, and marks the constructor as noexcept.
2017-09-05 21:21:23 -04:00
Thomas Harte
3b12fca417
Corrects non-recurring-pattern adaptation bug: the 'SerialPortVIA' should keep a reference to its VIA, not a copy of it.
2017-09-05 21:19:56 -04:00
Thomas Harte
8eeb7e73cd
Adds a commented-out printf that I might like to use again later.
2017-09-05 21:15:56 -04:00
Thomas Harte
7fd6699e0b
Corrects comment indentation.
2017-09-05 21:15:15 -04:00
Thomas Harte
ed70b15fc9
Merge pull request #239 from TomHarte/6522Tests
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Corrects 6522 bridge per has-a-not-is-a template switch.
2017-09-04 21:58:07 -04:00
Thomas Harte
ff24e1de31
Corrects 6522 bridge per has-a-not-is-a template switch.
2017-09-04 21:56:21 -04:00
Thomas Harte
6547102511
Attempts better to hide C1540 implementation details from the reader.
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In this case not from the compiler, as it's desireable to keep `run_for` as a non-virtual call, and therefore everything else comes alone for the ride.
2017-09-04 20:58:00 -04:00
Thomas Harte
d538ff5039
Merge pull request #238 from TomHarte/C1540
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Minor tweaks to re-enable proper file selection in the Vic-20.
2017-09-04 20:56:54 -04:00
Thomas Harte
a49594c6a3
Tweaks Vic20 Machine parent class order so that when turned into a CRTMachine, still successfully dynamically casts as a ConfigurationTarget.
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More thorough thought is required.
2017-09-04 20:56:00 -04:00
Thomas Harte
3544c0f014
Switches from testing size() != 0 to empty() != true.
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Partly as size() is O(n) but empty is O(1), but primarily for style.
2017-09-04 20:54:38 -04:00
Thomas Harte
f26fe3756c
Merge pull request #237 from TomHarte/6522CleanUp
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Significantly cleans up the 6522.
2017-09-04 18:23:33 -04:00
Thomas Harte
a42ca290cb
Reformulates the Oric more cleanly into the modern world.
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Specifically: now that the implementation is contained within the CPP file, there's no need to embed the keyboard, tape player and VIA port handler as private classes. Also the pain of additional syntax is reduced, so the keyboard has been bumped up to a fully data-hiding class. I've also transferred overall ownership of the tape player, AY and keyboard up to the Oric itself, with the VIA merely being wired to them, and added a whole bunch of extra documentation.
2017-09-04 18:22:14 -04:00
Thomas Harte
da09098e49
Updates clipped area per latest CRT response to vertical sync.
2017-09-04 17:51:02 -04:00
Thomas Harte
450712f39c
Improves and corrects 6522 header documentation.
2017-09-04 14:32:34 -04:00
Thomas Harte
24b3faa427
Deconstitutes the 6522 into component parts, templated and non-templated.
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Adjusts the Oric, Vic-20 and C-1540 accordingly, albeit with the quickest possible solutions.
2017-09-04 14:26:04 -04:00
Thomas Harte
40d11ea0e3
Merge pull request #236 from TomHarte/CPUSeparation
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Further cements CPU file separation.
2017-09-04 11:20:00 -04:00
Thomas Harte
ab2bcb939f
Separates 6502Base into its constituent parts.
2017-09-04 11:08:33 -04:00
Thomas Harte
45499050b6
Separates Z80Base.cpp into its component classes.
2017-09-04 11:04:01 -04:00
Thomas Harte
0c9197df30
Merge pull request #235 from TomHarte/Reencapsulation
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Further strips back the amount exposed in Z80-related headers.
2017-09-01 22:38:33 -04:00
Thomas Harte
a1e200cc65
Further strips back the amount exposed in Z80-related headers.
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Almost all opcode table generation macros and code now resides neatly in the world of .CPP.
2017-09-01 22:19:16 -04:00
Thomas Harte
8a612bb6ab
Merge pull request #234 from TomHarte/TidyZ80
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Separates interface and implementation of the Z80
2017-09-01 20:54:01 -04:00
Thomas Harte
e6ac939ae0
Reintroduces missing noexcept specifier.
2017-09-01 20:51:31 -04:00
Thomas Harte
b034d4e6f8
Refactors the Z80 to separate out interface and implementation.
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Following the pattern just established by the 6502, puts all implementation specifics beyond the visibility of a human reading Z80.hpp and in subfolders so as to promote the idea that they shouldn't go out of their way.
2017-09-01 20:50:24 -04:00
Thomas Harte
de218611e4
Corrects possible confusion as documentation recommends Cycles(0) as default, but then gives Cycles(1).
2017-09-01 20:49:24 -04:00
Thomas Harte
615f7ce176
Merge pull request #233 from TomHarte/BetterYet6502
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Removes from 6502.hpp all remaining implementation details.
2017-09-01 19:47:49 -04:00
Thomas Harte
b306776ba9
Removes from 6502.hpp all remaining implementation details, making it purely an interface document.
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Though those details remain visible to files including 6502.hpp through necessity.
2017-09-01 19:46:29 -04:00
Thomas Harte
0f85cffc78
Merge pull request #232 from TomHarte/ElectronShift
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Ensures all parts of the Electron have a fully-defined initial state.
2017-08-31 22:29:50 -04:00
Thomas Harte
96648df5fe
Ensures all parts of the Electron have a fully-defined initial state.
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Specifically to resolve an error with shift being pressed at startup due to a failure to establish a default value for that flag, but applying the same principle across the board.
2017-08-31 22:29:24 -04:00
Thomas Harte
2c99a2d6ec
Merge pull request #231 from TomHarte/NeaterTemplates
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Tidies the 6502 template and folder hierarchy.
2017-08-31 22:17:08 -04:00
Thomas Harte
4af333d5ec
Tidies the 6502 template and folder hierarchy.
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Specifically: there's now just the one .h file at the top level, giving a clear indication of what a user should read. That separates implementation from interface. It also devolves a lot more to the base class because doing so makes debug builds less of a hassle. The all-RAM 6502 has been shuffled off into a subfolder, to indicate that it's not something you necessarily need know about. Also general documentation improvements have been applied: incorrect citing of the recurring-template pattern has been removed and the meaning of the two BusHandler methods has now accrued at the bus handler.
2017-08-31 22:10:27 -04:00
Thomas Harte
a5f9869769
Merge pull request #230 from TomHarte/CyclicShutdown
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Eliminates potential cyclic entry into CSMachine during its `-dealloc`.
2017-08-31 21:23:15 -04:00
Thomas Harte
f10be2a18a
Eliminates potential cyclic entry into CSMachine during its -dealloc.
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Explicit cause: dealloc calls close_output(). That may decide to flush work, indiscriminately. Some of the flushed work might be audio generation. Audio generation might cause the audio queue to react with an out-of-data announcement. Which would cause a fresh attempt to update the CSMachine.
2017-08-31 21:22:23 -04:00
Thomas Harte
c88d627b4e
Merge pull request #229 from TomHarte/Skew
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Adds an initial implementation of display skew to the 6845
2017-08-29 22:32:26 -04:00
Thomas Harte
b30bb2a234
Adds an initial implementation of display skew, as a completely live property.
2017-08-29 22:16:40 -04:00
Thomas Harte
d498080eb4
Merge pull request #228 from TomHarte/CRTCStatus
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Takes initial steps towards supporting CRTC manufacturer diversity.
2017-08-27 22:26:40 -04:00
Thomas Harte
334afbc710
Removes const from get_status and get_register, as both may now logically mutate the object.
2017-08-27 18:13:55 -04:00
Thomas Harte
17c13624e5
Improved comments.
2017-08-27 18:11:40 -04:00
Thomas Harte
113349d272
Started making some formal admissions that different CRTC models exist. Plenty yet to do.
2017-08-27 18:10:07 -04:00
Thomas Harte
0ced7866fc
Merge pull request #227 from TomHarte/NoCPCOptions
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Removes the CPC options panel.
2017-08-27 17:12:24 -04:00
Thomas Harte
d06031dfcb
Removes the options panel for CPC display.
2017-08-27 17:11:35 -04:00
Thomas Harte
3f22a71276
Merge pull request #226 from TomHarte/TargetAwareness
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Substantially rewires Mac-side target selection and as proof-of-concept adapts the generic-side ZX80 to instantiate without wait line support
2017-08-27 16:55:01 -04:00
Thomas Harte
53a88a7e12
Causes the ZX80/81 to omit support for the wait line if being configured as a ZX80.
2017-08-27 16:45:36 -04:00
Thomas Harte
4a66dd9e82
Arranges for the ZX80/81 to get a peek at target configuration prior to construction. I'm as yet undecided on whether to make this the norm.
2017-08-27 16:42:16 -04:00
Thomas Harte
522839143f
Revokes -[CSMachine init] and the slightly troubling create-on-demand semantics it places upon subclasses via .machine. Therefore each machine must announce its own implementation of -init.
2017-08-27 16:36:21 -04:00
Thomas Harte
b4c532c0d5
Merge pull request #225 from TomHarte/TargetHints
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Factors the concept of a target platform out from the static analyser, allowing file formats to opine
2017-08-27 15:46:55 -04:00
Thomas Harte
a3e2d142e3
Extends UEF support to include chunk 0005, the target platform description, which is exposed via TargetPlatform::TypeDistinguisher.
2017-08-27 15:43:09 -04:00
Thomas Harte
63ee8c9d58
Uses file containers' type distinguishers where available, and supplies potential insight to the ZX80/81 analyser as now required.
2017-08-27 15:20:58 -04:00
Thomas Harte
437023bff6
Expands to take an already-accrued list of potential platforms, as that may indicate that one or the other of the ZX80 and ZX81 is already out of contention and therefore save the need to attempt analysis.
2017-08-27 15:20:22 -04:00
Thomas Harte
4465098157
Since it has descendants, gives Storage::Cartridge a virtual destructor.
2017-08-27 15:19:30 -04:00
Thomas Harte
56dd677e9c
Creates a virtual interface that can be adopted by classes that are able to provide some insight as to target machine.
2017-08-27 15:19:03 -04:00
Thomas Harte
9aa150c338
Abstracts the target platform type out from the static analyser's ownership.
2017-08-27 15:02:13 -04:00
Thomas Harte
fab6908129
Corrects the all-RAM Z80 to declare that it needs the wait line to be implemented.
2017-08-26 23:18:11 -04:00
Thomas Harte
e34d4ce903
Merge pull request #224 from TomHarte/OptionalWait
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Makes the Z80's support for WAIT input optional
2017-08-26 23:16:22 -04:00
Thomas Harte
d411827733
Merge branch 'master' into OptionalWait
2017-08-26 23:11:23 -04:00
Thomas Harte
f1ba7755dd
Merge pull request #223 from TomHarte/cpctest
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Moves test for 6845 horizontal sync timing into the time after phase 1 and before phase 2
2017-08-26 23:11:03 -04:00
Thomas Harte
57bfec285f
Makes it optional whether the Z80 supports the wait line. If the wait line isn't in use, runtime costs are decreased because the optional wait cycles need not be iterated over.
2017-08-26 23:08:57 -04:00
Thomas Harte
bdda701207
Reverts previous unevidenced change.
2017-08-26 22:58:16 -04:00
Thomas Harte
487fe83dca
Ensures that vertical sync and end-of-visible-lines conditions potentially trigger whenever line_counter_ changes, not only when it increments.
2017-08-26 17:54:54 -04:00
Thomas Harte
6c5a03187b
Relocates the HSYNC start test, in order to pass Arnold's cpctest HSYNC start position conformance test.
2017-08-26 17:22:48 -04:00
Thomas Harte
97f57a3948
Merge pull request #222 from TomHarte/6845GetState
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Refines observable 6845 behaviour
2017-08-26 14:46:29 -04:00
Thomas Harte
7d7aa2f5d5
Eliminates repetition of the unpacking of register 3 into a horizontal sync count.
2017-08-26 14:37:03 -04:00
Thomas Harte
e7ad79c79a
Breaks apart the CPC's 6845 bus handler to obey phase 1 and phase 2, and now back-dates interrupts when appropriate.
2017-08-26 14:07:51 -04:00
Thomas Harte
28550c0227
Breaks the 6845 bus cycle into a phase 1 and a phase 2 per the belief that sync line changes, which are observable, happen at the end of the first phase rather than at the beginning of the next. This may have interrupt timing effects, as machines often derive an interrupt from sync.
2017-08-26 13:56:23 -04:00
Thomas Harte
6e99169348
Permits the 6845's bus state to be examined by an owner, eliminating the need to buffer it in the bus handler. But more than that it allows the CRTC to decide when it adjusts the various outputs respective to the main phase. So a net effect of the change is that the CPC now sees vsync a cycle earlier, because my current reading of the 6845 datasheet is that it is set at the end of phase 1, not the beginning of the next phase 1.
2017-08-26 12:59:59 -04:00
Thomas Harte
1017bb9f6b
Merge pull request #221 from TomHarte/6845UpCount
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Regularises the 6845 sync counters
2017-08-26 12:51:39 -04:00
Thomas Harte
3caa4705ca
Limits sync counter size.
2017-08-26 12:31:19 -04:00
Thomas Harte
039aed1bd1
Switches the two sync counters to upward-going rather than downward, as a more likely match to the way the rest of the 6845 implementation.
2017-08-25 21:26:01 -04:00
Thomas Harte
d77d7fdd78
Merge pull request #220 from TomHarte/Analysis
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Resolves all current analyser warnings.
2017-08-24 22:19:51 -04:00
Thomas Harte
c6e6c3fcfb
Resolves all current analyser warnings.
2017-08-24 22:18:44 -04:00
Thomas Harte
ecd3350a6f
Merge pull request #219 from TomHarte/ConstSafety
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Makes all of PartialMachineCycle const
2017-08-24 22:04:06 -04:00
Thomas Harte
fa19e2d9c2
Removes some detritus.
2017-08-24 22:00:21 -04:00
Thomas Harte
95d360251d
Makes all of PartialMachineCycle const, with the exception of the target of *value, since that's intended to be writeable by recipients.
2017-08-24 21:32:33 -04:00
Thomas Harte
7af3de010e
Suspected my mode 1 interrupt timing might be off. Reminded myself of the sources. Persuaded myself that it wasn't. Added appropriate comments.
2017-08-23 22:25:31 -04:00
Thomas Harte
cefd421992
Merge pull request #218 from TomHarte/6845Factored
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Refactors the 6845 to make end-of-line and end-of-frame conditions more explicit and to reduce repetition
2017-08-22 22:21:17 -04:00
Thomas Harte
a914eadc85
Ensured that register 6 is checked on every loop.
2017-08-22 22:17:45 -04:00
Thomas Harte
131b340d75
Dodges a lambda copy.
2017-08-22 21:55:10 -04:00
Thomas Harte
e956740c56
Refactors the 6845 more clearly to break out the acts of ending a line and ending a frame, changing the way the memory address is altered — the end-of-line value is provisionally stored and then used if necessary — in order to do so.
2017-08-22 21:54:48 -04:00
Thomas Harte
8afd83b91f
Merge pull request #217 from TomHarte/CompiletimeOptions
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Introduces compile-time selection of minor CPU core features and applies forceinline when appropriate
2017-08-21 22:29:24 -04:00
Thomas Harte
40d7a603db
Ensured that forceinline does nothing in debug builds.
2017-08-21 22:04:15 -04:00
Thomas Harte
ee71be0e7e
Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.
2017-08-21 21:56:42 -04:00
Thomas Harte
cde29c4bf4
Added forceinlines and properly declared finals and overrides.
2017-08-21 21:07:10 -04:00
Thomas Harte
e1aded0d95
Allows Z80 users to opt out of support for the bus request line. Which both now do.
2017-08-21 20:43:12 -04:00
Thomas Harte
1237f174fe
Merge pull request #216 from TomHarte/NoiseReduciton
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Cleans up issues affecting the sleeper mechanism and the CPC
2017-08-20 13:26:56 -04:00
Thomas Harte
0cbc1753b9
Quick fixes: the binary tape player now considers talk to the sleep observer only if motor control changes. The Amstrad CPC no longer attempts to use the component argument to identify the caller, since this will often be that of the superclass and not that of the derived class known to the CPC.
2017-08-20 13:18:46 -04:00
Thomas Harte
5cf0395936
Merge pull request #215 from TomHarte/Z80BusReq
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Removes repeated checking of bus_request_line_ by the Z80.
2017-08-20 12:40:37 -04:00
Thomas Harte
6315c22b80
Removed repeated checking of bus_request_line_. It's now checked only after each outward perform_machine_cycle.
2017-08-20 12:39:45 -04:00
Thomas Harte
4614a56843
Merge pull request #214 from TomHarte/Sleeper
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Experimentally introduces the concept of a 'sleeper' — a component that will volunteer to be unclocked for a period
2017-08-20 12:29:32 -04:00
Thomas Harte
8f5ae4a326
The CPC now responds to tape-originating sleeper observations.
2017-08-20 12:21:02 -04:00
Thomas Harte
8fdc5012e4
Updated TapePlayer and BinaryTapePlayer to be sleepers.
2017-08-20 12:18:36 -04:00
Thomas Harte
e88a51e75e
Worked logic all the way down to the CPC. If the 8272 announces that it is asleep, it is now no longer clocked. Also very slightly cut down on IRQ line chatter to the Z80.
2017-08-20 12:05:00 -04:00
Thomas Harte
49285e9caa
Attempted to implement Sleeper in Drive and therefore in DiskController. Also corrected a couple of nonconformant file names.
2017-08-20 11:54:54 -04:00
Thomas Harte
e3f2118757
Merge branch 'master' into Sleeper
2017-08-20 10:58:03 -04:00
Thomas Harte
daeaa4752f
Merge pull request #213 from TomHarte/MinorPalette
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Makes a variety of minor performance improvements to the CPC
2017-08-20 10:57:41 -04:00
Thomas Harte
5344e3098b
Minor: made has_disk something that is decided on insertion/deletion.
2017-08-20 10:55:08 -04:00
Thomas Harte
cedb809c21
Sketched out a protocol designed to save processing time on anything that may sleep — probably just disk controllers for now but one can easily imagine it being applicable to printers, and possibly sound chips with suitable changes in guarantee for sound packet receivers.
2017-08-20 10:53:25 -04:00
Thomas Harte
2d9efccc98
Introduced a master 'is sleeping' flag. I'm starting to think there's a pattern forming here.
2017-08-20 10:43:53 -04:00
Thomas Harte
8ce46b6e49
Having spotted that I was using my single-character loop counter names incorrectly (quelle surprise!), got a bit more explicit. Also flattened into a single loop so that I can break rather than returning.
2017-08-20 10:32:09 -04:00
Thomas Harte
f2699a3f2b
Okay, even if releasing it is unsafe, I can at least move the typer so that it is no longer called.
2017-08-20 10:24:01 -04:00
Thomas Harte
85253a5876
Sought further to reduce the processing footprint of palette changes by updating only those table entries that are affected by a change.
2017-08-20 10:13:23 -04:00
Thomas Harte
911ee5a0d3
At least added a fast return.
2017-08-19 22:22:51 -04:00
Thomas Harte
57c5b38a6d
Step one towards cutting much of this cost: build only the table that's appropriate for the current mode, and at least declare when a more minimal change would be sufficient.
2017-08-19 22:19:46 -04:00
Thomas Harte
669e0caff5
Ensured the head_unload_delay values are properly seeded, and generalised the quick escape.
2017-08-19 22:06:56 -04:00
Thomas Harte
b24d04fc09
Merge pull request #212 from TomHarte/MFMParserDensity
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Improves the variability of the MFM parser used for static analysis
2017-08-18 15:57:37 -04:00
Thomas Harte
ef07c33741
Merge branch 'Plus10' into MFMParserDensity
2017-08-18 15:48:20 -04:00
Thomas Harte
e559a65ede
Ideally I would be able to kill this multiplier, as it could easily be derived at runtime. But, for now, just turned it up so that the analysis-oriented parser is better at parsing different bit rates.
2017-08-18 15:47:46 -04:00
Thomas Harte
5bdd24d93f
Merge pull request #211 from TomHarte/HFE
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Introduces support for the HFE file format.
2017-08-17 22:43:23 -04:00
Thomas Harte
af61a7fa28
Two quick fixes: correctly set segment size, and flip bytes to match HFE's bit ordering to PCMTrack's.
2017-08-17 22:28:00 -04:00
Thomas Harte
c8c1792c3f
Made a first attempt at HFE support.
2017-08-17 22:20:02 -04:00
Thomas Harte
e6683e7f2d
Added the base skeletal stuff of HFE support.
2017-08-17 21:48:48 -04:00
Thomas Harte
0c1714b695
Relaxed a little to allow +10% in track length.
2017-08-17 21:36:14 -04:00
Thomas Harte
dc0ca83003
Merge pull request #210 from TomHarte/TrackSize
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Various MFM and DSK fixes
2017-08-17 15:50:27 -04:00
Thomas Harte
2c2dd8073c
Modified to return nullptr if asked for an extended disk image track that doesn't exist.
2017-08-17 15:32:24 -04:00
Thomas Harte
4f8b89772e
Improved logic for detecting when all sense has been derived from a track to spot any repeated track, not necessarily the first one. That avoids sectors that run over the index hold and obscure the first throwing things.
2017-08-17 15:31:53 -04:00
Thomas Harte
733ee5a5c3
Ensured no attempt to put a null track into the cache
2017-08-17 15:30:02 -04:00
Thomas Harte
fedf5a44a6
Imposes a maximum track length.
2017-08-17 15:20:49 -04:00
Thomas Harte
6a09022896
Merge pull request #209 from TomHarte/BootOnly
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Generalises: an acceptable boot sector is always acceptable
2017-08-17 14:29:37 -04:00
Thomas Harte
5b3c707959
Generalised: an acceptable boot sector is acceptable even if no valid CP/M catalogue is found anywhere.
2017-08-17 14:28:16 -04:00
Thomas Harte
9b21ef1507
Merge pull request #208 from TomHarte/SpecialCharacters
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Improves the CPC static analyser's correct file name predictions
2017-08-17 13:25:30 -04:00
Thomas Harte
da3e8655e9
Withdrew some caveman debugging nonsense.
2017-08-17 13:25:19 -04:00
Thomas Harte
41e4386164
Added another "one thing is different" test: one thing has a different file name. Also decided to right-time the type (/extension) as well as the file name.
2017-08-17 13:21:48 -04:00
Thomas Harte
b0a98bd239
Added nuance: file names with unprintables are filtered, and then system files are considered if there are no remaining non-system files.
2017-08-17 12:48:15 -04:00
Thomas Harte
42ad670ec8
Fixed: catalogue bitmap is in blocks, not sectors.
2017-08-17 12:47:47 -04:00
Thomas Harte
58063b69a6
Merge pull request #207 from TomHarte/DragAndDrop
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Establishes drag and drop as a mechanism to change the media inserted into a machine while it is running
2017-08-17 11:19:56 -04:00
Thomas Harte
378f231499
Fully wired in drag-and-drop for media insertion.
2017-08-17 11:00:08 -04:00
Thomas Harte
f68565a33f
Split the static analyser functionality so that it's possible just to ask for the set of media implied by a particular file. Extended ConfigurationTarget so that media alone can be pushed to a machine.
2017-08-17 10:48:29 -04:00
Thomas Harte
175faebdc9
Merge pull request #206 from TomHarte/AnalysisFailure
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Corrects a couple of cases in which the CPC analyser could pick an incorrect loading command
2017-08-16 22:26:26 -04:00
Thomas Harte
76c6b715a2
Adjusted rules so as not to type unnecessary spaces in the name, and to include the extension if AMSDOS won't imply it.
2017-08-16 22:24:37 -04:00
Thomas Harte
b476f06524
Slowed the typer, having discovered that otherwise it has problems transitioning from a shifted to an unshifted character.
2017-08-16 22:12:16 -04:00
Thomas Harte
48290a8bbe
Added a prefilter to catalogues to remove system files. They're not listed when you CAT, so almost certainly aren't what a user would be expected to load.
2017-08-16 22:11:49 -04:00
Thomas Harte
9d9a1c341d
Added an extra test to try to avoid spurious |cpm launches.
2017-08-16 21:55:31 -04:00
Thomas Harte
952da1e581
Merge pull request #205 from TomHarte/CPCShots
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Adds a CPC screenshot, to show that this isn't just about composite video
2017-08-16 21:05:55 -04:00
Thomas Harte
a988255558
Adjusted brightness better to match its comparison. And to try partly to obscure its source. This isn't meant to be about software X versus software Y.
2017-08-16 21:04:09 -04:00
Thomas Harte
cca66ab450
Added a CPC grab, to show that it's not all about being composite.
2017-08-16 21:01:22 -04:00
Thomas Harte
bcd7a312a4
Merge pull request #204 from TomHarte/VicInline
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Brings the Vic-20 into line with the new idiom on machine declaration
2017-08-16 16:24:38 -04:00
Thomas Harte
925e774015
Added a decent portion of documentation. But started feeling like I should address my various ownership decisions. Which would justify a separate pull request.
2017-08-16 16:23:33 -04:00
Thomas Harte
4c15e46fd1
Performed the normative removal from public view of Vic-20 implementation details. Which were hefty.
2017-08-16 16:05:30 -04:00
Thomas Harte
3c50903a2b
Merge pull request #203 from TomHarte/ElectronInline
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Adds the Electron to the pantheon of machines that reveal very little in their public interface
2017-08-16 15:35:11 -04:00
Thomas Harte
75208b0762
Moves the Electron implementation behind a more opaque interface, in line with changes elsewhere.
2017-08-16 15:33:40 -04:00
Thomas Harte
f1e64169cd
Merge pull request #202 from TomHarte/AtariInline
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Catches the Atari 2600 up with the no-internals-published trend.
2017-08-16 14:54:33 -04:00
Thomas Harte
903a17ae11
Corrected typo and removed replication of what's already declared formally.
2017-08-16 14:53:03 -04:00
Thomas Harte
de1c526789
Cut the amount disclosed by the Atari 2600 for public inspection down to the minimum, relocating implementation into the .cpp.
2017-08-16 14:52:40 -04:00
Thomas Harte
b7e0f64892
Merge pull request #201 from TomHarte/OricInline
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Hides the Oric implementation innards
2017-08-16 14:37:42 -04:00
Thomas Harte
148591b7f2
Hid most of the Oric innards, and corrected a potential multi-thread access error emanating from the Mac side of the world.
2017-08-16 14:35:53 -04:00
Thomas Harte
2105597910
Merge pull request #200 from TomHarte/6502BusHandler
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Converts the 6502 into a bus-handler-type template, and makes appropriate adjustments to all 6502 machines
2017-08-16 14:10:08 -04:00
Thomas Harte
3c148f5721
Fixed clanger of an error.
2017-08-16 14:02:46 -04:00
Thomas Harte
360c8a99a3
Adjusted Atari2600 actually to use the nominated type of bus extender.
2017-08-16 12:57:32 -04:00
Thomas Harte
06e31f5102
Consequential to the 6502 change, severs the Atari 2600's cartridge container from its former attempt at runtime polymorphism, in favour of each cartridge's specific hardware being defined as a 'bus extender'.
2017-08-16 12:39:15 -04:00
Thomas Harte
42b5b66305
Remove the 6502's use of runtime polymorphism in favour of ordinary templating.
2017-08-16 11:56:52 -04:00
Thomas Harte
27018ba64e
Merge pull request #199 from TomHarte/VicColoursUSA
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Corrects Vic-I NTSC colour output
2017-08-16 10:00:40 -04:00
Thomas Harte
e208f03636
Corrects the US colour palette, effectively undoing what was a mistaken adjustment for the time when Oric-centric phase alignment was built into the CRT based on a false calculation that it wouldn't affect the machines that generate chrominance functionally.
2017-08-16 09:58:34 -04:00
Thomas Harte
cc9d23f23b
Inverted meaning of register_masks, as it's a bit weird that the mask is inverted immediately upon usage. It's a left-over from thinking the unused bits should be 1s; unit tests reveal they should be 0s. Comment updated appropriately.
2017-08-16 09:29:48 -04:00
Thomas Harte
1a831bcf9b
Quick fix: supply the port being written to correctly.
2017-08-16 09:15:57 -04:00
Thomas Harte
82367a2246
Added documentation.
2017-08-16 09:14:56 -04:00
Thomas Harte
f18206767f
Merge pull request #198 from TomHarte/LiveKeyboard
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Introduces active input handling for the AY and uses it for CPC keyboard input
2017-08-15 22:48:09 -04:00
Thomas Harte
3947347d88
Introduces active input handling for the AY and uses it in the CPC to give proper, active keyboard input, rather than push-on-select, which was only ever a temporary hack. Also maps a few more keys for the Amstrad.
2017-08-15 22:47:17 -04:00
Thomas Harte
8a37a0ff2e
Merge pull request #197 from TomHarte/MoreFDC
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Improves the 8272 and the whole disk infrastructure behind it
2017-08-15 22:09:32 -04:00
Thomas Harte
468770b382
Removed debugging nonsense.
2017-08-15 22:06:58 -04:00
Thomas Harte
6cfc3daacb
Introduced a test within the disk controller so as not to request illegal tracks from disks, instead automatically substituting an 'unformatted' track. Which is just empty.
2017-08-15 21:52:12 -04:00
Thomas Harte
aefbafa18d
Centralised the 8272's actions of setting the non-DMA execution flag, picking the drive and head and loading the head for accessing commands, and switched error flag if read ID doesn't find anything.
2017-08-15 21:49:10 -04:00
Thomas Harte
d12c834f9c
Increased amount reported.
2017-08-15 20:35:33 -04:00
Thomas Harte
56de5cb2b3
Removed one further logging event.
2017-08-15 20:18:32 -04:00
Thomas Harte
709257a0c5
Quick fix: also treat reception of sync as a reason not to stop looking for a data address mark.
2017-08-15 20:16:56 -04:00
Thomas Harte
75a9d2bb33
Started withdrawing logging, reduced index hole count back to the correct number and tried to increase read_data rigour.
2017-08-15 20:12:01 -04:00
Thomas Harte
7b92b235e1
Further upped asserts, thereby discovering the mistake I'd recently introduced: seeking properly within the event source as per its potential left-clipping, but then not allowing for that in the calculated current time.
2017-08-15 16:25:46 -04:00
Thomas Harte
c196f0018f
Upped the assert quotient.
2017-08-15 16:15:09 -04:00
Thomas Harte
73080d6c36
Added an easy way for disk controllers to clamp termination of written data exactly to the index hole.
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This commit also temporarily provides a whole load of extra logging and minor logic improvements from the 8272. I'm mid-flow on finding a particularly vicious error in its handling of writing; wait for the pull request. But, at least: now waits for the first part of a post-ID gap before writing data, and attempts partially to handle appearance of the index hole during writing a track. More work to do on that though.
2017-08-15 16:05:10 -04:00
Thomas Harte
9541a2a5f0
Corrections: seek_to now takes the segment_start_time into account, correcting a windowing error where segments overlay other segments. Also added some asserts while bug hunting, and corrected the steps taken when inserting a longer-than-a-track segment so that each is correctly windowed.
2017-08-15 15:54:09 -04:00
Thomas Harte
944222eba4
Added: write_id_data_joiner can now be instructed not to write the first portion of gap. Which makes more sense as an option, to avoiding splicing errors.
2017-08-15 15:29:23 -04:00
Thomas Harte
9d77f33611
Dealt with another source of repeating magic constants: the command numbers.
2017-08-15 11:06:10 -04:00
Thomas Harte
7d132f81f7
Increased logging by quite a distance and made an attempt once again to allow the processor some time to supply the first byte when writing before declaring overrun.
2017-08-15 10:50:28 -04:00
Thomas Harte
0972f19fc5
Merge pull request #196 from TomHarte/Minor6845
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Corrects 8272 multi-sector reads and deleted data reads, and ensures that a zero-height 6845 display shows nothing
2017-08-14 22:31:24 -04:00
Thomas Harte
6553bf05b4
Corrected multi-sector reads: ensured the incremented sector number isn't replaced by the original, and that the controller returns to scanning mode.
2017-08-14 22:27:31 -04:00
Thomas Harte
0816d3f5a9
Corrected 'read deleted data' command. It's 0xc, not 0xb.
2017-08-14 21:41:20 -04:00
Thomas Harte
55055c7847
Minor: ensured immediate line comparison works. But I think my problem might be trying to do this as straight line logic?
2017-08-14 19:08:20 -04:00
Thomas Harte
113da93796
Merge pull request #195 from TomHarte/8272Tidying
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Brings the 1770 into usage of those parts factored out of it for the 8272
2017-08-14 16:34:15 -04:00
Thomas Harte
cddcd0fb79
Put my money where my mouth is and switched the superclass of WD1770 to MFMController, eliminating duplicated (/factored out) code.
2017-08-14 16:32:53 -04:00
Thomas Harte
a366298022
Factored out the standard [M]FM gap and mark groups, to increase 8272 readability and because it's pretty-much certain I'll need them again if ever I try to tackle e.g. the 8271.
2017-08-14 16:03:35 -04:00
Thomas Harte
4df9307d25
Factored out the dull and repetitious stuff of writing n bytes of the same value.
2017-08-14 15:50:36 -04:00
Thomas Harte
d7bed958b3
Merge pull request #194 from TomHarte/8272Write
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Introduces initial implementations of the 8272's write data, write deleted data, read track and format track
2017-08-14 14:35:45 -04:00
Thomas Harte
9038ba622e
Added a quick version of read track.
2017-08-14 14:34:56 -04:00
Thomas Harte
7b8bb0297a
Implemented single density version of format track.
2017-08-14 13:03:17 -04:00
Thomas Harte
0da02d3902
Added read/write escape clauses if faced with a read-only disk.
2017-08-14 12:53:18 -04:00
Thomas Harte
334872d374
Clarified, slightly.
2017-08-14 12:47:11 -04:00
Thomas Harte
2e5ad19fe1
Minor tidying.
2017-08-14 12:42:48 -04:00
Thomas Harte
a10389a22c
Factored out the stuff of stuffing the bus.
2017-08-14 12:42:22 -04:00
Thomas Harte
cefec7a19f
Sought more robustly (i.e. less repetitively) to handle dispatch, including cancelling seeks where appropriate.
2017-08-14 10:37:39 -04:00
Thomas Harte
7264fbb3d2
read_id now clears status. I probably need to find a way to generalise this.
2017-08-14 09:58:55 -04:00
Thomas Harte
0e083e9dc6
Factored composition of a run command out, as I think I need to worry about extensions, and can trim spaces.
2017-08-14 09:48:56 -04:00
Thomas Harte
8a7b23dc9e
Ensured data-accessing commands cancel seeks on their drives. Also introduced a count of drives currently seeking in order to make for a slightly better broad-phase test in run_for.
2017-08-14 09:45:39 -04:00
Thomas Harte
b7065575f3
Added (empty) call-ins for DMA usage; switched to having the 'is seeking' bit in the status register stay high until sense interrupt status, but now it goes high even for seeks that don't actually go anywhere, and corrected interpretation of the specify command, with a positive result: the received step rate time, now that it's being interpreted correctly, is much shorter.
2017-08-14 09:04:22 -04:00
Thomas Harte
7ea703f150
Started making provisions for a DMA-compatible implementation. Re: the CPC, it sounds like DMA acknowledge might be permanently wired, causing DMA mode seemingly to work from the 8272's point of view.
2017-08-14 08:38:00 -04:00
Thomas Harte
ea64125124
Added an explicit nilling, to help with debugging.
2017-08-13 22:15:25 -04:00
Thomas Harte
1011143dbe
Sought to correct my interpretation of 'gap 3'.
2017-08-13 21:52:48 -04:00
Thomas Harte
9ace6e1f71
Applied minimum constraints for specified parameters.
2017-08-13 19:25:57 -04:00
Thomas Harte
750f2cb883
Flagged as not read-only, at least for now, to allow 8272 writing tests definitively to function.
2017-08-13 18:54:39 -04:00
Thomas Harte
5221837be8
Fixed Non-DMA flag for the format track execution phase. The emulated machine now provides sector details.
2017-08-13 18:51:06 -04:00
Thomas Harte
1576b4500b
Added documentation.
2017-08-13 18:27:00 -04:00
Thomas Harte
e1e9a06712
Made an attempt at format a track.
2017-08-13 18:05:19 -04:00
Thomas Harte
6e36f8ffa4
Removed index-hole announcement.
2017-08-13 12:50:24 -04:00
Thomas Harte
b0a7208cc7
Strung together a very basic version of 8272 write [/deleted] data. Lots of cases as-yet unhandled.
2017-08-13 12:50:07 -04:00
Thomas Harte
eec42aa7ae
Entrusted further status to drives; also adjusted them to report read only if diskless, which I now believe to be correct.
2017-08-13 11:50:49 -04:00
Thomas Harte
6d2e969e7d
Merge pull request #193 from TomHarte/8272Style
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Improves 8272 implementation style
2017-08-12 18:05:27 -04:00
Thomas Harte
5f42022c1d
Added a tester for the control mark.
2017-08-12 17:35:14 -04:00
Thomas Harte
11d0c37506
Attempted to find a more expressive way for maintaining state — macros for all conditions, to bind both values and destinations.
2017-08-12 17:33:52 -04:00
Thomas Harte
58bad1e2a3
Merge branch 'PerDriveStatus'
2017-08-12 16:49:38 -04:00
Thomas Harte
27d1dc5c37
Removed some old printfs.
2017-08-12 16:49:20 -04:00
Thomas Harte
e7345c7a20
Merge pull request #192 from TomHarte/PerDriveStatus
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Expands 8272 emulation further
2017-08-12 16:49:06 -04:00
Thomas Harte
186048a88e
Made an attempt to fix the condition for setting a broken header CRC.
2017-08-12 16:39:32 -04:00
Thomas Harte
7135259cc1
Sought to flesh out error conditions.
2017-08-12 16:36:37 -04:00
Thomas Harte
4909325e79
Implemented read deleted data.
2017-08-12 13:01:17 -04:00
Thomas Harte
a4ee697ed1
Quickie: head unload is scheduled only if the head is presently loaded.
2017-08-12 12:53:45 -04:00
Thomas Harte
0f15a2f97f
Relented: it actually looks like status bytes aren't per-drive. But each drive may fail at seeking individually. So that piece of state accumulates at the 8272 drive.
2017-08-12 12:52:36 -04:00
Thomas Harte
89ace671a4
Corrected unload time. Was 8000 times too short.
2017-08-12 09:44:01 -04:00
Thomas Harte
e7db2a2f6d
Sought to introduce head loading and unloading delays.
2017-08-12 09:36:21 -04:00
Thomas Harte
8c33ac71ee
Merge pull request #191 from TomHarte/Precache
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Introduces more aggressive caching of sectors in the MFM decoder, improves CPC static analysis further
2017-08-12 09:10:29 -04:00
Thomas Harte
69914faf02
Fixed comments.
2017-08-11 20:22:14 -04:00
Thomas Harte
daafebe7ac
Moved curly bracket.
2017-08-11 19:19:04 -04:00
Thomas Harte
2d81acb82e
Upped C++ standard to C++14 and added an #if that's intended to use the built-in std::gcd when compiled on C++17 or better. Fixed for new signedness warnings resulting for taking the step to C++14.
2017-08-11 19:18:45 -04:00
Thomas Harte
82ca49c840
Adjusted to avoid calls to ::greatest_common_divisor(numerator % denominator, denominator) unless necessary.
2017-08-11 19:05:46 -04:00
Thomas Harte
bfe297052d
Picked up another subtlety: disk names may be outside of the ones a user could type, in which case they definitely don't affect the decision.
2017-08-11 18:59:38 -04:00
Thomas Harte
ffb1a14ace
Minor: clear status registers before a read data.
2017-08-11 18:56:33 -04:00
Thomas Harte
7e35e44934
Added an extra sanity check on treating system disks as system disks.
2017-08-11 18:46:39 -04:00
Thomas Harte
0c8769e335
Just to be safe.
2017-08-11 18:41:08 -04:00
Thomas Harte
83c7d34df2
Switched to populating the sector cache with everything in a track the first time anything on that track is requested. That avoids the problem whereby each request of a non-existent sector costs two spins.
2017-08-11 18:40:16 -04:00
Thomas Harte
ad3c9842d7
Merge pull request #190 from TomHarte/SingleImplicit
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Corrects a couple of CPC static analysis pitfalls
2017-08-11 16:41:03 -04:00
Thomas Harte
44dace2eef
Made an attempt not to interrogate files that definitely don't have the normal header.
2017-08-11 16:34:29 -04:00
Thomas Harte
a12671010a
Sector size is now reported, and CRC failures are merely indicated, not cause for a sector to be thrown away.
2017-08-11 16:23:33 -04:00
Thomas Harte
23c149368b
Broadened CPC data disk analysis to spot when there is only one implicitly-runnable file, rather than only one without suffix.
2017-08-11 16:23:00 -04:00
Thomas Harte
09716d4716
Merge pull request #189 from TomHarte/CPCSystemDisks
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Corrects analysis of CPC system disks
2017-08-11 15:56:35 -04:00
Thomas Harte
4b7c504d22
Corrects analysis of system disks — they have a catalogue that is correct read, but can be launched without reference to it.
2017-08-11 15:55:33 -04:00
Thomas Harte
1e4f9d4eda
Merge pull request #188 from TomHarte/AYFidelity
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Switches to guessing that the AY doesn't reset its dividers upon frequency changes
2017-08-11 14:50:11 -04:00
Thomas Harte
e4f04d0977
Merge branch 'master' into AYFidelity
2017-08-11 14:41:08 -04:00
Thomas Harte
0f75525640
Merge pull request #187 from TomHarte/CRCErrors
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Extends the built-in [M]FM encoder to be able to produce incorrect CRC values, and adjusts the CPC .DSK handler to request them when appropriate
2017-08-11 14:34:31 -04:00
Thomas Harte
edb088526f
Simplified slightly, and updated TODO as to still-missing functionality.
2017-08-11 14:33:34 -04:00
Thomas Harte
80ebc63101
Updated the SSD file format container to specify sector sizes, now that it's no longer implicit.
2017-08-11 14:30:35 -04:00
Thomas Harte
cf1403bc79
Increased documentation.
2017-08-11 14:27:07 -04:00
Thomas Harte
fcf63a7547
Expands the [M]FM encoder to respect some new Sector flags: it will now wilfully make CRC errors, omit data, include data that is different than the ID's declared length, write deleted data, and can be commanded as to header/data gaps and what should be within them. All based around expanding towards the needs for reproduction of the CPC's .DSK file format.
2017-08-11 14:24:50 -04:00
Thomas Harte
9c0b75faba
Merge pull request #186 from TomHarte/CPCTyper
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Introduces typer support for the Amstrad CPC.
2017-08-11 12:35:43 -04:00
Thomas Harte
1f2bfc9581
Ensured tape loading really begins.
2017-08-11 12:30:36 -04:00
Thomas Harte
14ab03d1e0
Added a further fallback: if all files have an extension but one doesn't, take that one.
2017-08-11 12:27:50 -04:00
Thomas Harte
3831fbaca2
Ensured the ZX80 and '81 also provide the necessary hook for destruction.
2017-08-11 12:11:01 -04:00
Thomas Harte
1d8edf58dd
Ensured that a virtual destructor is declared, so that the various automatically-generated real constructors get in on the action.
2017-08-11 12:07:48 -04:00
Thomas Harte
4785e316ff
Now with exposition.
2017-08-11 11:36:03 -04:00
Thomas Harte
44da9de5b0
Tweaked typing timing expectations.
2017-08-11 11:35:28 -04:00
Thomas Harte
4ecd093891
Fixed test for termination of a key sequence; the previous error will have seen this reduce all multi-key sequences to just the one, and expand single-key sequences to "probably" two, posting an out-of-bounds code to the machine at completion.
2017-08-11 11:35:14 -04:00
Thomas Harte
dd4bc87d52
Fixed: should be a full-path #ifdef guard, given that this is one of the classes named relative to its namespace.
2017-08-11 11:21:33 -04:00
Thomas Harte
570d25214e
Made an initial attempt at typer support for the CPC.
2017-08-11 11:21:07 -04:00
Thomas Harte
f0b7e58968
Merge pull request #185 from TomHarte/CPMCatalogue
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Introduces a CP/M catalogue parser, as a basic for the CPC's static analyser
2017-08-11 11:00:49 -04:00
Thomas Harte
0411b51582
Added an attempt to deal with 16-bit allocation units, and to ensure middle-of-file holes are respected.
2017-08-11 10:59:37 -04:00
Thomas Harte
dea782cff9
Added a "yeah, I don't know" fallback.
2017-08-11 10:47:45 -04:00
Thomas Harte
388dd99762
Advanced this just enough to suggest a loading command for most things.
2017-08-11 10:47:12 -04:00
Thomas Harte
026101a268
Killed logic_extents_per_physical, since I don't know how to handle it, and instituted tracks, to allow a decision about short versus long allocation units.
2017-08-11 10:46:50 -04:00
Thomas Harte
734099a956
Threw a sector cache into my MFM parser, in an attempt to cut down analysis costs. Also made it aware of multiple heads.
2017-08-11 10:29:13 -04:00
Thomas Harte
6be5851484
Cleaned up.
2017-08-10 22:34:29 -04:00
Thomas Harte
994179f188
Taking a whole bunch of guesses, this might be correct.
2017-08-10 22:33:08 -04:00
Thomas Harte
6a65c7a52a
Started working on a CPC-oriented analyser; for now I just want to be able to make a good guess at the appropriate file to load from a disk. As it turns out, the CPC simply adopts the CP/M format, so a generic parser is appropriate. This is its beginning.
2017-08-10 17:10:21 -04:00
Thomas Harte
0d2d3ea17c
Merge branch 'master' into DeferredVideo
2017-08-10 16:01:02 -04:00
Thomas Harte
5d374ebb18
Merge pull request #184 from TomHarte/DeferredVideo
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Reduces CRTC counter sizes to match real hardware; introduces a CRT gamma transform
2017-08-10 16:00:39 -04:00
Thomas Harte
62eadbb51a
Adjusted gamma ratio to be the correct way around. The PAL midrange should be slightly darker now.
2017-08-10 15:36:27 -04:00
Thomas Harte
ad8c8166bc
Built in gamma conversion for all machines, assuming an output of 2.8 for PAL, 2.2 for NTSC.
2017-08-10 15:17:08 -04:00
Thomas Harte
a5593bec79
Threw in support for the light-pen trigger.
2017-08-10 15:00:14 -04:00
Thomas Harte
a1e2646301
Imposed counter size limits.
2017-08-10 14:58:24 -04:00
Thomas Harte
cf810d8357
Minor: ensure the CRT is set to output as a monitor.
2017-08-10 14:42:47 -04:00
Thomas Harte
f258d6fbb2
Merge pull request #183 from TomHarte/6845Address
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Corrects 6845 address loading
2017-08-10 12:51:40 -04:00
Thomas Harte
4961fda2a9
Ensured counter-intuitive CRTC writes get through, taking the opportunity to correct my handling of port IO in general: selecting multiple devices for input results in a logical AND (i.e. open collector mode), and both the CRTC and gate array will receive data from 'input's if applicable.
2017-08-10 12:39:19 -04:00
Thomas Harte
6a6e5ae79c
Forced users of the 6845 to be explicit about which type. So far with no effect.
2017-08-10 12:28:57 -04:00
Thomas Harte
02d792c003
Simplified logic slightly, avoiding repetition.
2017-08-10 11:48:37 -04:00
Thomas Harte
be8e7a4144
Eliminated false register aliasing, restricted register sizes and locked out reading and writing where appropriate.
2017-08-10 11:22:30 -04:00
Thomas Harte
b1dbd7833a
Merge branch 'master' into 6845Address
2017-08-10 11:15:08 -04:00
Thomas Harte
84ab05c5ef
Merge branch 'BetterFDC'
2017-08-10 11:14:53 -04:00
Thomas Harte
78138261c2
Merge pull request #182 from TomHarte/BetterFDC
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Continues building up the 8272
2017-08-10 11:14:08 -04:00
Thomas Harte
a4c910f1de
This appears to be a more accurate take on 6845 address advancement — it is necessary that character output has finished for the line address to be updated.
2017-08-10 11:12:53 -04:00
Thomas Harte
2eed24e859
Made an initial attempt at [a subset of] multi-sector reads.
2017-08-10 11:11:26 -04:00
Thomas Harte
7d1023ea98
Added a 'ready' getter to Drive, formally to let the drive take ownership of that test.
2017-08-08 21:15:56 -04:00
Thomas Harte
b11d142cff
Switched to descriptive names.
2017-08-08 20:35:41 -04:00
Thomas Harte
021ff8674e
Added something for sense drive status.
2017-08-08 20:30:54 -04:00
Thomas Harte
1b86bc21ab
Might as well get official on my ongoing efforts at CPC emulation.
2017-08-08 17:58:54 -04:00
Thomas Harte
e3d1f4fe1e
Subjectively, this might be more correct. It definitely prevents intermediate frequencies. More research required.
2017-08-08 17:58:35 -04:00
Thomas Harte
a7452aebff
Merge pull request #181 from TomHarte/6128
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Introduces support for 128kb CPCs.
2017-08-08 16:06:31 -04:00
Thomas Harte
484524d781
Implements RAM paging. The 6128 is now emulated.
2017-08-08 16:01:56 -04:00
Thomas Harte
dbf9927caf
Merge branch '8255Modes'
2017-08-08 07:44:56 -04:00
Thomas Harte
3bdedfd749
Improved comments.
2017-08-08 07:44:46 -04:00
Thomas Harte
005084af3d
Merge pull request #180 from TomHarte/6845FrameLength
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Corrects an off-by-one error in [character] line counting within the 6845
2017-08-08 07:37:48 -04:00
Thomas Harte
46278ff297
Experimental: is this meant to be a compare-before-increment?
2017-08-07 23:02:29 -04:00
Thomas Harte
d73dcbb268
Merge pull request #179 from TomHarte/AYDirection
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Makes various AY input/output fixes, and a few 8255 fixes along the way
2017-08-07 19:58:39 -04:00
Thomas Harte
390ecec3d9
Added: now declines to pass on output if in input mode for ports A and B.
2017-08-07 19:56:22 -04:00
Thomas Harte
41a30c147d
Adjusted: invalid register selection simply deselects all registers.
2017-08-07 19:51:36 -04:00
Thomas Harte
4709ae80cb
Added port direction tests.
2017-08-07 19:36:55 -04:00
Thomas Harte
7fbb455836
Per the CPC test I'm checking, 0s should be returned for non-retained bits, not 1s.
2017-08-07 19:07:12 -04:00
Thomas Harte
745afd217f
The port input/output flags are now honoured; reading a port that is set as an output returns the current output value.
2017-08-07 19:01:18 -04:00
Thomas Harte
4427e9a254
Merge pull request #178 from TomHarte/CPC664
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Introduces the beginning seeds 8272 emulation, and therefore floppy emulation for the CPC
2017-08-07 18:39:33 -04:00
Thomas Harte
2b0dcf8573
Transcribed the status bits that I think actually need to be obeyed.
2017-08-07 12:37:45 -04:00
Thomas Harte
47732ffb98
Prevented the 8272 from overreading ID fields (and, by doing so, overrunning its internal buffer). Exposed the MFMController's CRC generator for inspection.
2017-08-07 12:37:22 -04:00
Thomas Harte
d07f3216ab
Added a broad phase on whether seeking is ongoing.
2017-08-07 12:12:59 -04:00
Thomas Harte
56d65ba6f3
Adapted slightly, to retain the ability to advertise an incorrect size, to adjust the confusion I've created by having two different types of thing both called new_sector, and to print a warning when ignoring error flags.
2017-08-07 12:12:04 -04:00
Thomas Harte
895a3cbf24
Corrected reading of the track size table for extended disks. My first extended disk has now loaded.
2017-08-07 11:38:19 -04:00
Thomas Harte
d951c8c1c2
Fixed search for track start position with extended disks: it's no longer an infinite loop. So that's a pretty good performance improvement.
2017-08-07 11:36:29 -04:00
Thomas Harte
a294963e98
Made an absolutely basic attempt to accommodate some extended disk images.
2017-08-07 11:26:15 -04:00
Thomas Harte
68c73184b1
Had failed to spot that by taking control of stepping at this level, the appropriate invalidate_tracks were not being sent.
2017-08-07 10:36:53 -04:00
Thomas Harte
7f824d6494
Ensured seeks and recalibrates end immediately if no seeking is required.
2017-08-07 10:31:32 -04:00
Thomas Harte
3219212f03
A closer inspection of the data sheet seems to suggest that invalid command sequences will post ST0.
2017-08-07 07:35:41 -04:00
Thomas Harte
d90e35e5bd
Added a bunch of comments, and ensured that the data request bit remains set for the entire period that command bytes are accepted.
2017-08-07 07:27:00 -04:00
Thomas Harte
73f8488150
Reaching the end of the usable part of my day, decided to tidy up a little before bed with indentation that reflects a distinction between top-level entry points and mere loops.
2017-08-06 22:14:18 -04:00
Thomas Harte
3853966a1e
Removed formal storage of ST3, as it just seems to be composed live. This may turn out also to be the best way to deal with ST0–2, time will tell. Also took a stab at the error in responding properly to the ROM's intended use of seek might be accepting new commands as replacements for old ones rather than rejecting them. That didn't seem to do the trick.
2017-08-06 22:10:12 -04:00
Thomas Harte
d63893a437
Collapsed implementations of recalibrate and seek, and decided to intend to go for an upward count on steps taken rather than a downward one. But seek continues presently to fail.
2017-08-06 21:52:52 -04:00
Thomas Harte
90c74043f5
Remembered to toggle off RQM between bytes. CAT now works.
2017-08-06 21:21:59 -04:00
Thomas Harte
600445d90a
Made a first attempt to return sector contents.
2017-08-06 20:40:29 -04:00
Thomas Harte
e4b405fd3d
With the ROM now using a read ID to set its expectations, implemented that and fixed FIND/READ_HEADER macros for multiple use. Execution now reaches the unimplemented section of read data.
2017-08-06 20:32:46 -04:00
Thomas Harte
3b7ecbdf0d
Renamed result_ to result_stack_ to emphasis the fact that it goes backwards. Switched meaning of CB so that it is set for the entire command, execution and result phases.
2017-08-06 20:17:12 -04:00
Thomas Harte
01efb645cb
Took a reasonable gamble that the CHRN reported is from internal registers, not from the last-found header.
2017-08-06 19:57:34 -04:00
Thomas Harte
b5ec1f42d5
Started resetting 'busy' when entering the result phase. AMSDOS now complains of a missing disk after failing to find sector 01. My belief is that it should end up asking for C1. So this is not even getting through a failure to find a sector correctly yet.
2017-08-06 19:48:17 -04:00
Thomas Harte
c839556a27
Fixed: rewind the file to check for 'EXTENDED' if 'MV - CPC' failed.
2017-08-06 19:47:10 -04:00
Thomas Harte
e9972aa0dd
Added respect for the index-hole limit on reading, and an error phase.
2017-08-06 19:25:44 -04:00
Thomas Harte
1c9a744b01
Made an effort to start inspecting ID fields, at least. Discovered that my emulation has somehow stopped proceeding beyond sense interrupt status though. Fix one in that area: adjust ST0 just in time for the sense interrupt status response, as that'll need to specify the drive number properly.
2017-08-06 18:06:20 -04:00
Thomas Harte
e6d4bb29d8
Discovered correct sense interrupt status result if nobody is in the completed seeking state, and switched to it. It's a single 0x80 rather than two bytes.
2017-08-06 15:34:33 -04:00
Thomas Harte
6c5b562d97
Made an attempt at some of the correct seek/recalibrate behaviour: it's now asynchronous from command processing and able to work on up to four drives at once. I just probably am not yet hitting all the status flags I need to hit.
2017-08-06 15:22:07 -04:00
Thomas Harte
a7103f9333
Disks are now communicated to the 8272. Which is able to handle four of them.
2017-08-06 13:24:14 -04:00
Thomas Harte
c12425e141
Added storage for the extended four status registers, and made an attempt at implementing the two most trivial result-phase commands. Am slightly paused momentarily trying to figure out whether seek activity is orthogonal to read/write activity.
2017-08-06 12:55:57 -04:00
Thomas Harte
89f6de1383
Started on a real ugly-implementation coroutine approach, and implemented specify as a fairly trivial first command: it has no result phase, and is the only thing called by AMSDOS as part of the initialisation sequence.
2017-08-06 12:36:18 -04:00
Thomas Harte
77da582e88
Switched the container in which events are passed to int, with the intention of subclasses extending the receivable range.
2017-08-06 12:35:20 -04:00
Thomas Harte
34eaf75352
Fixed WAIT_FOR_TIME macro.
2017-08-06 12:08:54 -04:00
Thomas Harte
ffadb04761
Documented, and removed a couple of Event types that are WD-specific but had accidentally flown into here. Will need to figure out how best to expose the CRC result too, but I'm willing to let that one drop out naturally as I implement the 8272.
2017-08-06 11:36:36 -04:00
Thomas Harte
29288b690e
Switched disk controllers to be instantiated explicitly in terms of cycles, created an Amstrad-specific subclass of the 8272 to record the direct programmatic availability of all disk motors bundled together, and otherwise adjusted to ensure the thing is clocked and that the motor is enabled and disabled appropriately. The 8272 is also now formally a subclass of the incoming MDM controller.
2017-08-06 09:45:16 -04:00
Thomas Harte
25fd3f7e50
Mildly increased work in here, still primarily oriented towards logging what I actually need to get done.
2017-08-05 22:26:59 -04:00
Thomas Harte
4d60b8801c
Started trying to factor out just the PLL stream -> FM/MFM events part that is presently in the WD1770.
2017-08-05 22:26:15 -04:00
Thomas Harte
3e984e75b6
Strung up an empty shell that eventually should contain the 8272, and added appropriate IO decoding to the Amstrad.
2017-08-05 19:45:52 -04:00
Thomas Harte
9e8645ca7a
Fixed ROM paging port decoding. It should have been fd00 if completely decoded, not df00, but also shouldn't be completely decoded.
2017-08-05 19:24:03 -04:00
Thomas Harte
caf3ac0645
Sought: (i) to instruct the CPC that it should be a 664, not a 464, if given a disk image (at least until I have RAM paging implemented for a 6128); (ii) to support ROM selection within the CPC and allow paging in of AMSDOS.
2017-08-05 19:20:38 -04:00
Thomas Harte
0f4343cd84
Merge pull request #177 from TomHarte/DSKFileFormat
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Introduces parsing of the file format support for the simplest of CPC disks
2017-08-05 11:55:13 -04:00
Thomas Harte
192f232d3f
Silenced warnings.
2017-08-05 11:53:29 -04:00
Thomas Harte
6e4d3b8a77
Added enough logic to produce some sort of version of a completely unprotected DSK. So enough to start bootstrapping an FDC emulation, at least.
2017-08-05 11:44:53 -04:00
Thomas Harte
8eda24261c
Removed unnecessary header — it's implied by being a child of FileHolder.
2017-08-05 11:44:06 -04:00
Thomas Harte
75c59fefab
Added an empty husk to begin support for Amstrad CPC disk image formats.
2017-08-05 10:02:10 -04:00
Thomas Harte
4b19cf60df
Added omitted semicolon.
2017-08-05 09:18:55 -04:00
Thomas Harte
2b476554e7
Merge pull request #176 from TomHarte/AYDeferrer
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Corrects the CPC's handling of AY time accumulation
2017-08-05 09:13:47 -04:00
Thomas Harte
b3788fed41
Fixed AY queuing behaviour as handled by the Amstrad. I think I need to come up with clearer semantics here.
2017-08-05 09:12:17 -04:00
Thomas Harte
b999c1d8aa
Merge branch 'FilteredSync'
2017-08-04 16:52:14 -04:00
Thomas Harte
a63aa80dc9
Merge branch 'master' of github.com:TomHarte/CLK
2017-08-04 16:51:52 -04:00
Thomas Harte
63f57c8c4f
Adjusted visible portion of frame; completely empirical, as I'm chasing a machine that shipped with a monitor.
2017-08-04 16:51:46 -04:00
Thomas Harte
7e6a6365c9
Adjusted visible portion of frame; completely empirical, as I'm chasing a machine that shipped with a monitor.
2017-08-04 16:50:58 -04:00
Thomas Harte
3dbf26ac49
Merge pull request #175 from TomHarte/FilteredSync
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Introduces filtering of the CRTC's hsync signal into the gate array.
2017-08-04 16:38:52 -04:00
Thomas Harte
f075fea78c
Introduces filtering of the CRTC's vsync signal into the gate array.
2017-08-04 16:36:55 -04:00
Thomas Harte
cc8380c286
Merge pull request #174 from TomHarte/ProperBorder
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Removes quick-hack solution for border drawing
2017-08-04 12:15:22 -04:00
Thomas Harte
c0f0c68f4f
Corrects quick-hack version of border drawing: the assumption that the colour must be the same over a plotted period. Also corrects my entry for colour 15.
2017-08-04 12:13:05 -04:00
Thomas Harte
c2bb019381
Merge pull request #173 from TomHarte/TimingFixes
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Corrects two misimplementations of the CPC's interrupt counter
2017-08-04 09:06:42 -04:00
Thomas Harte
26ce6cdab2
Permitted register 3 to dictate vertical sync length.
2017-08-04 08:56:36 -04:00
Thomas Harte
d9097facf1
Found documentation that makes more sense, and in practice seems to be more correct: the test after vertical sync is for greater than 32, not less. Also I decided to chance my arm on counter reset also resetting interrupt request. The raster effects of Ghouls 'n' Ghosts is now pretty much correct but one line off. I think probably either something is off in my wait-two logic on the post-vsync timer event, or possibly the vsync bit exposed via the PPI doesn't mean exactly what I think it means.
2017-08-04 08:56:09 -04:00
Thomas Harte
b927500487
Clarified code a little, but this is mostly fiddling in the margins.
2017-08-03 22:00:30 -04:00
Thomas Harte
e71eabedf9
Fixed timer clearing tet.
2017-08-03 21:30:04 -04:00
Thomas Harte
33ed27c3ad
Minor tidiness: included missing headers, and spaced out the ROM type and key lists for readability.
2017-08-03 12:45:42 -04:00
Thomas Harte
45cbab6751
Merge pull request #172 from TomHarte/KeyboardMachines
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Publicly declares the ZX80/81 and Amstrad CPC as keyboard machines
2017-08-03 12:39:22 -04:00
Thomas Harte
a7b74d6164
Merge pull request #171 from TomHarte/EverMoreTZX
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Further expands the implemented subset of the TZX file format
2017-08-03 12:38:44 -04:00
Thomas Harte
575b1dba75
Formally declared the ZX80/81 and Amstrad CPC as keyboard machines in their public interface. Which means not having to repeat the meaning of set_key_state and clear_all_keys. So: a minor DRY improvement.
2017-08-03 12:38:22 -04:00
Thomas Harte
a3b16b6dfa
Further beefs up the list of chunks that this TZX parser can either comprehend or skip.
2017-08-03 12:13:41 -04:00
Thomas Harte
c8f4de6f11
Merge pull request #170 from TomHarte/KeyboardCraziness
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Separates knowing the mapping from ASCII to machine keys from the act of typing them
2017-08-03 11:53:42 -04:00
Thomas Harte
bbb17acf3a
Expanded interface so that an external machine caller can request a string be typed without any knowledge of whatever it intends to do re: CharacterMappers. Which is immediately useful in paste functionality.
2017-08-03 11:50:50 -04:00
Thomas Harte
ad3a98387f
Within the Typer framework: hatched out CharacterMapper as a distinct thing from the target for keypresses, better to formalise responsibility but also to make it easy cleanly to sever that stuff into its own little part.
2017-08-03 11:42:31 -04:00
Thomas Harte
985fbf59c2
Merge pull request #169 from TomHarte/Z80HasA
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Converts the Z80 into a BusAdaptor-type component
2017-08-02 22:42:49 -04:00
Thomas Harte
2f2071be8a
These should actually both be in the public header, as the types are used in an exposed method.
2017-08-02 22:18:30 -04:00
Thomas Harte
6d510e4e70
Made it no longer public knowledge that any sort of Typer is involved in being a ZX80/81.
2017-08-02 22:17:22 -04:00
Thomas Harte
8e0736fbe6
Reinstated typing ability, albeit with an ugly inline insertion. But I think I can defer dealing with typers to another pull request. The whole issue of keyboard mapping probably needs reappraisal.
2017-08-02 22:16:09 -04:00
Thomas Harte
681d1e2f8d
Breaking its typer for now, adapted the ZX80/81 to having a Z80, not being one.
2017-08-02 22:12:59 -04:00
Thomas Harte
42e70ef993
Adjusted slightly as per Z80 change, and to pull everything internally declared into the Amstrad CPC namespace.
2017-08-02 22:11:03 -04:00
Thomas Harte
039811ce6a
Switched the Z80 to being something a machine has, not something a machine is.
2017-08-02 22:09:59 -04:00
Thomas Harte
a54ccd1969
Merge pull request #168 from TomHarte/CPC
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Adds an initial Amstrad CPC 464 emuation
2017-08-02 20:50:02 -04:00
Thomas Harte
707821ca55
Added the normal readme to explain what's omitted here.
2017-08-02 20:45:14 -04:00
Thomas Harte
d3bf8fa53b
Upped the documentation.
2017-08-02 20:37:26 -04:00
Thomas Harte
f5e2dd410e
Constrained output to the centre 90%.
2017-08-02 19:55:44 -04:00
Thomas Harte
3ca9c38777
Attempted to move to more accurate bus reading — if control lines are set then all subsequent data inputs should act according to the current control lines; changes to port input should be reflected live upon readings, etc.
2017-08-02 19:45:58 -04:00
Thomas Harte
2d2cefb0b0
Adjusted factoring to introduce support for block 10.
2017-08-02 14:36:47 -04:00
Thomas Harte
2fd071e45d
Made an honest attempt at outputting turbo speed data block data. The CPC now at least starts to load.
2017-08-02 14:24:34 -04:00
Thomas Harte
d7a5c3f49a
Added support for the ID 20 block and fixed a minor error in my skip-the-contents version of block 11: length is three bytes long, not two. This gives me enough structure properly to get to the end of my current test CDT, albeit without making any of the noises.
2017-08-02 14:12:34 -04:00
Thomas Harte
819761f9fb
Fixed another uninitialised pointer.
2017-08-02 13:56:35 -04:00
Thomas Harte
e50adf1cc8
Were my TZX support up to it, this would likely be sufficient for tape emulation.
2017-08-02 13:50:14 -04:00
Thomas Harte
dcab10f53e
Ensured the AY's async queue doesn't just fill and fill.
2017-08-02 07:38:35 -04:00
Thomas Harte
633d8965e2
Removed accidental logging commit.
2017-08-02 07:38:14 -04:00
Thomas Harte
f602f9b6ec
Adds an attempt to clock the AY.
2017-08-02 07:21:33 -04:00
Thomas Harte
f7e66dea61
Added a compound divide and convert.
2017-08-02 07:21:21 -04:00
Thomas Harte
bda9441620
Made an attempt to clock the AY.
2017-08-02 07:20:59 -04:00
Thomas Harte
4d5d5041df
Attempted to ensure a clean startup.
2017-08-01 22:18:42 -04:00
Thomas Harte
587eb3a67c
Factored interrupt counting out of the CRTCBusHandler.
2017-08-01 22:15:39 -04:00
Thomas Harte
6ca07f1e28
I guess it might end up living somewhere else, but introduced a header with the compiler-specific stuff to allow me to force things inline.
2017-08-01 22:04:58 -04:00
Thomas Harte
8d39a20088
Added proper output of mode 3, were anything ever to try to use it.
2017-08-01 21:51:41 -04:00
Thomas Harte
4b6370eb86
Realised my colour error: mapping the ROM numbers as though they were the hardware numbers. Having fixed that, spotted that I was deserialising R and B the wrong way around and dividing by too much. Colours now appear to be correct.
2017-08-01 21:47:52 -04:00
Thomas Harte
c6e340a8a2
Wired up the vsync signal. Pen 15 no longer flashes like crazy. Still can't figure out why the palette is so askew; was looking for perhaps some sort of detection of a green screen rather than a colour one, but there's no obvious input for that.
2017-08-01 21:21:59 -04:00
Thomas Harte
31c7153301
Corrected bit to colour mapping for modes 0 and 1. The total palette is still way off but there's consistency between modes now.
2017-08-01 20:52:42 -04:00
Thomas Harte
7e04d00cc1
Fixed key values, causing the new set of keys to work, decreased quantity of output and ensured that pixels appear in modes 0 and 2.
2017-08-01 20:39:10 -04:00
Thomas Harte
9d43784c65
Significantly increased quantity of keys forwarded.
2017-08-01 20:37:55 -04:00
Thomas Harte
eca9586a0f
Fixed: input value is no longer overwritten by 0xff. The '0' key now works.
2017-08-01 20:19:02 -04:00
Thomas Harte
0267bc237f
Added the ability to set a port input, and relaxed bus state testing. I think my on-demand bus reactions here are inappropriate, so more work to do here probably.
2017-08-01 18:04:51 -04:00
Thomas Harte
2e4577f741
Made a game attempt at implementing a (sticky) keyboard. No effect yet.
2017-08-01 17:52:05 -04:00
Thomas Harte
f5b278d683
Added enough stuff to put the emulated Amstrad CPC in a state of knowing whether its '0' key is pressed.
2017-08-01 17:31:56 -04:00
Thomas Harte
e6854ff8db
Corrected typo: the input to an AY is BDIR, not BCDIR.
2017-08-01 17:06:57 -04:00
Thomas Harte
3b292273c7
Fixed: BC2 is always implicitly set. The machine is now periodically checking the AY's register 14 (i.e. the first input port), so probably there's enough here now to implement keyboard input.
2017-08-01 17:05:11 -04:00
Thomas Harte
cb732e5d5f
Made an attempt to wire in an [unclocked] AY, in an endeavour to get to keyboard reading.
2017-08-01 17:01:58 -04:00
Thomas Harte
2d4e202be3
Completed dangling comment.
2017-08-01 17:01:36 -04:00
Thomas Harte
64da8e17d1
Fixed: of course this should take a reference to an existing port handler rather than hatching its own; otherwise additional communication with a port handler by an i8255 owner doesn't work as intended.
2017-08-01 17:01:20 -04:00
Thomas Harte
08ad35efd9
It's barely an implementation of the 8255, but ensured that data is bounced into the PortHandler, conveniently assuming the interaction mode used by the CPC.
2017-08-01 16:34:13 -04:00
Thomas Harte
58b98267fc
Formally transferred ownership of PIO accesses to an incoming template, and decided to start being explicit about how to specify the interfaces and provide fallbacks for optional behaviour for the new, clean generation of interfaces. A full-project sweep will inevitably occur but I'll try to tie off this branch first.
2017-08-01 16:15:19 -04:00
Thomas Harte
ace71280a0
Removed implementation file; this is only ever going to be a template.
2017-08-01 16:00:17 -04:00
Thomas Harte
a27946102a
Took a shot at the interrupt counter. Attempts at keyboard reading now recur so it'll probably do for now. I think that next puts me into the realm of needing to implement the 8255.
2017-08-01 15:49:16 -04:00
Thomas Harte
1d99c116e7
Actually, this is probably more correct: increment and then compare, but increment the refresh address once more after the final character, to avoid repeating it.
2017-08-01 15:29:37 -04:00
Thomas Harte
ee27e16fb1
Switched to post-tests increment. Seems to give proper screen width, but also eliminates that 'compare to +1' step that felt unlikely.
2017-08-01 15:19:25 -04:00
Thomas Harte
6ac7132799
Had a quick go at properly outputting Mode 1, adding wiring to communicate palette and mode changes to the CRTC bus handler. Colours are off but it's sufficient for now.
2017-08-01 15:16:13 -04:00
Thomas Harte
ca42abab70
Doubled up to ensure that every byte that should be inspected is represented. This makes it clearer that I'm on the right road. A garbled version of 'Amstrad 64k Microcomputer' can be discerned, in a weird grayscale and with the right-hand column missing and skewed output as a result.
2017-08-01 07:56:44 -04:00
Thomas Harte
933d69a256
Fixed slightly: the CPC wiki has a typo. It's 12 and 13 that move up to 14 and 15.
2017-08-01 07:51:13 -04:00
Thomas Harte
3b1db14817
Made a quick attempt at properly updating the refresh address.
2017-08-01 07:36:03 -04:00
Thomas Harte
10a5581aea
Made first attempt at offering some sort of pictographic of actual RAM contents.
2017-08-01 07:34:12 -04:00
Thomas Harte
3ae699964f
Ensured an actual pixel stream is supplied for pixel regions. Though it's just a long stream of white pixels for now. So visual output is unchanged.
2017-08-01 07:24:29 -04:00
Thomas Harte
9d953421d8
After a quick check, added a couple of other _delegate initialisations. I should probably find a way to template this.
2017-08-01 07:07:43 -04:00
Thomas Harte
763e3b65d1
Ensured a proper initial value for delegate_.
2017-07-31 22:46:06 -04:00
Thomas Harte
42dd27c9b1
Shunted method bodies inline, given that there's no need for a declaration/definition distinction.
2017-07-31 22:39:25 -04:00
Thomas Harte
2b168f7383
Disabled the address sanitiser as an every-time run again, as it just pushes my computer a bit too far.
2017-07-31 22:32:56 -04:00
Thomas Harte
0536f089e1
Eliminated old-[personal-]fashioned line break.
2017-07-31 22:32:26 -04:00
Thomas Harte
3df13cddd4
As per my keenness for cleanliness improvements corresponding to my ever-increasing C++ ability: turned the Amstrad into something that a factory produces, allowing me completely to hide a bunch of implementation details.
2017-07-31 22:32:04 -04:00
Thomas Harte
e3f677fa37
I was under-counting row lines. Adjusted comparison. The emulator now produces a solid white square of approximately correct proportions. I'm sure that filling in pixels will reveal the next set of bugs.
2017-07-31 22:21:46 -04:00
Thomas Harte
c2253c1e0f
Fixed multiplier: the dot clock I've used to instantiate the CRT is the pixel clock, not the character clock.
2017-07-31 22:17:46 -04:00
Thomas Harte
5c68b6cc21
Fixed display enable reset when there's no adjustment area. A practical lesson in failure to factor.
2017-07-31 22:16:08 -04:00
Thomas Harte
ffaa627820
Fixed frame restart when there is no adjustment period.
2017-07-31 22:13:45 -04:00
Thomas Harte
f742fd5d4a
Made basic attempt to get something on screen: white where the display is enabled, black for the border.
2017-07-31 22:13:20 -04:00
Thomas Harte
69b99fe127
Transferred ownership of the CRT to the CRTC bus handler, to give it easy access.
2017-07-31 22:04:52 -04:00
Thomas Harte
5a396f6787
Added an explicit cast.
2017-07-31 22:04:31 -04:00
Thomas Harte
cb0dc7b434
I'm sure it's not going to be this easy, but this is a genuine attempt at full horizontal and vertical timing.
2017-07-31 22:01:54 -04:00
Thomas Harte
e28829bd1b
Corrected CRTC timing, gave it someone to talk to and a means with which to talk.
2017-07-31 20:14:46 -04:00
Thomas Harte
68ceeab610
Created a 6845 class and started pushing data at it and clocking it. It doesn't currently have the concept of a bus but will do, hence the in-header implementation.
2017-07-31 19:56:59 -04:00
Thomas Harte
68dca9d047
Made a first attempt at ROM paging, with pretty much the same scheme that'll be needed for 128kb support.
2017-07-31 19:37:28 -04:00
Thomas Harte
d88ca151f4
Added a first attempt at output port decoding. Just logging for now.
2017-07-31 19:25:10 -04:00
Thomas Harte
3c90218c3d
With a very basic stab at something a bit like the memory map (sans paging), execution begins.
2017-07-31 19:15:43 -04:00
Thomas Harte
afd409c883
Ensured that ROM images are loaded and passed to the Amstrad CPC.
2017-07-31 18:44:49 -04:00
Thomas Harte
26b6c03a2a
Re-enabled the address sanitiser as a development tool.
2017-07-31 07:30:07 -04:00
Thomas Harte
9c04d851e4
Added the basics necessary to get the CPU ticking over, at a nominal 4Mhz but with the wait states that I currently believe to be accurate.
2017-07-31 07:29:50 -04:00
Thomas Harte
1d6fe11906
Added an instance of Outputs::CRT::CRT. So progress is now: select CDT, up comes a blank window.
2017-07-31 07:16:51 -04:00
Thomas Harte
c0f1313830
Performed sufficient wiring to get to the point where attempting to load a CDT creates an instance of the Amstrad CPC and then fails only because the thing vends a nullptr CRT.
2017-07-30 22:05:29 -04:00
Thomas Harte
fb51fadf00
Merge branch 'master' into CPC
2017-07-30 21:29:31 -04:00
Thomas Harte
55fd9122d0
Slightly relaxed vertical sync testing.
2017-07-30 21:19:42 -04:00
Thomas Harte
5b5720fac0
Added to the static analyser the most basic through-path for Amstrad CPC content.
2017-07-30 21:15:20 -04:00
Thomas Harte
d25d7d7d40
Added the Amstrad CPC as a named target and declared support for its CDT file format.
2017-07-29 21:56:33 -04:00
Thomas Harte
ba4f2d8917
Merge branch 'master' into VerticalSync
2017-07-29 21:45:22 -04:00
Thomas Harte
a2aec39633
Merge pull request #167 from TomHarte/VerticalSync
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Adjusts vertical sync detection
2017-07-29 21:44:47 -04:00
Thomas Harte
0bf4fdc9af
Simplified slightly.
2017-07-29 21:37:59 -04:00
Thomas Harte
ed8c73eb14
Ensured lengthy constant sync can't appear to be two sync pulses, regardless of other interruption.
2017-07-29 18:25:04 -04:00
Thomas Harte
3528a7f78b
Made an attempt at triggering vertical sync the expected number of time after it begins, regardless of total length.
2017-07-29 17:33:52 -04:00
Thomas Harte
54bcc40192
With an eye towards being more accurate as to vertical sync recognition: acknowledged that the detection period varies between PAL and NTSC.
2017-07-29 14:53:53 -04:00
Thomas Harte
4b5e9ffb83
Ensured is_at_end_ is initially cleared by default.
2017-07-27 22:22:43 -04:00
Thomas Harte
a7f5f035a6
Merge pull request #166 from TomHarte/NoRefs
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Standardises on `const [Half]Cycles`
2017-07-27 22:07:05 -04:00
Thomas Harte
4abd62e62b
Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty.
2017-07-27 22:05:29 -04:00
Thomas Harte
1fb158b297
Merge pull request #165 from TomHarte/HalfCycleTyper
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Brings `Typer` into the new `run_for` orthodoxy
2017-07-27 21:56:02 -04:00
Thomas Harte
968d2bb8ba
Brought Typer into the new run_for orthodoxy, making it easier to clock consistently regardless of unit. Which necessitated adding a negative operator for WrappedInts.
2017-07-27 21:53:45 -04:00
Thomas Harte
92a3dfe44a
Merge pull request #164 from TomHarte/NoInt
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Revokes the operator bool() on WrappedInt and simplifies/generalises HalfClockReceiver
2017-07-27 21:41:04 -04:00
Thomas Harte
9ef232157b
Revoked the operator bool() on WrappedInt as providing an indirect means for implicit but incorrect assignment to unwrapped ints. Got explicit about run_for intention and simplified HalfClockReceiver slightly by building a lossy and a flushing conversion to Cycles into HalfCycles. Adapted the all-RAM Z80 properly to return HalfCycles.
2017-07-27 21:38:50 -04:00
Thomas Harte
b9f4f7a530
Merge pull request #163 from TomHarte/WaitSampling
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Adjusts the timing of the Z80's wait line sampling to be on a half clock and better regularises 'action' partial bus cycles
2017-07-27 21:19:29 -04:00
Thomas Harte
761afad118
Corrected timestamp return, and its testing by the 6502 timing tests.
2017-07-27 21:19:16 -04:00
Thomas Harte
8848ebbd4f
Formalised set_interrupt_line's optional parameter as being a count of HalfCycles; corrected PartialMachineCycle.is_wait and effected the proper timing for counter reset on a ZX81.
2017-07-27 21:10:14 -04:00
Thomas Harte
37950143fc
Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.
2017-07-27 20:17:13 -04:00
Thomas Harte
25fd95044c
Merge pull request #154 from TomHarte/Memptr
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Introduces a subset of necessary test cases for the Z80 memptr register, and corrects implementation to match
2017-07-27 08:10:22 -04:00
Thomas Harte
1da24d10fd
Corrected a couple of build errors.
2017-07-27 08:05:14 -04:00
Thomas Harte
60e374dca3
Merge branch 'master' into Memptr
2017-07-27 07:54:25 -04:00
Thomas Harte
7a65f91575
Merge pull request #162 from TomHarte/ClockReceiverHolder
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Completes revocation of ClockReceiver
2017-07-27 07:43:12 -04:00
Thomas Harte
6f8b558724
Revoked dead #include.
2017-07-27 07:41:59 -04:00
Thomas Harte
1a88b62bf7
Merge branch 'master' into ClockReceiverHolder
2017-07-27 07:41:20 -04:00
Thomas Harte
8361756dc4
Switched definitively to the works-for-now approach of requiring an explicit opt-in where somebody wants to clock a whole-cycle receiver from a half-cycle clock.
2017-07-27 07:40:02 -04:00
Thomas Harte
273299028e
Merge pull request #161 from TomHarte/Z80WaitSampling
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Doubles the timing precision used by the Z80 up to HalfCycles
2017-07-27 07:39:36 -04:00
Thomas Harte
847e49ccdf
Corrected timestamp reporting by the all-RAM Z80.
2017-07-26 19:47:39 -04:00
Thomas Harte
81a3899381
Adjusted the Z80 formally to communicate in terms of half cycles rather than whole.
2017-07-26 19:42:00 -04:00
Thomas Harte
9257a3f6d7
Added test for 16-bit arithmetic, and fixed implementation.
2017-07-26 19:04:52 -04:00
Thomas Harte
728143247d
Added a test for RLD and RRD. Which already passes.
2017-07-26 18:56:35 -04:00
Thomas Harte
6ec4e4e3d7
Merge branch 'master' into Memptr
2017-07-25 23:01:34 -04:00
Thomas Harte
7922a12f02
Merge pull request #159 from TomHarte/JamReplacement
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Corrects those tests broken by withdrawal of the 6502 jam handler functionality
2017-07-25 23:01:13 -04:00
Thomas Harte
37ccb9d3b6
Fixed 6502 timing tests.
2017-07-25 23:00:39 -04:00
Thomas Harte
3c254360ba
Completed fixture of the 6502 BCD test.
2017-07-25 22:55:45 -04:00
Thomas Harte
d2a0beaa67
Merge branch 'master' into JamReplacement
2017-07-25 22:49:23 -04:00
Thomas Harte
cda223ffc0
Added explicit signedness cast.
2017-07-25 22:49:03 -04:00
Thomas Harte
3ca51bedc6
Discovered legitimate uses of the jam opcode so reinstated it. Corrected illegitimate uses.
2017-07-25 22:48:44 -04:00
Thomas Harte
36076b7ea5
Eliminated final vestige of professed jam handling. This should make it clear which tests still think they can capture jams.
2017-07-25 22:38:26 -04:00
Thomas Harte
e90d128a26
Merge pull request #158 from TomHarte/HalfCycles
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Formalises run_for_cycles, offering half- and full-length cycle options
2017-07-25 22:34:35 -04:00
Thomas Harte
966b5e6372
Adapted the Z80's perform_machine_cycle to return Cycles.
2017-07-25 22:25:44 -04:00
Thomas Harte
279c369a1f
Switched to Cycles as the result from the 6502 perform_bus_operation, helping slightly to clarify what you're intended to return and reducing type jumping within the 6502 implementation.
2017-07-25 22:21:09 -04:00
Thomas Harte
d9c6b3bcf7
Corrected TIA's WSYNC lookahead to accept Cycles.
2017-07-25 22:13:41 -04:00
Thomas Harte
1c2f68f129
Removed, as it's been relocated.
2017-07-25 20:43:05 -04:00
Thomas Harte
296c7cec05
Adopted flush widely.
2017-07-25 20:42:51 -04:00
Thomas Harte
75d67ee770
Relocated ClockReceiver.hpp as it's a dependency for parts of the static analyser, and therefore needs to be distinct from the actual emulation parts.
2017-07-25 20:20:55 -04:00
Thomas Harte
a1e9a54765
Eliminated redundant uses of ClockReceiver and sought to ensure that proper run_fors are inherited all the way down.
2017-07-25 20:09:13 -04:00
Thomas Harte
8d1dacd951
Clean ups along the Electron::Tape line: ensured that the ClockReceiver is opted into only once, and that its run_for propagates all the way along the chain.
2017-07-25 20:01:30 -04:00
Thomas Harte
545683df6f
Added some documentation, got explicit again about cycle/half-cycle intermingling, and added flush as what amounts to divide(1), for cleaner usage without a clock divider.
2017-07-25 19:50:40 -04:00
Thomas Harte
cfbd62a5dc
Attempted to fix implementation of divide, and marked everything as-yet unmarked as inline.
2017-07-25 07:43:39 -04:00
Thomas Harte
40339a12e1
Formalised the use of a cycles count with a divider, bringing a few additional plain-int users into the fold.
2017-07-25 07:15:31 -04:00
Thomas Harte
90bf6565d0
Reduced int/Cycle conversions in the Electron and on the Atari 2600, where the current framework makes it possible to do so.
2017-07-24 22:53:13 -04:00
Thomas Harte
9be9bd9106
Neatened layout.
2017-07-24 22:52:35 -04:00
Thomas Harte
c1527cc9e2
Reduced back-and-forth between Cycles and ints within the Oric.
2017-07-24 22:46:31 -04:00
Thomas Harte
a1a3aab115
Fixed implicit sign conversion.
2017-07-24 22:40:15 -04:00
Thomas Harte
c77a83d86f
The 6560 is now a ClockReceiver. This reduces to zero the number of remaining instances of the text run_for_cycles in this codebase.
2017-07-24 22:38:35 -04:00
Thomas Harte
a6e377aa57
The Electron's video is now a ClockReceiver.
2017-07-24 22:36:42 -04:00
Thomas Harte
df4732be2e
Corrected test.
2017-07-24 22:33:49 -04:00
Thomas Harte
9435c1e12a
The 1540 is now a ClockReceiver.
2017-07-24 22:32:41 -04:00
Thomas Harte
efdac2ce8c
The 6522 is now a ClockReceiver.
2017-07-24 22:29:09 -04:00
Thomas Harte
2912d7055b
The 6532 is now a ClockReceiver.
2017-07-24 21:57:24 -04:00
Thomas Harte
d056f2e246
Updated comment.
2017-07-24 21:51:22 -04:00
Thomas Harte
55ecb0c022
Converted the Microdisc into a ClockReceiver.
2017-07-24 21:51:13 -04:00
Thomas Harte
13f7aa4063
The TIA is now a ClockReceiver.
2017-07-24 21:48:34 -04:00
Thomas Harte
915f587ef1
Updated the Electron's tape class to be a ClockReceiver.
2017-07-24 21:36:30 -04:00
Thomas Harte
b7f88e8f61
Filter is now a ClockReciever, affecting all sound output devices.
2017-07-24 21:29:13 -04:00
Thomas Harte
677ed463f0
Updated comment per new method name.
2017-07-24 21:19:49 -04:00
Thomas Harte
8a2bdb8d22
Converted the TimedEventLoop and the things that sit atop it into ClockReceivers.
2017-07-24 21:19:05 -04:00
Thomas Harte
9bff787ee1
Corrected for the new, non-integral type.
2017-07-24 21:05:07 -04:00
Thomas Harte
b3ae920746
Converted the DPLL and disk controller classes to be ClockReceivers.
2017-07-24 21:04:47 -04:00
Thomas Harte
b82bef95f3
Decided to follow through on Cycles and HalfCycles as complete integer-alikes. Which means giving them the interesting range of operators. Also killed the implicit conversion to int as likely to lead to type confusion.
2017-07-24 20:10:05 -04:00
Thomas Harte
e6578defcd
It turns out that quite a few tests still rely on CSTestMachine6502JamOpcode. Though since it no longer works, that'll need to be fixed. In the meantime, fixed the test build process at least, as it's not really what this branch is meant to be invested in.
2017-07-23 22:22:50 -04:00
Thomas Harte
ace8e30818
Bubbled the Z80's move into clock receiver territory up into the Z80 test machine.
2017-07-23 22:21:39 -04:00
Thomas Harte
ec3aa06caf
Removed dangling reference.
2017-07-23 22:16:00 -04:00
Thomas Harte
ba088e5545
Adapted the Z80 into a clock receiver, which also vends Cycles rather than a raw int within its PartialMachineCycle struct. The objective is to update it to vend HalfCycles within its struct, but I think I need to do some work on cycle/half-cycle arithmetic first.
2017-07-23 22:15:04 -04:00
Thomas Harte
8a0b0cb3d7
Extended both classes to allow copy assignment, copy construction and implicit zero-length construction.
2017-07-23 22:13:41 -04:00
Thomas Harte
6369138bd1
Converted the Oric's video output into a ClockReceiver.
2017-07-22 23:11:30 -04:00
Thomas Harte
c2a7dffa7d
Converted the ZX80/81 video component into a ClockReceiver. As it happens, it's most convenient to take the half-cycle bus here.
2017-07-22 23:02:28 -04:00
Thomas Harte
b0c2325adc
Corrected run call, and accepted that jam handling is gone forever.
2017-07-22 22:21:26 -04:00
Thomas Harte
2ff157cf7a
Switched CRTMachine over to use Cycles as an explicit statement of units, and followed through on the effects of that.
2017-07-22 22:17:29 -04:00
Thomas Harte
83628b285b
Experimentally turned the 6502 into a clock receiver. No problem encountered.
2017-07-22 21:52:21 -04:00
Thomas Harte
1ba3f262a2
Sketched out a template for clock-receiving components to allow them to be implemented in terms of either half or whole cycles.
2017-07-22 21:46:50 -04:00
Thomas Harte
97334e10af
Merge pull request #157 from TomHarte/Documentation
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Brings some minor documentation improvements
2017-07-22 17:40:44 -04:00
Thomas Harte
31b4f8fa31
Added an expository TODO.
2017-07-22 17:40:06 -04:00
Thomas Harte
1bbb4cb478
Increased documentation.
2017-07-22 17:39:51 -04:00
Thomas Harte
d46da6ac9d
Added documentation.
2017-07-22 17:31:12 -04:00
Thomas Harte
825b38850e
Removes non-idiomatic line break.
2017-07-22 17:30:58 -04:00
Thomas Harte
8755824c64
Added some documentation.
2017-07-22 17:25:53 -04:00
Thomas Harte
4ea835e50b
Added test for EX (SP), rp, which passes.
2017-07-22 17:17:32 -04:00
Thomas Harte
5fddbec132
Merge branch 'master' into Memptr
2017-07-22 17:06:22 -04:00
Thomas Harte
b3d3fd70aa
Merge pull request #156 from TomHarte/P81
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Adds support for the P81 file format
2017-07-22 16:03:38 -04:00
Thomas Harte
6633537fb8
Discovering that there is such a thing as P81 — a ZX81 file without the name omitted — added support for it. Extended FileHolder while I was here to retain the file name and be able to supply its extension, as my quick-fix test-the-last-character approach to o/p/80/81 discrimination stops working with p81 thrown into the mix and this feels like the correct factoring.
2017-07-22 16:02:25 -04:00
Thomas Harte
4dec9716c4
Merge pull request #155 from TomHarte/MissingByte
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Corrects infrastructure that led to the final bit of a ZX80 or ZX81 tape never exiting the parser
2017-07-22 15:43:50 -04:00
Thomas Harte
313b36944f
Ensured that the final bit of a tape isn't dropped even if the tape ends exactly after it, by not posting a false pulse, being less restrictive about what can cap a bit, and in any case using a long gap as the end-of-file bookend.
2017-07-22 15:41:33 -04:00
Thomas Harte
456fdda6c2
Ensured that the mark_end step can't overwrite another recognised symbol.
2017-07-22 15:40:22 -04:00
Thomas Harte
6437c43147
Added CPI and CPD tests: at last two that pass without requiring implementation changes!
2017-07-22 12:38:18 -04:00
Thomas Harte
5928a24803
Transcribed missing tests as TODOs.
2017-07-22 11:44:17 -04:00
Thomas Harte
20a6bcc676
Added tests for the various LD (nn), rr instructions and corrected implementation to pass.
2017-07-22 11:39:13 -04:00
Thomas Harte
eaf313b0f6
Added a test on LD A, (DE) and LD A, (BC), and adjusted implementation to pass.
2017-07-22 11:20:21 -04:00
Thomas Harte
d51b66c204
Expanded test to hit all 65536 possibilities (and not to allocate a fresh Z80 test machine each time, as that's unnecessary and slow), and fixed implementation to pass test.
2017-07-21 23:01:35 -04:00
Thomas Harte
660f0e4c40
Added Objective-C through wiring and a Swift test class for Memptr modifications. So far with a single test, that fails.
2017-07-21 22:52:25 -04:00
Thomas Harte
540a03f75c
Exposed the memptr register.
2017-07-21 22:31:42 -04:00
Thomas Harte
a6b239698c
Merge pull request #153 from TomHarte/StricterWarnings
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Enabled stricter compiler warnings
2017-07-21 22:28:55 -04:00
Thomas Harte
92d1dd9a4a
Attempts to eliminate all remaining type variations.
2017-07-21 21:54:05 -04:00
Thomas Harte
45ec5f8eab
Eliminated implicit sign conversion.
2017-07-21 21:53:27 -04:00
Thomas Harte
1d01acce06
Fixed differing types of loop variables and targets.
2017-07-21 21:53:05 -04:00
Thomas Harte
be750ee427
Eliminated all dangling implicit signedness conversions.
2017-07-21 21:52:37 -04:00
Thomas Harte
dddb30477b
Used a different inner-loop variable, for clarity.
2017-07-21 21:52:08 -04:00
Thomas Harte
37459a3ebc
Fixed parameter shadowing.
2017-07-21 21:51:18 -04:00
Thomas Harte
449c33ee8b
Signedness fixes.
2017-07-21 21:28:04 -04:00
Thomas Harte
2b5d0877a8
Adjusted parameter name to match documentation. I think it's a carry-over from before I was passing the whole event along.
2017-07-21 21:27:50 -04:00
Thomas Harte
6d5807ec4b
Fixed sign and ensured that the DataFromString implementation is of the thing declared in the header.
2017-07-21 21:24:28 -04:00
Thomas Harte
64865b3f41
Signedness fixes.
2017-07-21 21:23:34 -04:00
Thomas Harte
53f0e1896b
Made delay_time_ unsigned for safe comparison.
2017-07-21 21:21:23 -04:00
Thomas Harte
aaa60dab12
Fixed signedness of index.
2017-07-21 21:21:01 -04:00
Thomas Harte
9b72c445a7
Fixed indexing type.
2017-07-21 21:19:46 -04:00
Thomas Harte
3f609e17b3
Factored out the table-lookup approach to being a typer, and adjusted so as definitely to limit myself to positive offset table lookups.
2017-07-21 21:18:51 -04:00
Thomas Harte
ef03c84b21
More definitively removed the old sample-offset blending approach to filtering.
2017-07-21 20:58:55 -04:00
Thomas Harte
163c0f1b44
Ensured offset means exactly one thing.
2017-07-21 20:58:17 -04:00
Thomas Harte
807e1d36d5
Resolved signedness mismatch.
2017-07-21 20:57:48 -04:00
Thomas Harte
5545cc8bab
Merge branch 'master' into StricterWarnings
2017-07-21 20:47:28 -04:00
Thomas Harte
d6e60c8e3a
Merge pull request #151 from TomHarte/TZX
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Adds partial TZX file format support
2017-07-21 20:47:08 -04:00
Thomas Harte
2d8e7e9f8b
Removed reference to a parameter long-since dead.
2017-07-21 20:46:25 -04:00
Thomas Harte
5b4c5b0cbf
Avoided having two different variables named next_output_run.
2017-07-21 20:46:08 -04:00
Thomas Harte
2471ef805b
Fixed signed/unsigned comparison and potential negative table reference.
2017-07-21 20:45:49 -04:00
Thomas Harte
2a7fc86b15
Enabled stricter warnings.
2017-07-21 20:44:35 -04:00
Thomas Harte
3c8bf52fb8
Believing my 64kb memory map not currently to work, temporarily disabled reference to it in the static analyser.
2017-07-21 20:43:56 -04:00
Thomas Harte
a026998682
Marginally optimised set_offset to avoid resets when possible.
2017-07-21 20:43:20 -04:00
Thomas Harte
06ea81fdb2
Made sure that unrecognised waves don't block the symbol queue, and allowed any type of nonsense to be skipped before finding a byte.
2017-07-21 20:23:26 -04:00
Thomas Harte
d69b1e2d11
Switched parsing logic to looking only for upward zero crossings, that being my new understanding of the ROM.
2017-07-21 19:39:38 -04:00
Thomas Harte
a3e0024980
Chopped time accumulation out of the default Tape process because it's proving to be sufficiently expensive for a TZX as not to be worthwhile. Introduced a cheaper position capturing/restoring method.
2017-07-21 18:55:03 -04:00
Thomas Harte
d9a2c32aca
Made an attempt to obey the proper TZX rules on gaps, and to hit the common-clock-rate Time optimisation.
2017-07-21 18:21:12 -04:00
Thomas Harte
e152ed2e61
Made an attempt to avoid GCD costs when accumulating Times with a common clock rate (/divisor).
2017-07-21 18:20:27 -04:00
Thomas Harte
9e975a46a2
Mildly simplified syntax.
2017-07-21 18:18:45 -04:00
Thomas Harte
70af075012
Determined what appears to be an appropriate workaround for the ZX81 TZX that I've managed to obtain.
2017-07-19 21:28:33 -04:00
Thomas Harte
44e5a03cf2
Removed just-don't-power-the-tape approach to pausing and playing, in favour of being fully communicative.
2017-07-19 19:21:27 -04:00
Thomas Harte
c8cee88e33
Ensured that a stopped tape outputs a false level and took an extra safety check in instantiation.
2017-07-18 22:49:11 -04:00
Thomas Harte
35296017b5
Clarified meaning of is_high_ flag and ensured it is honoured properly.
2017-07-17 21:36:05 -04:00
Thomas Harte
130d598ec9
Corrected some minor out-of-style breaks, and ensured that the name of ZX81 files is returned.
2017-07-17 19:52:54 -04:00
Thomas Harte
0350925c1e
Started sketching out greater support. Mostly TODOs right now, but pulse sequence and pure tone are implemented. I probably also need at least the CSW block to hit everything you might see in a ZX80 or ZX81 tape. Then I can worry about the rest when I have a way to test them.
2017-07-17 19:38:15 -04:00
Thomas Harte
94e3dd0d4f
Merge branch 'master' into TZX
2017-07-17 19:07:05 -04:00
Thomas Harte
5d44422230
Merge pull request #152 from TomHarte/CSWLength
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Corrects a false assumption about decompressed CSW size
2017-07-17 19:06:43 -04:00
Thomas Harte
eafdd7dbd7
Corrected decompressed size expectations: it may be up to five times the size of the number of waves, as waves are up to five bytes in length.
2017-07-17 19:04:25 -04:00
Thomas Harte
127b584e79
Ensured that resetting a TZX resets the is-at-end flag.
2017-07-17 07:52:28 -04:00
Thomas Harte
2179edc7fe
Adjusted to allow the very first thing found to be data, and ensured that unrecognised symbols break files just as gaps do.
2017-07-17 07:43:47 -04:00
Thomas Harte
9108495586
Added a safety seek.
2017-07-17 07:35:53 -04:00
Thomas Harte
fa617eac6b
Spotted that pilot and data segments have different encodings — of course! — and attempted to adapt.
2017-07-17 07:34:10 -04:00
Thomas Harte
b63971caf7
Took a first, incorrect, shot at TZX chunk 0x19, the generalised data block.
2017-07-16 22:40:38 -04:00
Thomas Harte
7327da6350
Switched the nascent TZX to use the new PulseQueuedTape.
2017-07-16 22:06:56 -04:00
Thomas Harte
8f72fc4a44
Factored out from the UEF implementation the concept of being a tape that has a queue of pending pulses and manages that queue.
2017-07-16 22:04:40 -04:00
Thomas Harte
238348c885
Performed the initial wiring to announce that this application supports TZX files and to route them to the ZX80/81 static analyser. The TZX class itself does not yet do much beyond basic validation. I think it'll be easiest if it follows in UEF's footsteps in queuing up pulses ahead of time, so some factoring out is now required.
2017-07-16 21:33:11 -04:00
Thomas Harte
7b5f93510b
Fixed the DigitalPhaseLockedLoopBridge bridge, once again fixing tests.
2017-07-16 20:55:57 -04:00
Thomas Harte
b3861ff755
Reduced copying of Pulses.
2017-07-16 19:49:31 -04:00
Thomas Harte
5a6b7219b9
Merge pull request #150 from TomHarte/PLLParsing
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Introduces PLL-driven tape parsing of Acorn tapes
2017-07-16 19:28:51 -04:00
Thomas Harte
c2bc34fd87
Eliminated the PLLParser class. I think the proper abstraction if and when another machine requires PLL-esque parsing is probably to template out the Acorn wiring of a PLL to a Parser, and/or generalise the Acorn shifter. It'll be easier to decide when the time comes.
2017-07-16 19:25:26 -04:00
Thomas Harte
1d3ae31755
Abstracted the concept of an Acorn shifter away from being a PLLParser. The Acorn tape parser now skips using that class and uses the shifter. The actual Electron also uses the shifter. So the two are completely aligned. Net result: the Electron should successfully load exactly when static analysis was successful.
2017-07-16 19:24:01 -04:00
Thomas Harte
8ddd686049
Removed redundant variable.
2017-07-16 19:04:03 -04:00
Thomas Harte
e5188a60dc
Settled on the new average-of-length approach to a PLL window sizing, eliminating the old errors-of-phase approach. Since it anchors automatically to the original target clocks per bit, killed the explicit mention of a tolerance.
2017-07-16 19:03:50 -04:00
Thomas Harte
e71d13c090
With the new PLL implementation, switching to a deeper window size returns the Acorn tape parser to: working.
2017-07-16 17:12:12 -04:00
Thomas Harte
ba83dfd454
Merge branch 'master' into PLLParsing
2017-07-16 17:01:00 -04:00
Thomas Harte
2fb0aea990
Updated the C1540 test vessel to the new world.
2017-07-16 17:00:39 -04:00
Thomas Harte
51177e4e1f
Attempted a different implementation of the PLL, that responds to changes only once.
2017-07-16 16:49:04 -04:00
Thomas Harte
004d6da9fb
Merge branch 'master' into PLLParsing
2017-07-16 15:03:13 -04:00
Thomas Harte
561373e793
Merge pull request #149 from TomHarte/BetterVectors
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Corrects some long-standing unnecessarily convoluted ways to handle semi-dynamic arrays
2017-07-16 15:02:52 -04:00
Thomas Harte
279f4760d7
Eliminated buffer_size_ as something explicitly stored, and reduced size of delegate call out.
2017-07-16 15:01:39 -04:00
Thomas Harte
f931cd582d
Switched to use of std::vector in those few remaining places where I was still using a unique_ptr to a native type and newing for myself. So, some of my earliest bits of code.
2017-07-16 13:54:07 -04:00
Thomas Harte
ab51bc443b
Eliminated foolish double indirection on phase history.
2017-07-16 13:39:41 -04:00
Thomas Harte
c8575fe6e0
Mild clean ups, and a tweak to permitted top and bottom phase.
2017-07-16 13:39:08 -04:00
Thomas Harte
4489f120f9
Eliminated foolish double indirection on phase history.
2017-07-15 22:40:38 -04:00
Thomas Harte
253f9603ed
Split the normal tape parser class into two in order to add a new option: a PLL-driven tape parser. Decided to see what happens if I attempt to use that to parse CSW Acorn data.
2017-07-15 19:07:35 -04:00
Thomas Harte
6ca712b498
Merge pull request #148 from TomHarte/CSW
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Adds support for the CSW file format
2017-07-15 15:33:05 -04:00
Thomas Harte
b743566339
Corrected under-request of data: was erroneously supplying the size of input as the expected size of output.
2017-07-15 15:19:03 -04:00
Thomas Harte
481487f084
Oh yuck, it looks like I've repeated this same test in two different places. Must figure out where to factor it out to. But in the meantime, the emulated Electron has just loaded its first CSW.
2017-07-13 22:39:30 -04:00
Thomas Harte
fc8313430a
Added an early exit if what was read as a header turns out pretty much certainly not to be a header.
2017-07-13 21:26:45 -04:00
Thomas Harte
648618d280
Tweaked bit timing decision.
2017-07-13 21:26:05 -04:00
Thomas Harte
ae1a130843
Fixed: length of 0 is a special case.
2017-07-13 20:57:27 -04:00
Thomas Harte
33d16ae0cd
Fixes: individual static analysers reset tapes, for potential successors. The ZX81 file analyser no longer overruns its buffer upon receiving a file that is shorter than 11 bytes.
2017-07-12 21:34:08 -04:00
Thomas Harte
f09fe30af5
Attempted a full implementation of CSW. All in memory for now.
2017-07-12 21:23:59 -04:00
Thomas Harte
33eadb5549
Started taking further steps towards CSW support; reading the ZLib documentation is next.
2017-07-11 22:41:10 -04:00
Thomas Harte
368bff1a82
Added a shell class that will one day be able to parse CSW files, plus the logic and metadata to instantiate it when a CSW presents itself.
2017-07-10 21:43:58 -04:00
Thomas Harte
d853841dd5
Further lightened up my file-is-ZX81 check.
2017-07-10 20:44:13 -04:00
Thomas Harte
eacaafeb48
Merge pull request #147 from TomHarte/ZX8081Typer
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Introduces preliminary `Typer` support for the ZX80 and ZX81
2017-07-09 22:30:30 -04:00
Thomas Harte
ac59dd8b1d
Added enough typing to issue a load command. No thoughts as to running yet though.
2017-07-09 22:07:12 -04:00
Thomas Harte
353c854734
Removed a TODO that is no longer appropriate.
2017-07-09 22:06:50 -04:00
Thomas Harte
3e5c209039
Added basic Typer support for the ZX80 and '81.
2017-07-09 22:00:34 -04:00
Thomas Harte
f56d96267e
Merge pull request #146 from TomHarte/MSCrash
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Corrects accounting errors in ZX80/81 video
2017-07-09 20:09:44 -04:00
Thomas Harte
ed28260aaf
Hardens the ZX80/81 video routines to ensure they never try to push data into the future and don't double-count time when pixels would ostensibly run into sync. You could previously see the CRT being handed negative run lengths if sync interrupted pixels or if a run of more than 320 pixels (my arbitrary buffer size) occurred, with corresponding poor behaviour given my use of unsigned numbers.
2017-07-09 19:33:05 -04:00
Thomas Harte
8ccec37a4b
Eliminated a further potential cause of texture/geometry mismatch: the texture retain succeeded but then there wasn't room for geometry.
2017-07-09 19:11:38 -04:00
Thomas Harte
646622b99e
Merge pull request #145 from TomHarte/RandomNoise
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Eliminates occasional on-screen noise
2017-07-09 17:59:16 -04:00
Thomas Harte
a25c2fd6b5
Got more explicit about what the thinking is here re: multiple sources of action.
2017-07-09 17:54:26 -04:00
Thomas Harte
ee1a9a4781
Eliminates attempts cleverly to shuffle unsubmitted runs, because no mechanism exists to stop them overwriting previously-submitted-but-not-yet-flushed runs. Which implies that the buffer must be fully circular. The cost of which is sometimes having to make two calls to glTexSubImage2D. Also added some TODOs, and a means for reporting when a retain_latest is ineffective, in which situation it would be inappropriate to attempt to generate correlated geometry
2017-07-09 17:50:22 -04:00
Thomas Harte
a0367d6669
Merge pull request #144 from TomHarte/HiRes
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Corrects various ZX80/81 video deficiencies
2017-07-09 17:17:16 -04:00
Thomas Harte
87658e83c1
Moved line counter reset logic; I think this is actually correct.
2017-07-09 00:05:30 -04:00
Thomas Harte
4509c3ce34
By observation, it appears that disabling vsync occurs on any port output whatsoever, as long as NMI isn't blocking it.
2017-07-08 21:01:52 -04:00
Thomas Harte
30e93979d2
Removed data work if sync is enabled; in that case no data is output.
2017-07-08 21:01:07 -04:00
Thomas Harte
d6b87053bf
Introduced an explicit record of whether a video byte is latched. It's definitely incorrect to treat the latching of 0 as equivalent to no latching, as the byte that will eventually become video is not strongly implied.
2017-07-08 20:40:19 -04:00
Thomas Harte
22389a5d2d
Merge branch 'master' into HiRes
2017-07-08 20:38:25 -04:00
Thomas Harte
37696532c2
Merge pull request #143 from TomHarte/MotorControl
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Introduces both manual and automatic tape control for the ZX80 and 81
2017-07-08 19:34:40 -04:00
Thomas Harte
54efcb7e2f
Made a game attempt at automatic motor control and ensured setting is initialised correctly from the user defaults.
2017-07-08 19:31:20 -04:00
Thomas Harte
bcb7c27cc4
Given that I'm not racing this any more, turned the intended 1 second back into 1 second.
2017-07-08 19:21:33 -04:00
Thomas Harte
e2575d6de4
Routed tape motor selections through to the C++ side of the world, and ensured that manual tape playback works properly.
2017-07-08 19:21:12 -04:00
Thomas Harte
23e989e170
This will likely do for the Swift/XIB side of things: the play/pause button is enabled or disabled as per the user's choice of automatic tape control, and toggles function when pressed. It communicates activity down to the Objective-C[++] layer, giving it a route through to the actual machine.
2017-07-08 19:12:06 -04:00
Thomas Harte
28412150e6
Added controls for controlling the tape motor of the ZX80/81, assuming I can find an automatic option.
2017-07-08 17:59:33 -04:00
Thomas Harte
6d941b0c1f
Merge pull request #142 from TomHarte/BufferOverflow
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Corrects a source of potential desynchronisation between the texture and geometry builders
2017-07-08 16:54:41 -04:00
Thomas Harte
2f90f35478
Ensured the same write area can be submitted multiple times — this is actively used if a run of data overlaps a flywheel-suggested sync. Which nullifies the idea of not having a write area in the barrel, at least as soon as any one has been allocated.
2017-07-07 23:37:44 -04:00
Thomas Harte
12f7e1b804
Enshrined a default colour burst amplitude. Which now everybody relies on. The 102 figure is derived from the burst apparently being 40 IRE.
2017-07-07 23:35:14 -04:00
Thomas Harte
c7fa2ed11a
It makes more sense not to retain the previous texture builder run until vertex storage is confirmed.
2017-07-07 23:21:25 -04:00
Thomas Harte
bfbe12b94b
Made an attempt further to tie geometry and texture generation fully together, removing the assumption that the caller will achieve one-to-one calling.
2017-07-07 22:25:05 -04:00
Thomas Harte
7476c64a66
Merge branch 'master' into BufferOverflow
2017-07-07 21:11:07 -04:00
Thomas Harte
46fff8e8a2
Ensured bit 8 is uniquely from the latched video byte, not an OR of that with the refresh address.
2017-07-06 22:48:48 -04:00
Thomas Harte
cd646aab9e
Merge pull request #141 from TomHarte/ZX81FastLoading
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Corrects ZX81 fast loading
2017-07-06 22:39:19 -04:00
Thomas Harte
a3684545b5
Added a block on the tape motor for a short period after each time the ROM routine is intercepted for a substituted byte read. To reduce the collision between fast tape and real tape loading.
2017-07-06 22:33:54 -04:00
Thomas Harte
2f42874fd3
Another fix to deal with real-time fighting: allow 8 and 18 pulses to be recognised as 1s and 0s. That's because the hand-off from ROM routines to parsing may occur very shortly before the first pulse of a valid sequence, making it look like there's a ghost. A cleaner solution needs to be found, probably revolving around allowing parsers to be attached to tapes and therefore to run constantly.
2017-07-06 22:33:03 -04:00
Thomas Harte
84d0e9b4cd
Accept a pulse that begins exactly on seek_time as being found while seeking.
2017-07-06 22:31:45 -04:00
Thomas Harte
a53011f778
Extended intro and outro length because right now I'm racing this myself. Can return to normal once tape motor control is implemented.
2017-07-06 22:31:12 -04:00
Thomas Harte
b842c5b8bb
Merge branch 'master' into ZX81FastLoading
2017-07-06 22:03:24 -04:00
Thomas Harte
ab1374f801
Added an assert on an assumed buffer size alignment.
2017-07-06 21:46:24 -04:00
Thomas Harte
a5359027f0
Merge pull request #140 from TomHarte/ColourSuppression
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Causes the CRT to react properly to absence of a colour burst
2017-07-06 21:42:02 -04:00
Thomas Harte
43951a36eb
Merge branch 'master' into ColourSuppression
2017-07-06 21:40:42 -04:00
Thomas Harte
55df96491c
Merge pull request #139 from TomHarte/TyperFixes
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Corrects a potential invalid memory dereference in the default typer implementation
2017-07-06 21:40:15 -04:00
Thomas Harte
0c037627fc
Typer fixes: the recipient no longer releases the caller, and a duplicate call to strlen and piece of arithmetic is corrected.
2017-07-06 21:38:56 -04:00
Thomas Harte
344d267fd2
Introduced sharper chrominance for genuinely black-and-white signals.
2017-07-06 21:38:33 -04:00
Thomas Harte
4211389ac7
Connected machine-supplied colour burst amplitude to shader, discarding hard-coded value. Net effect: the colour component is now discarded for the ZX80 and 81.
2017-07-06 21:29:08 -04:00
Thomas Harte
c6d00ec7d1
Switched phase and amplitude varying to a 3d vector; the third component is 1/amplitude if amplitude is non-zero, and zero otherwise. So you can multiply by that to get chrominance, rather than dividing by amplitude. With the direct effect that detected chrominance should automatically be zero if the colour burst didn't exist (i.e. had zero amplitude).
2017-07-06 21:25:38 -04:00
Thomas Harte
212ae60622
Typer fixes: the recipient no longer releases the caller, and a duplicate call to strlen and piece of arithmetic is corrected.
2017-07-06 21:17:04 -04:00
Thomas Harte
a72a2e0a1a
Ensured tape doesn't proceed of its own volition when in fast-loading mode.
2017-06-23 20:21:37 -04:00
Thomas Harte
50375fb373
Ensured tape position is unaffected if the attempt at loading quickly fails.
2017-06-23 20:18:19 -04:00
Thomas Harte
2d02c23574
Merge pull request #138 from TomHarte/ZX81Ports
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Increases port decoding on the ZX81
2017-06-23 08:32:21 -04:00
Thomas Harte
cb105fdeb4
Took a first stab at high-res support.
2017-06-22 22:48:17 -04:00
Thomas Harte
acfd4dde36
Reduced port writes which can adjust programmatic sync, and prevented anything while NMI generation is active. Moved line counter increment from triggered by interrupt acknowledge to triggered by horizontal sync. In both cases, cribbing from my own earlier work. Initial results suggest that sync issues are resolved in third-party software.
2017-06-22 22:44:06 -04:00
Thomas Harte
919fc48cc5
Fixed dumb out-of-bounds access error.
2017-06-22 22:28:50 -04:00
Thomas Harte
aec4fd066b
I think I've definitively decided against this model of timing.
2017-06-22 21:32:14 -04:00
Thomas Harte
73c7b18900
Added a public declaration of ZX80/81 support to the readme.
2017-06-22 21:14:43 -04:00
Thomas Harte
3dfe45d225
Merge pull request #137 from TomHarte/NMIWaitTest
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Introduces an NMI/wait interrupt timing test
2017-06-22 21:11:54 -04:00
Thomas Harte
95a6b0f85c
Introduced an NMI/wait interrupt timing test, and adjusted the Z80 to conform to information posted by Wilf Rigter.
2017-06-22 21:09:26 -04:00
Thomas Harte
87ee8450fe
Minor rejig: it's much more likely that something that can't be distinguished is a ZX81 program. TODO: some sort of BASIC token parsing, to be more confident.
2017-06-22 20:23:14 -04:00
Thomas Harte
f2a6bcf2a8
Merge pull request #136 from TomHarte/ZX8081Options
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Finally adjusts ZX80/81 tape loading so that the fast loading hack is optional as per the GUI
2017-06-22 20:21:28 -04:00
Thomas Harte
644ef13acd
Connected up the fast-tape GUI option for the ZX80 and '81.
2017-06-22 20:20:31 -04:00
Thomas Harte
342574761f
Merge pull request #135 from TomHarte/InterruptWaitStates
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Ensures wait states are observed during interrupt response
2017-06-22 20:15:54 -04:00
Thomas Harte
b7c978e078
Added getters for most of the input lines, and attempted to round out the ZX81's wait logic.
2017-06-22 20:11:19 -04:00
Thomas Harte
f0398a6db8
Added wait state hooks to the interrupt programs, and added an is_wait query on PartialMachineCycle.
2017-06-22 20:07:47 -04:00
Thomas Harte
f3b1ef99cc
Merge pull request #134 from TomHarte/BinaryTape
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Switches the binary tape player to low = false, high = true
2017-06-21 22:25:42 -04:00
Thomas Harte
52d9ddf9e5
Gave the binary tape player a more logical assignment of wave level to output level. Which miraculously appears to have been the issue with the ZX80/81 tape loading — the inconsistency of silences seems to have been the issue.
2017-06-21 22:13:24 -04:00
Thomas Harte
93f251dbcd
Merge pull request #133 from TomHarte/ZX81Wait
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Utilises the newly-working wait line in ZX81 emulation
2017-06-21 21:46:08 -04:00
Thomas Harte
a6810fc3ef
Removed some minor duplicity and ensured that hsync/NMI ends on the nominated cycle, not one afterwards.
2017-06-21 21:44:42 -04:00
Thomas Harte
15f6c51062
Added the most trivial implementation of the ZX81 wait line.
2017-06-21 21:28:14 -04:00
Thomas Harte
5e21c706f3
Merge pull request #132 from TomHarte/MachineCycles
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Subdivides the Z80's machine cycles
2017-06-21 21:19:48 -04:00
Thomas Harte
e1355d4b62
Restored proper video output.
2017-06-21 21:18:09 -04:00
Thomas Harte
7eeac3b586
Switched R back to incrementing after the refresh cycle. It had snuck to before by virtue of subdivision of the M1 cycle. Which shortened the ZX80 line time, breaking synchronisation.
2017-06-21 21:11:00 -04:00
Thomas Harte
4bf13610ce
Reinstated interrupts by moving the refresh test back into the refresh cycle.
2017-06-21 21:03:39 -04:00
Thomas Harte
0e0ce379b4
Renamed MachineCycle to PartialMachineCycle given that it mostly no longer intends to describe an entire machine cycle.
2017-06-21 20:38:08 -04:00
Thomas Harte
36e8a11505
Sought to simplify the way partial machine cycles are communicated, for ease of machine implementation. Also implemented the wait line.
2017-06-21 20:32:08 -04:00
Thomas Harte
45f442ea63
Corrected interrupt mode 2: was both failing properly to load the vector address, and failing to read from it.
2017-06-21 19:08:48 -04:00
Thomas Harte
db743c90d8
Had neglected to count refresh time in my interrupt programs. Corrected. Mode 0 timing test succeeds again. Only Mode 2 is now at fault.
2017-06-21 18:58:44 -04:00
Thomas Harte
10cc94f581
Attempted to fix interrupt response timing; ensured initial interrupt mode is one that won't jump beyond the interrupt response program table's length, and that the conditionals other than CALL definitely have no alternative program attached.
2017-06-21 18:47:00 -04:00
Thomas Harte
108da64562
Fixed LD H, (HL) and LD L, (HL) by ensuring that whatever the subclass does goes to a temporary place before updating the address. Corrected the LD (IX+d), n machine cycle test for my new best-guess timing. This should leave only interrupt timing as currently amiss.
2017-06-20 22:25:00 -04:00
Thomas Harte
f85b46286e
Resolved the timing disparity between LD (HL),n and LD (IX+d), n, hopefully having come up with a convincing theory of timing for the latter.
2017-06-20 22:20:58 -04:00
Thomas Harte
184b371649
Attempted to get to 'proper' timing for LD (IX+d),n, albeit that proper is a guess.
2017-06-20 21:48:50 -04:00
Thomas Harte
b0375bb037
Fixed the three LD rr, (nn) operations. Back down to four FUSE failures.
2017-06-20 21:32:23 -04:00
Thomas Harte
48942848e7
Fixed (Ix+d) read timing. I've put an extra wait cycle into the read, so no need to extend the refresh.
2017-06-20 21:15:56 -04:00
Thomas Harte
27ac342928
Corrected conditional call timing, and its test.
2017-06-20 20:57:23 -04:00
Thomas Harte
25aba16ef8
Quickly checking the FUSE tests, corrected a handful of instances where PC should be modified but isn't, correcting around 800 new failures.
2017-06-19 22:20:23 -04:00
Thomas Harte
a0d0f383c8
Corrected unconditional CALL timing. Conditional's going to require more work because once the wait state is put into the right place, it breaks the assumption under which the Z80 handles conditions — that they're either do something or else do nothing. So that can wait a day.
2017-06-19 22:07:36 -04:00
Thomas Harte
6752f165db
Added failing tests for both kinds of CALL.
2017-06-19 22:03:29 -04:00
Thomas Harte
e05076b258
Added tests for everything except CALL. All passing.
2017-06-19 22:00:04 -04:00
Thomas Harte
fadbfdf801
Added DJNZ test.
2017-06-19 21:31:56 -04:00
Thomas Harte
cb277b8d1e
Added JP and JR tests.
2017-06-19 21:27:23 -04:00
Thomas Harte
234f14dbbe
Tests were at fault; all passing now.
2017-06-19 21:14:40 -04:00
Thomas Harte
99ede3a9ef
BIT/SET (IX+d) were incorrectly encoded. Hence fixed BIT (IX+d).
2017-06-19 21:04:14 -04:00
Thomas Harte
378233f53d
Extended to BITs and SETs, accruing three new failures.
2017-06-19 21:01:30 -04:00
Thomas Harte
f903408980
Caught up on comments.
2017-06-19 20:53:22 -04:00
Thomas Harte
cc8f316941
Resolved read-modify-write (IX+d) timing, and therefore RLC (IX+d).
2017-06-19 20:51:28 -04:00
Thomas Harte
b684254908
Introduced further tests down to a failing attempt at RLC (IX+d). Made an initial attempt to fix, failed.
2017-06-19 20:33:34 -04:00
Thomas Harte
351d90ca55
Added tests down to INC IX. No additional failures yet, though I've yet to reach conditional CALL.
2017-06-19 20:04:55 -04:00
Thomas Harte
23177df26a
Added various tests of the basic ALU ops.
2017-06-19 19:53:26 -04:00
Thomas Harte
ba15371948
Introduced timing tests for LDI[R] and CPI[R], fixing a latent issue in the rejig of LD BC, nn while I'm here.
2017-06-19 19:47:00 -04:00
Thomas Harte
73dbaebbc1
Fixed timing of EX (SP), HL/IX.
2017-06-19 19:25:53 -04:00
Thomas Harte
8d60734737
Added tests for EXX, EX (SP), HL and EX (SP), IX. The latter two currently being incorrect.
2017-06-19 19:17:54 -04:00
Thomas Harte
002098d496
The final two tests were at fault — expecting POPs to write rather than read. Fixed, so the subset of timing tests as-yet implemented now passes. Which means it's time to slog through further tests.
2017-06-19 07:45:41 -04:00
Thomas Harte
e3244eb68e
Rephrased internal operation machine cycles as having only an end. So they're now easy to count. Hence the test machine spots them, and a couple more of the current timing subset passes.
2017-06-19 07:39:46 -04:00
Thomas Harte
85c6fb1430
Explained refresh cycles to the all-RAM Z80.
2017-06-19 07:36:11 -04:00
Thomas Harte
54e4643396
Corrected non-default refresh cycle lengths. Reduces failures of the currently-tested timing subset from 10 to 4.
2017-06-19 07:34:23 -04:00
Thomas Harte
85c5c4405a
Ensured that wait states don't appear unless requested (TODO: requesting), and made the output of my timing tests a little easier to parse.
2017-06-19 07:30:01 -04:00
Thomas Harte
d668879ba6
Started trying to wade back to passing tests. Working on the new timing tests first, and focussing on getting the Objective-C test machine to compile bus operations into machine cycles, which means indicating phase to all-RAM delegates.
2017-06-18 22:03:13 -04:00
Thomas Harte
cb140aa06e
Managed to navigate back to building.
2017-06-18 21:00:44 -04:00
Thomas Harte
6a769d3953
Finally dipped below the 20 error threshold that the compiler tops out at.
2017-06-18 20:34:46 -04:00
Thomas Harte
3be8ffd826
Some correct timings have gone out the window for now, but only the final quarter of the base page now contains compiler errors.
2017-06-18 20:31:12 -04:00
Thomas Harte
bb910e14a4
Dealt with the CB page.
2017-06-18 18:01:33 -04:00
Thomas Harte
69ebbe019a
Completed ED page conversion. Rolling onwards...
2017-06-18 17:56:48 -04:00
Thomas Harte
0d39672d32
Fixing typos here and there, persuaded the first half of the ED table to compile.
2017-06-18 17:48:54 -04:00
Thomas Harte
0d1231980a
Advanced to getting specific warnings in the ed-page table. So that's progress.
2017-06-18 17:25:15 -04:00
Thomas Harte
82a015892b
Started adapting to the newly-segmented world.
2017-06-18 17:18:01 -04:00
Thomas Harte
194b7f60c5
Rephrased to allow non-conditional waits; expanded macros to cover all permitted lengths of read and write.
2017-06-18 17:08:50 -04:00
Thomas Harte
ebc7356db5
Reformulated the machine cycle slightly to support posting operation plus phase, thereby exposing the segue points at which waits might be inserted. So: to stick to the rule that CPUs expose the minimum amount of information sufficient completely to reconstruct bus activity. This breaks the Z80 for now.
2017-06-18 12:21:27 -04:00
Thomas Harte
e1a2580b2a
Renamed BusOperation to MachineCycle::Operation.
2017-06-17 21:53:45 -04:00
Thomas Harte
b6f51474ff
Ensured that -description can handle the newly-captured bus actions.
2017-06-17 18:20:30 -04:00
Thomas Harte
0f18768091
Disabled attempts at bus activity matching within the FUSE tests, at least until I settle on exactly what I intend to do.
2017-06-17 18:19:25 -04:00
Thomas Harte
efc7f9df37
Combined I and R into a register pair.
2017-06-17 18:18:28 -04:00
Thomas Harte
50cd617bd9
Ensured test raises only the intentional failure exceptions.
2017-06-15 22:33:46 -04:00
Thomas Harte
838b818cd3
Finished transcribing first page of machine cycle documentation; several failures contained.
2017-06-15 22:19:49 -04:00
Thomas Harte
cf795562bf
Continued filling in tests, fleshing out what the test machine captures as a result.
2017-06-15 20:59:59 -04:00
Thomas Harte
ac37424878
Set up a test class to allow me to discover which of the machine cycle sequences I'm in error on.
2017-06-15 19:06:59 -04:00
Thomas Harte
a336048c98
Merge branch 'ZX80FileFormats'
2017-06-15 18:33:42 -04:00
Thomas Harte
87496f9978
Merge pull request #131 from TomHarte/ZX80FileFormats
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Adds very preliminary emulation of the ZX80.
2017-06-15 18:32:38 -04:00
Thomas Harte
08a542a324
Reenabled the fast-loading hack.
2017-06-15 18:30:12 -04:00
Thomas Harte
9b3d05e05f
Simplified decoding logic.
2017-06-14 22:24:44 -04:00
Thomas Harte
d8e3103a2b
Fixes: switched ZX80 and ZX81 timing to the correct way around, ensured that my wait takes effect if HALT **isn't** set, and made sure to recover from it.
2017-06-13 21:48:17 -04:00
Thomas Harte
76a64d13a0
Made a first attempt at ZX81 emulation.
2017-06-13 21:25:55 -04:00
Thomas Harte
1e975859c2
Started splitting ZX80 and ZX81 paths. Also the '80 fires its horizontal sync a little earlier than the '81, so pulled that back a little.
2017-06-13 20:09:09 -04:00
Thomas Harte
4c5261bfa0
Made first attempt to use the horizontal counter for something; here for sync timing only, even though I've gone exclusively with '81-style timing for now.
2017-06-12 22:28:30 -04:00
Thomas Harte
aed2827e7b
Implemented a rudimentary way to test that instructions take as long as the FUSE tests think they should. Hence discovered that the (HL)-accessing BIT, RES and SET weren't. Corrected.
2017-06-12 22:22:00 -04:00
Thomas Harte
e6e6e4e62b
Adds an extra character for padding the ZX81 table.
2017-06-12 22:08:11 -04:00
Thomas Harte
8b09b4180b
This now at least remembers whether it is meant to be a ZX81 and has storage for a horizontal counter.
2017-06-12 21:33:16 -04:00
Thomas Harte
626737b9fa
Started mucking about with some string conversion routines. Not finished yet.
2017-06-12 21:32:36 -04:00
Thomas Harte
22de481557
Made an attempt to get .p/.80 checked and as far as the emulated machine.
2017-06-12 19:41:59 -04:00
Thomas Harte
b9dbb6bcf8
Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate.
2017-06-12 18:55:04 -04:00
Thomas Harte
a48616a138
Fixed reference to Swift-world MachineDocument for the ZX81 file type.
2017-06-12 18:51:11 -04:00
Thomas Harte
8222aac9e3
Added an official declaration of support for ZX81 files.
2017-06-11 21:40:41 -04:00
Thomas Harte
77aa3c187e
Rebranded ZX80O as ZX80O81P, with an eye to making it accept ZX81 .p files. Adjusted the initial selection part of the static analyser appropriately.
2017-06-11 21:38:32 -04:00
Thomas Harte
ee0283c985
Modified to use an in-memory buffer for file contents.
2017-06-11 21:35:09 -04:00
Thomas Harte
302c2e94de
Corrected lingering hard-coded mask. So titles for memory configurations above 1kb now load.
2017-06-11 21:27:46 -04:00
Thomas Harte
06fe07932a
While tidying up, killed an unused instance variable.
2017-06-11 21:21:26 -04:00
Thomas Harte
6913c7a018
This also can just use rom_mask_.
2017-06-11 19:29:20 -04:00
Thomas Harte
6b602c74b7
Made an attempt to support memory maps other than the unexpanded default of 1kb.
2017-06-11 19:29:02 -04:00
Thomas Harte
8116f85479
Allowed the static analyser to specify a ZX80 or 81, and a memory model. Neither is respected yet in the machine.
2017-06-11 19:12:20 -04:00
Thomas Harte
e40d553045
Bumped the tape parser up into the machine to ensure a maintained state. Temporarily disabled normally-timed tape playback.
2017-06-11 18:31:43 -04:00
Thomas Harte
2c6414ce11
Adjusted to allow inspect_waves to swallow a gap before a bit if necessary, increasing the opportunities for its call.
2017-06-11 18:31:09 -04:00
Thomas Harte
e5aea632ee
Updated curly bracket placement.
2017-06-11 17:29:22 -04:00
Thomas Harte
e5b30cdfbb
Attempted to ensure appropriate resumption of processing after quick-reading a tape byte.
2017-06-11 17:28:47 -04:00
Thomas Harte
ba5f34f827
Narrowed view to the centre 80% of a frame.
2017-06-11 17:24:32 -04:00
Thomas Harte
84d2feb2e6
Cleaned up and implemented fast-tape hack. I've decided it'd be better to test some other software, potentially to give multiple issues to think about, rather than sitting around with just the one.
2017-06-11 16:42:49 -04:00
Thomas Harte
d12e50eb02
Corrected "should I adjust history?" tests.
2017-06-11 16:41:34 -04:00
Thomas Harte
c2bc9a8c62
Ensured no namespace collision in double-include guards.
2017-06-11 16:41:15 -04:00
Thomas Harte
d910a4fd38
Adjusted to signal an interrupt during the refresh cycle rather than weirdly just afterwards. Which cuts video timing down by 4 cycles a line. There still might be a problem here somewhere though, as I'm getting 206 cycles/line and the internet states it should be 207.
...
Also: lots of printfs have grown temporarily as I try to figure out what I'm doing so wrong as to break loading.
2017-06-11 13:32:20 -04:00
Thomas Harte
db30f53ab0
Added the capacity to back-date interrupt line changes within a machine cycle, so that machines which time themselves entirely within perform_machine_cycle can still be cycle accurate on those changes.
2017-06-11 13:31:02 -04:00
Thomas Harte
50be3a24fe
Sought to ensure that Mode 1 interrupts aren't happening early. Which they seem not to be.
2017-06-11 13:30:08 -04:00
Thomas Harte
256ba4028b
Rejigged to eliminate semi-duplication of the is-a-file test.
2017-06-08 21:52:13 -04:00
Thomas Harte
b07af2660d
Adjusted to make sure that the very end of a tape is properly measured.
2017-06-08 21:33:35 -04:00
Thomas Harte
bc0d70b2f7
Added: a shout-out when the tape has been exhausted.
2017-06-08 21:32:27 -04:00
Thomas Harte
c6e48dfd56
Given that a final gap is semantically part of describing tape contents, ensured one formally appears before declaring that the tape has ended.
2017-06-08 21:31:54 -04:00
Thomas Harte
c775db50ef
Ensured no out-of-bounds accesses.
2017-06-08 21:31:03 -04:00
Thomas Harte
ee4c8b5ad2
Ensured final byte plays out.
2017-06-08 19:51:49 -04:00
Thomas Harte
d8b76e31c3
Added and improved the is-this-ZX80-stuff test. It seems some bytes are going missing in the to->from tape conversion.
2017-06-08 19:49:18 -04:00
Thomas Harte
7e10c7f9d8
Relocated the ZX80/81 concept of a 'file' out from Tape into Data, given that it's an exact duplicate of memory.
2017-06-08 19:09:51 -04:00
Thomas Harte
c47128f433
Widened tolerances and ensured zero bits aren't prematurely discarded.
2017-06-07 17:50:03 -04:00
Thomas Harte
8aab9acc10
Eliminated use of the zero level; now definitively returns a low/high input.
2017-06-07 17:39:29 -04:00
Thomas Harte
350b36df25
Wired in an attempted usage of the new tape parser.
2017-06-07 17:30:53 -04:00
Thomas Harte
dbd2944c13
Took an initial run at the ZX80/81 parser.
2017-06-07 17:27:05 -04:00
Thomas Harte
4603fa6f24
Extended explicitly to support a token of lookahead, which is pretty much what was on offer anyway. Also corrected instance variable names, as per better adoption of C++ norms.
2017-06-07 17:21:57 -04:00
Thomas Harte
60300851ea
Started sketching out a tape parser for ZX80 and '81 files. I think this'll help me to verify whether the .O input is working.
2017-06-07 10:12:13 -04:00
Thomas Harte
58312ea2b7
Updated to new standardisation on curly bracket placement.
2017-06-07 10:05:43 -04:00
Thomas Harte
cb534d8b85
Corrected comment.
2017-06-07 10:05:16 -04:00
Thomas Harte
5626d35bc4
Tried flipping the bit meaning; decided at least to leave it in full-byte form.
2017-06-06 18:38:05 -04:00
Thomas Harte
4677cebf40
Rejigged to correct: spaces go after bits, not after bytes.
2017-06-06 18:29:15 -04:00
Thomas Harte
7399f3d798
Caveman debugging in place, it looks like this file is returning nonsense.
2017-06-06 18:18:55 -04:00
Thomas Harte
faeecf7665
Made sure that there's nothing but silence at the end of the tape, even if the .O file is too long.
2017-06-06 18:16:47 -04:00
Thomas Harte
63e0802f4e
Ensured tape input appears on the returned value.
2017-06-06 18:16:27 -04:00
Thomas Harte
e3ee9604a5
Added comments.
2017-06-06 18:01:33 -04:00
Thomas Harte
8c66e1d99d
Factored out ZX80/81 video and rejigged to ensure it will keep ticking over irrespective of whether the machine is supplying data.
2017-06-06 17:53:23 -04:00
Thomas Harte
b55579c348
Fixed usage of flush: the subclass version is definitively used.
2017-06-06 17:52:44 -04:00
Thomas Harte
ca9e8aecd6
Made a seemingly unsuccessful attempt to add tape input.
2017-06-06 10:13:32 -04:00
Thomas Harte
cc4cb45e9d
Implemented keyboard input and ensured that the signal generated is marked as composite, putting the colour-suppression ball into the CRT's court.
2017-06-06 09:25:18 -04:00
Thomas Harte
ebbf6e6133
Surprisingly, I think this may actually be the correct output: stopped throwing away the I part of the refresh register and flipped black and white.
2017-06-06 09:03:09 -04:00
Thomas Harte
cba07dec7e
Doubled up to display all eight pixels. To confirm that they are the wrong pixels.
2017-06-06 08:59:00 -04:00
Thomas Harte
6f7037b2b1
Made an initial stab at outputting half the correct pixels.
2017-06-06 08:55:07 -04:00
Thomas Harte
ef4b2f963d
Probably more-or-less corrected. But this is all a bit too interdependent.
2017-06-05 23:52:56 -04:00
Thomas Harte
97f3ff03b6
Restored white background and attempted to correct output timing deficiencies. Incomplete success.
2017-06-05 23:50:04 -04:00
Thomas Harte
2fbc7a2869
Made a very basic attempt at getting something that at least demarcates proper graphics output.
2017-06-05 23:32:49 -04:00
Thomas Harte
4983718df7
Got to outputting something to the CRT. Should be just proper syncs and a paper background. It's not synchronising properly, so something is amiss in my timing.
2017-06-05 10:47:42 -04:00
Thomas Harte
23ca00fd9a
Added memory fuzzing as a way to verify state being written by the Z80. Eventually discovered the HALT problem as fixed in the last commit, so have stripped away the caveman stuff again.
2017-06-05 10:36:07 -04:00
Thomas Harte
3df6eba237
Fixed: my HALT line wasn't actually halting. NOPs followed, but the PC just kept counting.
2017-06-05 10:35:03 -04:00
Thomas Harte
893f61b490
Attempted specifically to reproduce the 1kb ZX80 memory map in the hope of getting compact lines and in case mirroring is why I'm getting completely empty video reads. Still no action.
2017-06-05 09:38:49 -04:00
Thomas Harte
e940e02126
Added a short circuit to set_interrupt_line, mostly to make breakpoints slightly more convenient to place.
2017-06-05 09:37:19 -04:00
Thomas Harte
7e3a46c33e
[Re]discovered that sync may also be a product of the interrupt cycle. So started looking into that.
2017-06-04 21:54:55 -04:00
Thomas Harte
7f743c6fb0
Got explicit about permitted type conversions.
2017-06-04 18:40:59 -04:00
Thomas Harte
73654d51dd
Wired up actually to run.
2017-06-04 18:37:13 -04:00
Thomas Harte
096551ab3e
Made a first attempt to hash out the ZX80's bus. Video output isn't yet going though. Can't seem to find clarity on whether horizontal sync is really programmatic. Let's see.
2017-06-04 18:32:23 -04:00
Thomas Harte
c485c460f7
Imported the ZX80 and 81 system ROMs (though not publicly), added enough code to post their contents into C++ world.
2017-06-04 18:08:35 -04:00
Thomas Harte
b0a7c58287
Fixed project to point to the XIB I actually want to keep; fixed that XIB to have the correct contents.
2017-06-04 17:57:37 -04:00
Thomas Harte
d2637123c4
Added necessary support to get as far as an empty window when attempting to load a piece of ZX80 software.
2017-06-04 17:55:19 -04:00
Thomas Harte
02b7c3d1b0
Added the necessary wiring to get into a ZX80/81-oriented part of the static analyser, which could in principle post a ZX80 target.
2017-06-04 17:04:06 -04:00
Thomas Harte
8c1769f157
Made a quick attempt at serialising from ZX80 .O to waves.
2017-06-04 16:59:26 -04:00
Thomas Harte
655809517c
Ensured that there is a subclass of file that is entrusted to load .O/.80 files, and that the code routes such files to it, noting that it should consider whether a ZX80 is required.
2017-06-04 16:37:03 -04:00
Thomas Harte
2190f60a89
Reinstated manual-by-stealth secondary usage of the Zexall test as a benchmarking tool.
2017-06-04 15:46:35 -04:00
Thomas Harte
18faebc93c
Merge pull request #130 from TomHarte/Bits35
...
Corrects bit 3 & 5 emulation for everything except BIT n, (HL)
2017-06-04 15:42:22 -04:00
Thomas Harte
0eebfdb4cc
Expanded emulation of memptr, though still incomplete. Reverted zexall tests to zexdoc. Will probably leave memptr until I've an emulated machine as test suites seem to exist, but they're machine-dependant, so figuring out how to isolate them from an architecture will be a lot easier if and when I have functioning machines.
2017-06-04 15:39:37 -04:00
Thomas Harte
7811374b0f
Started sneaking in memptr emulation, hopefully to get to a working BIT (hl).
2017-06-04 15:07:07 -04:00
Thomas Harte
a2f01b4a46
Corrected CPx bit 3 and 5 flags. I think only BIT n, (HL) with the famous MEMPTR reliance is preventing a complete pass by Zexall now.
2017-06-04 14:59:18 -04:00
Thomas Harte
f5c910beb7
Fixed LDIR/LDDR bit 3/5 flags. This seems once again to satisfy FUSE.
2017-06-04 14:18:04 -04:00
Thomas Harte
4e014ca748
Ensured BIT takes bits 5 and 3 from the computed address if used on indexed pages. That seems to cover 97 failures out of 100?
2017-06-04 14:13:38 -04:00
Thomas Harte
87095b0578
Undid consciously discard for bits 3 and 5 in the FUSE tests. Back to 100 failures.
2017-06-04 14:04:26 -04:00
Thomas Harte
fba6ac2b4c
Merge pull request #129 from TomHarte/TestMachineCommonality
...
Generalises the Z80 test machine's trap handler also to cover the 6502
2017-06-03 22:27:55 -04:00
Thomas Harte
1a811b1ab1
Eliminated the function call inherent to every decode, and also moved the fixed table of operations into a non-templated base class.
2017-06-03 22:19:35 -04:00
Thomas Harte
c26349624c
This, of course, should be inline to gain any benefit from the slightly-tortured private implementation.
2017-06-03 22:00:57 -04:00
Thomas Harte
b642d9f712
Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs.
2017-06-03 21:54:42 -04:00
Thomas Harte
fd6623b5a5
Attempted to bring a common hierarchy to the Z80 and 6502 test machines, particularly with a view to eliminating the special-case Jam stuff on the 6502.
2017-06-03 21:22:16 -04:00
Thomas Harte
0b2a3f18bc
Merge pull request #128 from TomHarte/Scheduling
...
Eliminates the micro-op scheduler
2017-06-03 20:32:39 -04:00
Thomas Harte
b304c3a4b9
Eliminated the 6502's reliance on the micro-op scheduler.
2017-06-03 20:30:07 -04:00
Thomas Harte
3ceef2005b
Pulled the Z80 from the MicroOpScheduler inheritance tree as it barely uses the thing, and that allows me to make the MicroOp structure private.
2017-06-03 19:17:34 -04:00
Thomas Harte
0f438f524b
Merge pull request #124 from TomHarte/Z80
...
Introduces a decent but as-yet-imperfect implementation of the Z80 processor.
2017-06-03 19:11:21 -04:00
Thomas Harte
24c84ca6f5
Commented out as-yet-unimplemented features.
2017-06-03 19:10:23 -04:00
Thomas Harte
7898f643ac
Added bus request/acknowledge logic.
2017-06-03 19:09:47 -04:00
Thomas Harte
7bd45d308a
Error was simply failure of the interrupt-mode setter. Fixed.
2017-06-03 18:58:13 -04:00
Thomas Harte
b3da16911f
Tweaked timing of mode 0, per contradictory information. Wrote a failing test of mode 2.
2017-06-03 18:42:54 -04:00
Thomas Harte
e52892f75b
Added a test of interrupt mode 1.
2017-06-03 18:16:13 -04:00
Thomas Harte
8c41a0f0ed
Added a test to confirm interrupts are disabled, and a response to the interrupt cycle within the all-RAM machine.
2017-06-03 17:53:44 -04:00
Thomas Harte
3e9212aaff
Plumbed through to allow interrupt tests, wrote an NMI test, corrected the error revealed.
2017-06-03 17:41:45 -04:00
Thomas Harte
a2ec902773
Made an attempt at implementing all three modes of IRQ.
2017-06-03 17:07:05 -04:00
Thomas Harte
1c0130fd02
Cleaned up with a macro, and decided to make absolutely sure that DecodeOperation is functioning as intended by removing the MoveToNextProgram from fetch-decode-execute.
2017-06-03 12:19:25 -04:00
Thomas Harte
3e3d6f97f4
Edged towards being able to implement interrupt mode 0: created a special-case micro-op for incrementing the PC, and formalised that DecodeOperation is a terminal operation.
2017-06-03 12:16:21 -04:00
Thomas Harte
9c3bda0111
Attempted to round out NMI handling.
2017-06-03 11:30:12 -04:00
Thomas Harte
d14902700a
Minor syntax and wiring fixes.
2017-06-01 22:33:05 -04:00
Thomas Harte
c95c32a9fe
Implemented the reset line program and disabled fictitious automatic power-on reset for the Z80 test machine.
2017-06-01 22:31:04 -04:00
Thomas Harte
35e045d7a7
Made a first attempt at the correct segue into the three main kinds of interrupt, though the programs aren't written yet. So undefined behaviour would abound were an interrupt to occur. But it lets me figure out what effect the check has on performance. I hope little.
2017-06-01 22:16:22 -04:00
Thomas Harte
084e1f3d51
Added a latching of interrupt status before each bus operation, and reset and power-on inputs.
2017-06-01 21:40:08 -04:00
Thomas Harte
5b43cefb85
Started filling an appropriate mask variable with the interrupt request status right now. Which is step one towards implementing interrupts.
2017-06-01 20:34:52 -04:00
Thomas Harte
aab637c9e7
Made check_address_for_trap inlineable.
2017-06-01 18:28:34 -04:00
Thomas Harte
7d9b197383
Pulled the .get() call for fetch-decode-execute out of the main loop.
2017-06-01 18:28:04 -04:00
Thomas Harte
c9dd267ec1
Sketched an interface for signalling interrupts and pulled out some of the repetition in flag setting from ADD/ADC/SUB/SBC/CP.
2017-05-31 22:51:32 -04:00
Thomas Harte
a5254989f8
Rewired the Z80 not to use the program queue, as it's not proven a useful abstraction in practice and doing so yields an immediate 22% speed increase.
2017-05-31 20:15:56 -04:00
Thomas Harte
494ce073b5
Tests having been fixed by instating proper Z80 cycle counting, removed caveman logging.
2017-05-31 19:58:57 -04:00
Thomas Harte
b99e4210ba
Eliminated pointless abstraction; I ended up going indirect on instruction pages rather than scheduling methods.
2017-05-31 19:57:03 -04:00
Thomas Harte
d3b74cbc91
Set proper initial value for number_of_cycles_.
2017-05-31 19:55:51 -04:00
Thomas Harte
5ff73faf48
Ensured Zexall can pass.
2017-05-31 19:55:06 -04:00
Thomas Harte
2f7f11e2e5
Added diagnosis props.
2017-05-31 06:54:25 -04:00
Thomas Harte
5119997122
Made an attempt, flawed so far, to find a neat way for processor subclasses to offer bus management as an inline function.
2017-05-30 22:41:23 -04:00
Thomas Harte
b5c1773d59
Eliminated another conditional. Albeit a very predictable one.
2017-05-30 22:15:43 -04:00
Thomas Harte
dfb5057342
Moved repetition group conditions explicitly into the switch statement.
2017-05-30 22:12:10 -04:00
Thomas Harte
7bddd294c9
Resolved an unpredictable conditional and temporarily disabled the Zexalltest as part of the default suite, since it takes so long to run.
2017-05-30 21:03:02 -04:00
Thomas Harte
01f7394f7f
Corrected 6502 scheduling when flushing the pipeline.
2017-05-30 20:58:07 -04:00
Thomas Harte
5aa8b03349
Attempted to regularise the 6502 with the Z80 as to scheduling. I think that at least one bug remains.
2017-05-30 20:36:53 -04:00
Thomas Harte
b5ad910b81
Merge branch 'Z80' into StraightPointer
2017-05-30 19:25:38 -04:00
Thomas Harte
da65bae86e
Switched to supplying the bus operation by reference, go guarantee that it isn't null.
2017-05-30 19:24:58 -04:00
Thomas Harte
a0189a6fe1
Switched to following the current program via address.
2017-05-30 18:49:40 -04:00
Thomas Harte
244b5ba3c2
Added a proper termination condition for Zexall and, for now, a Mhz counter.
2017-05-30 18:32:38 -04:00
Thomas Harte
960de7bd7b
Marginally reduced test machine costs based on usage.
2017-05-30 11:59:07 -04:00
Thomas Harte
c6185baa99
Fixed R incrementation and attempted to make the status flags cheaper to write to.
2017-05-29 22:23:19 -04:00
Thomas Harte
4d4695032c
Discovered that Zexall is just really slow. Disabled the address sanitiser, and started working towards a verifiable end.
2017-05-29 21:46:00 -04:00
Thomas Harte
9d29cefe75
Evicted manual memory management.
2017-05-29 21:44:33 -04:00
Thomas Harte
35f535b9a3
Noodled around with initial state.
2017-05-29 19:25:08 -04:00
Thomas Harte
6d22f6fcd5
Having decided the bus operation error on 10 is probably in the test cases, decided to allow myself to skip that one comparison. Back to zero failing cases, and with no more useful information to derive from the FUSE test set for the time being.
2017-05-29 17:17:17 -04:00
Thomas Harte
8bfaa487ce
Improved logging of bus operations and corrected placement of the OUT step in that repetition group; was otherwise outputting the wrong side of the B adjustment and therefore to the wrong port (if interpreted as 16 bit).
2017-05-29 17:13:24 -04:00
Thomas Harte
0d067d2f01
Adjusted OTI/etc timing; 23 failures outstanding.
2017-05-29 16:54:45 -04:00
Thomas Harte
d66755fd1e
Corrected INI/D[r] timing. Down to 45 failures.
2017-05-29 16:50:52 -04:00
Thomas Harte
267b2add9a
Adjusted for where FUSE nominally places timestamps. Down to 92 failures.
2017-05-29 16:44:07 -04:00
Thomas Harte
d290e3d99e
Corrected simple logging error. Which mysteriously moves me all the way up to 117 failures (!)
2017-05-29 16:35:00 -04:00
Thomas Harte
a6a4c5a936
Made an attempt to introduce checking of bus activity against the FUSE tests. Appears to suggest 54 new failures.
2017-05-29 15:57:27 -04:00
Thomas Harte
8a8f0cef20
With all intentional opcode entry points now covered, commuted XX into NOP to give proper meaning to otherwise undefined codes.
2017-05-29 12:25:10 -04:00
Thomas Harte
91dc0d5f4a
Adjusted HALT to issue never-ending M1 fetches on the next instruction.
2017-05-29 12:20:33 -04:00
Thomas Harte
ed7b07c8b1
Made an attempt to implement HALT as an operation that merely leaves the PC in place, adding the Z80's output line. Included that flag in FUSE tests. Discovered that it does not think that HALT acts that way. Which is probably correct.
2017-05-29 11:54:27 -04:00
Thomas Harte
3f880fa769
Fixed [FD/DD][74/75], which always store H or L, never IXh, IXl, IYh or IYl.
2017-05-29 11:44:26 -04:00
Thomas Harte
d83dd17738
[DD/FD]36 turns out to be a timing error: offset calculation overlaps with value fetch. So the FUSE test was cutting off my implementation early. Fixed.
2017-05-29 11:40:56 -04:00
Thomas Harte
9ade0dcae3
One failure was just PUSH AF due to throwing away the 5 & 3 flags at the start. Switched to throwing them away at comparison.
2017-05-29 11:06:23 -04:00
Thomas Harte
a329d85697
Instituted memory value checks, flushing out seven new failures.
2017-05-29 11:01:45 -04:00
Thomas Harte
c322410783
Corrected CP[I/D]R termination logic; all tests now passing to the extent of interrogation.
2017-05-29 10:52:54 -04:00
Thomas Harte
b67331e018
Fixing the OUT repetition group reduces the code to one failing test.
2017-05-29 10:48:53 -04:00
Thomas Harte
a47b339668
Made an attempt at OUT[I/D]R. 10 failures remaining. None of which, I guess, are due to unimplemented operations.
2017-05-29 10:28:04 -04:00
Thomas Harte
ad56a9215c
Implemented IN[I/D]x. 18 failures remaining.
2017-05-29 10:12:33 -04:00
Thomas Harte
c56a5344b9
Implemented CP[I/D]x.
2017-05-29 08:54:00 -04:00
Thomas Harte
1f62cbe21a
Reduced LD[I/D}{R} repetition.
2017-05-29 08:24:10 -04:00
Thomas Harte
47845f8c19
Tried to complete the LD[I/D]{R} group. 32 issues remain.
2017-05-28 23:55:54 -04:00
Thomas Harte
409c82ce73
Implemented RLD and RRD. 34 failures remaining.
2017-05-28 16:46:27 -04:00
Thomas Harte
dc3f5b6211
Fixed flag setting for LD A, I and LD A, R, and corrected typo affecting LD DE, (nn).
2017-05-28 16:32:10 -04:00
Thomas Harte
fb02b77e63
Implemented RETI/RETN. 40 warnings remaining.
2017-05-28 16:07:25 -04:00
Thomas Harte
f974d54c7a
Implemented IM. 48 failures remain.
2017-05-28 15:55:21 -04:00
Thomas Harte
68978c6e25
Implemented NEG and filled in the load/store and copy parts of the ED page that roll directly off the tongue. 53 issues outstanding.
2017-05-28 15:47:48 -04:00
Thomas Harte
6e83b7d6df
Attempted to add a proper exit condition for Zexall.
2017-05-28 15:13:47 -04:00
Thomas Harte
5a4d448cc1
Corrected logical flags; now down to 68 failures, all of them on the ED page.
2017-05-28 15:09:58 -04:00
Thomas Harte
743eac8c55
Implemented EXX to complete the base page. 83 failures.
2017-05-28 14:55:14 -04:00
Thomas Harte
6b66c8f304
Implemented inputs and outputs, determined how to answer port requests to please FUSE and hence reduced failures to 84.
2017-05-28 14:50:51 -04:00
Thomas Harte
c976fbfcd5
Implemented the base-page IN and OUT instructions, bringing FUSE test failures down to 91.
2017-05-28 14:20:05 -04:00
Thomas Harte
ed3e38ac31
Performed some quick tidying.
2017-05-28 00:12:42 -04:00
Thomas Harte
76f03900d2
Implemented EX HL, (SP) so as, allowing for indexed pages, to bring issues below the psychological 100 barrier. To 99.
2017-05-28 00:02:14 -04:00
Thomas Harte
035df316aa
FUSE seems to have inconsistent ideas about where b3 and b5 come from in more-complicated BIT instructions. So I'm not testing them for now. Within that reality, reduced to 102 failures.
2017-05-27 23:54:53 -04:00
Thomas Harte
9759a04c7d
Timing fixes: the fetch-decode-execute pattern is now per-page, since that on [DD/FD]CB not only doesn't increment R but doesn't take four cycles, so is probably a normal read cycle. Adjusted timing all around.
2017-05-27 23:54:06 -04:00
Thomas Harte
c7cb47a1d8
Readded and then disabled my temporary one-test-only patch. Failures are currently at 237.
2017-05-27 21:10:25 -04:00
Thomas Harte
0d2d04e17b
Seeking proper [F/D]DCB emulation: the offset comes before the final byte of opcode, and adding seems to overlap with the opcode fetch, which does not increment R. Also needs to duplicate the result to visible registers.
2017-05-27 21:06:56 -04:00
Thomas Harte
98423c6e41
Accepted FUSE's view of bits 3 & 5 from BIT and RES, reducing to 623 issues.
2017-05-27 16:19:15 -04:00
Thomas Harte
33c3fa21e3
Fixed (HL)/(In + d) CB page modify instructions. Reducing failures to 672.
2017-05-27 15:54:24 -04:00
Thomas Harte
2141d52794
Corrected typo. Now at 696 failures.
2017-05-27 15:41:26 -04:00
Thomas Harte
16b8021401
Made a stab at the CB pages.
2017-05-27 15:39:22 -04:00
Thomas Harte
151b09b5ca
Fixed various other obvious cases for indexing.
2017-05-26 23:37:17 -04:00
Thomas Harte
9bc2b48d9b
Found a form I like for indexed addressing, applying it only where obvious for now. Which eliminates more than a couple of hundred of remaining failures.
2017-05-26 23:23:33 -04:00
Thomas Harte
ab8a98f1df
Implemented RST.
2017-05-26 07:29:19 -04:00
Thomas Harte
efe354a7b1
Fixed half carry after logical operation.s
2017-05-25 22:55:04 -04:00
Thomas Harte
d50d3fc837
Implemented CPL, SCF and CCF.
2017-05-25 22:51:08 -04:00
Thomas Harte
83ee92af1a
Made DAA work sufficiently well for the FUSE test.
2017-05-25 22:41:05 -04:00
Thomas Harte
ea0ad9fd87
Took a shot at DAA, seemingly not to Fuse's liking though.
2017-05-25 22:17:48 -04:00
Thomas Harte
ff3c60c0e1
Implemented the conditional JRs.
2017-05-25 21:51:30 -04:00
Thomas Harte
399703a471
Implemented JR.
2017-05-25 21:48:28 -04:00
Thomas Harte
82017c4aea
Implemented DJNZ.
2017-05-25 21:44:24 -04:00
Thomas Harte
bdf07c3dc9
Implemented EX AF, AF'.
2017-05-25 21:26:32 -04:00
Thomas Harte
598be24644
Fixed overflow for 8-bit decrementing.
2017-05-25 21:23:38 -04:00
Thomas Harte
e4e71a1e5f
Switched back to descriptive failures, but put a cap on them.
2017-05-25 21:08:24 -04:00
Thomas Harte
fba5af280e
Shortened failure message, at least for now.
2017-05-25 21:05:47 -04:00
Thomas Harte
c668ff9472
Added incrementing of the refresh register.
2017-05-25 21:01:52 -04:00
Thomas Harte
2cadc706e2
Now runs FUSE tests, albeit testing only a subset of the results. But enough to get started.
2017-05-25 21:00:33 -04:00
Thomas Harte
3c6f63abcc
Started towards running the FUSE tests. Just need to deal with the memory segments.
2017-05-25 19:12:59 -04:00
Thomas Harte
00cd7e7e9c
After hitting my head against the wall of trying to use [NS]Scanner as a parser some more, have given up and transcoded the two tests files to JSON.
2017-05-25 18:20:13 -04:00
Thomas Harte
055c860b43
Sealed off RegisterState as immutable, and started trying to parse the .expected file.
2017-05-23 22:32:36 -04:00
Thomas Harte
454c8628c3
Implemented an additional constructor for RegisterStates, pulling it out into file-level scope and implementing Equatable.
2017-05-23 22:05:33 -04:00
Thomas Harte
a23a6db4d6
Tidied up, creating a holder for RegisterState and giving it deserialisation logic. This makes sense because a register state will also need to be taken from the outputScanner, and from the machine.
2017-05-23 08:13:24 -04:00
Thomas Harte
6575091a78
Fixed Z80's ownership of its fetch-decode-execute program, its habit of scheduling invalidly when hitting an unrecognised operation and the test machine's habit of dereferencing invalidly.
2017-05-22 21:50:34 -04:00
Thomas Harte
9e25d014d2
Made an attempt to log bus activity for comparison with FUSE results.
2017-05-22 19:49:38 -04:00
Thomas Harte
41d5dd8679
Added a memory access delegate to the Z80 all-ram processor, to allow access patterns to be captured.
2017-05-22 19:24:11 -04:00
Thomas Harte
c3ea6dc1f5
Added respect for limiting to the requested number of cycles in the Z80.
2017-05-22 19:15:55 -04:00
Thomas Harte
22afa509ca
Got to a parsing and towards an attempt to run FUSE tests.
2017-05-22 19:14:46 -04:00
Thomas Harte
3fb3cc8269
Got explicit about encodings.
2017-05-21 22:53:06 -04:00
Thomas Harte
e3e461d7cb
Added a test class for running the FUSE tests. With nothing much in it.
2017-05-21 22:49:24 -04:00
Thomas Harte
c16fccb317
Fixed file names.
2017-05-21 22:43:07 -04:00
Thomas Harte
b9cffdf2bd
Imported the FUSE tests.
2017-05-21 22:42:20 -04:00
Thomas Harte
f2aae72cc2
Fixed the 16-bit ADCs and SBCs, added INC (HL) and DEC (HL). Zexall now enters a seemingly-infinite loop. Which is progress, at least.
2017-05-21 20:43:36 -04:00
Thomas Harte
fe8db1873c
Added 16-bit ADC and SBC table entries; once again extended logging.
2017-05-21 20:32:06 -04:00
Thomas Harte
c66c715ac9
Starts to try to figure out how to implemented the index register pages, but doesn't yet read offsets.
2017-05-21 19:26:40 -04:00
Thomas Harte
5dcfd85642
Added a compact and copy stage for instruction pages, both [mostly] eliminating the mistake of letting static data structures contain pointers to instance storage and opening the door for addition of the DD and FD pages.
2017-05-21 19:15:52 -04:00
Thomas Harte
c70dfe1b09
Implemented the two variations of loading between (nn) and SP.
2017-05-21 13:20:28 -04:00
Thomas Harte
232c591655
Threw in a little macro documentation and a missing macro.
2017-05-21 13:13:21 -04:00
Thomas Harte
790614b544
Added EI and DI.
2017-05-21 12:53:17 -04:00
Thomas Harte
32c032cd97
Implemented a couple of easy-to-add missing base page instructions.
2017-05-21 10:18:43 -04:00
Thomas Harte
e48ee16366
Continued cleaning efforts, added conditional RET.
2017-05-21 10:13:59 -04:00
Thomas Harte
e92d936ce8
Added conditional calls.
2017-05-21 10:03:46 -04:00
Thomas Harte
4e210c5396
Added LD A, (nn).
2017-05-21 10:00:10 -04:00
Thomas Harte
3d3e60b1fc
Implemented LD (HL), r.
2017-05-21 09:56:41 -04:00
Thomas Harte
f3f0e2f1a9
Implemented RRA and RRCA.
2017-05-21 09:52:19 -04:00
Thomas Harte
08206eea56
This logging has outlived its usefulness for now.
2017-05-21 09:47:53 -04:00
Thomas Harte
78296246e8
Added ALU n.
2017-05-21 09:46:18 -04:00
Thomas Harte
85b5dd35b1
Took a shot at 8-bit arithmetic.
2017-05-21 09:43:17 -04:00
Thomas Harte
11cfaa3e3d
Performed light syntactic cleaning on the first part of the base page table, eliminated redundant temporary variables, implemented 8-bit increment and decrement.
2017-05-21 09:17:30 -04:00
Thomas Harte
103c863534
Through temporarily dramatically increased logging, fixed conditional JP.
2017-05-20 23:03:52 -04:00
Thomas Harte
6688f83226
Took a shot at LDIR.
2017-05-20 21:58:24 -04:00
Thomas Harte
01a064dd63
Added an empty ED page.
2017-05-20 17:29:30 -04:00
Thomas Harte
7b234078ae
Implemented EX DE, HL and shuffled to allow instruction pages.
2017-05-20 17:04:25 -04:00
Thomas Harte
add02a7897
Added LD (nn), A, and reduced double logging to single for now.
2017-05-19 23:13:28 -04:00
Thomas Harte
19167df692
Consolidated and filled in AND and XOR.
2017-05-19 23:03:34 -04:00
Thomas Harte
6766845e21
Filled in most of the loads.
2017-05-19 22:57:43 -04:00
Thomas Harte
bc3b5f3e35
Added 16-bit INCs and DECs. Which don't set flags, so are easy.
2017-05-19 22:13:36 -04:00
Thomas Harte
5fe23113ec
Moved RET to the correct place, implemented POP AF.
2017-05-19 22:03:12 -04:00
Thomas Harte
c55e1c1d17
Implemented POP and therefore RET; corrected timing of PUSH.
2017-05-19 21:59:45 -04:00
Thomas Harte
d910405648
Added enough infrastructure to be able to react to the two CP/M calls this cares about.
2017-05-19 21:53:39 -04:00
Thomas Harte
62b432c046
Added the concept of a trap handler to the all-RAM processor and exposed it via the test Z80 classes.
2017-05-19 21:20:28 -04:00
Thomas Harte
eae1f78221
Implemented the main page pushes.
2017-05-19 19:28:38 -04:00
Thomas Harte
11d05fb3b8
Expanded a little on operations, added an implementation or two.
2017-05-19 19:18:35 -04:00
Thomas Harte
58efca835f
Sought to add a further opcode.
2017-05-18 22:53:43 -04:00
Thomas Harte
da6e520b91
Merge branch 'master' into Z80
2017-05-18 22:30:51 -04:00
Thomas Harte
a5099f69d8
Merge pull request #127 from TomHarte/OricShift
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Maps either Mac shift key to both Oric shifts
2017-05-18 22:27:47 -04:00
Thomas Harte
9398b6c2c8
Unable to differentiate, decided to map a Mac shift key to both Oric shifts.
2017-05-18 22:25:59 -04:00
Thomas Harte
99f2060fc1
Further improved macros.
2017-05-18 22:11:54 -04:00
Thomas Harte
5d3ebcb35a
Made a first attempt at LD HL, (nn).
2017-05-17 22:42:30 -04:00
Thomas Harte
509d011fbe
Implemented JP, my first Z80 operation.
2017-05-17 22:31:41 -04:00
Thomas Harte
17ffd604bf
Made an attempt to get the Z80 at least as far as rejecting an opcode.
2017-05-17 21:45:23 -04:00
Thomas Harte
a3dafa9056
Abbreviated uses of enumerations.
2017-05-17 21:44:08 -04:00
Thomas Harte
21d0602305
Restored the all RAM 6502's lack of power-on reset.
2017-05-17 21:43:40 -04:00
Thomas Harte
64d6ee1be5
Adjusted slightly to adapt to latest Swift warnings.
2017-05-17 07:49:48 -04:00
Thomas Harte
1378ab7278
Ensured initial program counter and stack pointer are correct for Zexall, fixed the Z80 to use a compile-time polymorphic call for bus access.
2017-05-17 07:36:06 -04:00
Thomas Harte
87a021ec2d
Made further attempt to get as fas as having the Z80 attempt to do something.
2017-05-16 22:19:40 -04:00
Thomas Harte
189317b80c
Added enough of a Z80 test machine to bridge up into Swift.
2017-05-16 22:05:42 -04:00
Thomas Harte
4f0775cc7c
Imported the Zexall.com tester, as a first thing to throw at the Z80 to be.
2017-05-16 21:37:09 -04:00
Thomas Harte
7190f927b7
Factored out the stuff that both all-RAM processors would share, rather than duplicating it.
2017-05-16 21:28:17 -04:00
Thomas Harte
d559d8b901
Continued edging towards getting the absolute basics of a testable Z80, for test-driven development. Corrected old-fashioned instance naming issues with the corresponding 6502 class and removed an unnecessary source file while at it.
2017-05-16 21:19:17 -04:00
Thomas Harte
2562306802
Merge branch 'master' into Z80
2017-05-16 21:05:00 -04:00
Thomas Harte
15394358df
Merge pull request #126 from TomHarte/GCRAnalysis
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Corrects infinite loop when performing GCR analysis
2017-05-16 20:54:24 -04:00
Thomas Harte
df4d4467b3
Ensured GCR parser spins the disk.
2017-05-16 20:53:06 -04:00
Thomas Harte
67ec0b9e6c
Merge pull request #125 from TomHarte/SampledComposite
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Formalises reasoning for the colour phase clamp and offset...
2017-05-16 20:47:20 -04:00
Thomas Harte
2ee8a7056e
Corrected TIA no longer to assume phase is an automatic quarter askew.
2017-05-16 20:43:28 -04:00
Thomas Harte
a5075d9eb5
Formalised the reasoning behind the colour phase fix-up and made it an opt-in per-caller value. Only the Oric currently needs to opt in.
2017-05-16 20:31:39 -04:00
Thomas Harte
50bb4f0142
There's finally a loop in here, at least.
2017-05-15 22:25:52 -04:00
Thomas Harte
df80c37adb
Renamed TestMachine to TestMachine6502 since there's going to be multiple of them.
2017-05-15 08:18:57 -04:00
Thomas Harte
7da51602d5
Moved flush, added run_for_cycles, which does nothing right now.
2017-05-15 07:59:21 -04:00
Thomas Harte
5152517887
Added the boilerplate stuff necessary to query registers.
2017-05-15 07:55:53 -04:00
Thomas Harte
eb8a2de5d6
Settled definitively on flush as more communicative than synchronise (and slightly more locale neutral); culled some more duplication from the Z80.
2017-05-15 07:38:59 -04:00
Thomas Harte
f2a1a906ff
Adapted what negligible amount there is of the z80 as per the new CPU namespace.
2017-05-14 22:15:16 -04:00
Thomas Harte
0808e9b6fb
Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
2017-05-14 22:08:15 -04:00
Thomas Harte
b81a2cc273
First tentative steps towards adding a Z80 implementation.
2017-05-14 17:46:41 -04:00
Thomas Harte
abeaedf16f
Merge pull request #123 from TomHarte/RemovedDeadOption
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Formally withdraws the 'load automatically' option for the Vic
2017-05-14 17:03:33 -04:00
Thomas Harte
8e35e913bb
Formally withdrew the 'load automatically' option for the Vic, having removed that option elsewhere.
2017-05-14 16:59:24 -04:00
Thomas Harte
81c5f4ab19
Merge pull request #122 from TomHarte/16bit6560
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Increases VIC-I intermediate format to 16 bit and corrects output colours
2017-05-13 22:03:08 -04:00
Thomas Harte
e270b726b3
Tweaked blue, increased saturation.
2017-05-13 22:01:02 -04:00
Thomas Harte
c2b5a9bb1f
Minor fix: given that phase is now a function of position, stop nudging position.
2017-05-13 21:50:48 -04:00
Thomas Harte
44ce7fa54c
Corrected luminances across the board, and PAL colours.
2017-05-13 21:50:09 -04:00
Thomas Harte
b0142cf050
Made an updated stab at NTSC colours.
2017-05-13 14:29:36 -04:00
Thomas Harte
a340331229
Introduced 1-bit of saturation, returning black and white as black and white.
2017-05-11 21:31:58 -04:00
Thomas Harte
b14c892740
Switched to a safer RAII approach to this lock.
2017-05-10 21:29:39 -04:00
Thomas Harte
15d17c12d5
Switched the 6560 to two bytes per pixel, since one isn't sufficient for precision and because mixing up the implementation might help me to figure out what's amiss.
2017-05-09 21:22:01 -04:00
Thomas Harte
99800d9840
Merge pull request #121 from TomHarte/VicColours
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Permits ROM-area located PRGs that are not a power-of-two in size
2017-05-08 22:18:47 -04:00
Thomas Harte
5d91a2600d
Permitted ROM-style PRGs that are not a power-of-two in size, and added extra safety checks on loading data from a tape.
2017-05-08 22:15:35 -04:00
Thomas Harte
cb66c7e2dc
Performed some minor tidying.
2017-05-08 21:05:35 -04:00
Thomas Harte
58488c93be
Merge pull request #120 from TomHarte/Vic20Colours
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Corrects — and improves — Vic-20 tape loading
2017-05-08 20:59:29 -04:00
Thomas Harte
61f8f2f18c
Switched to a more straightforward way of exiting from tape data loading.
2017-05-08 20:58:55 -04:00
Thomas Harte
7b43ae0a92
Implemented a catch for loading the data portion of files.
2017-05-07 22:22:59 -04:00
Thomas Harte
2807e3134f
Implemented speedy header finding. So that's half of it.
2017-05-07 20:32:48 -04:00
Thomas Harte
0771363f3b
Removed one piece of unnecessary logging.
2017-05-06 22:22:03 -04:00
Thomas Harte
1f56e85f6d
Centralised resetting of tape files within the static analyser, having implemented it patchily.
2017-05-06 22:19:08 -04:00
Thomas Harte
2edf73908c
Temporarily disabled the existing fast loading implementation in pursuit of another, and started trying to correct the lack of connection between the userport VIA and the tape drive.
2017-05-06 22:00:12 -04:00
Thomas Harte
6a37a02eee
Switched to std::ostringstream to avoid the need to make a string length count (and I was one off when loading a disk).
2017-05-06 19:55:42 -04:00
Thomas Harte
5998123868
Added some consts, for a minor safety improvement.
2017-05-06 19:53:24 -04:00
Thomas Harte
26cb903b08
Merge pull request #119 from TomHarte/C11
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Ejects the deprecated OSAtomicTestAnd[Re]Set test-and-[re]set in favour of C11's atomic_flag.
2017-04-15 21:45:48 -04:00
Thomas Harte
92a8b68859
Dumped Mach-specific test-and-set in favour of ordinary C11.
2017-04-15 21:41:59 -04:00
Thomas Harte
4127350abe
Merge pull request #118 from TomHarte/HighResolutionAtariAudio
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Introduces a higher source sampling rate for Atari audio
2017-04-15 21:21:58 -04:00
Thomas Harte
ed6b135015
Made final switch to permit high-sampling rate Atari audio.
2017-04-15 21:18:00 -04:00
Thomas Harte
f95015c7f6
Pulled out the divisor for audio.
2017-04-03 21:16:39 -04:00
Thomas Harte
defec2c9b0
Fixed: operation reads now fulfil the promise of seeding the value to be read with 0xff.
2017-03-26 20:56:27 -04:00
Thomas Harte
04921e64de
Merge pull request #117 from TomHarte/AudioRace
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Works around what appears to be a bug in Apple's AudioQueue.
2017-03-26 20:29:41 -04:00
Thomas Harte
bdd432fe1d
Added an ugly workaround for the empirical sound shutdown issues.
2017-03-26 20:28:04 -04:00
Thomas Harte
6e9ab9f330
Merge pull request #116 from TomHarte/YarsBug
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Fixes a bug in which TIA access during the border would flush all motion steps.
2017-03-26 18:38:51 -04:00
Thomas Harte
814c0ada13
Fixed action counts for border motion.
2017-03-26 18:33:05 -04:00
Thomas Harte
dfc468f220
Locked down all initial state.
2017-03-26 15:47:04 -04:00
Thomas Harte
6817b38322
Merge pull request #115 from TomHarte/Style
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Settles my C++ curly bracket style indecision
2017-03-26 14:37:23 -04:00
Thomas Harte
e01f3f06c8
Completed curly bracket movement.
2017-03-26 14:34:47 -04:00
Thomas Harte
3229502fa1
Standardised curly bracket placement across the Atari.
2017-03-23 21:59:16 -04:00
Thomas Harte
a4c5eebd1e
The latest Atari Age-discovered numbers suggest this starts up in 1024T mode.
2017-03-21 18:22:50 -04:00
Thomas Harte
a3c22d5abb
Merge pull request #114 from TomHarte/Pitfall2
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Adds support for the Pitfall 2 DPC. And therefore for Pitfall 2.
2017-03-20 20:44:43 -04:00
Thomas Harte
a26b87f348
Fixed: mistake was failure to count ready cycles.
2017-03-20 20:44:03 -04:00
Thomas Harte
4c3cc42c91
This gives a very noisy version of the real audio.
2017-03-20 20:38:29 -04:00
Thomas Harte
f3f4e1a541
Made a first, hacky, attempt at audio.
2017-03-20 19:35:51 -04:00
Thomas Harte
4722f6b5c4
Fixed sprite disappearance: test should be applied predecrement, not post — it relates to the address being used this access, not the next one.
2017-03-19 18:58:35 -04:00
Thomas Harte
7d8d1c7828
Fixed 'random' number generator.
2017-03-19 18:54:35 -04:00
Thomas Harte
4bb70e7d31
Resetting the mask upon low byte write appears to resolve some issues.
2017-03-19 18:49:37 -04:00
Thomas Harte
321030bb44
Added a slightly faulty but seemingly 'close' version of masking.
2017-03-19 18:28:06 -04:00
Thomas Harte
6c161b1150
This gives something that might be the correct background.
2017-03-19 17:49:48 -04:00
Thomas Harte
d5c37c8619
Shushed a little, so as to be able to see a reasonable amount of output during my lifetime.
2017-03-19 17:38:54 -04:00
Thomas Harte
c445eaec3e
Switched startup values, following a comment on AtariAge. May or may not be correct, the thread was speculative.
2017-03-19 17:38:26 -04:00
Thomas Harte
7c66c36d3f
Attempted at least to manage appropriate data storage.
2017-03-19 17:31:08 -04:00
Thomas Harte
031a68000a
Added a class to contain the Pitfall 2 pager and a skeleton of initial work.
2017-03-18 22:08:47 -04:00
Thomas Harte
7d7b665be8
Merge pull request #113 from TomHarte/PagingTemplates
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Pulls the Atari 2600 paging schemes out into individual classes
2017-03-18 21:05:01 -04:00
Thomas Harte
c3d82f88a5
Tidied up and commented on the Activision stack implementation.
2017-03-18 21:01:58 -04:00
Thomas Harte
c033bad0b9
Here's MNetwork!
2017-03-18 20:51:49 -04:00
Thomas Harte
c31d85f820
Re-emplaced the MegaBoy. Also cut detritus from the main Atari header.
2017-03-18 19:02:34 -04:00
Thomas Harte
217fbf257e
CBS RAM Plus returns.
2017-03-18 18:56:20 -04:00
Thomas Harte
0b611a14b9
Tigervision paging returns.
2017-03-18 18:50:13 -04:00
Thomas Harte
df6861c9dc
Parker Bros paging is back.
2017-03-18 18:21:01 -04:00
Thomas Harte
a4cd12394e
Reinstated the Activision stack pager.
2017-03-18 18:03:48 -04:00
Thomas Harte
e0bca1e37b
Reinstated the 16 and 32 kb Atari pagers, and ensured the 6532 always starts in a valid state.
2017-03-18 17:34:34 -04:00
Thomas Harte
55ce851bb2
Fixed types of the 8k cartridges, ensured the 6502 starts without an IRQ request history.
2017-03-18 17:04:01 -04:00
Thomas Harte
e8d34f2eb4
Having farmed out the bus, the Atari itself no longer is/owns a 6502.
2017-03-18 16:34:41 -04:00
Thomas Harte
bb3daaa99b
Sought to reintroduce the Atari 8k paging scheme, at the same time deciding to do away with the copy and paste of holding on to ROM data.
2017-03-18 15:04:01 -04:00
Thomas Harte
36b58d03b7
Formalised read bus value guarantee from the 6502, fixed missing clock signal wiring on the Atari cartridge class, reintroduced CommaVid support.
2017-03-18 14:46:46 -04:00
Thomas Harte
7958459db9
In theory unpaged cartridges should now work. Time to debug.
2017-03-18 14:01:04 -04:00
Thomas Harte
14a76af0d3
Started trying to float out bus control to cartridges.
2017-03-17 20:28:07 -04:00
Thomas Harte
a04a58e01f
Merge pull request #112 from TomHarte/LineTiming
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Fixes declared Atari line length.
2017-03-14 21:34:19 -04:00
Thomas Harte
afbd9fd41b
Fixed declared line length.
2017-03-14 21:33:38 -04:00
Thomas Harte
3d53d4e55e
Merge pull request #111 from TomHarte/ActivisionStack
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Implements the Activision stack paging scheme.
2017-03-14 20:41:04 -04:00
Thomas Harte
7302703039
Implemented the Activision stack paging scheme.
2017-03-14 20:24:05 -04:00
Thomas Harte
97a8a96593
Rejigged how the memory map is handled and implemented MNetwork support.
2017-03-14 20:07:54 -04:00
Thomas Harte
be2e99077e
Merge pull request #110 from TomHarte/MegaBoy
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Adds emulation of the MegaBoy paging scheme.
2017-03-14 17:40:41 -04:00
Thomas Harte
3b29276228
Implemented the MegaBoy paging scheme.
2017-03-14 17:40:01 -04:00
Thomas Harte
4a528b9ecb
Merge pull request #109 from TomHarte/CBSRamPlus
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Adds emulation of the CBS RAM Plus paging scheme.
2017-03-14 17:26:09 -04:00
Thomas Harte
b3632a4e86
Institutes CBS RAM Plus emulation.
2017-03-14 17:25:10 -04:00
Thomas Harte
8a659e3117
Merge pull request #108 from TomHarte/PitfallIIDetection
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Adds tested detection of the Pitfall II and MegaBoy paging schemes.
2017-03-13 20:44:28 -04:00
Thomas Harte
a6897ebde0
Added an attempt to distinguish the MegaBoy (now with proper capitalisation) and a test for it.
2017-03-13 20:43:12 -04:00
Thomas Harte
582da14a14
Added an enumerated type and detection of Pitfall 2.
2017-03-13 08:15:36 -04:00
Thomas Harte
b81bf6b547
Merge pull request #107 from TomHarte/PagingTests
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Introduces unit tests for the Atari static analyser
2017-03-12 22:17:17 -04:00
Thomas Harte
8e147444d5
Added a readme, as is traditional for folders I'm excluding from Git.
2017-03-12 22:16:12 -04:00
Thomas Harte
a9964ee0c8
Simplified CommaVid test.
2017-03-12 22:14:39 -04:00
Thomas Harte
b671df9906
'Perfected' the Activision stack paging detector.
2017-03-12 22:11:58 -04:00
Thomas Harte
0bcf9c30de
Added an attempt, at least, at spotting the Activision titles. Which reduces back to only the one breakage, but this is getting a bit too much like spotting the hard-coded bytes.
2017-03-12 21:14:12 -04:00
Thomas Harte
2c07cce282
Had the wrong paging scheme listed for Robot Tank and Thwocker. Better to get this right before trying to come up with a test for the Activision stack scheme.
2017-03-12 21:03:10 -04:00
Thomas Harte
8c5e39c0c5
Adjusted Super Chip test to look for two portions of 128 bytes. It now spots Dig Dug and doesn't acquire any further false positives amongst the tested set. So failure to spot the Activision stack-based paging mechanism is now the only remaining failure.
2017-03-12 20:39:45 -04:00
Thomas Harte
cae48aaa95
Added an MNetwork test. Reduces failures to two of the set that I have: Dig Dug, which uses a Super Chip but has inconsistent bytes in its image, and Decathlon, which uses the Activision stack paging mechanism for which I don't yet have detection code.
2017-03-12 18:54:49 -04:00
Thomas Harte
37f4f6ba14
Cut down to one disassembly, now I know a bit more about how the non-Atari schemes work.
2017-03-12 17:50:24 -04:00
Thomas Harte
597bd97b01
Corrected two more table errors.
2017-03-12 15:46:25 -04:00
Thomas Harte
38de5300e5
Elevator Action seemingly uses a Super Chip.
2017-03-12 15:43:42 -04:00
Thomas Harte
62b3c9dda8
Corrected 8k Tigervision test, putting detection failures below 10 (i.e. at 9) for the first time.
2017-03-12 15:41:48 -04:00
Thomas Harte
146f3ea0f5
Fixed: Crystal Castles is 16kb.
2017-03-12 15:39:07 -04:00
Thomas Harte
af9b7fbc30
Switched to a voting method for classifying 8kb ROMs.
2017-03-12 15:36:01 -04:00
Thomas Harte
78213f1e95
Fixed a couple more table entries, introduced per-size tests (plus a catch-all), to speed up the development/testing cycle.
2017-03-12 15:35:36 -04:00
Thomas Harte
de347ad7c8
Improved CBS RAM Plus and Super Chip detection exclusion, reducing error count to 15.
2017-03-12 14:03:17 -04:00
Thomas Harte
a4bba8a92e
Made a couple of lookup table fixes and corrected RAM region detection windows; failures now down to 19.
2017-03-11 23:18:30 -05:00
Thomas Harte
fcacfc2726
Tidied up spacing, slightly.
2017-03-11 23:01:42 -05:00
Thomas Harte
bab464e765
I'm far from confident, but this should reduce the deviations close to those that result from mistakes by the static analyser, rather than table errors.
2017-03-11 22:58:11 -05:00
Thomas Harte
2879763c34
Reduced to 84 failures through more accurate tabulation.
2017-03-11 21:52:52 -05:00
Thomas Harte
ea2ea30193
Fleshed entire table out with most common values. Exceptions now to fix.
2017-03-11 21:11:25 -05:00
Thomas Harte
608569cc48
Typed out all the 'A's that I am aware of. So about 5% done.
2017-03-11 20:58:38 -05:00
Thomas Harte
c7e973aab4
Extended test set a little, corrected current failures.
2017-03-11 20:51:25 -05:00
Thomas Harte
443d57bc32
Slimmed output and added first six tests. Acid Drop fails since I'm not yet declaring Atari 16k and Atari 32k.
2017-03-11 20:43:19 -05:00
Thomas Harte
57ec756f5b
Started speccing out a unit test for Atari ROM analysis.
2017-03-11 20:33:58 -05:00
Thomas Harte
9286a5ba73
Added a new folder to the exclusion list, to contain commercial Atari images, to unit test my paging hardware selection logic.
2017-03-11 19:42:23 -05:00
Thomas Harte
1c9dffe41f
Added an earlier exit.
2017-03-11 19:38:05 -05:00
Thomas Harte
8c7f724ce4
Merge pull request #106 from TomHarte/Tigervision
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Adds detection and emulation of the Tigervision paging scheme
2017-03-11 18:18:29 -05:00
Thomas Harte
b193248056
Ensured that queue is not touched at all outside of the critical section.
2017-03-11 18:17:09 -05:00
Thomas Harte
f0d944847b
Fixed setting of the second 1kb.
2017-03-11 18:16:29 -05:00
Thomas Harte
a72d70e707
Enabled code coverage calculation for unit tests.
2017-03-11 17:44:56 -05:00
Thomas Harte
add14fb43a
Made an attempt to implement Tigervision paging.
2017-03-11 17:44:35 -05:00
Thomas Harte
38ce4dc56c
Fixed potential deadlock, if a delegate decided to dealloc the queue as a result of its prompting.
2017-03-11 17:44:02 -05:00
Thomas Harte
bce5abd33b
Made an attempt to spot Tigervision paging requests.
2017-03-11 13:12:23 -05:00
Thomas Harte
3f36eeb071
Merge pull request #105 from TomHarte/ParkerBros
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Introduces detection and emulation of the Parker Bros paging scheme
2017-03-11 13:05:17 -05:00
Thomas Harte
33bda2d40c
Switched to image inspection for RAM guesses rather than disassembly. Which fixes the other Parker Bros titles.
2017-03-11 13:04:23 -05:00
Thomas Harte
2b5e3a600e
Made a first attempt at implementing the Parker Bros pager within the emulation.
2017-03-11 12:43:12 -05:00
Thomas Harte
8dbf9fd302
Started adding an attempt to distinguish between Atari and Parker Bros paging schemes.
2017-03-11 11:41:18 -05:00
Thomas Harte
9c72ce5bd2
Ensured a settling delay is permitted before an NTSC/PAL decision is made. To avoid false switches just due to startup.
2017-03-06 19:37:35 -05:00
Thomas Harte
ec2762509b
Merge pull request #104 from TomHarte/SyncDetection
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Improves vertical sync recognition
2017-03-06 19:18:52 -05:00
Thomas Harte
e63229a5e5
Pulled vertical sync detection entirely outside the loop, and gave it greater perspective.
2017-03-06 19:15:33 -05:00
Thomas Harte
ad73379d1c
Took vertical sync detection logic entirely out of the loop.
2017-03-05 20:17:55 -05:00
Thomas Harte
abd4d2c42a
Extended has-RAM test to check all banks.
2017-03-05 11:58:52 -05:00
Thomas Harte
79784a8e57
Followed tip: missiles are locked to the position after four output pixels, not four input pixels.
2017-03-04 22:23:50 -05:00
Thomas Harte
61b8fc1e2f
Merge pull request #103 from TomHarte/CRTCounting
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Fixes NTSC colour cycle count
2017-03-04 17:32:45 -05:00
Thomas Harte
4751615623
Fixed NTSC colour cycle count, and hence the 2600's reported line lengths and phase offset.
2017-03-04 17:31:39 -05:00
Thomas Harte
cccdc558e7
Merge pull request #102 from TomHarte/6532Accuracy
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Improves 6532 counting accuracy
2017-03-04 17:04:43 -05:00
Thomas Harte
d3257c345a
Tested against public ROMs and corrected. Also moved the deferred adjustment into a more canonical place.
2017-03-04 17:00:28 -05:00
Thomas Harte
e09b76bf32
Fixed 'same value, then immediate increment, then proper counting increments' behaviour and ensured it takes one cycle to commit a value. Adjusted tests to match.
2017-03-04 15:57:54 -05:00
Thomas Harte
837cccdf83
Switched to deferred updates for the 6532.
2017-03-04 14:58:28 -05:00
Thomas Harte
a3fcd15980
Loosened sync charge level requirement.
2017-03-01 22:16:56 -05:00
Thomas Harte
93d1573481
Added a fix for certain homebrews.
2017-03-01 07:59:25 -05:00
Thomas Harte
893a5dd007
Added an artificial low pass filter, attempting to capture post-digital effects.
2017-02-28 21:29:55 -05:00
Thomas Harte
026b418b4a
Ensured filtered 1:1 audio resampling is applied.
2017-02-28 21:27:38 -05:00
Thomas Harte
06dd98b23c
Pulled the reset time for horizontal blank extend up to position 224.
2017-02-28 20:28:54 -05:00
Thomas Harte
2a81ae1dec
Now required: at least four stores for RAM to be detected.
2017-02-28 20:28:14 -05:00
Thomas Harte
1625b9c7f9
Merge pull request #101 from TomHarte/CommaVid
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Adds detection and emulation of the CommaVid paging scheme
2017-02-27 20:53:19 -05:00
Thomas Harte
184c8ae707
Extended to emulate the CommaVid.
2017-02-27 20:50:59 -05:00
Thomas Harte
8f8b103224
Slightly tidier. Also in the interim: confirmed no remaining false positives or negatives from the existing published set.
2017-02-27 08:42:43 -05:00
Thomas Harte
1af415a88e
Okay, this is a bit desperate, but worth investigation.
2017-02-27 08:39:53 -05:00
Thomas Harte
fe07cd0248
Made another attempt to distinguish.
2017-02-27 08:06:57 -05:00
Thomas Harte
a3d339092e
Corrected callers of the 6502 disassembler.
2017-02-27 07:56:59 -05:00
Thomas Harte
837216ee9a
Adjusted semantics to allow for more complicated mappings, e.g. whereby supplied data repeats itself within a range.
2017-02-27 07:49:33 -05:00
Thomas Harte
dcd0c90283
Switched time of best-effort updater delegate setting, to avoid a callback before setupClockRate has happened, and therefore before it's clear what should be going on with audio.
2017-02-26 21:58:59 -05:00
Thomas Harte
b24cd00a39
Switched time of best-effort updater delegate setting, to avoid a callback before setupClockRate has happened, and therefore before it's clear what should be going on with audio.
2017-02-26 21:58:43 -05:00
Thomas Harte
0273860018
Sought to weed out further false positives on CommaVid, partly by introducing a record of internal calls, to pair with the now confusingly named outward_calls.
2017-02-26 21:58:09 -05:00
Thomas Harte
82c089cde4
Factored out paging type detection and, from that, took out 2k cartridge detection. Added an attempt at a CommaVid detector, which does not currently work.
2017-02-26 21:24:54 -05:00
Thomas Harte
997707a45b
Merge pull request #100 from TomHarte/SuperChipDetection
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Adds detection and emulation of the Super Chip
2017-02-26 18:04:50 -05:00
Thomas Harte
9d7985c1e1
Added Super Chip emulation.
2017-02-26 17:47:29 -05:00
Thomas Harte
8b1ec827e0
Made an initial, very naive attempt to recognise two types of expanded cartridge: those with a superchip and those with a CBS RAM+, in both cases by looking for instructions that appear to write into cartridge space.
2017-02-26 17:11:57 -05:00
Thomas Harte
153525f23d
Extended quality of known address read/write/modify mapping, and started recording internal accesses in addition to external.
2017-02-26 17:10:33 -05:00
Thomas Harte
3101dc94a7
Merge pull request #98 from TomHarte/TIAImprovements
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Reimplements the Atari TIA, as a discrete component
2017-02-26 15:14:59 -05:00
Thomas Harte
e6a84fd26b
Attempted a hardware-correct implementation of missile-to-player latching. This completes the last of the **knowing** inaccuracies. The rest are as-of-yet unwitting.
2017-02-26 15:12:31 -05:00
Thomas Harte
440467ea3e
Started communicating which copy is being requested.
2017-02-26 13:39:25 -05:00
Thomas Harte
98376de9ad
Started returning 'no effect' for pot ports, rather than doing nothing. Still very much TODO though.
2017-02-25 22:58:58 -05:00
Thomas Harte
e61e355251
Moved to the maximum possibly required queue length of 4. Though the emulated 2600 should never need more than 2 slots as per the current calling pattern, it's not a contractual guarantee.
2017-02-25 17:25:10 -05:00
Thomas Harte
c898c8a99e
Ensured the missiles and ball don't attempt to enqueue. Because I don't think they're supposed to.
2017-02-25 17:13:22 -05:00
Thomas Harte
8c9062857c
Added a single-slot queue for player objects to defer drawing, thereby deferring pixel lookup. Which I think is correct. Though more slots might be needed.
2017-02-25 17:10:24 -05:00
Thomas Harte
77ed4ddc05
Slightly simplified ready line release logic.
2017-02-23 21:08:32 -05:00
Thomas Harte
82f392fada
This should be the other way around. I want whichever is later.
2017-02-22 21:54:49 -05:00
Thomas Harte
2f0c923c29
Switched away from @synchronized as it appears possibly to be the lock used during -dealloc, creating deadlock with the CSAudioQueueDeallocLock.
2017-02-22 21:42:10 -05:00
Thomas Harte
8291a63d5f
Fixed loss of audio when switching to PAL.
2017-02-22 21:15:37 -05:00
Thomas Harte
4c947ad553
Attempted to resolve risk of an audio callback being in progress when -dealloc is received.
2017-02-22 21:12:59 -05:00
Thomas Harte
6120dae61a
While I'm using the hacky approach to player/missile synchronisation, I need to seed adder.
2017-02-22 07:39:11 -05:00
Thomas Harte
1d03793f22
Fixed potential race condition: ensure the queue is disposed of synchronously because otherwise there'll be a potential dangling reference to self.
2017-02-22 07:35:09 -05:00
Thomas Harte
4f5f191cd6
Fixed: will no longer attempt to output pixels from before the pixel part of a line on which sync was disabled abruptly.
2017-02-22 07:33:36 -05:00
Thomas Harte
21abf4e9fc
Enshrined a terminology switch, albeit without any flow change behind it.
2017-02-22 07:29:48 -05:00
Thomas Harte
144d6b70d9
Minor cleaning.
2017-02-22 07:14:30 -05:00
Thomas Harte
b769f22ca0
Switched back to the collision_buffer_ being part of the TIA object, added one more assert.
2017-02-21 22:26:20 -05:00
Thomas Harte
7019d396d0
Threw in some asserts, discovering a bug in missile positioning.
2017-02-21 22:04:27 -05:00
Thomas Harte
f4447fd9cd
Attempted to fix failure of sprites properly to wrap when performing motion.
2017-02-21 21:53:09 -05:00
Thomas Harte
36396b3d62
Made a slightly better, albeit still inaccurate, version of missile-player lock.Enough for Combat to do reasonable things.
2017-02-21 20:45:20 -05:00
Thomas Harte
d1dbf8c21f
Missile to player lock is supposed to be a toggle; also factored out the commonalities of missile and ball drawing.
2017-02-21 07:58:37 -05:00
Thomas Harte
1bde0fed6f
Simplified relationship between Objects and the usage-specific components through inheritance.
2017-02-21 07:37:20 -05:00
Thomas Harte
7ab2358bba
Made an attempt to reintroduce missiles.
2017-02-20 22:22:39 -05:00
Thomas Harte
99547181f1
Attempted to template this thing. Without yet a plan in place for pixel lookup timing.
2017-02-20 21:42:59 -05:00
Thomas Harte
2bf784535c
Simplified calllng.
2017-02-20 18:04:40 -05:00
Thomas Harte
57f434c199
Reorganised state, with an eye towards unifying object motion and triggers.
2017-02-20 17:58:28 -05:00
Thomas Harte
87afa9140e
Took some provision steps towards paging type autodetection and communication. But I think this is a distraction.
2017-02-20 17:44:36 -05:00
Thomas Harte
d19f26887d
Performed a very naive shuffling of output builder sets onto the OpenGL queue. Which makes the frequency switcher work properly from it's possibly-contextless thread.
2017-02-20 10:39:31 -05:00
Thomas Harte
6cb95b4fc5
Switched to passing around std::strings rather than char *s, because they should be easier to capture.
2017-02-20 10:35:33 -05:00
Thomas Harte
d979a822ac
Introduced a deferred task list for the OpenGL thread.
2017-02-19 21:46:07 -05:00
Thomas Harte
fccdce65b9
Switched to lock guards.
2017-02-19 21:45:28 -05:00
Thomas Harte
99a35266e1
Attempted to bring frequency-switching logic into the cross-platform realm. Which for now creates an issue with the OpenGL context.
2017-02-19 21:20:37 -05:00
Thomas Harte
51bcaea60c
Disabled incorrect 'optimisations'.
2017-02-19 12:00:04 -05:00
Thomas Harte
e00339ef0a
Attempted to reintroduce the ball.
2017-02-19 08:02:54 -05:00
Thomas Harte
53cd125712
Added stub calls to draw the missiles and ball.
2017-02-19 07:28:24 -05:00
Thomas Harte
04693b067c
Fixed failure of the optimised route to pump the pixel clock; removed optimisation entirely for now.
2017-02-18 21:36:48 -05:00
Thomas Harte
cd7876a746
Reintroduced the extra clocking delay.
2017-02-18 20:18:50 -05:00
Thomas Harte
ed5ff49ef5
Fixed vertical delay, retreated from my previous thought about adding the one extra cycle of sprite delay, at least temporarily.
2017-02-16 20:52:01 -05:00
Thomas Harte
8d502a0b03
Decided not to run before I can walk and switched to storing the motion time and next step explicitly per object.
2017-02-16 20:28:37 -05:00
Thomas Harte
5ea232310f
Added a check against negative runs.
2017-02-16 18:55:58 -05:00
Thomas Harte
09309aa74f
Attempted to prevent extraneous moves.
2017-02-16 18:52:39 -05:00
Thomas Harte
b5357860b9
Made an attempt to split things apart so as to be able to introduce the proper sprite latency.
2017-02-14 20:56:16 -05:00
Thomas Harte
dd17459687
Added my first failing test: delay is incorrect when resetting outside of the play area.
2017-02-12 20:42:49 -05:00
Thomas Harte
cd90118a0f
Added two, extraordinarily simple tests.
2017-02-12 20:32:53 -05:00
Thomas Harte
25776de59d
I think unit testing this thing is the only way forwards. Started adding appropriate hooks.
2017-02-12 19:55:02 -05:00
Thomas Harte
600bdc9af7
In C++, I think the implicit cast to bool negates the need for any manual collapsing?
2017-02-12 18:18:35 -05:00
Thomas Harte
0c9be2b09e
Shunted the collisions buffer onto a separate area of the heap for the time being, as a debugging aid. Also added a few more initial values.
2017-02-12 18:16:50 -05:00
Thomas Harte
df8a5cbe6d
Made attempts (i) to respect the delay flag; and (ii) to account for border-region sprite clocking.
2017-02-12 17:35:09 -05:00
Thomas Harte
9ce68c38ae
Made an effort to implement proper pixel output for sprites.
2017-02-12 14:01:50 -05:00
Thomas Harte
40954d6a2a
Attempted to factor out parts I expect to reuse for missiles and the ball.
2017-02-12 11:31:17 -05:00
Thomas Harte
ac444a3f34
Corrected both position increments and target time calculation.
2017-02-11 21:24:14 -05:00
Thomas Harte
b8abeced6d
Made an attempt to introduce the proper eventful loop for player output. With debugging yet to occur.
2017-02-11 21:01:58 -05:00
Thomas Harte
aeff59addc
Implemented motion 'correctly', for programs written to do all work outside of the pixel area.
2017-02-11 20:25:49 -05:00
Thomas Harte
7ab6023a0c
Ensured no attempt to call strcmp on null if a file name without an extension got into here.
2017-02-11 13:36:36 -05:00
Thomas Harte
97cdfea9e9
Resolved spurious static analyser complaint: input_size and output_size aren't supposed to have defined values if input or output is null. But whatever.
2017-02-11 13:36:09 -05:00
Thomas Harte
aff69dbc34
Resolved spurious static analyser issue; screen mode will always be 0–6 but it doesn't know that. Setting a non-zero divider doesn't feel worth worrying about for a cleaner compile.
2017-02-11 13:35:22 -05:00
Thomas Harte
6381e4e1b0
All that's happened to position is that numbers have been added to it. So it can't be negative, given that it wasn't before. So a regular modulo will do.
2017-02-11 13:34:36 -05:00
Thomas Harte
c8e595d9aa
Merge branch 'master' into TIAImprovements
2017-02-11 13:20:52 -05:00
Thomas Harte
8c88fd4261
Merge pull request #99 from TomHarte/StartupRace
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Resolves a race condition on machine startup
2017-02-11 13:18:19 -05:00
Thomas Harte
a86a6367b5
Slightly shuffled to avoid a race condition on the best-effort updater.
2017-02-11 13:17:11 -05:00
Thomas Harte
905ed1f87b
Switched to the more natural type, which is also signed, making my logic less prone to error.
2017-02-11 13:16:53 -05:00
Thomas Harte
8de6caf6ff
Started trying to get into a proper structure here. Chickened out.
2017-02-11 12:59:13 -05:00
Thomas Harte
327c19a222
Slightly shuffled to avoid a race condition on the best-effort updater.
2017-02-11 12:58:47 -05:00
Thomas Harte
40d3f5f7f6
Attempted properly to respect start.
2017-02-11 08:26:09 -05:00
Thomas Harte
64d5712d1d
Added an incorrectly-coded version of horizontal move, at least so that I can verify that information is going into the correct slots.
2017-02-10 07:23:43 -05:00
Thomas Harte
3b20d862f0
Made an initial attempt to mark sprite positions. But without hmove implemented, they're all over the place.
2017-02-09 20:53:42 -05:00
Thomas Harte
2e9ef2b0ef
Took a shot at reinstating the horizontal blank extend flag.
2017-02-09 18:37:19 -05:00
Thomas Harte
70745286a5
Ensured this array is properly aligned for the uin32_t accesses I intend to make for background drawing.
2017-02-08 20:25:23 -05:00
Thomas Harte
dcb7584060
Added the four-cycle playfield output latency and ensured you can't get smaller-than-usual pixels by rapid register value changing.
2017-02-08 07:30:32 -05:00
Thomas Harte
a477499724
Got a bit more explicit with range returned by get_cycles_until_horizontal_blank and hence attempted a more thorough (/correct) version of WSYNC.
2017-02-07 22:14:45 -05:00
Thomas Harte
944d835eea
Switched explicitly to an accumulation model for filling the collision buffer.
2017-02-06 21:59:28 -05:00
Thomas Harte
8f5039130c
Changed index naming order to ensure no out-of-bounds accesses.
2017-02-06 21:48:41 -05:00
Thomas Harte
ba165bb70a
Made an attempt properly to populate collision registers from the collision buffer.
2017-02-06 21:15:55 -05:00
Thomas Harte
474e2e8d2c
Fixed once again to respect mid-line palette changes.
2017-02-06 20:09:12 -05:00
Thomas Harte
8b8eb787df
Fixed complete invisibility.
2017-02-06 18:42:58 -05:00
Thomas Harte
66bcdd36f3
Made an attempt to introduce an intermediate buffer that ends up with a bit mask of all graphical components present on it, and to use that to infer collision flags and colours, based on playfield priority and colour palette. Immediately yielding: a blank screen. Good work!
2017-02-06 18:29:00 -05:00
Thomas Harte
fcf8cafb5d
Sought to ensure that communicating a colour burst in multiple parts doesn't ruin the phase.
2017-02-06 18:27:44 -05:00
Thomas Harte
6bcf95042c
Started trying to be a bit more explicit about usage, and to divide up drawing responsibility.
2017-02-05 17:51:56 -05:00
Thomas Harte
23f3ccd77a
Made a further attempt to prevent overwrites.
2017-02-05 17:47:34 -05:00
Thomas Harte
f2437cb257
Added some additional documentation, started making steps towards returning sprites, fixed a counter bug that would exhibit as incorrect sync.
2017-01-31 20:30:32 -05:00
Thomas Harte
abe04334c2
Attempted to retain more player information, and removed the output cursor from class storage as I think it's acceptable as a temporary.
2017-01-30 22:42:27 -05:00
Thomas Harte
8545707b54
Reinstituted the playfield. Probably needs more buffering though. Time to look into delays.
2017-01-30 21:38:58 -05:00
Thomas Harte
2b08758b2b
Started capturing playfield/ball and background colours.
2017-01-30 08:08:03 -05:00
Thomas Harte
764b528891
Made a first attempt at switching to a model that respects blank and sync.
2017-01-30 07:19:19 -05:00
Thomas Harte
92754ace7a
Some mild fixes get me up to having a rolling screen of vertical lines. Which is what I was hoping for right now!
2017-01-29 22:16:23 -05:00
Thomas Harte
1cc13b2799
Merge branch 'master' into TIAImprovements
2017-01-29 16:13:46 -05:00
Thomas Harte
38f944bc34
This needs to be a memmove as the areas may overlap.
2017-01-29 16:13:33 -05:00
Thomas Harte
427175b9c0
Added an extra flag to avoid potential race condition on is_full_, being reset from the background despite a write area not having been allocated.
2017-01-29 16:13:28 -05:00
Thomas Harte
ebde955356
This needs to be a memmove as the areas may overlap.
2017-01-29 16:12:48 -05:00
Thomas Harte
7fd02e7f4c
Added an extra flag to avoid potential race condition on is_full_, being reset from the background despite a write area not having been allocated.
2017-01-29 16:11:29 -05:00
Thomas Harte
d51f185dc7
Made an attempt to reintroduce the basic horizontal loop.
2017-01-29 15:43:57 -05:00
Thomas Harte
2390358c24
Prevented unbounded CPU usage, albeit without yet deciding who has authority for the clock rate.
2017-01-29 14:19:26 -05:00
Thomas Harte
2432a3b4d7
Fixed condition — >= is smarter.
2017-01-29 14:00:01 -05:00
Thomas Harte
9c3597c7e3
Attempted to reintroduce enough logic to handle [most of] line timing, such that WSYNC works. Initial objective is to get back to having a working background.
2017-01-29 13:47:36 -05:00
Thomas Harte
fba6baaa9c
Stubbed and disabled to get back to building.
2017-01-28 21:56:01 -05:00
Thomas Harte
a246530953
Supposing the TIA were implemented, this is (more or less) what the Atari 2600 would now look like.
2017-01-28 21:46:40 -05:00
Thomas Harte
0ffded72a6
Created a placeholder class for a factored-out TIA. There's a bit more it'll need to do, like vending (or receiving) a CRT but this is the full hardware stuff, I think.
2017-01-28 16:19:08 -05:00
Thomas Harte
acadfbabec
Merge pull request #97 from TomHarte/Icons
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Introduces some file association icons
2017-01-27 21:36:13 -05:00
Thomas Harte
9001cc3fc2
Added a cartridge image.
2017-01-27 21:26:11 -05:00
Thomas Harte
015b2b49f9
Introduced an incomplete set of file association icons.
2017-01-26 22:21:55 -05:00
Thomas Harte
92f928ca42
Merge pull request #96 from TomHarte/PhaseAlignedSampling
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Optimises existing composite flow
2017-01-25 21:51:11 -05:00
Thomas Harte
6d087ca054
Restored 2600 audio.
2017-01-25 21:29:19 -05:00
Thomas Harte
c2d7e36c8f
Ensured logic for whether composite output is in use is consistent.
2017-01-25 21:25:03 -05:00
Thomas Harte
4d6e78e641
Reinstated temporary Oric-related fix.
2017-01-24 22:16:15 -05:00
Thomas Harte
5761c8267b
[Re-]Eliminated connection between colour subcarrier frequency and monitor output mode.
2017-01-24 20:48:54 -05:00
Thomas Harte
a66a8c31b2
Merge branch 'master' into PhaseAlignedSampling
2017-01-24 07:29:18 -05:00
Thomas Harte
19e4ee12e1
Merge branch 'PhaseAlignedSampling' of github.com:TomHarte/CLK into PhaseAlignedSampling
2017-01-24 07:29:14 -05:00
Thomas Harte
4871572a33
Optimised images.
2017-01-23 21:28:13 -05:00
Thomas Harte
2e744a95e4
Merge branch 'master' into PhaseAlignedSampling
2017-01-23 21:11:14 -05:00
Thomas Harte
ff87f1390d
Merge pull request #95 from TomHarte/ReadmeImages
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Added some example composite images
2017-01-23 20:49:16 -05:00
Thomas Harte
76ca30c26d
This version works better.
2017-01-23 20:47:48 -05:00
Thomas Harte
7c2685cb34
Made an attempt at reducing displayed image size.
2017-01-23 20:46:35 -05:00
Thomas Harte
8cf25a2d70
Went tabular.
2017-01-23 20:44:42 -05:00
Thomas Harte
8d69dd30f3
Testing a table.
2017-01-23 20:43:43 -05:00
Thomas Harte
ae8068b86f
Added Stormlord images.
2017-01-23 20:38:30 -05:00
Thomas Harte
baeb0ee89f
Reduced image sizes.
2017-01-23 20:34:15 -05:00
Thomas Harte
c07993bb0a
Added more images.
2017-01-23 20:33:00 -05:00
Thomas Harte
7680cbf9c3
Testing this Markdown implementation for image sizing support.
2017-01-23 20:26:57 -05:00
Thomas Harte
4920fe6701
Added a grab of the Repton title screen.
2017-01-23 20:23:49 -05:00
Thomas Harte
55fe0176bd
Added a space. Probably need to hold for a better example though.
2017-01-12 22:12:37 -05:00
Thomas Harte
99fcbb55d1
Attempted to improve layout.
2017-01-12 22:11:25 -05:00
Thomas Harte
6f78ecd12b
Added a small pictorial example. Hardly the best, but a step in the right direction.
2017-01-12 22:06:45 -05:00
Thomas Harte
ced644b103
It seems likely that an AY divides its clock by 8, not 16. I had conflated wave frequency and counter clock.
2017-01-11 22:03:01 -05:00
Thomas Harte
be1cb2a551
Fixed NTSC phase.
2017-01-11 21:31:24 -05:00
Thomas Harte
b4159295f6
Switched to using quads for intermediate draws. The specific concern is the flexibility offered in the GL spec as to line drawing algorithms. And even if a driver implements exactly to spec then it should omit the final pixel.
2017-01-11 21:18:41 -05:00
Thomas Harte
d0a93409e6
Made an attempt to simplify in-shader phase calculation, now that output position is a direct multiple of phase.
2017-01-11 08:18:00 -05:00
Thomas Harte
4c3669f210
Reduced precision of input phase, but I'm not necessarily persuaded by it as a move. However it's clear that something is off in that whole area. But if phase is locked by output position, do I need to retain this level of complexity? Also ensured that intermediate buffers prior to the final are sampled using the nearest sampling mode, also to reduce precision errors.
2017-01-10 22:08:07 -05:00
Thomas Harte
eeb646868b
Switched off filtering, at least temporarily, to try to ensure that sampling is all where it should be.
2017-01-08 19:53:08 -05:00
Thomas Harte
3d789732a2
Switched back to full buffer clearing. Until I can figure out the source of noise.
2017-01-08 19:50:31 -05:00
Thomas Harte
d2a7d39749
Ensured the output lock isn't held while talking to the delegate.
2017-01-08 19:49:21 -05:00
Thomas Harte
9521718120
Colour phase is multiplied by 255, not 256.
2017-01-08 17:21:26 -05:00
Thomas Harte
28909e33ca
Eliminated phaseCyclesPerTick as implied.
2017-01-08 16:48:02 -05:00
Thomas Harte
79632b1d34
Instituted de-escalating phase-related extensions, definitively to kill rounding error edges.
2017-01-08 16:24:22 -05:00
Thomas Harte
cf6d03e35c
Merge branch 'master' into PhaseAlignedSampling
2017-01-08 14:49:40 -05:00
Thomas Harte
4a4b31a15c
Merge pull request #94 from TomHarte/ElectronDisks
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Fixes the Electron's ability automatically to launch a disk
2017-01-08 14:48:58 -05:00
Thomas Harte
f3d9aec8fc
Fixed Electron's support for automatically booting floppy disks.
2017-01-08 14:47:41 -05:00
Thomas Harte
7ad64ff16b
Made further efforts to support throughput via memory barrier.
2017-01-08 14:47:16 -05:00
Thomas Harte
6153ada33b
Fixed Electron's support for automatically booting floppy disks.
2017-01-08 14:46:19 -05:00
Thomas Harte
be48c950b4
Started taking steps towards using a texture barrier where possible to reduce all of my framebuffer binds. Some output appears, but it's not correct.
2017-01-08 11:13:20 -05:00
Thomas Harte
0487b8c178
Definitively eliminated the additional y filtering step; if I'm going to work to ensure always four samples per colour cycle, I can put the channel separation coefficients directly into their shaders, cutting down on samples.
2017-01-07 16:02:33 -05:00
Thomas Harte
5740015f56
Temporarily disabled composite processing to show the pure stream. Fixed both automatic calculations of phase — per line and, at input, per pixel.
2017-01-07 12:38:00 -05:00
Thomas Harte
c84004bfa3
Fixed: colour_cycle_numerator_ doesn't need to be multiplied by the time multiplier because it'll get that for free from the calculation of next_run_length.
2017-01-06 21:36:19 -05:00
Thomas Harte
c746a3711f
Temporarily disabled my attempt to be clever with bilinear filtering when applying a lowpass filter. Will need to investigate.
2017-01-04 08:06:18 -05:00
Thomas Harte
aa7774a9a6
Experimental: up the chroma accuracy, just let the luma go straight through. Subject to figuring out how I'm still losing so much precision.
2017-01-03 22:41:34 -05:00
Thomas Harte
a836120945
Restored proper colour separation, but somewhere a massive hit in horizontal resolution is happening — much greater than one would expect from the sample size picked. So investigation to come.
2017-01-03 22:32:07 -05:00
Thomas Harte
7d60df9075
Added the option for both intermediate and output shaders to use only a portion of the input/output texture; made an attempt to pick an appropriate proportion in order to align signal sampling with the colour subcarrier.
2017-01-03 22:16:52 -05:00
Thomas Harte
f2b8b26bc4
Started throwing some comments into my shaders.
2017-01-03 21:16:38 -05:00
Thomas Harte
9d60172571
Merge pull request #93 from TomHarte/ReadWriteTrack
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Implements the Type 3 WD177x commands
2017-01-01 21:01:56 -05:00
Thomas Harte
eca3995481
Added a CRC check for read address, ensured CRC, lost data and record not found are initially reset.
2017-01-01 21:00:25 -05:00
Thomas Harte
044c920a5b
Made it more explicit that there are no unhandled cases.
2017-01-01 20:56:52 -05:00
Thomas Harte
0df9ce5a76
Made an attempt at read address. So superficially that leaves only the force interrupts.
2017-01-01 20:55:09 -05:00
Thomas Harte
f94f34f053
Made an attempt at read track. Which means process_input_bit can't just swallow syncs any more; it now reports them as tokens of type ::Sync.
2017-01-01 20:39:19 -05:00
Thomas Harte
4ad2d2bedd
Merge branch 'master' into ReadWriteTrack
2017-01-01 20:04:22 -05:00
Thomas Harte
e28f72d919
Merge pull request #90 from TomHarte/TravisCI
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Introduces a shared Xcode scheme plus a first attempt at Travis CI integration
2017-01-01 20:03:26 -05:00
Thomas Harte
c994fa39f6
Ensured spin-up doesn't occur if there's no motor line.
2016-12-31 16:18:30 -05:00
Thomas Harte
1ea4f0d79d
Made an attempt to implement 'write track' and ensure that 'write sector' can't end without announcing that it has ended writing.
2016-12-31 16:01:44 -05:00
Thomas Harte
0689df1349
Merge pull request #92 from TomHarte/MFMCleanup
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Adds some documentation and tidies some of the new MFM infrastructure
2016-12-31 15:32:11 -05:00
Thomas Harte
b3c33d993a
Made an attempt to explain the requirements placed upon Disk subclasses that wish to support writing.
2016-12-31 15:30:48 -05:00
Thomas Harte
8eb21c6702
The "MFM...Byte"s aren't MFM-specific, they're relevant to both FM and MFM encoding. So renamed them. Also slimmed syntax within MFM.cpp mostly where emigration from the Acorn disk analyser had left a residue of lengthy namespace specification.
2016-12-31 15:25:11 -05:00
Thomas Harte
4c62487e6e
Merge pull request #91 from TomHarte/TableCRC
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Switches to a table-based implementation of CRC generation
2016-12-31 14:16:17 -05:00
Thomas Harte
a147d56ce6
Switched to a table-based implementation of CRC generation, adding construction cost to cheapen running cost.
2016-12-31 14:15:20 -05:00
Thomas Harte
7b696b0962
Switched scheme to shared.
2016-12-31 13:11:07 -05:00
Thomas Harte
57bb771fb7
It looks like spaces are automatically escaped (?)
2016-12-31 13:05:55 -05:00
Thomas Harte
5201a59c44
Attempted to introduce Travis CI.
2016-12-31 13:03:32 -05:00
Thomas Harte
df6e98fa52
Merge pull request #89 from TomHarte/OricDiskWrites
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Adds write support for the Oric .DSK file format
2016-12-31 12:53:43 -05:00
Thomas Harte
52b850a3f5
Quick extra: make sure parsed tracks don't overflow the 6400 byte space available in an MFM disk. Which might be better expressed as 6250?
2016-12-31 12:51:52 -05:00
Thomas Harte
cfbab1448c
Switched to a track parsing that disallows synchronisation values within sector contents.
2016-12-31 12:23:08 -05:00
Thomas Harte
12549ff412
Might as well get the file offset before entering the critical section; also moved the lock guard down more explicitly to group with the second set of actions.
2016-12-31 11:48:46 -05:00
Thomas Harte
6f0b5427e4
Made an attempt to avoid repetition of sync bytes.
2016-12-31 00:20:00 -05:00
Thomas Harte
0123b37213
Made an attempt to include sync values in the stream and properly to align.
2016-12-31 00:11:31 -05:00
Thomas Harte
ea4d85e1cd
The virtual disk constructed is the same across all tracks. So why not just request zero?
2016-12-31 00:10:35 -05:00
Thomas Harte
f217d508b8
Completed first attempt at write support for Oric disk images.
2016-12-30 23:12:46 -05:00
Thomas Harte
1f625fad66
Decided that if this is an [M]FM parsing function then it should be something more intelligent than a mere PLL record. Which I guess conveniently implies Oric DSK-esque behaviour. But properly defined, rather than very vaguely.
2016-12-30 23:10:52 -05:00
Thomas Harte
632b3c63b1
Added the infrastructure necessary for Oric disks to appear writeable to the machine and to receive changed tracks.
2016-12-30 22:51:48 -05:00
Thomas Harte
d581294479
Added get_track to get the PLL output for a complete track.
2016-12-30 19:59:23 -05:00
Thomas Harte
0f399b0a0c
Made type conversion explicit.
2016-12-30 19:59:01 -05:00
Thomas Harte
c6fcc40ac5
Merge pull request #88 from TomHarte/WDWrites
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Implements write support for the WD.
2016-12-30 18:11:00 -05:00
Thomas Harte
3b29e6a473
Ensured SSD and ADFs are grown if required.
2016-12-30 18:08:12 -05:00
Thomas Harte
07dacff42d
Added writing for Acorn ADF disks, plus appropriate TODOs in both similar bits of boilerplate.
2016-12-30 18:03:30 -05:00
Thomas Harte
c85450648f
Fix: make sure copies have proper event lengths. Also made it much clearer what's going on with the initial copy to the heap.
2016-12-30 17:55:46 -05:00
Thomas Harte
c740d9655a
Fixed: index_count_ may have been left high by a previous call; reset it just in case.
2016-12-30 17:55:06 -05:00
Thomas Harte
d09e7ac1e8
Made an attempt at reacting appropriately if the very first thing that looks like a sector doesn't pan out.
2016-12-30 17:44:35 -05:00
Thomas Harte
5d63556870
Periods need a custom copy constructor too, if they're going to avoid sharing an event_source.
2016-12-30 17:39:52 -05:00
Thomas Harte
e5cc77f22d
Added an extra sanity check.
2016-12-30 17:29:51 -05:00
Thomas Harte
81a3cbac45
Ensured a copy is passed for writing back rather than the original.
2016-12-30 17:26:44 -05:00
Thomas Harte
63ff5165a4
After a quick bit of reading, discovered the virtual copy constructor pattern really is only a convention in C++, and conformed to it. Which hopefully gives copyable tracks.
2016-12-30 17:25:39 -05:00
Thomas Harte
71dbd78cf2
If asynchronous background processing is to occur on tracks then, given that they inherently have state, they'll need to be copyable, and ideally 'cheaply' (though it's not too great a priority). So started implementing appropriate copy constructors. Also introduced an extra level of indirection to PCMSegmentEventSource so that it can copy itself without copying the underlying PCMSegment, which is 95% of the heft of a track in all currently-implemented cases.
2016-12-30 14:23:26 -05:00
Thomas Harte
f88f3c65e9
Removed duplicated newline.
2016-12-30 14:21:36 -05:00
Thomas Harte
82bb78fb2d
Ensured that get_sector copes even if any invalid sectors are encountered.
2016-12-30 14:21:14 -05:00
Thomas Harte
6fc692cd34
Attempted to switch to an asynchronous means for continuous file updates. Testing with SSD, as usual.
2016-12-29 22:15:58 -05:00
Thomas Harte
bbd94749f4
... and I guess an instant maximal simplification is also easy if length ends up being 0
2016-12-29 11:02:21 -05:00
Thomas Harte
54900ca3fb
Addition and subtraction can end immediately without performing any extra work if the operand is 0
2016-12-29 11:00:47 -05:00
Thomas Harte
a8bc9d830e
Removed leftover very temporary debugging aid.
2016-12-28 23:03:05 -05:00
Thomas Harte
b9fad184d7
Added just enough for a complete manual test of writing to a .ADF with the 1770 then getting the correct result parsing it back on the host side in order potentially to update a file.
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... which means that now it's time to worry about when and how mounted files should actually update themselves. Which will make for some fun with threading, I dare say.
2016-12-28 23:00:47 -05:00
Thomas Harte
af1b396c9e
Found an ugly issue with Storage::Time as implemented (i) to be unsigned; and (ii) automatically to simplify. Will need to fix. Here's a quick workaround for this one segment of code.
2016-12-28 22:57:11 -05:00
Thomas Harte
9cb902cc4f
Experimentally marked ADF as writable too, immediately discovering a mistake in the analysing MFM decoder.
2016-12-28 22:34:22 -05:00
Thomas Harte
e4000bd060
Added some even more verbose logging; slightly simplified write loop logic, and decided it's definitely write_byte that's responsible for CRC generator feeding.
2016-12-28 21:24:19 -05:00
Thomas Harte
ce814c9e99
These can be const.
2016-12-28 21:23:22 -05:00
Thomas Harte
bfe6c0a0c1
Ensured that FileHolder gets a writeable file reference if one is possible, and records whether the file in hand is read-only. So now the SSD class can answer honestly.
2016-12-28 20:09:14 -05:00
Thomas Harte
4adcb46665
Fixed FM-mode CRC generation.
2016-12-28 19:51:27 -05:00
Thomas Harte
46a93d2e12
Fixed errors to ensure that FM disks, at least, follow the same CRC generation rules when being built from sectors and when being parsed.
2016-12-28 19:48:46 -05:00
Thomas Harte
1277a67f9a
Introduced data_mode_ to replace is_reading_data_, representing that there are now three possible modes. When writing, any input from the read head won't affect the CRC generator.
2016-12-28 19:26:21 -05:00
Thomas Harte
720b1e5802
Attempted to ensure proper CRC generation for FM-format input.
2016-12-28 18:56:53 -05:00
Thomas Harte
8cd1575891
Similar fix to that over in Oric land: ensure a known, effective initial value for the Plus 3's control register.
2016-12-28 18:52:36 -05:00
Thomas Harte
3a9ad3fb08
Fixed Oric .DSK handling, per my latest understanding. Which creates a desire to write shorts directly to the disk surface, so exposed that in the encoder.
2016-12-28 18:50:28 -05:00
Thomas Harte
90151e2094
Fixed to ensure a known initial control register value, which has taken effect.
2016-12-28 18:49:32 -05:00
Thomas Harte
7a627b782d
Reintroduced writing of MFM sync marks when writing a sector.
2016-12-28 18:48:50 -05:00
Thomas Harte
a568172758
Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.
2016-12-28 18:29:37 -05:00
Thomas Harte
99993a1b24
Since it's about to become important that objective results match, added a couple of objective-result tests for the CRC generator.
2016-12-27 19:03:46 -05:00
Thomas Harte
9c0f622a2e
Started working CRC checking into the 1770. Discovered immediately that my generated CRC does not match that built into the Oric disk images. So mine is pretty-much certainly wrong. An opportunity for learning!
2016-12-26 16:46:26 -05:00
Thomas Harte
0490a47058
Worked on the all-around framework for decoding sectors back from tracks when closing down a file. Hit the wall that the parser is more observant of CRCs than the WD. No, really. So I guess I have to stop avoiding that whole issue.
2016-12-26 14:24:33 -05:00
Thomas Harte
83c433c142
Deviated from the data sheet, which seems likely to be correct. Hence removed a whole load of the temporary logging.
2016-12-26 12:48:49 -05:00
Thomas Harte
742c5df367
With lots of logging arising temporarily, fixed bug whereby conversion to a patched track would lead to holding a track with a distinct measure of time, leading to improperly-placed patches.
2016-12-25 22:00:39 -05:00
Thomas Harte
b538ee5bd8
Fixed discovery of correct active period and setting of track time, when seeking.
2016-12-25 21:32:50 -05:00
Thomas Harte
a6d038cad9
Eliminated special case that doesn't seek properly and isn't needed. Added TODO.
2016-12-25 21:32:14 -05:00
Thomas Harte
4fca30b81f
Made the Plus 3 less chatty, documented invalidate_track.
2016-12-25 21:06:58 -05:00
Thomas Harte
26710c988d
Modified SSD to ensure a fully-formatted surface is represented even if no track data is in the source file. This corrects the controller's sense of write success.
2016-12-25 20:40:06 -05:00
Thomas Harte
acc35885cd
Attempted to reduce track invalidations.
2016-12-25 20:38:25 -05:00
Thomas Harte
c0a1264ab0
Slightly improved legibility.
2016-12-25 20:19:47 -05:00
Thomas Harte
e2b829f68e
Made an attempt to write the proper address mark.
2016-12-25 20:15:07 -05:00
Thomas Harte
beaa868079
Factored the MFM parser out into encodings.
2016-12-25 20:00:57 -05:00
Thomas Harte
1349e85d83
[Mostly] fixed track write-back.
2016-12-25 19:19:22 -05:00
Thomas Harte
74e98fd097
Made an attempt to write actual data (albeit that CRC calculation is still missing).
2016-12-25 19:18:45 -05:00
Thomas Harte
007c13ec16
Fixed: cycles_per_bit_ isn't a function of the rotational multiplier, it's absolute. Also made sure that exactly hitting the end of a bit counts.
2016-12-25 16:35:39 -05:00
Thomas Harte
98be6ede45
Shuffled a little to reduce risk of overflow, ensured writing is a loop, still seem to be writing too quickly for some reason.
2016-12-25 16:13:05 -05:00
Thomas Harte
d2ad2c756e
Added enough shovelling to write rubbish for an entire sector.
2016-12-25 15:46:49 -05:00
Thomas Harte
ec55a25620
It makes sense to simplify these ahead of time.
2016-12-25 12:32:25 -05:00
Thomas Harte
aceb7e3b6b
Started implementing write sector on the 1770, immediately deciding it would be useful to have a callback for end-of-queued-data-written from disk controller. So had a go at implementing that, naively. More investigation required.
2016-12-25 12:31:38 -05:00
Thomas Harte
901f19f89c
Added enough stuff that SSDs attached to a 1770 will now reach the entry point for writing.
2016-12-25 09:46:12 -05:00
Thomas Harte
e56beb3e9c
Merge pull request #86 from TomHarte/DiskWrites
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Implements backing work for in-memory disk writes
2016-12-25 09:37:20 -05:00
Thomas Harte
9d555c4a02
Let's try just declining to pump the PLL while in write mode. Added documentation to explain.
2016-12-25 09:19:18 -05:00
Thomas Harte
b57038edc5
Actually, at least index holes will still be receivable while writing, so this wasn't entirely correct. Probably best to leave it in.
2016-12-25 09:16:09 -05:00
Thomas Harte
d606bd7ce5
Added saturation test, fixed code as indicated.
2016-12-24 23:29:37 -05:00
Thomas Harte
09ff9d6a26
Introduced a couple more floating-point conversion tests, fixed errors uncovered.
2016-12-24 23:21:19 -05:00
Thomas Harte
e25195a718
Added a single test for Storage::Time, discovering that I had the wrong sign on float conversions.
2016-12-24 22:59:01 -05:00
Thomas Harte
af69b21033
This is almost complete, except that it doesn't act appropriately if some bits are written but not enough to cover the entire writing period.
2016-12-24 22:51:26 -05:00
Thomas Harte
f601d796f5
Added documentation.
2016-12-24 22:37:20 -05:00
Thomas Harte
6e94d0c19f
Extended Storage::Disk::Disk to permit write-back of modified tracks, exposed some interface via Storage::Disk::Drive.
2016-12-24 22:11:31 -05:00
Thomas Harte
7f303cfceb
Continued the baby steps.
2016-12-24 21:54:43 -05:00
Thomas Harte
afc6f4129c
Withdrew unused tally.
2016-12-24 21:47:57 -05:00
Thomas Harte
1e416d4af0
Withdrew now-unused and never-implemented API from TimedEventLoop, and the redundant track time count from DiskController.
2016-12-24 21:02:10 -05:00
Thomas Harte
bedea48d03
This is a much better way of dealing with being partway into an incoming event. Subject to eliminating overruns, of course.
2016-12-24 20:54:27 -05:00
Thomas Harte
4cb17143ef
Messing around trying to lock down timing precisely. Which includes formal initial conditions.
2016-12-24 15:18:46 -05:00
Thomas Harte
4d4852bb78
Ensured that Times start life in their simplest form.
2016-12-24 15:18:03 -05:00
Thomas Harte
4728bda0a2
Added an additional constructor to make sure that regular ints go to the correct place.
2016-12-24 13:27:57 -05:00
Thomas Harte
1e970a9772
Started stepping slowly towards allowing writing on the disk controller, taking the opportunity to introduce self-simplifying behaviour to Storage::Time.
2016-12-24 13:07:23 -05:00
Thomas Harte
42f25cdffc
Merge branch 'master' into DiskWrites
2016-12-22 22:47:19 -05:00
Thomas Harte
393dc5c64f
Merge pull request #87 from TomHarte/ElectronVideoFix
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Ensures the Electron's video base address is set properly at construction.
2016-12-22 22:46:55 -05:00
Thomas Harte
3805e3d17d
Ensured base address is set properly at construction.
2016-12-22 22:46:02 -05:00
Thomas Harte
7028f57336
Simplified a little further.
2016-12-22 18:13:10 -05:00
Thomas Harte
e4e0347638
Attempted to consolidate some of the repetition.
2016-12-21 22:17:00 -05:00
Thomas Harte
72ca06cf8d
Added some extra tests, performed some basic tidying. Probably should do more.
2016-12-21 19:54:19 -05:00
Thomas Harte
6a0c7f22ee
Added a few more tests. All passing.
2016-12-20 21:46:34 -05:00
Thomas Harte
03579f33f1
Fixed multi-coverage insertion, via an appropriate test.
2016-12-20 21:38:32 -05:00
Thomas Harte
7eca910cc5
Fixed insertion location finding logic, working on the relevant test.
2016-12-20 21:14:05 -05:00
Thomas Harte
c180340474
Added two more passing tests and one that crashes.
2016-12-20 19:25:58 -05:00
Thomas Harte
823ab9bc34
Completed initial non-trivial test, fixing revealed errors.
2016-12-20 19:15:36 -05:00
Thomas Harte
5a508ea0df
Attempted properly to cover the exactly-equal starts and ends cases, and to improve meaning.
2016-12-20 18:32:49 -05:00
Thomas Harte
63d861a2f3
Switched from C-in-the-brain manual offset counting to using iterators like an ordinary C++ person.
2016-12-20 18:17:54 -05:00
Thomas Harte
6f17076003
Switched to much more logical shared_ptr ownership of PCMSegmentEventSources by Periods.
2016-12-20 18:13:10 -05:00
Thomas Harte
497b2ae4dd
Still by manual inspection: the time for the next event should be provisional until proven acceptable, allowing a proper measurement of time until exiting the period to be taken; also fixed the accumulated period error when seeking back onto the underlying track.
2016-12-20 08:14:16 -05:00
Thomas Harte
6bdde542c5
Edging towards functioning automatic tests, fixed right-period adjustment and slightly decreased searching cost while in the process of adding a test.
2016-12-20 07:52:14 -05:00
Thomas Harte
ec624eaab1
Made an attempt fully to implement PCMPatchedTrack. Which now requires tests.
2016-12-20 07:30:57 -05:00
Thomas Harte
1ef1f6ec69
Attempted to implemnt seek_to and to finish add_segment. Started doing a little of get_next_event but ran out of time for the day.
2016-12-19 21:46:02 -05:00
Thomas Harte
8f937ceac8
Made an attempt to come up with a data structure that actually makes sense (though perhaps this is textbook list rather than vector stuff? I guess it depends on the frequency I expect inserts to occur versus reads) and to implement inserts. Though the Periods aren't yet honoured.
2016-12-19 07:42:43 -05:00
Thomas Harte
1df478d250
Removed dead header file.
2016-12-18 23:04:16 -05:00
Thomas Harte
e081f224b6
Implemented a very basic PCMTrack test, nevertheless revealing an oversight in PCMSegmentEventSource related to improperly counting to the index hole if the final bit is set. Took that as a message that I should comment and document the event source.
2016-12-18 22:53:24 -05:00
Thomas Harte
a6354ebb01
Reimplemented PCMTrack to use PCMSegmentEventSource, eliminating code duplication.
2016-12-18 21:37:05 -05:00
Thomas Harte
f9a5595dad
Added seeking tests, correcting such errors as uncovered.
2016-12-18 10:19:24 -05:00
Thomas Harte
3297f6d545
Made an attempt to implement seek_to on PCMSegmentEventSource, taking account of off-by-half counting.
2016-12-17 22:44:33 -05:00
Thomas Harte
3116a2cf4c
Realised I was actually testing PCMSegmentEventSource, not PCMSegment; implemented a spread of tests; hence fixed PCMSegmentEventSource.
2016-12-17 21:47:13 -05:00
Thomas Harte
254cc41fd6
Made an attempt to separate and isolate the stuff of creating flux events from a PCMSegment, eventually to factor that out of PCMTrack and make it available also to PCMPatchedTrack.
2016-12-17 21:13:57 -05:00
Thomas Harte
313db75303
Ensured the patchable track owns its underlying track.
2016-12-17 18:17:22 -05:00
Thomas Harte
3017062e89
Maybe TDD is the way to get over my activity block on this thing? Fixed the existing ArrayBuilder tests so that the tests target builds again, added an extremely trivial PCMTrack test, heading towards PCMPatchedTrack tests.
2016-12-17 17:05:49 -05:00
Thomas Harte
f1a08b7ab5
Opted to pass times by reference and added enough to PCMPatchedTrack that it could start being used by the disk controller, albeit that it doesn't work.
2016-12-17 16:26:45 -05:00
Thomas Harte
dc08a23ceb
This is going to be a slow walk, I think. This class attempts to be the scratchpad which will hold in-memory track modifications.
2016-12-16 19:20:38 -05:00
Thomas Harte
1e757d1039
Merge branch 'master' into DiskWrites
2016-12-15 19:53:39 -05:00
Thomas Harte
ea1b3d447b
Merge pull request #85 from TomHarte/ElectronRefactor
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Applies a healthy cleaning to the Electron implementation
2016-12-15 19:53:07 -05:00
Thomas Harte
63107cd492
Tidied, very slightly.
2016-12-15 19:49:25 -05:00
Thomas Harte
a555c5762a
Rearranged code, hopefully into a more logical grouping.
2016-12-15 19:47:04 -05:00
Thomas Harte
4a7ddaf2e9
Added documentation and a quick note to self.
2016-12-15 19:43:04 -05:00
Thomas Harte
f61176cd7d
Reinstituted something of the don't-do-pixel-work-until-an-affecting-write-occurs optimisation.
2016-12-15 19:20:14 -05:00
Thomas Harte
c1c70a767a
Attempted fully to reinstate proper timing.
2016-12-15 18:52:16 -05:00
Thomas Harte
0326316bb8
Reinstated whole-frame counting. Thereby to reinstate proper interrupts.
2016-12-15 18:09:49 -05:00
Thomas Harte
b58b11fc93
Switched to a table-based dispatch of line-by-line actions, primarily to simplify.
2016-12-15 18:07:46 -05:00
Thomas Harte
fd541e1142
An early draft; dealing with the issue that not all cycles are necessarily consumed in a single call. Incomplete; broken. Committing for cross-machine visibility.
2016-12-12 08:01:10 -05:00
Thomas Harte
be7e05e109
Started attempting to move total responsibility for display-related interrupts and RAM timing into the video.
2016-12-11 18:34:49 -05:00
Thomas Harte
c5cf8d9531
Ensured the video subsystem correctly handles requests to run over a frame boundary.
2016-12-11 16:17:51 -05:00
Thomas Harte
52028432e1
Restored some semblance of output.
2016-12-10 22:19:10 -05:00
Thomas Harte
0aae1bd1ef
Fixed calculation of termination cycle.
2016-12-10 21:35:41 -05:00
Thomas Harte
c43e481a33
Started factoring video out of the Electron.
2016-12-10 21:07:52 -05:00
Thomas Harte
54b5056c74
Merge branch 'master' into DiskWrites
2016-12-10 19:37:48 -05:00
Thomas Harte
0653770c63
Merge pull request #84 from TomHarte/OricColour
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Switches to using the original Oric colour ROM to generate Oric composite values
2016-12-10 19:37:17 -05:00
Thomas Harte
e62be03673
Removed endianness assumption.
2016-12-10 19:10:33 -05:00
Thomas Harte
34d213dec4
Decreased Y resolution, again also hopefully temporarily.
2016-12-10 15:35:38 -05:00
Thomas Harte
81a102d951
Upped intermediate buffer size, at least temporarily, while I look for the source of the interference patterns I'm seeing.
2016-12-10 15:20:10 -05:00
Thomas Harte
a5683dfb21
Removed now untrue comment.
2016-12-10 15:19:48 -05:00
Thomas Harte
0e71802b92
Reduced Oric video to single nibble constants. Removed attempt at asynchronous flush as no longer required.
2016-12-10 14:17:46 -05:00
Thomas Harte
580f347727
Fixed Oric SCART mode by having it change what it's giving to the CRT based on which shader it knows will be active.
2016-12-10 13:55:56 -05:00
Thomas Harte
a549fd1ecc
Introduced the ability simply to piggy-back off the CRT's natural phase for the colour burst, thereby eliminating a couple of redundant independent attempts in the Oric and Electron.
2016-12-10 13:42:34 -05:00
Thomas Harte
e359441e2f
Added a readme.txt for the omitted Oric ROMs.
2016-12-09 22:18:11 -05:00
Thomas Harte
6cdd41e5a9
Added direct use of the colour ROM, uploading 16 bits per pixel to contain the entire ROM composite wave.
2016-12-09 22:17:10 -05:00
Thomas Harte
3b5962b171
This is an initial attempt at using the actual Oric colour ROM values for composite video generation.
2016-12-09 20:01:27 -05:00
Thomas Harte
c4041b06a8
This'll do as a write interface, won't it?
2016-12-07 22:19:20 -05:00
Thomas Harte
46ebae7e4b
Merge pull request #83 from TomHarte/InterruptLine
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Corrects interrupt line handling of the WD and Microdisc
2016-12-06 21:21:35 -05:00
Thomas Harte
c304db0f5a
Deintegrated the busy flag and the interrupt request line, as the latter is reset by status reads. Which also means I can start reporting the WD INTRQ line status directly from the Microdisc. That appears to be correct, rather than honouring the Microdisc IRQ select there.
2016-12-06 21:16:29 -05:00
Thomas Harte
4d3bdf8c7c
Fixed failure to initialise the Microdisc flag if loading a tape.
2016-12-06 20:29:05 -05:00