Thomas Harte
eb0b6e9df9
Merge pull request #1075 from TomHarte/PlayfieldMasking
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Add comments, fix playfield sprite masking.
2022-07-22 21:20:50 -04:00
Thomas Harte
426eb0f79b
Add comments, fix playfield sprite masking.
2022-07-22 17:01:38 -04:00
Thomas Harte
0b2d92048d
Merge pull request #1074 from TomHarte/SpriteContinuity
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Reinstate assumption of no Amiga sprite fetches in vertical blank.
2022-07-21 08:48:17 -04:00
Thomas Harte
6beca141d5
Reinstate assumption of no sprites in vertical blank.
2022-07-21 08:41:50 -04:00
Thomas Harte
b67790df7d
Merge pull request #1073 from TomHarte/AmigaSprites
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Improve Amiga sprite emulation.
2022-07-20 13:53:50 -04:00
Thomas Harte
f29d305597
Add missing #include.
2022-07-19 21:40:16 -04:00
Thomas Harte
89abf7faeb
Take a guess at reintroducing a special case for end-of-blank.
2022-07-19 21:25:34 -04:00
Thomas Harte
57186c3c14
Don't limit sprite fetch area; add further commentary.
2022-07-19 16:37:13 -04:00
Thomas Harte
feee6afe0f
Improve documentation.
2022-07-19 16:19:19 -04:00
Thomas Harte
cb42ee3ade
Eliminate DMAState; it sounds like VSTOP solves this problem.
2022-07-19 16:11:29 -04:00
Thomas Harte
830704b4a9
Clarify and slightly improve state machine.
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No more using the visible flag to permit a DMA control fetch.
2022-07-19 15:39:57 -04:00
Thomas Harte
0c6d7e07ee
Merge pull request #1072 from TomHarte/BetterAppDelegate
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Eliminate purposeless AppDelegate instance storage.
2022-07-18 10:15:25 -04:00
Thomas Harte
b28a3ebb4d
Eliminate purposeless instance storage.
2022-07-18 09:35:38 -04:00
Thomas Harte
6579c12053
Merge pull request #1071 from TomHarte/EverSharper
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macOS: Accept and embrace limits of composite sharpening.
2022-07-18 09:25:30 -04:00
Thomas Harte
28a7dc194c
Increase saturation.
2022-07-17 22:01:30 -04:00
Thomas Harte
a943a0b59a
Make sharpening slightly more aggressive.
2022-07-17 19:22:09 -04:00
Thomas Harte
80bc530d17
Merge pull request #1070 from TomHarte/ConcurrencyProjectFiles
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Remove concurrency/*.cpp from various project files.
2022-07-17 14:46:27 -04:00
Thomas Harte
68480530fe
Remove refernce to .cpp Concurrency files from Qt.
2022-07-17 14:39:15 -04:00
Thomas Harte
eadfa71b49
Remove refernce to .cpp Concurrency files from SDL.
2022-07-17 14:38:42 -04:00
Thomas Harte
9c43470c43
Merge pull request #1069 from TomHarte/AsyncTaskQueueRename
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Switch name back to emphasise _async_.
2022-07-16 14:50:59 -04:00
Thomas Harte
8f2e94a1d8
Switch name back to emphasise _async_.
2022-07-16 14:41:04 -04:00
Thomas Harte
52c3e0592a
Merge pull request #1068 from TomHarte/HAM
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HAM: correct red/blue confusion.
2022-07-15 16:51:09 -04:00
Thomas Harte
637161157c
Switch to slightly more sensical 'none' type.
2022-07-15 16:29:29 -04:00
Thomas Harte
76d5e53094
Fix red/blue confusion.
2022-07-15 16:24:07 -04:00
Thomas Harte
b6f40fdcc7
Merge pull request #1067 from TomHarte/MachineLeak
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macOS: Avoid likely leak of machines.
2022-07-15 15:36:21 -04:00
Thomas Harte
3de1e762b7
Avoid retain cycles.
2022-07-15 15:22:12 -04:00
Thomas Harte
ee7ef81054
Avoid potential attempt to free enqueued buffers at dealloc.
2022-07-15 15:21:58 -04:00
Thomas Harte
bae47fca20
Free buffers before disposing of queue.
2022-07-15 15:13:21 -04:00
Thomas Harte
41af76bed8
Fix variable name.
2022-07-15 15:13:03 -04:00
Thomas Harte
a7515fe156
Merge pull request #1066 from TomHarte/AudioAssert
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macOS: Fix stereo buffering, various audio asserts.
2022-07-15 14:44:55 -04:00
Thomas Harte
60f997a52c
Fix stereo buffering, various audio asserts.
2022-07-14 21:59:40 -04:00
Thomas Harte
f465fe65f4
Merge pull request #1061 from TomHarte/MacintoshPixels
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Microtweak: simplify Macintosh pixel serialisation.
2022-07-14 18:54:10 -04:00
Thomas Harte
3d6ce6c13f
Merge pull request #1065 from TomHarte/QueueShakeup
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Consolidate/simplify queue classes.
2022-07-14 18:53:59 -04:00
Thomas Harte
bf03bda314
Generalise AsyncTaskQueue, DeferringAsyncTaskQueue and AsyncUpdater into a single template.
2022-07-14 16:39:26 -04:00
Thomas Harte
126838e7c7
Thanks to std::swap and move semantics, there's no need for indirection here.
2022-07-14 15:52:31 -04:00
Thomas Harte
8310b40812
Merge pull request #1064 from TomHarte/FewerAudioAllocations
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macOS: perform audio buffer allocations ahead of time.
2022-07-14 14:58:51 -04:00
Thomas Harte
9133e25a7b
Allocate buffers once, ahead of time, and reuse.
2022-07-14 14:44:10 -04:00
Thomas Harte
ddfc2e4ca4
Provide sample length ahead of time.
2022-07-14 14:34:11 -04:00
Thomas Harte
5aa129fbd3
Merge pull request #1063 from TomHarte/EventDriven
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Switch macOS to an event-driven emulation.
2022-07-14 11:37:20 -04:00
Thomas Harte
18f01bcd48
Switch back to std::list as a kneejerk fix for AsyncTaskQueue.
2022-07-13 22:26:59 -04:00
Thomas Harte
4c031bd335
Don't use kAudioQueueProperty_IsRunning as it seems not to be trustworthy.
2022-07-13 22:22:19 -04:00
Thomas Harte
79f8cab5e2
Attempt to reduce memory allocations.
2022-07-13 21:41:04 -04:00
Thomas Harte
92efad4970
Switch to std::vector.
2022-07-13 21:36:01 -04:00
Thomas Harte
6a509c1280
Improve comments, marginally reduce dynamic_casting.
2022-07-13 18:36:40 -04:00
Thomas Harte
dcb68c16fe
Eliminate AudioQueueBufferMaxLength.
2022-07-13 15:24:43 -04:00
Thomas Harte
75f3f1a77f
Avoid the whole thread hop for a zero-length run_for.
2022-07-13 15:05:34 -04:00
Thomas Harte
10108303e7
Eliminate AudioQueueStop, which is very slow, use AudioQueueStart only as required.
2022-07-13 15:04:58 -04:00
Thomas Harte
b7ad94c676
Attempt to get a bit more rigorous in diagnosing queue stoppages.
2022-07-12 21:43:33 -04:00
Thomas Harte
1c537a877e
Remove unnecessary lock.
2022-07-12 16:22:19 -04:00
Thomas Harte
0270997acd
Add insurance against calls before setup.
2022-07-12 16:03:09 -04:00
Thomas Harte
4b9d92929a
Tweak logic.
2022-07-12 16:02:30 -04:00
Thomas Harte
5b69324ee9
Tidy up comments.
2022-07-12 15:58:16 -04:00
Thomas Harte
cce449ba8f
Merge branch 'master' into EventDriven
2022-07-12 15:06:52 -04:00
Thomas Harte
df15d60b9e
Switch to AudioQueueNewOutputWithDispatchQueue, reducing runloop contention.
2022-07-12 15:03:35 -04:00
Thomas Harte
a0e01d4c34
Add overt flushes to the SDL target.
2022-07-12 11:03:58 -04:00
Thomas Harte
59da143e6a
Add overt flushes to the SDL target.
2022-07-12 10:57:22 -04:00
Thomas Harte
4ddbf095f3
Fully banish flush from the processors.
2022-07-12 10:49:53 -04:00
Thomas Harte
4e9ae65459
Reintroduce sync matching.
2022-07-12 09:56:13 -04:00
Thomas Harte
d16dc3a5d7
Move limit up to 20fps.
2022-07-12 07:45:07 -04:00
Thomas Harte
a1544f3033
Do a better job of keeping the queue populated.
2022-07-11 20:50:02 -04:00
Thomas Harte
f2fb9cf596
Avoid unnecessary queue jump.
2022-07-10 21:35:05 -04:00
Thomas Harte
6dabdaca45
Switch to int; attempt to do a better job of initial audio filling.
2022-07-09 13:33:46 -04:00
Thomas Harte
51ed3f2ed0
Reduce modal-related thread hopping.
2022-07-09 13:03:45 -04:00
Thomas Harte
b097b1296b
Adopt granular flushing widely.
2022-07-08 16:04:32 -04:00
Thomas Harte
b03d91d5dd
Permit granular specification of what to flush.
2022-07-08 15:38:29 -04:00
Thomas Harte
cf5c6c2144
Merge pull request #1062 from TomHarte/6502BRK
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Correct 6502 for switched BRK presumption.
2022-07-08 11:24:23 -04:00
Thomas Harte
3a2d27a636
Correct for switched BRK presumption.
2022-07-08 11:15:48 -04:00
Thomas Harte
5c3084c37c
Fix construction order.
2022-07-07 20:09:37 -04:00
Thomas Harte
07ce0f0133
Attempt safe shutdown.
2022-07-07 16:56:10 -04:00
Thomas Harte
96189bde4b
Loop the Master System into the experiment.
2022-07-07 16:46:08 -04:00
Thomas Harte
fc0dc4e5e2
Amiga only, temporarily: attempt to reduce audio maintenance costs.
2022-07-07 16:41:49 -04:00
Thomas Harte
3e2a6ef3f4
Hacks up an [unsafe] return to something best-effort-updater-esque.
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For profiling, mainly.
2022-07-07 16:35:45 -04:00
Thomas Harte
01a309909b
Elide actions when running behind.
2022-07-07 11:10:54 -04:00
Thomas Harte
7886c2df7a
Start experimenting with a more event-based approach to timing.
2022-07-07 10:48:42 -04:00
Thomas Harte
18735ee571
Merge pull request #1060 from TomHarte/QtErrors
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Resolve invalid use of `constexpr` in IPF.cpp.
2022-07-05 17:09:05 -04:00
Thomas Harte
1ce07e2ee8
This reads the file, so it can't be constexpr.
2022-07-05 17:01:38 -04:00
Thomas Harte
7cbee172b2
Merge pull request #1041 from TomHarte/InST
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Switch the Atari ST to the newer 68000.
2022-06-30 17:15:04 -04:00
Thomas Harte
fca974723f
Merge pull request #1045 from TomHarte/InAmiga
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Switch the Amiga to the newer 68000.
2022-06-30 17:14:54 -04:00
Thomas Harte
6a2d4ae11d
Merge branch 'master' into InAmiga
2022-06-30 10:12:32 -04:00
Thomas Harte
6da634b79f
Merge branch 'master' into InST
2022-06-30 10:12:23 -04:00
Thomas Harte
c85ca09236
Merge pull request #1058 from TomHarte/ContinuousLabels
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Further compact list of potential switch targets.
2022-06-30 10:12:12 -04:00
Thomas Harte
a5b7ef5498
Further compact list of potential switch targets.
2022-06-30 08:31:51 -04:00
Thomas Harte
970087eefb
Merge pull request #1057 from TomHarte/ContinuousLabels
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68000: Eliminate large gap in `case` values.
2022-06-29 21:48:44 -04:00
Thomas Harte
11305c2e6b
Eliminate large gap in case values.
2022-06-29 21:40:48 -04:00
Thomas Harte
5da16023d8
Merge pull request #1056 from TomHarte/Warnings
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Switch to an alternative form of avoiding unused goto warnings.
2022-06-29 21:19:34 -04:00
Thomas Harte
b1d8a45339
Just disable the diagnostic.
2022-06-29 21:13:00 -04:00
Thomas Harte
c133f80c73
Try a compiler-specific attribute.
2022-06-29 19:20:44 -04:00
Thomas Harte
58b04cdfa4
Switch to an alternative form of avoiding unused goto warnings.
2022-06-29 19:08:41 -04:00
Thomas Harte
1e149d0add
Merge pull request #1055 from TomHarte/IIgsMemoryMap
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Introduce further IIgs memory map tests.
2022-06-29 15:19:31 -04:00
Thomas Harte
f7e75da4bd
Disable [temporarily?] outdated shadowing tests.
2022-06-29 15:14:51 -04:00
Thomas Harte
c2938a4f63
Avoid potential classic macro error with address.
2022-06-29 15:09:52 -04:00
Thomas Harte
825136b168
Fix installation of LCW test value; thereby permit all tests.
2022-06-29 15:04:21 -04:00
Thomas Harte
5a9eb58d33
Fix test generator: IO state can be cleared.
2022-06-29 14:57:14 -04:00
Thomas Harte
beb4993548
Remove card pages from the equation.
2022-06-29 14:51:50 -04:00
Thomas Harte
48e8bfbb0e
Introduce failing is-IO test.
2022-06-29 14:44:17 -04:00
Thomas Harte
5dfbc58959
Fix test generator's concept of hires2 shadowing.
2022-06-29 14:41:56 -04:00
Thomas Harte
924de35cf3
Go all in on support for physical shadowing.
2022-06-29 14:39:56 -04:00
Thomas Harte
7cf9e08948
Map shadowing by logical address, not physical.
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Disclaimer: although this better matches the tests, I've yet to verify.
2022-06-29 06:10:15 -04:00
Thomas Harte
60d3519993
Clarify, attempt to implement as internally documented.
2022-06-28 22:32:31 -04:00
Thomas Harte
c6b4570424
Fix Markdown code marking.
2022-06-28 17:12:38 -04:00
Thomas Harte
f5d56cc473
Add first pass at testing shadowing.
2022-06-28 17:12:25 -04:00
Thomas Harte
4e52572b03
Omit language card write tests.
2022-06-28 16:57:09 -04:00
Thomas Harte
6abc317986
Avoid permitting writes in the Cx00 region after uninhibiting the language card.
2022-06-28 16:35:47 -04:00
Thomas Harte
22c0b588c4
Tidy up slightly, without fixing failure.
2022-06-28 16:32:35 -04:00
Thomas Harte
6c9fc0ac75
Introduce [failing] write area tests.
2022-06-28 16:28:00 -04:00
Thomas Harte
ef322dc705
Reformulate to allow addition of write tests, momentarily.
2022-06-28 16:22:41 -04:00
Thomas Harte
94fcc90886
Use auxiliary switches to control language card area when card is inhibited.
2022-06-28 12:46:31 -04:00
Thomas Harte
d0df156b05
Merge branch 'IIgsMemoryMap' of github.com:TomHarte/CLK into IIgsMemoryMap
2022-06-28 11:26:13 -04:00
Thomas Harte
7aeaa4a485
Tweak paging semantics, to allow simple multiple dependencies.
2022-06-27 21:38:45 -04:00
Thomas Harte
823c7765f8
Avoid manual index counting.
2022-06-27 11:16:05 -04:00
Thomas Harte
5cb0aebdf4
For the sake of poor Xcode, stop after a single failure.
2022-06-27 11:10:51 -04:00
Thomas Harte
ef40a81be2
Remove temporary hack.
2022-06-27 08:00:29 -04:00
Thomas Harte
21842052cf
Alternative zero page should affect bank 0's language card area when the card is disabled.
2022-06-27 07:56:45 -04:00
Thomas Harte
686dccb48d
Correct comparison.
2022-06-26 21:49:58 -04:00
Thomas Harte
1f7700edac
Ensure proper register hits.
2022-06-26 21:20:57 -04:00
Thomas Harte
5adc656066
Make some attempt to use the JSON tests.
2022-06-25 21:41:37 -04:00
Thomas Harte
e0ec3c986d
Ensure appropriate data bus size.
2022-06-25 21:07:29 -04:00
Thomas Harte
827b137c86
Merge pull request #1054 from TomHarte/JeekTest
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Add an automatic bus size selector.
2022-06-25 16:47:15 -04:00
Thomas Harte
9cf64ea643
Import generated tests.
2022-06-25 16:46:57 -04:00
Thomas Harte
fc1952bf42
Add an automatic bus size selector.
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This fixes the Jeek test.
2022-06-25 16:28:06 -04:00
Thomas Harte
9888f079fa
Merge pull request #1053 from TomHarte/65816Tests
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Add 65816 test generator; correct disagreements with other emulations.
2022-06-24 21:28:24 -04:00
Thomas Harte
f2c2027a8c
Disable test generation for commit.
2022-06-24 16:50:23 -04:00
Thomas Harte
4467eb1c41
Ensure relevant throwaway stack reads use the previous stack address.
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TODO: can CycleFetchPreviousThrowaway be used more widely?
2022-06-24 14:00:03 -04:00
Thomas Harte
ef5ac1442f
Don't invent an address for STP and WAI.
2022-06-24 13:05:32 -04:00
Thomas Harte
1c1ce625a7
Vector reads signal VDA.
2022-06-24 10:37:39 -04:00
Thomas Harte
a442077eac
Allow repetition for MVN and MVP only.
2022-06-24 10:34:43 -04:00
Thomas Harte
6c638712f3
Attempt to capture MVP and MVN in their entirety.
2022-06-24 07:39:58 -04:00
Thomas Harte
069a057a94
Resolve assumption of arithmetic shifts.
2022-06-24 07:26:07 -04:00
Thomas Harte
4ed3b21bf3
Decimal SBC tweak: negative partial results don't cause carry.
2022-06-23 21:58:09 -04:00
Thomas Harte
2e7afb13c7
Exit gracefully upon a STP or WAI.
2022-06-23 21:03:40 -04:00
Thomas Harte
a23b0f5122
Map STA (d), y to correct calculator.
2022-06-23 20:57:47 -04:00
Thomas Harte
da552abf75
Fix BIT overflow flag.
2022-06-23 15:24:51 -04:00
Thomas Harte
380b5141fb
Be overt about conversion wanted here.
2022-06-23 13:03:26 -04:00
Thomas Harte
66775b2c4e
Always consume a second cycle in 16-bit mode.
2022-06-23 12:46:51 -04:00
Thomas Harte
2c12a7d968
Make absolutely sure there's no address bit 24.
2022-06-23 12:12:02 -04:00
Thomas Harte
5a97c09238
Flip internal presumption on the BRK flag.
2022-06-23 11:23:00 -04:00
Thomas Harte
3112376943
Don't include DBR in direct indexed indirect.
2022-06-23 11:03:37 -04:00
Thomas Harte
65140b341d
Simplify slightly, per new S reporting rule.
2022-06-22 16:43:00 -04:00
Thomas Harte
ecfd17a259
Report a 1 in the stack pointer high byte when in emulation mode.
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It has one internally, it just wasn't previously exposed via this method.
2022-06-22 15:55:34 -04:00
Thomas Harte
a72dd96dc6
Page boundary crossing is free outside of emulation mode.
2022-06-22 15:31:30 -04:00
Thomas Harte
944e5ebbfa
Take another run at IO addresses.
2022-06-22 15:28:11 -04:00
Thomas Harte
76767110b7
Fix overflow for 8-bit calculations; essentially a revert for ADC.
2022-06-22 15:18:47 -04:00
Thomas Harte
2f684ee66d
Use null for values that were never loaded.
2022-06-21 21:47:18 -04:00
Thomas Harte
7dcfa9eb65
65816: improve decimal calculations, posted IO addresses, read/write during redundant read-modify-write cycle.
2022-06-21 14:33:06 -04:00
Thomas Harte
ec98736bd7
Ensure IO cycles don't produce an address of (PC+1).
2022-06-21 11:41:05 -04:00
Thomas Harte
ab0c290489
Use 'x' instead of 'i'.
2022-06-19 06:58:23 -04:00
Thomas Harte
15ac2c3e5a
Output to files, at volume, with extended bus flags.
2022-06-18 22:00:50 -04:00
Thomas Harte
0c24a27ba6
Completely prints tests.
2022-06-18 21:32:50 -04:00
Thomas Harte
eb82e06fab
Add randomised initial state, fix PC.
2022-06-18 19:21:56 -04:00
Thomas Harte
f8e6954739
Ensure complete runs of each tested opcode.
2022-06-18 16:26:40 -04:00
Thomas Harte
586ef4810b
Add restart_operation_fetch, to aid with testing.
2022-06-18 16:25:57 -04:00
Thomas Harte
b62f484d93
Start scaffolding a 65816 test generator.
2022-06-18 13:28:15 -04:00
Thomas Harte
07b600ccaf
Merge branch 'master' into InST
2022-06-17 12:10:47 -04:00
Thomas Harte
907dc75e5b
Merge branch 'master' into InAmiga
2022-06-17 12:10:40 -04:00
Thomas Harte
ea0d2971eb
Merge pull request #1052 from TomHarte/StraightforwardMicrocycle
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Clean up Microcycle helpers.
2022-06-17 12:10:22 -04:00
Thomas Harte
a0bc332fe6
Taking a second parse, prefer non-lookup-table solutions.
2022-06-17 11:55:38 -04:00
Thomas Harte
b0ab5b7b62
Simplify Microcycle helpers.
2022-06-16 21:34:24 -04:00
Thomas Harte
a3fc8dbf42
Merge branch 'master' into InAmiga
2022-06-16 16:37:49 -04:00
Thomas Harte
37516e6f6b
Merge pull request #1051 from TomHarte/STOPReturn
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Fix return address following a STOP.
2022-06-16 15:15:50 -04:00
Thomas Harte
9fde7c0f89
Merge branch 'STOPReturn' into InST
2022-06-16 15:11:06 -04:00
Thomas Harte
dc8103ea82
Fix return address following a STOP.
2022-06-16 15:10:35 -04:00
Thomas Harte
e248092014
Fix return address following a STOP.
2022-06-16 15:10:19 -04:00
Thomas Harte
f343635cab
Merge branch 'master' into InAmiga
2022-06-16 13:37:37 -04:00
Thomas Harte
60daf9678f
Merge pull request #1050 from TomHarte/ByteLengthWarning
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Resolve release-build byte length warning
2022-06-16 11:16:37 -04:00
Thomas Harte
5d5bd6791b
Merge branch 'master' into InMacintosh
2022-06-16 11:01:18 -04:00
Thomas Harte
fe748507f0
Merge branch 'master' into InAmiga
2022-06-15 21:23:30 -04:00
Thomas Harte
cb7230e7b7
Merge branch 'master' into InST
2022-06-15 21:23:18 -04:00
Thomas Harte
cb162b6755
Merge pull request #1049 from TomHarte/68000Mk2Bus
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Correct 68000 mark 2 Microcycle helper methods.
2022-06-15 21:22:49 -04:00
Thomas Harte
7d00b50e13
Fix upper/lower_data_select; simplify value8_low.
2022-06-15 21:11:31 -04:00
Thomas Harte
12b058867e
Correct very minor typo.
2022-06-15 19:34:54 -04:00
Thomas Harte
8ff09a1923
Fix value8_high.
2022-06-15 19:34:49 -04:00
Thomas Harte
62fa0991ed
Disallow copying, add some basic asserts.
2022-06-15 19:34:43 -04:00
Thomas Harte
52a8566e7f
Correct very minor typo.
2022-06-15 17:06:56 -04:00
Thomas Harte
3bfcf252a8
Fix value8_high.
2022-06-15 17:06:40 -04:00
Thomas Harte
f4ae58b1e5
Disallow copying, add some basic asserts.
2022-06-15 12:59:03 -04:00
Thomas Harte
12277d9305
Merge branch 'master' into InST
2022-06-15 11:07:43 -04:00
Thomas Harte
c9d3f4492d
Merge branch 'master' into InAmiga
2022-06-15 11:07:31 -04:00
Thomas Harte
f23c5cc6df
Merge pull request #1048 from TomHarte/STOPMk2
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68000mk2: apply STOP status.
2022-06-15 11:07:14 -04:00
Thomas Harte
24823233ff
Add spurious interrupt support.
2022-06-15 11:00:27 -04:00
Thomas Harte
bd056973ba
Don't allow STOP state to block execution.
2022-06-15 10:56:45 -04:00
Thomas Harte
5420fd5aa3
Fix: new status word is still in prefetch.
2022-06-15 10:54:34 -04:00
Thomas Harte
44cdb4726e
Fix: new status word is still in prefetch.
2022-06-15 10:54:14 -04:00
Thomas Harte
698cc182ae
Merge branch 'STOPMk2' into InAmiga
2022-06-15 10:50:19 -04:00
Thomas Harte
93615f6647
Apply new status before entering STOP loop.
2022-06-15 10:50:03 -04:00
Thomas Harte
fba709f46d
Merge branch 'InST' of github.com:TomHarte/CLK into InST
2022-06-15 08:12:45 -04:00
Thomas Harte
bb34aaa0c7
Merge branch 'master' into InST
2022-06-15 08:12:35 -04:00
Thomas Harte
5661c3317a
Merge branch 'master' into InAmiga
2022-06-15 08:12:19 -04:00
Thomas Harte
733ffc0eee
Merge pull request #1047 from TomHarte/OldVsNew
...
Introduce randomised old vs new 68000 tests.
2022-06-15 08:11:54 -04:00
Thomas Harte
6cc41d6dda
Restore 1000 test count.
2022-06-14 22:02:53 -04:00
Thomas Harte
d91f8a264e
Flip presumption, reenabling most tests.
2022-06-14 21:57:14 -04:00
Thomas Harte
0ace9634ce
Fix MOVEA.
2022-06-14 21:56:48 -04:00
Thomas Harte
48d51759cd
At huge copy-and-paste cost, fix MOVE.l.
2022-06-14 21:22:28 -04:00
Thomas Harte
bfd0b683bf
Extend MOVE.b fix to cover MOVE.w.
2022-06-14 17:04:11 -04:00
Thomas Harte
61e0f60e94
Add specialised MOVE.b to correct bus sequencing.
...
This is a bit of a trial balloon; .w and .l to come.
2022-06-13 21:49:00 -04:00
Thomas Harte
7fa715e37a
Provide more thorough documentation.
2022-06-13 15:27:23 -04:00
Thomas Harte
e066546c13
Resolve PEA timing errors.
2022-06-13 14:08:42 -04:00
Thomas Harte
7dc66128c2
Fix strobe output.
2022-06-13 10:49:47 -04:00
Thomas Harte
e484e4c9d7
Expand test to make sure that correct data strobes are active.
2022-06-13 10:39:06 -04:00
Thomas Harte
4a75691005
Avoid double conditional for CalcEffectiveAddressIdleFor8bitDisplacementAndPreDec.
2022-06-13 10:27:22 -04:00
Thomas Harte
8ada73b283
Use the outer switch for addressing mode dispatch, saving a lot of syntax.
2022-06-13 08:57:49 -04:00
Thomas Harte
f316cbcf94
The old implementation was correct.
2022-06-11 21:15:08 -04:00
Thomas Harte
2a9a05785c
Bus and address error don't affect interrupt level.
2022-06-11 21:10:24 -04:00
Thomas Harte
0a6b2b7d32
Verify newer CMPA.l, RTE, TRAP[V] and CHK.
2022-06-11 11:17:18 -04:00
Thomas Harte
c3345dd839
Fix MOVEM timing.
2022-06-10 21:52:07 -04:00
Thomas Harte
917b7fbf80
Notarise won't fix status of CLR, NEGX, NEG, NOT.
2022-06-10 16:50:38 -04:00
Thomas Harte
97715e7ccc
Expand test set to include those with timing discrepancies.
2022-06-10 16:34:05 -04:00
Thomas Harte
43c0dea1bd
With the difference in RESET times now factored out, test timing too.
2022-06-10 16:12:54 -04:00
Thomas Harte
2e4652209b
Remove entire RESET sequence, move to testing PEA.
2022-06-10 15:57:54 -04:00
Thomas Harte
aec4bf9d45
Correct TAS timing.
2022-06-10 15:57:35 -04:00
Thomas Harte
e2d811a7a0
Notarise digressions that appear to be correct, remove now-working RTE/RTR.
2022-06-09 21:48:15 -04:00
Thomas Harte
f8643a62e6
Change RTE and RTR read order.
2022-06-09 21:47:28 -04:00
Thomas Harte
dd5c903fd6
DIVS also appears sometimes to differ.
2022-06-09 20:19:39 -04:00
Thomas Harte
2e1675066d
Reinstate address error non-testing.
2022-06-09 16:59:06 -04:00
Thomas Harte
be84ce657b
Add an optional testing whitelist.
2022-06-09 16:18:04 -04:00
Thomas Harte
64053d697f
Take improved guess at address error stacking order.
2022-06-09 16:17:09 -04:00
Thomas Harte
a59ad06438
Print out summary of failure.
2022-06-09 13:13:33 -04:00
Thomas Harte
5af03d74ec
Add note to self about first diagnosis.
2022-06-09 12:21:39 -04:00
Thomas Harte
ba2803c807
Include all bus activity after the split.
2022-06-09 11:30:22 -04:00
Thomas Harte
fdcbf617d8
Avoid STOP.
2022-06-09 08:42:31 -04:00
Thomas Harte
cc7a4f7f91
Fix test build.
2022-06-08 21:15:11 -04:00
Thomas Harte
2e42bda0a3
Permit instructions that end in an address error to differ in transactions.
2022-06-08 16:15:33 -04:00
Thomas Harte
da8e6737c6
Fix standard exception stack write order.
2022-06-08 16:15:11 -04:00
Thomas Harte
670201fcc2
Reset time debt upon 'reset'.
2022-06-08 16:03:16 -04:00
Thomas Harte
168dc12e27
Avoid spurious mismatches.
2022-06-08 16:03:02 -04:00
Thomas Harte
fd1955e15b
Attempt to randomise and test register contents.
2022-06-08 15:12:47 -04:00
Thomas Harte
ab35016aae
Clear any time debt upon phoney reset.
2022-06-08 15:12:32 -04:00
Thomas Harte
f4f93f4836
Test a single, whole instruction; record read/write.
2022-06-08 14:53:04 -04:00
Thomas Harte
6efb9b24e0
Ensure that a phoney reset gets the proper vector.
2022-06-08 14:44:15 -04:00
Thomas Harte
dd0a7533ab
Randomise all parts of memory other than the opcode.
2022-06-08 14:43:51 -04:00
Thomas Harte
079c3fd263
Abort address error-causing exceptions before they begin.
2022-06-08 14:43:31 -04:00
Thomas Harte
8cbf929671
Don't duplicate work that the RESET program already does.
2022-06-08 11:42:56 -04:00
Thomas Harte
50130b7004
Minor layout tweak.
2022-06-08 11:42:42 -04:00
Thomas Harte
ab52c5cef2
Pass first all-zeroes test, establishing that processors aren't being fully reset.
2022-06-08 10:56:54 -04:00
Thomas Harte
c7fa93a5bc
Attempt human-legible explanation of differences encountered.
2022-06-08 10:51:05 -04:00
Thomas Harte
400b73b5a2
Allow capture to be limited; retain timestamps.
2022-06-08 09:49:27 -04:00
Thomas Harte
788b026cf5
Log and attempt to compare some activity. Sort of.
2022-06-07 16:56:05 -04:00
Thomas Harte
9009645cea
Add 'reset' functions.
2022-06-07 16:55:39 -04:00
Thomas Harte
c4ae5d4c8d
Establishes at least that both 68000s can run.
2022-06-06 21:47:10 -04:00
Thomas Harte
ca8dd61045
Start sketching out an old vs new 68000 test.
2022-06-06 21:19:57 -04:00
Thomas Harte
ac037bcffd
Merge branch 'master' into InAmiga
2022-06-06 16:17:40 -04:00
Thomas Harte
d429dec2e5
Merge branch 'master' into InST
2022-06-06 16:17:33 -04:00
Thomas Harte
d779bc3784
Merge pull request #1046 from TomHarte/StatusChanges
...
Ensure RTE triggers a stack pointer change if needed.
2022-06-06 16:16:52 -04:00
Thomas Harte
a4baa33e2f
Ensure RTE triggers a stack pointer change if needed.
2022-06-06 16:08:50 -04:00
Thomas Harte
56aa182fb6
Fix debug builds.
2022-06-06 15:26:15 -04:00
Thomas Harte
9818c7e78c
Switch the Amiga to the newer 68000.
2022-06-06 11:10:56 -04:00
Thomas Harte
5495f30329
Microtweak: simplify Macintosh pixel serialisation.
2022-06-06 08:34:58 -04:00
Thomas Harte
6aa599a17c
Future-proof perform_bus_operation.
2022-06-06 08:20:16 -04:00
Thomas Harte
57858b2fa5
Merge branch 'master' into InST
2022-06-05 20:59:48 -04:00
Thomas Harte
d4c1e92b1c
Merge pull request #1044 from TomHarte/MacintoshAudio
...
Add missing `flush`.
2022-06-05 09:20:08 -04:00
Thomas Harte
403eda7024
Add missing flush.
2022-06-05 09:08:36 -04:00
Thomas Harte
1671827d24
Add flush.
2022-06-05 09:07:43 -04:00
Thomas Harte
578c3e21a5
Merge branch 'master' into InST
2022-06-04 21:32:10 -04:00
Thomas Harte
87ef0d9ab3
Merge pull request #1042 from TomHarte/68000Interrupt
...
Fix interrupt acknowledge cycle: signals and data size.
2022-06-04 21:31:03 -04:00
Thomas Harte
cfafbfd141
Fix interrupt acknowledge cycle: signals and data size.
2022-06-04 21:23:57 -04:00
Thomas Harte
9289a6c1bb
Fix interrupt acknowledge cycle: signals and data size.
2022-06-04 15:20:38 -04:00
Thomas Harte
4a740fbd14
Switch Atari ST to using the new 68000.
2022-06-04 08:43:43 -04:00
Thomas Harte
7eb00c131f
Merge pull request #1036 from TomHarte/InMacintosh
...
Switch the Macintosh to the newer 68000.
2022-06-03 20:22:27 -04:00
Thomas Harte
5ae461eb0b
Avoid warning during optimised builds.
2022-06-03 15:43:27 -04:00
Thomas Harte
542126194a
Capture interrupt input at the end of an access cycle, not the beginning.
...
All still a guess.
2022-06-03 15:39:53 -04:00
Thomas Harte
a61f7e38b6
Very minor: avoid division and modulus when unnecessary.
2022-06-03 15:39:29 -04:00
Thomas Harte
3d059cb751
Make use of Microcycle helpers where relevant.
...
None of these existed when the Macintosh was first added to this emulator.
2022-06-03 15:33:31 -04:00
Thomas Harte
74e96b881c
Merge branch 'master' into InMacintosh
2022-06-03 11:20:46 -04:00
Thomas Harte
9848fa9a4d
Merge pull request #1040 from TomHarte/68000RESET
...
Fix decoding of 68000 RESET.
2022-06-03 11:20:27 -04:00
Thomas Harte
c24a7a8b58
Merge branch '68000RESET' into InMacintosh
2022-06-03 11:17:06 -04:00
Thomas Harte
71e38a6781
Fix decoding of RESET.
2022-06-03 11:15:50 -04:00
Thomas Harte
7b3cf6e747
Add missing instruction: RESET.
2022-06-03 11:15:39 -04:00
Thomas Harte
676e4a6112
Merge branch 'master' into InMacintosh
2022-06-03 10:31:07 -04:00
Thomas Harte
fd66a9b396
Merge pull request #1033 from TomHarte/68000Mk2
...
Implement a bus binding for the discrete 68000 decoder and performer.
2022-06-03 10:30:44 -04:00
Thomas Harte
640b04e59e
Test only well-defined flags.
...
Albeit that timing is still off.
2022-06-03 10:18:46 -04:00
Thomas Harte
1625796cfe
Test only well-defined flags.
...
Albeit that timing is still off.
2022-06-03 10:17:55 -04:00
Thomas Harte
93749cd650
Merge branch '68000Mk2' into InMacintosh
2022-06-03 08:38:58 -04:00
Thomas Harte
02b6ea6c46
Factor out would-accept-interrupt test, per uncertainty re: level 7.
2022-06-03 08:31:56 -04:00
Thomas Harte
6fcaf3571e
Fix bus/address error exception frame: order and contents.
2022-06-03 08:27:49 -04:00
Thomas Harte
10b9b13673
Disable divide-by-zero PC test in lieu of better documentation.
2022-06-03 08:27:20 -04:00
Thomas Harte
6cb559f65e
Merge branch '68000Mk2' of github.com:TomHarte/CLK into 68000Mk2
2022-06-02 21:43:28 -04:00
Thomas Harte
c3b436fe96
Use int64_t as an intermediary to avoid x86 exception on INT_MIN/-1.
2022-06-02 21:39:52 -04:00
Thomas Harte
aaac777651
Merge branch 'master' into 68000Mk2
2022-06-02 17:08:41 -04:00
Thomas Harte
103de74063
Merge pull request #1039 from TomHarte/UniqueAsync
...
Switch DeferringAsyncTaskQueue to `unique_ptr`.
2022-06-02 17:06:59 -04:00
Thomas Harte
7f33a5ca0c
Simplify: (i) repetitive type for TaskList; (ii) unnecessary unique_ptr.
2022-06-02 17:02:36 -04:00
Thomas Harte
e389dcb912
Further simplify syntax.
2022-06-02 16:52:03 -04:00
Thomas Harte
9d278d80f1
Remove redundant reset.
2022-06-02 16:50:59 -04:00
Thomas Harte
e994910ff6
Switch to unique_ptr.
2022-06-02 16:46:41 -04:00
Thomas Harte
e7b3705060
Merge pull request #1007 from TomHarte/IPFFileFormat
...
Adds partial support for the IPF file format.
2022-06-02 12:58:47 -04:00
Thomas Harte
f17502fe81
Merge branch 'master' into 68000Mk2
2022-06-02 12:57:34 -04:00
Thomas Harte
8e7df5c1b1
Merge branch 'master' into InMacintosh
2022-06-02 12:57:24 -04:00
Thomas Harte
8ba1b4e0cf
Merge pull request #1037 from TomHarte/SaferShutdown
...
Reduce potential surprise in DeferringAsyncTaskQueue::flush.
2022-06-02 12:56:51 -04:00
Thomas Harte
93679f8d48
Reduce potential surprise in DeferringAsyncTaskQueue::flush.
2022-06-02 12:50:45 -04:00
Thomas Harte
a292483344
Merge branch '68000Mk2' into InMacintosh
2022-06-02 12:30:54 -04:00
Thomas Harte
90d720ca28
Don't test undocumented flags.
2022-06-02 12:30:39 -04:00
Thomas Harte
f8e933438e
Add missing tail cost.
2022-06-02 12:26:25 -04:00
Thomas Harte
6dd89eb0d7
Adjust my expectation as to length.
2022-06-02 12:11:54 -04:00
Thomas Harte
2bd20446bb
Merge branch '68000Mk2' of github.com:TomHarte/CLK into 68000Mk2
2022-06-02 05:39:32 -04:00
Thomas Harte
659e4f6987
Include fixed cost of rolls. Which includes providing slightly more information to did_shift.
2022-06-01 20:30:51 -04:00
Thomas Harte
cd5f3c90c2
Ensure proper resumption after a forced exit in will_perform.
2022-06-01 15:27:09 -04:00
Thomas Harte
91a6911a51
Correct ADDA/SUBA timing.
2022-06-01 15:03:03 -04:00
Thomas Harte
0857dd0ae5
Include fixed base cost in MULU and MULS.
2022-06-01 14:05:23 -04:00
Thomas Harte
8c242fa2dd
Merge branch '68000Mk2' into InMacintosh
2022-06-01 10:48:38 -04:00
Thomas Harte
5a4f117a12
Merge branch '68000Mk2' of github.com:TomHarte/CLK into 68000Mk2
2022-06-01 10:48:14 -04:00
Thomas Harte
62ed1ca2fd
Fix MOVE CCR permissions.
2022-06-01 09:22:47 -04:00
Thomas Harte
d1298c8863
Correct MOVE timing without breaking PEA, LEA, etc.
2022-06-01 09:06:08 -04:00
Thomas Harte
75e85b80aa
Factor out the common stuff of exception state.
2022-06-01 08:20:33 -04:00
Thomas Harte
73815ba1dd
No need for this hoop jumping here.
2022-06-01 08:20:06 -04:00
Thomas Harte
e1abf431cb
Don't test undefined flags.
2022-05-30 16:23:51 -04:00
Thomas Harte
8e0fa3bb5f
DIV # with a divide by zero should be 44 cycles.
2022-05-29 21:22:45 -04:00
Thomas Harte
8ffaf1a8e4
Ensure did_divu/s are performed even upon divide by zero.
2022-05-29 21:18:19 -04:00
Thomas Harte
7788a109b0
Tweak more overtly to avoid divide by zero.
2022-05-29 20:51:50 -04:00
Thomas Harte
9eea471e72
Resolve infinite recursion.
2022-05-29 20:39:22 -04:00
Thomas Harte
3ef53315a2
Don't try to append operands to 'None'.
2022-05-29 15:28:16 -04:00
Thomas Harte
2a40e419fc
Fix CHK tests: timing and expected flags.
2022-05-29 15:26:56 -04:00
Thomas Harte
d6f72d9862
Avoid runtime checking of instruction supervisor requirements.
2022-05-29 14:56:44 -04:00
Thomas Harte
3da720c789
Make requires_supervisor explicitly compile-time usable.
2022-05-29 14:55:24 -04:00
Thomas Harte
dbf7909b85
Fix timing of CMPM.
2022-05-29 14:49:42 -04:00
Thomas Harte
57aa8d2f17
Correct timing of ADDQ.
2022-05-29 14:34:06 -04:00
Thomas Harte
a318a49c72
Merge branch '68000Mk2' into InMacintosh
2022-05-28 15:01:58 -04:00
Thomas Harte
35e73b77f4
Fix interrupt stack frame.
2022-05-27 21:55:17 -04:00
Thomas Harte
698d1a7111
Fix interrupt stack frame.
2022-05-27 21:54:23 -04:00
Thomas Harte
1365fca161
Avoid phoney write modifies.
2022-05-27 21:42:55 -04:00
Thomas Harte
d17d77714f
Remove outdated TODO.
2022-05-27 15:40:06 -04:00
Thomas Harte
e8dd8215ba
Tweak per empirical results.
2022-05-27 15:39:02 -04:00
Thomas Harte
e11990e453
Make an attempt at DIVS timing.
2022-05-27 15:38:54 -04:00
Thomas Harte
165ebe8ae3
Add time calculation for MULU and MULS.
2022-05-27 15:38:14 -04:00
Thomas Harte
e746637bee
Fill in dynamic cost of shifts.
2022-05-27 15:38:08 -04:00
Thomas Harte
0e6370d467
Tweak per empirical results.
2022-05-27 15:37:40 -04:00
Thomas Harte
512cd333e5
Make an attempt at DIVS timing.
2022-05-27 14:56:04 -04:00
Thomas Harte
f599a78cad
Add time calculation for MULU and MULS.
2022-05-27 14:41:42 -04:00
Thomas Harte
7601dab464
Fill in timing calculation for DIVU.
2022-05-27 14:30:03 -04:00
Thomas Harte
a8623eab4a
Fill in dynamic cost of shifts.
2022-05-27 11:12:10 -04:00
Thomas Harte
c367ddff1b
Merge branch '68000Mk2' into InMacintosh
2022-05-27 10:34:11 -04:00
Thomas Harte
67b340fa5e
Fix interrupt request address.
2022-05-27 10:33:36 -04:00
Thomas Harte
c97245e626
Fix CalcEA timing; make MOVEfromSR a read-modify-write.
2022-05-27 10:32:28 -04:00
Thomas Harte
79e2c17f93
Fix interrupt request address.
2022-05-26 20:20:28 -04:00
Thomas Harte
5937737bb7
Merge branch '68000Mk2' into InMacintosh
2022-05-26 19:37:44 -04:00
Thomas Harte
5f030edea4
Simplify transaction.
2022-05-26 19:37:30 -04:00
Thomas Harte
88e33353a1
Fix instruction and time counting, and initial state.
2022-05-26 09:17:37 -04:00
Thomas Harte
f3c0c62c79
Switch register-setting interface.
2022-05-26 07:52:14 -04:00
Thomas Harte
866787c5d3
Make an effort to withdraw from the high-circuitous stuff of working around the reset sequence.
2022-05-25 20:22:38 -04:00
Thomas Harte
367ad8079a
Add a call to set register state with population of the prefetch.
2022-05-25 20:22:05 -04:00
Thomas Harte
64491525b4
Work further to guess at caller's intention for set_state.
...
Probably I should just eliminate the initial reset, somehow.
2022-05-25 17:01:18 -04:00
Thomas Harte
68b184885f
Reapply only the status.
2022-05-25 16:54:25 -04:00
Thomas Harte
06f3c716f5
Make better effort to establish initial state.
2022-05-25 16:47:41 -04:00
Thomas Harte
22714b8c7f
Capture state at instruction end, for potential inspection.
2022-05-25 16:32:26 -04:00
Thomas Harte
80c1bedffb
Eliminate false prefetch for BSR.
2022-05-25 16:32:02 -04:00
Thomas Harte
56ad6d24ee
Fix ANDI/ORI/EORI to CCR/SR timing.
2022-05-25 16:20:26 -04:00
Thomas Harte
4ad0e04c23
Fix macro for n being an expression.
2022-05-25 16:05:45 -04:00
Thomas Harte
f9d1c554b7
Fix for the actual number of cycles in a standard reset.
2022-05-25 16:05:28 -04:00
Thomas Harte
ee58301a46
Add RaiseException macro.
2022-05-25 15:45:09 -04:00
Thomas Harte
f2a7660390
Merge branch 'master' into 68000Mk2
2022-05-25 15:40:10 -04:00
Thomas Harte
d4c7ce2d6f
Merge pull request #1035 from TomHarte/68000TestIssues
...
Add details on gaps in coverage.
2022-05-25 15:39:42 -04:00
Thomas Harte
4961e39fb6
Mention DIVU/DIVS flags.
2022-05-25 15:39:00 -04:00
Thomas Harte
0bedf608c0
Add details on gaps in coverage.
2022-05-25 15:36:27 -04:00
Thomas Harte
1ab831f571
Add the option to log a list of all untested instructions.
2022-05-25 13:17:01 -04:00
Thomas Harte
b90f1a48ce
Merge branch '68000Mk2' into InMacintosh
2022-05-25 13:02:44 -04:00
Thomas Harte
72425fc2e1
Fix bus data size of MOVE.b xx, -(An).
2022-05-25 13:00:36 -04:00
Thomas Harte
a5f2dfbc0c
Initialise registers to 0 for better testability.
...
TODO: is this the real initial state?
2022-05-25 11:47:42 -04:00
Thomas Harte
5db6a937cb
Have TRAP and TRAPV push the next instruction address to the stack.
2022-05-25 11:47:21 -04:00
Thomas Harte
9709b9b1b1
Standard exceptions don't raise the interrupt level.
2022-05-25 11:37:39 -04:00
Thomas Harte
2c6b9b4c9d
Switch comparative trace tests to 68000 Mk2.
2022-05-25 11:32:00 -04:00
Thomas Harte
463fbb07f9
Adapt remaining 68000 tests to use Mk2.
2022-05-25 10:55:17 -04:00
Thomas Harte
b6e473a515
Adapt remaining 68000 tests to use Mk2.
2022-05-25 10:55:03 -04:00
Thomas Harte
24f7b5806c
Merge branch '68000Mk2' into InMacintosh
2022-05-25 08:15:41 -04:00
Thomas Harte
5872e0ea4a
Resolve MOVE.l xx, -(An) write target.
2022-05-25 08:15:18 -04:00
Thomas Harte
04d2d6012a
Merge branch '68000Mk2' into InMacintosh
2022-05-24 16:08:56 -04:00
Thomas Harte
f43d27541b
Avoid attempt to establish operand flags for undefined opcodes.
2022-05-24 15:53:12 -04:00
Thomas Harte
c8d3d980ba
Avoid attempt to establish operand flags for undefined opcodes.
2022-05-24 15:52:53 -04:00
Thomas Harte
f93bf06b99
Merge branch '68000Mk2' into InMacintosh
2022-05-24 15:51:22 -04:00
Thomas Harte
0f7cb2fa5a
Attempt to honour the trace flag.
2022-05-24 15:47:47 -04:00
Thomas Harte
01e93ba916
Make an attempt at bus/address error.
2022-05-24 15:42:50 -04:00
Thomas Harte
780954f27b
Add TRAP, TRAPV.
2022-05-24 15:14:46 -04:00
Thomas Harte
19d69bdbb5
Add TRAP, TRAPV.
2022-05-24 15:14:20 -04:00
Thomas Harte
27fac7af86
Merge branch '68000Mk2' into InMacintosh
2022-05-24 12:48:54 -04:00
Thomas Harte
6f048de973
Pull unrecognised instruction handling into the usual switch table.
2022-05-24 12:42:34 -04:00
Thomas Harte
a611a745e7
Switch the Macintosh to 68000 mk2.
2022-05-24 12:35:36 -04:00
Thomas Harte
0dfaa7d9cf
Interrupt fixes: supply proper address, raise level, fetch from vector.
2022-05-24 12:16:06 -04:00
Thomas Harte
eab720f6ea
Ensure proper transition from unrecognised instructions.
2022-05-24 12:16:00 -04:00
Thomas Harte
8ad1d6b813
Interrupt fixes: supply proper address, raise level, fetch from vector.
2022-05-24 12:15:35 -04:00
Thomas Harte
be684d66fd
Ensure proper transition from unrecognised instructions.
2022-05-24 11:36:11 -04:00
Thomas Harte
a7e8aef9d3
Add MOVEA, be slightly more careful about next_operand_.
2022-05-24 11:30:09 -04:00
Thomas Harte
4b07c41df9
Ensure alignment of storage.
2022-05-24 11:29:28 -04:00
Thomas Harte
df54f1f1b7
Update TODO.
2022-05-24 11:06:05 -04:00
Thomas Harte
9e3c2b68d7
Eliminate potential future implicit conversion warnings.
2022-05-24 11:05:24 -04:00
Thomas Harte
3349bcaaed
Attempt interrupt support.
2022-05-24 10:53:59 -04:00
Thomas Harte
3a4fb81242
Add a dummy STOP state.
2022-05-24 10:25:40 -04:00
Thomas Harte
1df3ad0671
Ensure TAS responds to VPA, BERR.
2022-05-24 09:17:58 -04:00
Thomas Harte
523cdd859b
Add bus and address error, and VPA checks.
2022-05-24 09:08:31 -04:00
Thomas Harte
b037c76da6
Add public interface for everything except HALT and BUS REQ/etc.
...
... neither of which are used by machines I currently implement.
2022-05-23 20:55:01 -04:00
Thomas Harte
9cac4ca317
Add MOVE to/from USP.
2022-05-23 20:42:41 -04:00
Thomas Harte
34e5f39571
Ensure that running exactly up to a boundary gives the bus handler the next microcycle to contemplate.
2022-05-23 15:11:33 -04:00
Thomas Harte
e0a279344c
Codify the existence of special cases, implement NOP and RESET.
2022-05-23 15:09:46 -04:00
Thomas Harte
e2f4db3e45
Shuffle more of the flow controller methods into their proper place.
2022-05-23 12:06:14 -04:00
Thomas Harte
cdb9eae1ee
Merge branch 'master' into 68000Mk2
2022-05-23 11:02:57 -04:00
Thomas Harte
c1837af84a
Add notes to self on work remaining.
2022-05-23 11:02:31 -04:00
Thomas Harte
a87f6a28c9
Fix LINK A7.
2022-05-23 10:43:17 -04:00
Thomas Harte
98325325b1
Fix UNLINK A7.
2022-05-23 10:27:44 -04:00
Thomas Harte
26bf66e3f8
Fix shifts and rolls.
2022-05-23 10:09:46 -04:00
Thomas Harte
363cd97154
Resolve double definition of did_shift.
2022-05-23 10:07:24 -04:00
Thomas Harte
5eb19da91f
Merge pull request #1034 from fedex81/patch-1
...
Update nbcd_pea.json
2022-05-23 10:06:01 -04:00
Thomas Harte
c6b3281274
Attempt the shifts and rolls.
2022-05-23 09:29:19 -04:00
Thomas Harte
1e8adc2bd9
Fix MOVEP to R.
2022-05-23 09:00:37 -04:00
Thomas Harte
c73021cf3c
Implement MOVE.
2022-05-23 08:46:06 -04:00
Thomas Harte
1b3acf9cd8
Eliminate assumption.
2022-05-23 08:18:37 -04:00
Federico Berti
1a26d4e409
Update nbcd_pea.json
...
Add missing bracket
2022-05-23 12:14:00 +01:00
Thomas Harte
c8ede400eb
Fix RTE.
2022-05-22 21:17:28 -04:00
Thomas Harte
269263eecf
Implement RTE, RTS, RTR.
2022-05-22 21:16:38 -04:00
Thomas Harte
4e21cdfc63
Enable NEGX/CLR tests.
2022-05-22 20:55:21 -04:00
Thomas Harte
faef5633f8
Ensure MOVE from SR has an effective address to write to.
2022-05-22 20:52:00 -04:00
Thomas Harte
7d1f1a3175
Implement MOVE [to/from] [CCR/SR].
2022-05-22 19:45:22 -04:00
Thomas Harte
4e34727195
Fully implement TAS.
2022-05-22 16:14:03 -04:00
Thomas Harte
1dd6ed6ae3
Implement TAS Dn, with detour for other TASes.
2022-05-22 16:08:30 -04:00
Thomas Harte
cb4d6710df
Switch to a more direct indication of progress.
2022-05-22 11:27:58 -04:00
Thomas Harte
3b68b9a83b
Implement PEA.
2022-05-22 11:27:38 -04:00
Thomas Harte
4279ce87ea
Implement LEA.
2022-05-22 08:29:12 -04:00
Thomas Harte
3c1c4f89e9
Add MULU/S functionality, though not timing.
2022-05-22 08:02:32 -04:00
Thomas Harte
4a6512f5d5
Reduce dispatch boilerplate.
2022-05-22 07:39:16 -04:00
Thomas Harte
284f23c6ea
Implement JMP.
2022-05-22 07:16:38 -04:00
Thomas Harte
11a9a5c126
Use common macros for the two forms of Perform.
2022-05-22 07:08:14 -04:00
Thomas Harte
4993801741
Add missing prefetch to BSET, BCHG, BCLR.
2022-05-21 21:05:05 -04:00
Thomas Harte
4b35899a12
Bcc: properly establish offset.
2022-05-21 20:59:34 -04:00
Thomas Harte
1304e930eb
DBcc is two-operand.
2022-05-21 20:06:03 -04:00
Thomas Harte
94288d5a94
Excludes DBcc from standard operand fetch.
2022-05-21 19:53:28 -04:00
Thomas Harte
3811ab1b82
Fix the two 8bit-with-displacement effective address Calc steps.
2022-05-21 16:20:01 -04:00
Thomas Harte
c869eb1eec
Correct omission: wasn't testing the final PC.
...
Plenty of new errors incoming.
2022-05-21 15:56:27 -04:00
Thomas Harte
f97d2a0eb9
Add DIVU/DIVS, at least as far as getting the correct numeric result.
2022-05-21 15:56:09 -04:00
Thomas Harte
176c8355cb
The tests in chk.json now pass.
2022-05-21 14:32:58 -04:00
Thomas Harte
2258434326
Ensure proper return addresses are calculated for JSR.
2022-05-21 14:28:44 -04:00
Thomas Harte
e46a3c4046
Implement JSR.
2022-05-21 10:29:36 -04:00
Thomas Harte
0e4cfde657
Fix MOVEM predec.
2022-05-21 08:17:39 -04:00
Thomas Harte
4bd9c36922
Fix postincrement mode.
2022-05-20 21:01:23 -04:00
Thomas Harte
256da43fe5
Fix MOVEM other than postinc and predec.
2022-05-20 20:47:54 -04:00
Thomas Harte
6a442e0136
MOVEM has an immediate first operand.
2022-05-20 20:34:51 -04:00
Thomas Harte
a818650027
Add a faulty attempt at MOVEM.
2022-05-20 18:48:19 -04:00
Thomas Harte
9d79e64f5c
Add a mere calculate effective address pathway.
...
Plus a lot of waffle to try to justify the further code duplication.
2022-05-20 16:23:52 -04:00
Thomas Harte
c7c12f9638
After a quick check, eori_andi_ori also now passes.
2022-05-20 14:47:11 -04:00
Thomas Harte
ee942c5c17
Fix PC-relative fetches.
2022-05-20 14:42:51 -04:00
Thomas Harte
d157819c49
Implement the various to-[SR/CCR] actions, which do a 'repeat' prefetch.
...
(which isn't exactly a repeat, at least in the SR cases, because the function code might have changed)
2022-05-20 14:29:14 -04:00
Thomas Harte
2d91fb5441
Implement MOVEP.
2022-05-20 14:22:32 -04:00
Thomas Harte
81431a5453
Attempt BTST, BCHG, BCLR and BSET.
2022-05-20 12:58:45 -04:00
Thomas Harte
6d7ec07216
Uncover another three already-working test files.
2022-05-20 12:44:57 -04:00
Thomas Harte
b4978d1452
Implement BSR, adding one more test file to the working set.
2022-05-20 12:40:35 -04:00
Thomas Harte
cb77519af8
Make BSR operate like the other offsets: the flow controller gets whatever was in the opcode.
2022-05-20 12:40:09 -04:00
Thomas Harte
45e9648b8c
Implement Bcc.
2022-05-20 12:04:43 -04:00
Thomas Harte
ce32957d9d
Shuffle two more into the working column.
2022-05-20 11:53:12 -04:00
Thomas Harte
ba8592ceae
At least on the 68000, Scc is read-modify-write.
2022-05-20 11:43:26 -04:00
Thomas Harte
4327af3760
DBcc: add write-back.
2022-05-20 11:37:18 -04:00
Thomas Harte
860cc63e21
Attempt DBcc.
2022-05-20 11:32:06 -04:00
Thomas Harte
452dd3ccfd
Add a performer call-out for Scc; use it to implement proper timing in the mk2 68000.
2022-05-20 11:20:23 -04:00
Thomas Harte
e5c1621382
Add missing fallthrough, patterns for all ADDs and SUBs.
2022-05-20 07:02:02 -04:00
Thomas Harte
af3518dc1f
Implement various ADD, SUB patterns.
2022-05-19 20:50:37 -04:00
Thomas Harte
6cfc0e80d9
Don't test the unrecognised instruction exception.
2022-05-19 19:45:38 -04:00
Thomas Harte
1ee9c585ca
Fix segue into second operand.
2022-05-19 19:38:42 -04:00
Thomas Harte
efe5a5ac26
Signal will_perform even for invalid instructions.
2022-05-19 18:50:43 -04:00
Thomas Harte
334e3ec529
Add privilege and instruction error exceptions; permit two operands to be stored.
2022-05-19 16:55:16 -04:00
Thomas Harte
84c165459f
ext.json now passes.
2022-05-19 16:32:40 -04:00
Thomas Harte
282c4121d6
CLR also follows the NEGX/NEG/NOT pattern.
2022-05-19 16:30:08 -04:00
Thomas Harte
6c2eee0e44
Implement CHK, and therefore the standard exception pattern.
2022-05-19 16:27:39 -04:00
Thomas Harte
eeb6a088b8
Add a tag to avoid duplication.
2022-05-19 15:49:42 -04:00
Thomas Harte
22b63fe1f8
Add EXT, and notes to self.
2022-05-19 15:41:02 -04:00
Thomas Harte
7ef526e2d3
Fix destination decrement.
2022-05-19 15:22:59 -04:00
Thomas Harte
ce7f94559b
Add EXG, ABCD, SBCD.
2022-05-19 15:19:00 -04:00
Thomas Harte
0471decfc8
Implement the complete set of fetch addressing modes.
...
Subject to observations: (1) MOVE uses slightly custom versions of many of these for its stores; and (2) PEA and LEA need to do the calculation but not the read, so some of this will be duplicated further. It's either that or include greater conditionality on the path.
2022-05-19 15:03:22 -04:00
Thomas Harte
e4c0a89889
Just use the four-bit register number directly.
2022-05-19 15:01:09 -04:00
Thomas Harte
084d6ca11d
Simplify address handling; add perform patterns for CMP, AND, OR, EOR.
2022-05-19 12:18:47 -04:00
Thomas Harte
274902c3c1
Add to-memory write-back. Am going to reconsider usage of temporary_address_ as noted.
2022-05-19 11:23:26 -04:00
Thomas Harte
f46e7c65c5
Add AddressRegisterIndirect fetches.
2022-05-19 10:47:57 -04:00
Thomas Harte
c6c6213460
Bifurcate the fetch-operand flow.
...
Address calculation will be the same, but the fetch will differ. I don't think there's a neat costless way to factor out the address calculations, alas, but I'll see whether macros can save the day.
2022-05-19 10:27:51 -04:00
Thomas Harte
29f6b02c04
Factor out register setup/testing, generalising the DIVU/DIVS flag check.
2022-05-18 21:13:34 -04:00
Thomas Harte
1bf7c0ae5f
Attempt better to avoid entering a second instruction.
2022-05-18 21:00:34 -04:00
Thomas Harte
1b87626b82
Move some way towards MOVE.
2022-05-18 21:00:10 -04:00
Thomas Harte
44ae084794
Avoid the repeated .fill; reduces debug-build executor test time to 1.5s.
...
i.e. eliminates about 95% of costs.
2022-05-18 17:10:23 -04:00
Thomas Harte
13a1809101
Avoid memset.
2022-05-18 17:00:35 -04:00
Thomas Harte
c35200fbd0
Shuffle mildly, primarily to avoid repeated 16mb allocations.
2022-05-18 16:59:37 -04:00
Thomas Harte
da9fb216b1
Remove setup_operation in favour of doing the equivalent inline.
...
... as it'll probably allow me a route to `goto` straight out of there, too. At least, if I can find a sufficiently neat macro formulation.
2022-05-18 16:45:40 -04:00
Thomas Harte
bef12f3d65
Move ExecutionState into Implementation.hpp; use goto to avoid some double switches.
...
Re: the latter, yuck. Yuck yuck yuck. But it does mean I can stop going back and forth on how to structure conditionality on effective address generation segueing into fetches without doubling up on tests.
2022-05-18 15:35:38 -04:00
Thomas Harte
aa9e7eb7a2
Codify MOVE's status somewhat, avoid reading write-only operands.
2022-05-17 16:57:33 -04:00
Thomas Harte
f3d3e588fd
Add enough of state to [sort-of] pass the first test.
...
i.e. until the processor overruns, as it is permitted to do, and can't handle the second instruction.
2022-05-17 16:51:26 -04:00
Thomas Harte
4a40581deb
Completes performance of NBCD D0.
2022-05-17 16:10:20 -04:00
Thomas Harte
eed2672db5
Add documentation, honour signal_will_perform.
2022-05-17 15:05:11 -04:00
Thomas Harte
84071ac6d0
Implement reset logic, advance as far as actually performing an NBCD on D0 (but not writing it back).
2022-05-17 14:51:49 -04:00
Thomas Harte
1a27eea46c
Establish general pattern for selecting a performance phase and obtaining operands.
2022-05-17 14:08:50 -04:00
Thomas Harte
d0b6451f02
Step gingerly on to fetching operands.
2022-05-17 08:26:35 -04:00
Thomas Harte
2147c5a5f2
Fill in missing #undefs.
2022-05-16 21:02:25 -04:00
Thomas Harte
c7aa4d8b6d
Fix state transitions.
...
Confirmed that the 68000 mk 2 now appears correctly to perform a reset.
2022-05-16 21:00:25 -04:00
Thomas Harte
e94efe887c
Switch to use of __COUNTER__.
2022-05-16 20:38:17 -04:00
Thomas Harte
3db2de7478
Works 68000 mk2 into the comparative tests.
...
... revealing that I've leant a little too hard on __LINE__.
2022-05-16 20:04:13 -04:00
Thomas Harte
345f7c3c62
Fill in just enough to attempt the reset exception, assuming DTACK rather than VPA or BERR.
2022-05-16 16:57:40 -04:00
Thomas Harte
13848ddbbc
Add half-and-half access for SlicedInt32.
2022-05-16 16:56:54 -04:00
Thomas Harte
6f6e466c08
Make a first sketch of the coroutine-esque structure I'm going to experiment with here.
2022-05-16 11:59:03 -04:00
Thomas Harte
b0518040b5
Plants the seek of a 68000 mark 2.
2022-05-16 11:44:16 -04:00
Thomas Harte
29c872d867
Merge pull request #1032 from TomHarte/68000DIVUDIVS
...
Generalises the 68000's DIVU and DIVS.
2022-05-15 20:33:22 -04:00
Thomas Harte
acb63a1307
Pull generalised DIVU/DIVS into a macro.
2022-05-15 20:01:51 -04:00
Thomas Harte
341bf2e480
Repattern DIVS after DIVU.
2022-05-15 16:54:58 -04:00
Thomas Harte
20a191f144
Switch to same tests, run through a more modern emulator.
2022-05-15 16:33:08 -04:00
Thomas Harte
81f4581f41
Merge pull request #1031 from TomHarte/BCDTests
...
Correct 68000 BCD test results.
2022-05-15 07:24:30 -04:00
Thomas Harte
dfaf8ce64e
Merge pull request #1028 from TomHarte/68000Perform
...
Add free function implementation of 68000 operations, and an instruction-set interpreter.
2022-05-15 07:21:03 -04:00
Thomas Harte
f60f1932f2
Restrict DIVU and DIVS tests to those which are well-defined.
2022-05-14 20:28:54 -04:00
Thomas Harte
ff8e4754d7
Ensure STOP exits the run loop.
2022-05-14 19:17:32 -04:00
Thomas Harte
27c4d19455
Support STOP.
2022-05-14 11:35:35 -04:00
Thomas Harte
7f704fdae1
Improve README.
2022-05-13 16:28:56 -04:00
Thomas Harte
dd63a6b61e
Correct all [A/S/N]BCD tests.
2022-05-13 16:18:58 -04:00
Thomas Harte
1935d968c5
Add ability to suggest solutions.
2022-05-13 15:27:11 -04:00
Thomas Harte
f83954f5b7
Switch to common bit-selection logic.
2022-05-13 15:08:15 -04:00
Thomas Harte
77b56c50e6
Ensure you can't trace into divide-by-zero, etc.
2022-05-13 14:02:56 -04:00
Thomas Harte
002a8c061f
Trim the public interface of Executor.
2022-05-13 13:55:37 -04:00
Thomas Harte
4299334e24
Clean up some TODOs, eliminate one further conditional.
2022-05-13 11:17:57 -04:00
Thomas Harte
4d03c73222
Ensure that the first instruction of privilege/line1010/etc exceptions isn't traced.
2022-05-13 11:08:22 -04:00
Thomas Harte
84cfbaa0a4
Remove manual test count, now that all are being performed.
2022-05-13 11:00:26 -04:00
Thomas Harte
7a2fd93d08
Document BusHandler interface.
2022-05-13 10:59:36 -04:00
Thomas Harte
0d81992f6a
Move object creation.
2022-05-13 10:50:16 -04:00
Thomas Harte
5b67c9bf4a
MOVE to SR requires supervisor privileges.
2022-05-13 09:01:03 -04:00
Thomas Harte
6594b38567
Tidy up, and reduce for now to a summary report.
2022-05-13 08:02:20 -04:00
Thomas Harte
6c854e8ecc
Simplify is_supervisor semantics.
2022-05-13 07:53:40 -04:00
Thomas Harte
2e796f31d4
Support interrupts; documentation to come.
2022-05-12 20:52:24 -04:00
Thomas Harte
3d8f5d4302
Improve failure logging.
...
This confirms that it's only the *BCDs and DIVU/DIVS in which I do not match the tests.
2022-05-12 20:23:32 -04:00
Thomas Harte
2fa6b2301b
Move string logic into Preinstruction.
2022-05-12 19:46:08 -04:00
Thomas Harte
4ba20132b9
Avoid repeated allocations on the new path, reducing total runtime by almost two thirds.
2022-05-12 16:35:41 -04:00
Thomas Harte
a6e4d23c29
Tidy up primarily as per PatickvL's comments.
...
... though pulling the flag values out of an enum and into a namespace is entirely my own contribution, to keep them in their own namespace but having them overtly be ints.
2022-05-12 16:23:07 -04:00
Thomas Harte
6d43576db7
Remove errant semicolon.
2022-05-12 16:21:36 -04:00
Thomas Harte
b7d1bff0c7
Eliminate branches from ABCD.
2022-05-12 15:25:01 -04:00
Thomas Harte
79c5af755f
Eliminate branches from SBCD.
2022-05-12 15:18:03 -04:00
Thomas Harte
c6d84e7e60
Use Status::FlagT pervasively.
2022-05-12 11:42:33 -04:00
Thomas Harte
192513656a
After much guesswork, fix SBCD and thereby pass flamewing tests.
2022-05-12 11:39:01 -04:00
Thomas Harte
41dc728c9b
Merge branch '68000Perform' of github.com:TomHarte/CLK into 68000Perform
2022-05-12 11:27:59 -04:00
Thomas Harte
f3c1b1f052
Name flags, remove closing underscores on exposed data fields.
2022-05-12 08:19:41 -04:00
Thomas Harte
bd61c72007
Mutate SBCD to correct values, though not yet statuses.
2022-05-12 07:22:26 -04:00
Thomas Harte
0efeea1294
Slightly improve SBCD. Not there yet though.
2022-05-12 07:07:21 -04:00
Thomas Harte
56ce1ec6e8
No need to subclass.
2022-05-11 21:25:38 -04:00
Thomas Harte
de168956e4
Fix tested operand order.
2022-05-11 16:44:39 -04:00
Thomas Harte
5b80844d81
Add a sanity test count, temporarily.
2022-05-11 16:34:28 -04:00
Thomas Harte
a9902fc817
Fix ABCD when the result has an invalid lower digit.
2022-05-11 16:31:27 -04:00
Thomas Harte
ed75688251
Fix capture of the initial zero flag.
2022-05-11 15:40:17 -04:00
Thomas Harte
17add4b585
Introduce and overwhelmingly fail the flamewing BCD tests.
2022-05-11 15:19:39 -04:00
Thomas Harte
d492156453
Add noreturn attribute as a warning.
2022-05-11 10:51:48 -04:00
Thomas Harte
96af3d5ec5
Fix infinite inner/outer loop.
2022-05-11 10:26:12 -04:00
Thomas Harte
69ba14e34e
Support the trace flag.
2022-05-11 09:39:15 -04:00
Thomas Harte
943c924382
Add missing: MOVE to/from USP, RESET.
2022-05-11 07:52:23 -04:00
Thomas Harte
4b97427937
Remove further magic constants.
2022-05-11 07:00:35 -04:00
Thomas Harte
ab8e1fdcbf
Take a swing at access faults and address errors.
2022-05-10 16:20:30 -04:00
Thomas Harte
477979c275
Fully formulate and document the flow controller.
2022-05-10 10:34:07 -04:00
Thomas Harte
c635720a09
Tidy up; provide a notification for bit-change operations.
2022-05-10 08:23:25 -04:00
Thomas Harte
f2a6a12f79
Remove further vestiges of timing.
2022-05-09 20:58:51 -04:00
Thomas Harte
7445c617bc
Start removing 68000-specific timing calculations.
2022-05-09 20:32:02 -04:00
Thomas Harte
8e7340860e
Minor thematic rearrangement.
2022-05-09 16:35:17 -04:00
Thomas Harte
2ca1eb4cf8
Move set_pc into the operation-specific group.
2022-05-09 16:20:15 -04:00
Thomas Harte
0af8660181
Remove add_pc and decline_branch in favour of operation-specific signals.
2022-05-09 16:19:25 -04:00
Thomas Harte
330ec1b848
TODO is done.
2022-05-09 11:52:33 -04:00
Thomas Harte
2f7cff84d9
Enable missing rotates and shifts.
2022-05-09 11:26:01 -04:00
Thomas Harte
8e5650fde9
Clean up Instruction.hpp.
2022-05-09 10:13:42 -04:00
Thomas Harte
539932dc56
Provide function codes. TODO: optionally.
2022-05-09 09:18:02 -04:00
Thomas Harte
5ab5e1270e
Fix test for new MOVEM semantics.
2022-05-09 09:17:48 -04:00
Thomas Harte
e35de357fa
Route reads and writes through a common path.
2022-05-08 17:17:46 -04:00
Thomas Harte
0818fd7828
Ensure no status updates fall through the cracks.
2022-05-07 21:29:12 -04:00
Thomas Harte
98cb9cc1eb
Fix CHK operand size.
2022-05-07 21:16:44 -04:00
Thomas Harte
bf8c97abbb
Permit TRAP, TRAPV and CHK to push the next PC rather than the current.
2022-05-07 20:32:39 -04:00
Thomas Harte
ad6cf5e401
Pull out magic constant, simplify sp and TAS.
2022-05-07 20:20:24 -04:00
Thomas Harte
2b3900fd14
Fix LINK A7.
2022-05-07 08:15:26 -04:00
Thomas Harte
1defeca1ad
Implement RTS, RTR, RTE.
2022-05-06 12:30:49 -04:00
Thomas Harte
ac6a9ab631
Fix TAS Dn.
2022-05-06 12:23:04 -04:00
Thomas Harte
8176bb6f79
Expose issues with TST and TAS.
2022-05-06 12:18:56 -04:00
Thomas Harte
9c266d4316
Proceed to unimplemented TST.
2022-05-06 11:33:57 -04:00
Thomas Harte
d478a1b448
Proceed to next failure: PEA.
2022-05-06 10:04:20 -04:00
Thomas Harte
190a351a29
Fix address writeback.
2022-05-06 09:56:01 -04:00
Thomas Harte
607ddd2f78
Preserve MOVEM order in Operation.
2022-05-06 09:45:06 -04:00
Thomas Harte
fed79a116f
Be overt about the size being described here.
2022-05-06 09:22:38 -04:00
Thomas Harte
5db0ea0236
Add note for my tomorrow self.
2022-05-05 21:11:02 -04:00
Thomas Harte
06fe320cc0
Correct source counting, but this leaves the operands still being the wrong way around.
2022-05-05 21:06:53 -04:00
Thomas Harte
f7991e18de
Makes a failed attempt to implement MOVEM to registers.
2022-05-05 20:32:21 -04:00
Thomas Harte
d7d0a5c15e
Implement MOVEM to memory.
2022-05-05 18:51:29 -04:00
Thomas Harte
47f4bbeec6
Switch to a contiguous block of 16 registers.
2022-05-05 15:31:59 -04:00
Thomas Harte
9ab70b340c
Route MOVEM appropriately.
2022-05-05 12:42:57 -04:00
Thomas Harte
70cdc2ca9f
Fix MOVEP to register.
...
Advance to lack of MOVEM.
2022-05-05 12:37:47 -04:00
Thomas Harte
f63a872387
BTST does not write back.
2022-05-05 12:32:15 -04:00
Thomas Harte
67462c2f92
Rewire MOVEP.
2022-05-05 12:27:36 -04:00
Thomas Harte
4a4e786060
Hit a realisation: write-back isn't going to work with MOVEP as formulated.
2022-05-05 09:26:26 -04:00
Thomas Harte
665f2d4c00
Attempts MOVEP.
2022-05-05 09:00:33 -04:00
Thomas Harte
64586ca7ba
Implement BTST/etc.
2022-05-04 20:57:22 -04:00
Thomas Harte
46686b4b9c
Start testing move.
2022-05-04 20:38:56 -04:00
Thomas Harte
15c90e546f
Fix rotates and shifts to memory.
2022-05-04 19:44:59 -04:00
Thomas Harte
5aabe01b6d
Mostly fix LINK and UNLK.
2022-05-04 08:41:55 -04:00
Thomas Harte
5d1d94848c
Take a bash at LINK and UNLK.
2022-05-04 08:26:11 -04:00
Thomas Harte
7d10976e08
Add LINK and UNLINK to operand_flags.
2022-05-03 20:51:02 -04:00
Thomas Harte
d3b55a74a5
Fix LEA, proceed to non-functional LINK and UNLK.
2022-05-03 20:45:36 -04:00
Thomas Harte
de58ec71fd
Fix EXT, SWAP.
2022-05-03 20:17:36 -04:00
Thomas Harte
052ba80fd7
Add enough wiring to complete but fail EXT and JMP/JSR.
2022-05-03 15:49:55 -04:00
Thomas Harte
39f0ec7536
Get far enough through CHK to realise that MOVEM probably needs to be divided by direction.
2022-05-03 15:40:04 -04:00
Thomas Harte
af973138df
Correct decoding of Bcc.b, satisfying Bcc and BSR tests.
2022-05-03 15:32:54 -04:00
Thomas Harte
5a87506f3d
Fix Bcc, making decision that add_pc is relative to start of instruction.
2022-05-03 15:21:42 -04:00
Thomas Harte
90f0005cf2
Proceed to failing Bcc and flagging up my lack of an implementation for BSR.
2022-05-03 14:45:49 -04:00
Thomas Harte
d8b3748d24
Fix Scc size, DBcc behaviour.
2022-05-03 14:40:51 -04:00
Thomas Harte
1b224c961e
Fix Scc, add operand flags for DBcc.
2022-05-03 14:23:57 -04:00
Thomas Harte
b6ffff5bbd
Distinguish [ADD/SUB]QA from [ADD/SUB]Q.
2022-05-03 14:17:26 -04:00
Thomas Harte
5ebae85a16
Start recording successes.
2022-05-03 11:28:50 -04:00
Thomas Harte
b3cf13775b
Consume operand_flags into Instruction.hpp.
2022-05-03 11:09:57 -04:00
Thomas Harte
c61809f0c4
Add CMPAl.
2022-05-03 09:20:02 -04:00
Thomas Harte
2f2d6bc08b
Correct CMPw.
2022-05-03 09:05:34 -04:00
Thomas Harte
1bb809098c
Switch — messily — to a more compact way of indicating sequence.
2022-05-03 09:04:54 -04:00
Thomas Harte
17a2ce0464
Fix missung #undefs.
2022-05-02 21:29:46 -04:00
Thomas Harte
011506f00d
Add basic exceptions.
2022-05-02 21:27:58 -04:00
Thomas Harte
25ab478461
Fix immediate byte and word fetches.
2022-05-02 20:17:44 -04:00
Thomas Harte
fc9a35dd04
Test add/sub, add an exception for invalid Sequences.
2022-05-02 20:09:38 -04:00
Thomas Harte
7efe30f34c
Fix (d8, _, Xn) calculation.
2022-05-02 15:09:59 -04:00
Thomas Harte
ef28d5512b
Annotate further.
2022-05-02 12:58:04 -04:00
Thomas Harte
3827ecd6d3
Proceed to complete test running.
2022-05-02 12:57:45 -04:00
Thomas Harte
fa49737538
Correct processor name.
2022-05-02 08:40:47 -04:00
Thomas Harte
14532867a4
Sneaks towards testing EXT.
2022-05-02 08:00:56 -04:00
Thomas Harte
73f340586d
Proceed to building, but failing tests.
2022-05-02 07:45:07 -04:00
Thomas Harte
56fe00c5fb
Correct errors preparatory to Executor's lack of flow controller actions.
2022-05-01 20:40:57 -04:00
Thomas Harte
3c26177239
Provide both compile- and run-time operation selection options.
2022-05-01 17:39:56 -04:00
Thomas Harte
fe8f0d960d
Equivocate.
...
(Specifically: addresses cannot generally be obtained in advance, as they are often the product of registers, but things like displacements, immediate values and absolute addresses can)
2022-05-01 15:30:03 -04:00
Thomas Harte
c72caef4fd
Correct further size specifiers.
2022-05-01 15:21:58 -04:00
Thomas Harte
0720a391e8
Correct address register mutations.
2022-05-01 15:18:06 -04:00
Thomas Harte
d16ac70a50
Correct include path.
2022-05-01 15:14:12 -04:00
Thomas Harte
fc8e020436
Improve field name.
2022-05-01 15:12:13 -04:00
Thomas Harte
6b073c6067
Attempt to round out addressing modes, shift to a header, as per templating on BusHandler.
2022-05-01 15:10:54 -04:00
Thomas Harte
0b19bbff8d
Marginally refactor, to avoid repetition of read/write branch.
2022-05-01 13:09:28 -04:00
Thomas Harte
42927c1e32
Establish more of the 680x0 executor loop.
2022-05-01 13:00:20 -04:00
Thomas Harte
df999978f1
Figure out what the call to perform should look like.
...
Albeit that this class doesn't currently offer any of the proper flow control actions.
2022-04-30 20:34:44 -04:00
Thomas Harte
43cd740a7b
Shuffle Step to give meaning to the LSB.
2022-04-30 20:33:35 -04:00
Thomas Harte
52f355db24
Decision: operation is not a template parameter. Hence can use condition as fully typed.
2022-04-30 14:08:51 -04:00
Thomas Harte
a86c5ccdc9
Merge branch '68000Perform' of github.com:TomHarte/CLK into 68000Perform
2022-04-30 14:02:23 -04:00
Thomas Harte
e532562108
Merge branch 'master' into 68000Perform
2022-04-30 14:02:17 -04:00
Thomas Harte
4293ab2acb
Merge pull request #1030 from TomHarte/68000cc
...
Include decoded condition in Preinstruction.
2022-04-30 13:56:49 -04:00
Thomas Harte
8d24c00df2
Include decoded condition in Preinstruction.
2022-04-30 09:00:47 -04:00
Thomas Harte
f4074e0bba
Add basic status.
2022-04-30 08:38:28 -04:00
Thomas Harte
e4426dc952
Introduce calculate EA steps.
2022-04-29 20:30:48 -04:00
Thomas Harte
9359f6477b
Start drafting an Executor.
2022-04-29 17:12:06 -04:00
Thomas Harte
a103f30d51
Attempt to game out LEA, PEA. Add various special MOVEs.
2022-04-29 14:43:58 -04:00
Thomas Harte
78b60dbd1a
Evict MOVEM and MOVEP, enable TRAP and TRAPV, complete CHK.
2022-04-29 14:43:30 -04:00
Thomas Harte
cde75a1c00
Make steps more visible.
2022-04-29 11:26:39 -04:00
Thomas Harte
b9d243552c
MOVEs don't read from operand 2.
2022-04-29 11:22:06 -04:00
Thomas Harte
85242ba896
Add to Xcode project, template on Model as per CLR being odd. Fill in some obvious answers.
2022-04-29 11:10:14 -04:00
Thomas Harte
d16dab6f62
Starts introducing a sequencer, to resolve responsibility of perform.
2022-04-29 10:40:19 -04:00
Thomas Harte
8066b19f93
Correct typos.
2022-04-29 07:57:02 -04:00
Thomas Harte
abd2a831a3
Added a further ambiguity.
2022-04-29 05:08:44 -04:00
Thomas Harte
824d3ae3f7
Conclusion: a union does produce better code.
...
(But needn't be so verbose)
2022-04-29 04:51:02 -04:00
Thomas Harte
727a14c6f9
Add notes for myself on decisions yet to make.
2022-04-29 03:53:17 -04:00
Thomas Harte
13d20137d3
Tackle two lingering references to exception_handler.
2022-04-29 03:38:23 -04:00
Thomas Harte
9680566595
Include in automated build, temporarily.
2022-04-28 20:42:44 -04:00
Thomas Harte
33c9ea2cf7
A flow controller feels more natural than an exception handler.
2022-04-28 20:42:04 -04:00
Thomas Harte
1d8d2b373b
Port all simple instruction bodies.
2022-04-28 16:55:47 -04:00
Thomas Harte
611b472b12
Add evaluate_condition, to check standard 68000 condition codes.
2022-04-28 16:54:57 -04:00
Thomas Harte
bb73eb0db3
Start working on an isolation of 68000 instruction execution.
2022-04-28 15:35:40 -04:00
Thomas Harte
8a18685902
Relocated RegisterSizes to Numeric.
2022-04-28 15:10:08 -04:00
Thomas Harte
872b941b20
Merge pull request #1027 from TomHarte/GCCWarnings
...
Resolve GCC compilation warnings.
2022-04-27 20:00:38 -04:00
Thomas Harte
39261436c8
Remove unused type alias.
2022-04-27 19:53:32 -04:00
Thomas Harte
5e355383df
Correct SIB test.
2022-04-27 19:53:15 -04:00
Thomas Harte
90bfec8c04
Merge pull request #1026 from TomHarte/FarewellOfft
...
Eliminate `off_t`.
2022-04-27 19:29:10 -04:00
Thomas Harte
866b6c6129
Eliminate off_t.
2022-04-27 19:16:37 -04:00
Thomas Harte
649fe7a1ec
Merge pull request #1021 from TomHarte/68kDecoder
...
Establishes a formal 68k [pre-]decoder.
2022-04-27 08:14:24 -04:00
Thomas Harte
9cbbb6e508
Adjust path to match namespace; add to Qt project.
2022-04-27 08:05:36 -04:00
Thomas Harte
9908769bb3
Normalise test name.
2022-04-26 20:32:39 -04:00
Thomas Harte
8902bb1af0
Include size and supervisor flag in Preinstruction.
2022-04-26 19:44:02 -04:00
Thomas Harte
baf1bd354d
Avoid packing/unpacking of operands.
2022-04-26 19:37:07 -04:00
Thomas Harte
539c2985aa
Fill in size table, define quick to return a uint32_t.
2022-04-26 12:30:14 -04:00
Thomas Harte
5c356e15b5
Completes requires_supervisor.
2022-04-25 20:05:45 -04:00
Thomas Harte
8ff0b71b29
Subsume MOVEQ into MOVE.l; add missing invalid_operands.
2022-04-25 19:58:19 -04:00
Thomas Harte
4e5a6c89b9
Merge pull request #1025 from TomHarte/AndValidate
...
Switch to validation via a simple AND mask.
2022-04-25 16:29:23 -04:00
Thomas Harte
8f8f201186
Complete transition to simple AND-based verification.
2022-04-25 16:23:16 -04:00
Thomas Harte
0c688757b0
Adapt the last of the MOVEs, TAS, NOT, SUB and TST.
2022-04-25 16:05:44 -04:00
Thomas Harte
5778e92e70
Adapt MOVE, DIV, MUL, OR.
2022-04-25 15:43:25 -04:00
Thomas Harte
3268ea42ff
Translate SUB, PEA.
2022-04-25 12:41:41 -04:00
Thomas Harte
1538500903
Add enough to make AND masks the default case.
2022-04-25 12:30:44 -04:00
Thomas Harte
6ca30a16ca
Update JMP, JSR.
2022-04-25 12:05:07 -04:00
Thomas Harte
e6dc2e0d31
Add EXG, EXT.
2022-04-25 11:49:14 -04:00
Thomas Harte
9bbd1390c1
Add new-style validation of EORI to CCR, move EXG decoding into page navigation.
2022-04-25 11:43:30 -04:00
Thomas Harte
27f8db6e8b
Update DBcc, DIVU/DIVS, EOR.
2022-04-25 09:49:18 -04:00
Thomas Harte
dda0c0e097
Update CMPM, CMPI.
2022-04-25 09:39:22 -04:00
Thomas Harte
f5ea5c26a3
Translate CHK, CLR, CMP, CMPA.
2022-04-24 21:05:00 -04:00
Thomas Harte
d01fa96177
Port BSR, BTST.
2022-04-24 20:49:41 -04:00
Thomas Harte
03caa53863
Translate BSET.
2022-04-24 19:58:10 -04:00
Thomas Harte
4f4a2e6d92
Translate ASL, ASR, Bcc, BCHG, BCLR.
2022-04-24 19:53:54 -04:00
Thomas Harte
87178ed725
Port AND.
2022-04-24 15:12:18 -04:00
Thomas Harte
94e5436f6e
Attempt a more compact retelling.
2022-04-24 14:47:14 -04:00
Thomas Harte
b965f2053a
Start experimenting with a simple AND for operand validation.
2022-04-24 10:43:06 -04:00
Thomas Harte
959db77b88
Eliminate concept of skips.
2022-04-22 20:59:25 -04:00
Thomas Harte
edee078f0a
Eliminate last set of failures.
2022-04-22 20:57:45 -04:00
Thomas Harte
d4b766bf3f
Introduce directional ADD/SUB/AND/OR.
...
Just 512 failures to go.
2022-04-22 20:37:09 -04:00
Thomas Harte
72772c9a83
Remove branch from combined_mode.
...
On x86 it was probably only a conditional move, but this is fine.
2022-04-22 15:11:41 -04:00
Thomas Harte
4c806d7c51
Tidy up slightly, ahead of a final push to getting complete test success.
...
After which I can start undoing style errors.
2022-04-22 14:51:25 -04:00
Thomas Harte
c16a60c5ea
Import correct STOP, LINK, EXT.
2022-04-22 14:36:29 -04:00
Thomas Harte
96afcb7a43
Introduce remainder of tests.
2022-04-22 14:33:43 -04:00
Thomas Harte
e5a8d8b9ad
Import corrected TRAPs and RTE/RTR.
2022-04-22 14:26:44 -04:00
Thomas Harte
efeee5160e
Add tests for RTE, RTR, TRAP, TRAPV, CHK.
2022-04-22 10:06:39 -04:00
Thomas Harte
06fb502047
Add MUL/DIV tests and exclusions.
2022-04-22 09:47:16 -04:00
Thomas Harte
977192f480
Resolve D-page decoding errors.
...
In particular: that I'd overlooked CMPM, and was treating NOT as two-operand.
2022-04-22 09:24:16 -04:00
Thomas Harte
cf66d9d38d
Add failing tests for EOR, NOT, OR; disambiguate EOR vs CMP.
2022-04-21 20:36:04 -04:00
Thomas Harte
25eeff8fc5
Correct CMP decoding, correct AND as far as asymmetry of Dn, Dn.
2022-04-21 20:14:52 -04:00
Thomas Harte
d342cdad2b
Import corrected MOVEPs.
2022-04-21 19:04:14 -04:00
Thomas Harte
c899ee0d55
Enable MOVEP tests.
2022-04-21 18:57:47 -04:00
Thomas Harte
220408fcaa
Introduce MOVEM tests.
...
12662 opcodes to go.
2022-04-21 16:39:17 -04:00
Thomas Harte
f4e99be7e1
Import BSRs, corrected MOVEMs.
2022-04-21 16:35:24 -04:00
Thomas Harte
bf9fc0ae96
Correct decoding of BSR.
2022-04-21 16:24:34 -04:00
Thomas Harte
9697e666b7
With a shift to MOVE.q, all tests now pass again.
...
12802 opcodes now untested.
2022-04-21 16:16:34 -04:00
Thomas Harte
a8a1a74b79
Correct BSRb quick value.
2022-04-21 16:13:06 -04:00
Thomas Harte
216ca7cbc9
Import BCC/BSR/BRA quick values.
2022-04-21 16:11:29 -04:00
Thomas Harte
549e440f7c
Add 'quick' decoding and testing.
2022-04-21 16:05:00 -04:00
Thomas Harte
45c02c31f8
Add MOVEM exclusions.
2022-04-21 15:47:34 -04:00
Thomas Harte
b6b092d124
Add tests, exclusions for rest of shift/roll group.
2022-04-21 11:26:56 -04:00
Thomas Harte
d346d4a9b6
Import updated quick values.
2022-04-21 09:59:04 -04:00
Thomas Harte
c84e98774a
Import corrected register ASL/etcs.
2022-04-21 09:51:21 -04:00
Thomas Harte
e1f4187430
Introduce failing ASL test.
2022-04-20 20:22:56 -04:00
Thomas Harte
3af93ada6f
Test and correct Bcc, BSR, CLR, NEGX, NEG.
2022-04-20 20:19:56 -04:00
Thomas Harte
fa4dee8cfd
Import two-operand DBccs.
2022-04-20 20:07:20 -04:00
Thomas Harte
3888492f0d
Import corrected DBccs and JSRs.
2022-04-20 19:57:54 -04:00
Thomas Harte
dc16928f74
Add appropriate exclusions for JSR, JMP, Scc.
2022-04-20 16:56:26 -04:00
Thomas Harte
a4e440527b
Import corrected CMPA references.
2022-04-20 16:46:05 -04:00
Thomas Harte
80ff146620
Add CMP, CMPA and TST tests and exclusions.
2022-04-20 16:29:45 -04:00
Thomas Harte
d4fe9d8166
Complete BTST/etc exclusions.
2022-04-20 16:16:24 -04:00
Thomas Harte
85a0af03c1
Import more standard JSON; start validating.
2022-04-20 09:17:00 -04:00
Thomas Harte
dc43f5605b
Give MOVEPs precedence.
2022-04-20 08:40:56 -04:00
Thomas Harte
e0d2baae58
Test ANDI/ORI/EORI SR/CCR, and fail BTST/BCLR/BCHG/BSET.
2022-04-20 08:39:43 -04:00
Thomas Harte
437de19ecb
Correct MOVE USP entries.
2022-04-20 08:34:10 -04:00
Thomas Harte
fab064641f
Add Move[to/from][SR/CCR/USP] tests, correct decodings.
2022-04-20 07:59:13 -04:00
Thomas Harte
cc69d01bdc
Strip dead code.
2022-04-19 20:41:39 -04:00
Thomas Harte
461a95d7ff
Introduce missing register numbers for PEA, and elsewhere.
2022-04-19 20:39:01 -04:00
Thomas Harte
316e9681cc
Weed out false PEAs.
2022-04-19 20:34:08 -04:00
Thomas Harte
4181313cc6
Correct decoding of SWAP.
2022-04-19 20:28:00 -04:00
Thomas Harte
aa1665acce
Fix LEA transcription problems.
2022-04-19 20:24:03 -04:00
Thomas Harte
6aabc5e7b0
Test LEA, PEA, add name for MOVEq.
2022-04-19 19:45:51 -04:00
Thomas Harte
343a8e0192
Resolve wrong-headed mapping of LEA to MOVEAl.
2022-04-19 19:36:21 -04:00
Thomas Harte
2707887a65
Indicate MOVEAs.
2022-04-19 17:17:19 -04:00
Thomas Harte
ef87d09cfa
Clear up MOVEs, fail on MOVEAs.
2022-04-19 17:13:23 -04:00
Thomas Harte
d21c67f237
Don't permit byte move from address register.
2022-04-19 16:49:26 -04:00
Thomas Harte
de0432b317
Include register numbers in MOVEs.
2022-04-19 16:34:22 -04:00
Thomas Harte
de40fed248
Test MOVEs and add operand validation.
2022-04-19 16:31:03 -04:00
Thomas Harte
76d7e0e1f8
Test and correct SUBs.
2022-04-19 16:27:20 -04:00
Thomas Harte
bfa551ec08
Correct ADDX and SUBX listings.
2022-04-19 16:21:40 -04:00
Thomas Harte
740e564bc7
Improve validation, add all ADDs.
...
It now looks like probably the ADDXs in the JSON are incorrect.
2022-04-19 14:45:15 -04:00
Thomas Harte
1f585d67b6
ADDA: correct decoding, add validation.
2022-04-19 14:43:01 -04:00
Thomas Harte
5b22e94a4b
Map invalid reg+mode combinations to AddressingMode::None; add validation of ADDs and decoding of ADDX.
2022-04-19 14:36:36 -04:00
Thomas Harte
7749aef6b6
Improve const correctness.
2022-04-19 14:35:40 -04:00
Thomas Harte
5de8fb0d08
Disallow four illegal NBCD addressing modes.
2022-04-19 09:59:02 -04:00
Thomas Harte
19f7335926
Add post validation step.
2022-04-19 09:44:02 -04:00
Thomas Harte
9b61830a55
Add ADD.b as a note to self that .q decoding is also required.
2022-04-19 08:44:44 -04:00
Thomas Harte
99f4cd867d
Decode the two EXTs.
2022-04-19 08:42:17 -04:00
Thomas Harte
f29fec33a2
Eliminate mismatches due to unsupported addressing modes.
2022-04-19 08:37:53 -04:00
Thomas Harte
93fe3459fd
The quick value won't always fit in reg; turf the problem elsewhere.
2022-04-19 08:37:35 -04:00
Thomas Harte
1abd3bd7f3
Decode SWAP.
2022-04-19 08:37:13 -04:00
Thomas Harte
5509f20025
Fix MOVEfrom/toSR and NBCD listings.
2022-04-19 08:07:34 -04:00
Thomas Harte
fc4fd41be4
Reorder from most specific to least.
2022-04-19 08:00:52 -04:00
Thomas Harte
3ffca20001
Uncover various discrepancies with NBCD.
2022-04-19 07:15:54 -04:00
Thomas Harte
7c29305788
Test all ABCDs.
2022-04-18 20:00:39 -04:00
Thomas Harte
41fb18e573
Add 68k decoder to SDL build.
...
... and therefore to automated compilation testing.
2022-04-18 14:43:41 -04:00
Thomas Harte
e4c6251ef5
Express the BSR/Bcc.l test properly.
2022-04-18 14:42:31 -04:00
Thomas Harte
7aa250eaf7
Advances to hitting the same absent/present mapping as the old decoder.
2022-04-18 14:41:26 -04:00
Thomas Harte
ff380b686a
Decode MOVEq.
2022-04-18 09:12:45 -04:00
Thomas Harte
d2452f4b68
Fix SUBQ ExtendedOperation mappings.
2022-04-18 09:08:49 -04:00
Thomas Harte
deb9c32a38
Add missing Sccs.
2022-04-18 09:04:17 -04:00
Thomas Harte
440f45b996
Attempt decoding and disambiguation of Scc, DBcc, Bcc and BSR.
2022-04-18 08:55:46 -04:00
Thomas Harte
7d64c4ec66
Add STOP.
2022-04-18 08:29:10 -04:00
Thomas Harte
7fe0d530c1
Add a decoder for TRAP.
2022-04-18 08:05:33 -04:00
Thomas Harte
c944767554
Better document decoding patterns, add LEA and CHK.
2022-04-18 08:00:43 -04:00
Thomas Harte
fde5a1c507
Ensure ADDI, SUBI, etc, provide an operation.
2022-04-18 07:42:30 -04:00
Thomas Harte
0fbfb41fa8
Expand on none-matching text.
2022-04-18 07:42:14 -04:00
Thomas Harte
1991ed0804
Introduce failing [partial-]test of new 68000 decoder.
2022-04-18 07:23:25 -04:00
Thomas Harte
e782b92a80
Add exposition.
2022-04-17 19:56:39 -04:00
Thomas Harte
07635ea2be
Add register names, Q values.
2022-04-17 19:46:21 -04:00
Thomas Harte
fb3de9ce9d
Merge pull request #1023 from TomHarte/AppleIIAutostart
...
Undo bad guess at initial switch state.
2022-04-17 17:07:56 -04:00
Thomas Harte
efff91ea3d
Undo bad guess at initial switch state.
2022-04-17 17:03:05 -04:00
Thomas Harte
1916bd3bd0
Import a first effort at listing all 68000 instruction specs.
2022-04-17 07:57:59 -04:00
Thomas Harte
4eb752b000
Even out tabs.
2022-04-15 20:41:39 -04:00
Thomas Harte
bfb29a58f3
Take another crack at neatness; make LEA overt.
2022-04-15 20:33:59 -04:00
Thomas Harte
f86e455a87
Advance permissively through the 4xxx page to LEA.
2022-04-15 16:01:33 -04:00
Thomas Harte
faa35fe9fc
Decode MOVE and the fixed 0x4xxx set.
2022-04-15 15:40:31 -04:00
Thomas Harte
89b8b59658
Ostensibly completes the 0 line.
2022-04-15 15:33:54 -04:00
Thomas Harte
de55a1adc4
Require a model for decoding; shift a bunch of immediates into ExtendedOperation.
2022-04-15 09:40:37 -04:00
Thomas Harte
d1613025ee
For now, assume the .q actions can be handled inside Preinstruction.
2022-04-13 09:29:12 -04:00
Thomas Harte
cc4431c409
Expand decode to accept a wider array of operations, and then funnel them down.
2022-04-12 16:17:30 -04:00
Thomas Harte
3d5986c55d
Some minor style changes, plus I think I've talked myself into an expanded Operation-tracking enum. Probably.
2022-04-12 14:54:11 -04:00
Thomas Harte
9aeb6ee532
Formally prepare for one- and two-operand instructions.
2022-04-12 09:14:46 -04:00
Thomas Harte
e7f6cc598d
Make first attempt to complete broad phase of decoding.
2022-04-12 09:08:46 -04:00
Thomas Harte
cd465dd121
Decode page E.
2022-04-12 09:04:40 -04:00
Thomas Harte
174b48a14a
Populate lines 9 and D.
2022-04-12 08:57:40 -04:00
Thomas Harte
bca18e7aba
Fill in line decoders for 5, 6 and 7.
...
This leaves 9, D and E to go.
2022-04-12 08:44:32 -04:00
Thomas Harte
17e761d6c6
Add enough code to pages 0–3 to shift problem to decode().
2022-04-12 08:36:44 -04:00
Thomas Harte
c50556dde4
Create empty line decoders.
2022-04-12 08:16:29 -04:00
Thomas Harte
dd5bdd67d7
Add B page and a large chunk of 4.
2022-04-12 07:49:08 -04:00
Thomas Harte
21ac9363e9
Add page 8.
2022-04-11 16:32:57 -04:00
Thomas Harte
8e3cccf4d6
Begins a formalised 68k decoder.
2022-04-11 15:00:55 -04:00
Thomas Harte
945e935312
Merge pull request #1020 from TomHarte/RotateMask
...
Improve PowerPC rotate mask generation.
2022-04-10 15:24:17 -04:00
Thomas Harte
bb5cf570e5
Remove conditional, make generic enough for both 32- and 64-bit operation.
2022-04-10 15:18:23 -04:00
Thomas Harte
a5ed288db2
Merge pull request #1018 from TomHarte/PowerPCTests
...
Import Dingusdev PowerPC tests
2022-04-10 09:45:39 -04:00
Thomas Harte
7002d6d306
Improve accuracy of comment.
2022-04-10 09:37:18 -04:00
Thomas Harte
1b8d8f3a04
Default to 32-bit versions.
2022-04-10 09:35:58 -04:00
Thomas Harte
284440336d
Correct rotate_mask().
2022-04-10 09:31:39 -04:00
Thomas Harte
140ae7a513
Clarify template parameters.
2022-04-10 08:57:09 -04:00
Thomas Harte
21328d9e37
Normalise macros, remove unused AssertEqualOperationNameO.
2022-04-09 21:25:00 -04:00
Thomas Harte
5177fe1db7
Update tests.
2022-04-09 21:11:58 -04:00
Thomas Harte
7de50b5e2e
Provide 64-bit me, mb and sh. Add direct getter for rotate masks.
2022-04-09 21:08:01 -04:00
Thomas Harte
4652a84b43
Add exposition.
2022-04-09 19:20:13 -04:00
Thomas Harte
9e0755bc86
Introduce overlooked: ld, ldu, rldclx, rldcrx, rldicx, rldiclx, rldicrx, rldimix.
2022-04-09 18:28:51 -04:00
Thomas Harte
da0f7d7907
Rearrange into alphabetical order.
2022-04-09 10:20:03 -04:00
Thomas Harte
88d72bf31d
Fill in more mnemonics.
2022-04-08 10:01:52 -04:00
Thomas Harte
aac2f7dd73
Add missing validations.
2022-04-08 09:47:04 -04:00
Thomas Harte
1f44ad1723
Completes test cases.
2022-04-06 21:09:58 -04:00
Thomas Harte
4ab1857a11
Complete MPC601 commentary.
2022-04-06 20:53:44 -04:00
Thomas Harte
d23c714ec7
Build in an optional post hoc validation.
...
TODO: validate.
2022-04-05 11:23:54 -04:00
Thomas Harte
ac524532e7
Handle the synonym test cases.
2022-04-04 08:09:59 -04:00
Thomas Harte
59a1fde2a1
Fix is_zero_mask.
2022-04-03 20:37:09 -04:00
Thomas Harte
31276de5c3
Complete 'misc instructions' tests.
2022-04-03 20:33:32 -04:00
Thomas Harte
c581aef11d
Test as far as mffs.
2022-04-03 18:29:40 -04:00
Thomas Harte
7f6a955a71
Complete the cmp set.
2022-04-03 15:50:03 -04:00
Thomas Harte
125d97cc41
Complete floating point tests.
2022-04-03 08:55:28 -04:00
Thomas Harte
de7d9ba471
Add further floating point tests.
2022-04-03 08:06:59 -04:00
Thomas Harte
ad54b44235
Begin documentation and testing of the floating point instructions.
2022-04-02 19:58:21 -04:00
Thomas Harte
42532ec0f5
Test floating point loads and stores.
2022-04-02 15:40:17 -04:00
Thomas Harte
b84fa619da
Test integer loads and stores.
2022-04-02 15:27:12 -04:00
Thomas Harte
8a1409184f
Add decoding of lwa.
2022-04-02 10:31:55 -04:00
Thomas Harte
8a3c16a5bc
Add lwa.
2022-04-02 10:26:47 -04:00
Thomas Harte
6343c65ce2
Document further; mftb is optional.
2022-04-02 10:09:58 -04:00
Thomas Harte
20b4736a1f
Test tw, twi.
2022-04-02 10:09:35 -04:00
Thomas Harte
d5967f7834
Correct decoding of stwcx. and stdcx.
2022-04-01 20:37:36 -04:00
Thomas Harte
d5f7650ac1
Test synchronising loads and stores, further expand documentation.
2022-04-01 18:30:48 -04:00
Thomas Harte
6330caffde
Test logical immediates.
2022-04-01 17:52:38 -04:00
Thomas Harte
8f580c256c
Remove explanations; saying nothing is better than giving incomplete advice.
2022-04-01 17:49:34 -04:00
Thomas Harte
4671b8db5c
Add tests for non-immediate logicals.
2022-04-01 17:35:47 -04:00
Thomas Harte
7c8f044380
Complete shift tests.
2022-04-01 17:22:32 -04:00
Thomas Harte
8efd506471
Transcribe up to the end of 'e', use extswx and remove extsw.
2022-04-01 17:11:57 -04:00
Thomas Harte
e83267751e
Start shuffling parameters into conventional order; expand on cmp–cmpli, dcbf–dcbz.
2022-03-30 20:36:46 -04:00
Thomas Harte
a3b110aee5
Clean up. Shifts next.
2022-03-30 17:04:41 -04:00
Thomas Harte
84f0b0a84c
Test rotates.
2022-03-30 16:43:09 -04:00
Thomas Harte
c9c5adc650
Test crand ... crxor.
2022-03-30 12:40:57 -04:00
Thomas Harte
52e7226655
Merge branch 'PowerPCTests' of github.com:TomHarte/CLK into PowerPCTests
2022-03-29 20:50:40 -04:00
Thomas Harte
b89c8decd4
Test addx–divwx and mtcrf; document fields for crand, etc.
2022-03-29 20:48:43 -04:00
Thomas Harte
d783975597
Start offering a list of relevant fields per Operation.
2022-03-29 19:59:21 -04:00
Thomas Harte
5ec291df5c
Merge branch 'PowerPCTests' of github.com:TomHarte/CLK into PowerPCTests
2022-03-29 14:38:28 -04:00
Thomas Harte
0a45355055
Add a few more field comments.
2022-03-29 14:37:21 -04:00
Thomas Harte
e696624da0
Now passes negx, subfex, subfzex, subfmex, dozx, absx, nabsx.
2022-03-28 20:47:32 -04:00
Thomas Harte
99ad40f3e0
Test subfcx, subfx; correct decoding of oe().
2022-03-28 20:39:52 -04:00
Thomas Harte
b9c8016aca
Merge branch 'PowerPCTests' of github.com:TomHarte/CLK into PowerPCTests
2022-03-28 20:20:59 -04:00
Thomas Harte
8ad1f2d4f5
Add bad attempt to catch subfc.
2022-03-28 20:18:41 -04:00
Thomas Harte
dc30581be0
Fix typo; . -> ,
2022-03-28 16:39:55 -04:00
Thomas Harte
2e56b606fa
Improve file division, document some further operations.
2022-03-27 18:44:56 -04:00
Thomas Harte
d84c72afe5
Test loads and stores, and immediate arithmetic.
2022-03-27 08:47:01 -04:00
Thomas Harte
2d69896f64
Merge branch 'master' into PowerPCTests
2022-03-26 10:12:15 -04:00
Thomas Harte
b3dd2db815
Merge pull request #1017 from TomHarte/CPC128k
...
CPC: ensure 64/128k RAM is properly selected.
2022-03-26 09:08:40 -04:00
Thomas Harte
290dd3993b
CPC: ensure 64/128k RAM is properly selected.
2022-03-26 08:54:07 -04:00
Thomas Harte
4f6a9917c6
Test lbzx, lbzux.
2022-03-26 08:45:07 -04:00
Thomas Harte
3d48183753
Test lwzux.
2022-03-25 20:31:47 -04:00
Thomas Harte
33c31eb798
Test lwzx.
2022-03-25 20:23:21 -04:00
Thomas Harte
73ae7ad82f
Resolve final branch test: aa() applies.
2022-03-25 20:10:08 -04:00
Thomas Harte
ee6470708b
Merge pull request #1016 from TomHarte/unistd
...
Eliminate usages of unistd.h.
2022-03-25 17:04:29 -04:00
Thomas Harte
61f25926b5
Eliminate usages of unistd.h.
2022-03-25 16:58:06 -04:00
Thomas Harte
1a5d3bb69c
Match majority of branch tests.
2022-03-25 08:41:57 -04:00
Thomas Harte
7d4fe55d63
Handle bclrx set and clear.
2022-03-25 06:25:06 -04:00
Thomas Harte
089e03afe8
Navigates bcctrx tests, adding simplified bo() helpers and bi() helpers.
2022-03-24 20:44:03 -04:00
Thomas Harte
8e019f01ab
Document dozx and dozi.
2022-03-21 10:49:01 -04:00
Thomas Harte
77bdaf3c78
These are likely to be useful outside of the decoder.
2022-03-21 10:41:17 -04:00
Thomas Harte
0b6828c895
Decision: these enums will be at namespace scope.
2022-03-21 10:19:30 -04:00
Thomas Harte
d4704c656f
Merge branch 'PowerPCTests' of github.com:TomHarte/CLK into PowerPCTests
2022-03-21 10:18:36 -04:00
Thomas Harte
c01192c784
Add exposition for absx to divsx.
2022-03-21 10:17:55 -04:00
Thomas Harte
8adb611edf
Attempt to clarify with an enum.
2022-03-19 12:27:28 -04:00
Thomas Harte
e5af5b57ad
Add documentation for bx, bcx, bcctrx.
...
Catch bcx tests.
2022-03-18 19:55:26 -04:00
Thomas Harte
f05d3e6af3
Introduce dingusdev tests, do just enough to check bx.
2022-03-18 17:24:12 -04:00
Thomas Harte
5963d038ef
Merge pull request #1014 from TomHarte/DDFSTRTSTOP
...
Improve application of DDFSTRT and DDFSTOP.
2022-03-18 15:48:06 -04:00
Thomas Harte
bfd28a04ba
Remove noise.
2022-03-18 10:41:20 -04:00
Thomas Harte
359ec257c0
Add a further state, seemingly to fix high-res mode.
2022-03-18 08:27:46 -04:00
Thomas Harte
88767e402c
Switch DDFSTART/STOP state machine.
2022-03-17 20:03:36 -04:00
Thomas Harte
88c7a6d053
Merge pull request #1013 from TomHarte/CroppedBottom
...
Switches all Copper WAITs to 12 cycles
2022-03-13 13:38:32 -04:00
Thomas Harte
e698cbf092
Silence debugging information.
2022-03-13 12:48:05 -04:00
Thomas Harte
f2ce646d8d
Undo 8-cycle-if-met WAIT.
2022-03-13 12:47:48 -04:00
Thomas Harte
cbf9b345ff
Merge pull request #1010 from TomHarte/80386
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Expands x86 decoder to recognise 80386 opcodes.
2022-03-12 12:46:15 -05:00
Thomas Harte
1725894fe9
Eliminate redundant CMPSD, CDQ, CWDE.
...
Also removes IBTS for now, as I'm unclear where it should sit in the opcode map.
2022-03-12 12:24:44 -05:00
Thomas Harte
fd4f85eb19
Add SMSW.
2022-03-12 12:23:48 -05:00
Thomas Harte
f1c4864016
Eliminate INSD.
2022-03-12 11:37:21 -05:00
Thomas Harte
e6bd265729
Explain which BOUNDs operand is which.
2022-03-11 20:34:28 -05:00
Thomas Harte
c22e8112e7
Expand exposition.
2022-03-11 20:30:56 -05:00
Thomas Harte
44252984c2
Eliminate INT3 special case.
2022-03-11 14:03:46 -05:00
Thomas Harte
4b4f92780e
Shuffle extension word order.
...
The primary objective here is simplifying index calculation, but as per the note it does also potentially open up options with regard to packing in the future.
2022-03-11 13:24:45 -05:00
Thomas Harte
f694620087
Resolve TODO.
2022-03-11 13:10:44 -05:00
Thomas Harte
dc1d1f132e
Add one more address size modifier test.
2022-03-11 13:01:02 -05:00
Thomas Harte
9b4048ec6e
The address size modifier doesn't seem to affect far address sizes.
...
It's meant to affect only instructions with operands that reside in memory, I think. So probably only ::DirectAddress in my nomenclature. More research to do.
2022-03-11 12:46:07 -05:00
Thomas Harte
727342134c
Add 8086 length limit test.
2022-03-11 11:55:41 -05:00
Thomas Harte
c744a97e3c
Ensure no extensions for default constructed Instruction.
2022-03-11 11:55:26 -05:00
Thomas Harte
40cafb95ed
Add 286 and 386 instruction length tests.
2022-03-11 09:48:51 -05:00
Thomas Harte
91d75d7704
Switch strategy on 8086 instruction lengths.
2022-03-11 09:48:26 -05:00
Thomas Harte
dc8cff364f
Switch to common test.
2022-03-11 09:48:02 -05:00
Thomas Harte
572dc40e6b
Allow assignments.
2022-03-11 09:47:23 -05:00
Thomas Harte
f92ffddb82
Add instruction length limits.
2022-03-10 20:47:56 -05:00
Thomas Harte
641e0c1afc
Resolve default segment question.
2022-03-10 20:27:35 -05:00
Thomas Harte
bf7faa80c1
Add TODO.
2022-03-10 16:47:54 -05:00
Thomas Harte
a2ae3771eb
Add test for switch to Source::IndirectNoBase.
2022-03-10 15:45:56 -05:00
Thomas Harte
673ffc50da
Switch to intended compact version of Instruction.
2022-03-10 15:14:50 -05:00
Thomas Harte
6dc9973754
Incorporate length into Instruction.
2022-03-10 07:12:12 -05:00
Thomas Harte
cf6a910630
Handle no-base case directly in existing switch.
2022-03-09 20:20:32 -05:00
Thomas Harte
520baa6ec8
Formalise IndirectNoBase and permit a knowledgable caller to avoid conditionals.
2022-03-09 20:19:40 -05:00
Thomas Harte
c1cc4f96df
Switch to const auto.
2022-03-09 16:56:32 -05:00
Thomas Harte
bbf925a27e
Clarify, unify and correct decoding and encoding of [CALL/RET/JMP][near/far/relative/absolute].
2022-03-09 16:48:06 -05:00
Thomas Harte
381fd5dbe4
E8 is a relative call.
2022-03-09 16:37:07 -05:00
Thomas Harte
ead8b7437e
Remove done TODO.
2022-03-09 15:26:20 -05:00
Thomas Harte
9f2d18b7ba
Improve comment formatting.
2022-03-09 15:25:46 -05:00
Thomas Harte
acd9df6745
Fix segment/offset sizes for far calls.
2022-03-09 15:23:43 -05:00
Thomas Harte
f96c051932
Record PUSH immediate operation size.
2022-03-09 14:24:57 -05:00
Thomas Harte
67b2e40fae
Fixed: INs and OUTs remain single byte.
2022-03-09 10:51:16 -05:00
Thomas Harte
081a2acd61
Fix shift group operand size.
2022-03-09 09:33:25 -05:00
Thomas Harte
de79acc790
Fix RegAddr/AddrRegs and group 2 decoding.
2022-03-09 08:38:34 -05:00
Thomas Harte
a125bc7242
Fill in more of test32bitSequence.
2022-03-08 20:16:19 -05:00
Thomas Harte
ebed4cd728
Introduce failing 32-bit parsing test.
2022-03-08 19:57:10 -05:00
Thomas Harte
21d4838322
Fix current implementation of data_segment.
...
As far as it goes.
2022-03-08 17:08:21 -05:00
Thomas Harte
926a373591
Extend SIB test, correct decoder.
2022-03-08 15:03:37 -05:00
Thomas Harte
0cbb481fa4
Add a formal SIB test.
2022-03-08 14:56:27 -05:00
Thomas Harte
a954f23642
Attempt 32-bit modregrm + SIB parsing.
2022-03-08 14:39:49 -05:00
Thomas Harte
41a104cc10
Adds special test/control/debug MOVs.
...
This'll do; it's not ideal but avoids bloating up the `Source` enum.
2022-03-07 17:04:05 -05:00
Thomas Harte
f0b4971c7b
Correct SHLD format.
2022-03-07 16:39:02 -05:00
Thomas Harte
8e669a32a3
Take a stab at group 8.
2022-03-07 16:34:56 -05:00
Thomas Harte
0e16e7935e
Correct double reference to Group 6.
2022-03-07 16:26:17 -05:00
Thomas Harte
7ea84d9a4e
Add MOVZX, MOVSX.
2022-03-07 16:25:44 -05:00
Thomas Harte
7313c89dec
Add BT, BTS, BTR, BTC, BSF, BSR.
2022-03-07 16:23:25 -05:00
Thomas Harte
35a66c03c2
Add the SETs.
2022-03-07 10:32:34 -05:00
Thomas Harte
bbb3168bae
Adds the missing shift group segues at c0 and c1.
2022-03-07 09:18:59 -05:00
Thomas Harte
1ea9d3faf8
Introduce additional forms of IMUL.
2022-03-07 09:05:22 -05:00
Thomas Harte
4479be4fd0
Add the two immediate PUSHes.
2022-03-06 14:28:41 -05:00
Thomas Harte
e7aaf4dd2e
Add LDS, LES, LSS test.
2022-03-06 12:10:25 -05:00
Thomas Harte
91a6bf671d
Also 'easy': LSS, LFS, LGS.
...
Though perhaps I'm off on LES and LDS?
2022-03-06 09:28:43 -05:00
Thomas Harte
49b5889d9e
0x8c is available on the 8086.
2022-03-06 09:24:59 -05:00
Thomas Harte
ede61ae130
Flag up TODOs, for easier in-editor navigation.
2022-03-05 17:48:01 -05:00
Thomas Harte
7a79111767
Add the easiest 80386 extensions: PUSH/POP FS/GS and longer conditional jumps.
2022-03-05 17:32:21 -05:00
Thomas Harte
6432521b9d
Correct two references to JP that should be JL.
2022-03-05 17:16:32 -05:00
Thomas Harte
65f578fe61
Add notes on all missing opcodes.
2022-03-05 17:16:13 -05:00
Thomas Harte
3a8eb4a4f0
Add 80386 segment overrides.
2022-03-05 17:03:46 -05:00
Thomas Harte
eb180656bb
Fix $8e data size, add $8c.
2022-03-05 17:00:48 -05:00
Thomas Harte
1afcbba218
Clarify sign extension availability.
2022-03-05 16:44:26 -05:00
Thomas Harte
8a0902a83b
Adapts existing opcodes for 32-bit parsing.
2022-03-05 13:52:07 -05:00
Thomas Harte
dfb312fee6
Make column and row meanings overt.
2022-03-05 11:56:08 -05:00
Thomas Harte
11bb594fa2
Sets up [ignored] memory and data size prefixes.
2022-03-02 20:23:35 -05:00
Thomas Harte
8e3ae2c78f
Add opcode map as documentation.
2022-03-02 20:00:21 -05:00
Thomas Harte
8080d1d961
Extend test case slightly.
2022-03-01 20:22:43 -05:00
Thomas Harte
4b4135e35a
Correct #undef.
2022-03-01 18:23:24 -05:00
Thomas Harte
d1148c4cab
Switch to constexpr function, for guaranteed semantics.
2022-03-01 17:30:41 -05:00
Thomas Harte
8ee62b4789
Simplify address size semantics.
...
Since it'll no longer be a mode-dependant toggle, but a fully-retained value.
2022-03-01 17:29:26 -05:00
Thomas Harte
5e7a142ff1
Fix is_write errors, update comment, add additional source for asserts.
2022-03-01 16:51:54 -05:00
Thomas Harte
2c816db45e
Refactor: (i) to expose effective address calculation; and (ii) to include address size in Instruction.
2022-03-01 09:36:37 -05:00
Thomas Harte
b920507f34
Double down on AddressT, add an assert on memory_mask.
2022-02-28 10:03:58 -05:00
Thomas Harte
d8601ef01f
Add missing hex specifier. Test now passes.
2022-02-28 09:54:29 -05:00
Thomas Harte
afbc57cc0c
Incorporate displacement, switch macro flag.
2022-02-28 09:53:23 -05:00
Thomas Harte
9f12c009d6
Correct data size when accessing address registers.
2022-02-27 19:45:03 -05:00
Thomas Harte
84ac68a58b
Fix indirect memory read/write
2022-02-27 18:43:00 -05:00
Thomas Harte
27d1df4699
Introduce enough of a DataPointerResolver test to build but fail.
2022-02-27 18:27:58 -05:00
Thomas Harte
0d7a7dc7c9
Introduce DataPointerResolver, to codify the meaning of DataPointer and validate that enough information is present.
2022-02-27 11:25:02 -05:00
Thomas Harte
b8bff0e7f5
Double up eSP, eBP, eSI, eDI and AH, CH, DH, BH enums, as per Intel's encoding.
2022-02-24 05:16:15 -05:00
Thomas Harte
60bf1ef7ea
Rename SourceSIB to DataPointer, extend to allow for an absent base.
2022-02-23 08:28:20 -05:00
Thomas Harte
dc37b692cf
Switch to templated test function.
2022-02-23 04:33:28 -05:00
Thomas Harte
95976d8b58
Add missing #include.
2022-02-21 16:33:58 -05:00
Thomas Harte
ecb20cc29b
Improve tabbing.
2022-02-21 16:09:03 -05:00
Thomas Harte
b6183e86eb
Clarifies model tests by macro; adds the address size toggle.
2022-02-21 16:06:02 -05:00
Thomas Harte
229af0380c
This is normatively called the address size.
2022-02-21 15:52:16 -05:00
Thomas Harte
b968a662d3
Dump notes on intended Instruction layout, add memory size flag.
2022-02-21 15:48:58 -05:00
Thomas Harte
159e869fe6
Justifies the templatisation.
2022-02-21 15:33:08 -05:00
Thomas Harte
76814588b8
Template Instruction on its content size.
2022-02-21 12:36:03 -05:00
Thomas Harte
1934c7faa2
Switch Decoder into a template.
2022-02-21 12:21:57 -05:00
Thomas Harte
9e9e160c43
Eliminate Ind[BXPlusSI/etc] in favour of specifying everything via a ScaleIndexBase.
2022-02-21 11:45:46 -05:00
Thomas Harte
546b4edbf1
Ensure ScaleIndexBase can be used constexpr; add note-to-self on indexing table.
2022-02-20 19:22:28 -05:00
Thomas Harte
63d8a88e2f
Switch to holding the SIB as a typed ScaleIndexBase.
...
(and permit copy assignment)
2022-02-20 17:54:53 -05:00
Thomas Harte
75d2d64e7c
Albeit that it requires nuanced shift/roll semantics, eliminates CL constant.
...
Shifts and rolls are already slightly semantically special for being undefined for values greater than 8/16/32 — i.e. in some implementations they don't even use the entirety of CL, just the low five bits. Which makes me feel a little better.
The upside of no ambiguity between eCX size 1 and CL justifies the trade.
2022-02-20 17:52:19 -05:00
Thomas Harte
a5113998e2
Accept that IN and OUT are going to have special semantics, thereby kill ::AX and ::DX.
2022-02-20 17:15:01 -05:00
Thomas Harte
4d2e8cd71d
Adds a presently-unreachable step for SIB consumption.
2022-02-19 18:00:27 -05:00
Thomas Harte
30b355fd6f
Chips away further at the legacy register names.
2022-02-18 18:37:47 -05:00
Thomas Harte
c257b91552
Update tests to preference away from [A/B/C/D]L.
2022-02-18 16:32:28 -05:00
Thomas Harte
12df7112da
Starts adjusting the concept of a Source.
2022-02-17 11:32:09 -05:00
Thomas Harte
cd5ca3f65b
Attempts a full decoding of the 80286 instruction set.
2022-02-10 17:13:50 -05:00
Thomas Harte
0bd63cf00f
Introduces the easy F page instructions.
2022-02-10 09:35:05 -05:00
Thomas Harte
7ceb3369eb
Attempts decoding of the 80186 set.
2022-02-09 17:51:48 -05:00
Thomas Harte
ae21726287
Splits 80186 additions from 80286; fills in a touch more.
2022-02-01 20:38:10 -05:00
Thomas Harte
a4da1b6eb0
Begins enumerating the 80286 and 80386 instructions.
2022-01-31 09:11:06 -05:00
Thomas Harte
85bfd2eba3
Remove further errant 'Awaiting's.
2022-01-31 08:22:07 -05:00
Thomas Harte
2d543590dc
Make a noun, for better consistency.
2022-01-31 08:14:33 -05:00
Thomas Harte
18b6f17e86
With some refactoring makes some minor steps towards supporting gaps.
2022-01-06 17:24:31 -05:00
Thomas Harte
f37179d9f2
Gaps appear to contain pre-MFM data (?)
2022-01-02 15:39:26 -05:00
Thomas Harte
3e0b7d71d4
Properly handle partial bytes.
2022-01-01 19:09:19 -05:00
Thomas Harte
58d10943ed
Add asserts to validate my reserve sizes.
2022-01-01 19:08:44 -05:00
Thomas Harte
dc920a04f6
Add missing #include.
2022-01-01 19:03:07 -05:00
Thomas Harte
d031381e70
Gaps provide content, and data chunk lengths seem to be in terms of unencoded bytes.
2022-01-01 18:47:07 -05:00
Thomas Harte
ed1b0b90f7
Makes a first attempt at encoding data.
2022-01-01 18:36:44 -05:00
Thomas Harte
38dd3c5c60
On second thoughts, no need to use a vector here.
2022-01-01 17:15:12 -05:00
Thomas Harte
d3189acaa6
Add a constexpr route that explicitly calculates the simplest possible form.
2022-01-01 17:14:52 -05:00
Thomas Harte
350c98ab4d
Add those densities I've yet discovered the rules for.
2021-12-29 18:15:37 -05:00
Thomas Harte
4f3c754771
Adds exposition.
2021-12-27 19:15:46 -05:00
Thomas Harte
dc994f001d
Mention units.
2021-12-27 18:55:11 -05:00
Thomas Harte
9b6ccbcc95
Parses data and gap stream elements.
2021-12-27 18:12:44 -05:00
Thomas Harte
9d3cf9c73c
Collate descriptions of all tracks.
2021-12-26 14:49:51 -05:00
Thomas Harte
28572d4392
Enforce string-length requirement.
2021-12-26 09:12:44 -05:00
Thomas Harte
0433db0370
Eliminate macro.
2021-12-25 19:36:54 -05:00
Thomas Harte
a6b326da48
Parse the INFO record.
2021-12-25 18:17:13 -05:00
Thomas Harte
e457ce66ea
Adds sanity checks around CAPS block.
2021-12-25 17:32:29 -05:00
Thomas Harte
c118dd8afe
Adds just enough to list all the blocks in an IPF.
2021-12-25 17:27:50 -05:00
Thomas Harte
dba3a3d942
Add through route to an IPF container.
2021-12-25 17:06:47 -05:00
Thomas Harte
6c606b5506
Fix through route to TargetPlatform::TypeDistinguisher.
2021-12-25 17:06:12 -05:00
Thomas Harte
55dbeefeb2
Merge pull request #1005 from TomHarte/SerialPort
...
Adds empty callouts for all serial port registers.
2021-12-25 16:39:27 -05:00
Thomas Harte
4d9589af7c
Merge pull request #1006 from TomHarte/Shared68000Tables
...
Minor 68000 style improvements.
2021-12-25 14:11:25 -05:00
Thomas Harte
ee625cb8a8
Minor style improvements; especially: don't assume value of NoBusProgram.
2021-12-25 14:05:38 -05:00
Thomas Harte
f20940a37b
Give Program full ownership of the sentinel value.
...
In case I want to reduce the size of this field later.
2021-12-23 16:32:21 -05:00
Thomas Harte
32e0a66610
Trust the compiler with this bit field.
2021-12-23 16:28:55 -05:00
Thomas Harte
d9598b35c2
Add some additional metrics.
2021-12-23 16:27:54 -05:00
Thomas Harte
acba357df6
Adds empty callouts for all serial port registers.
2021-12-23 15:22:20 -05:00
Thomas Harte
7ce335d9da
Merge pull request #1004 from TomHarte/FastRAM
...
Adds fast RAM to the Amiga, along with size selection for both fast & chip.
2021-12-23 11:43:42 -05:00
Thomas Harte
3caf9ca914
Remove a bunch of unused names.
2021-12-23 11:39:00 -05:00
Thomas Harte
fd569201ef
Add Qt GUI for Amiga memory selection.
2021-12-23 11:28:44 -05:00
Thomas Harte
f094aa946a
Add Mac GUI for Amiga memory selection.
2021-12-22 18:20:55 -05:00
Thomas Harte
a17c192a9e
Allow chip RAM size selection, while I'm here.
2021-12-22 15:30:19 -05:00
Thomas Harte
1916a9b99c
Remove stdout noise.
2021-12-22 15:22:28 -05:00
Thomas Harte
9796b308dc
Add basic implementation of fast RAM.
2021-12-22 15:17:11 -05:00
Thomas Harte
bdf0a1941c
Merge pull request #1002 from TomHarte/FastBlitterFills
...
Switch to a table-based implementation of fill mode.
2021-12-19 17:35:27 -05:00
Thomas Harte
d0e3024bec
Switch to nibble-oriented lookup tables for fill mode.
2021-12-19 17:16:46 -05:00
Thomas Harte
d2ad149e56
Fill mode always runs right to left.
2021-12-19 16:43:18 -05:00
Thomas Harte
ad602a4722
Merge pull request #1001 from TomHarte/AmigaReadWrite
...
Ensures Chipset reads can map to writes and vice versa.
2021-12-19 16:35:43 -05:00
Thomas Harte
348840a2aa
It's probably a net detriment to use a template in this scenario.
2021-12-19 16:31:44 -05:00
Thomas Harte
3a719633eb
Consolidate interface; correct LOGs.
2021-12-18 19:39:41 -05:00
Thomas Harte
bd69948d37
The Copper can now skip Chipset::perform.
2021-12-18 17:53:11 -05:00
Thomas Harte
54aa211f56
Avoid infinite loops for completely undefined addresses.
2021-12-18 17:48:45 -05:00
Thomas Harte
f118891970
Breaks Chipset::perform into read and write.
...
This allows each to call the other when a read occurs of a write-only address, and vice versa.
2021-12-18 17:43:53 -05:00
Thomas Harte
c4055fde97
Merge pull request #1000 from TomHarte/CopperTests
...
Amiga: regularises timing; improves Copper sleep/wait costs
2021-12-18 16:46:53 -05:00
Thomas Harte
dbae3fc9a5
Propagate to bitplanes immediately; fix odd/even confusion.
2021-12-18 16:37:40 -05:00
Thomas Harte
7c73ed7ed5
Bump Xcode version number.
2021-12-18 14:55:27 -05:00
Thomas Harte
c834960bfb
Withdraw separate x-and-y guess, make MOVE lose a cycle if a sleep/wake occurs.
2021-12-12 19:18:18 -05:00
Thomas Harte
600abc55b5
Compare x and y separately, wake immediately from a sleep, log more.
2021-12-12 17:26:33 -05:00
Thomas Harte
f3ec7d54bb
Clarifies wait-for-CPU-slot semantics.
...
Big bonus: this guarantees `advance_dma`s will be called at most once per output cycle, even if they return `false`.
2021-12-09 19:17:44 -05:00
Thomas Harte
090760e526
Merge pull request #998 from TomHarte/QtAmiga
...
Add the Amiga to the Qt UI.
2021-12-08 13:45:34 -05:00
Thomas Harte
cccde7dc89
Correct given memory size.
2021-12-08 11:41:50 -05:00
Thomas Harte
849e48f519
Add the Amiga to Qt's UI.
2021-12-08 11:41:38 -05:00
Thomas Harte
1c3935eb40
Add README.md
...
As a warning.
2021-12-07 18:19:51 -05:00
Thomas Harte
466bed3163
Merge pull request #994 from TomHarte/AmigaREADME
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Fess up to the Amiga.
2021-12-07 04:32:43 -05:00
Thomas Harte
641a9c72e9
Fess up to the Amiga.
2021-12-07 04:30:54 -05:00
Thomas Harte
5138216ba1
Merge pull request #978 from TomHarte/Amiga
...
Introduces nascent Amiga emulation
2021-12-07 04:18:53 -05:00
Thomas Harte
de1f5686a8
Reenable hardened runtime.
2021-12-07 04:05:10 -05:00
Thomas Harte
c983678fcd
Reenable app sandbox.
2021-12-07 03:57:58 -05:00
Thomas Harte
2b0415d552
Attempt to avoid off-by-one buffer reads, add modulation.
2021-12-06 19:28:40 -05:00
Thomas Harte
066e4421e8
Attempt volcntrld.
2021-12-06 06:35:08 -05:00
Thomas Harte
f02a241249
Inserts an additional reload.
2021-12-05 17:47:12 -05:00
Thomas Harte
a5fe1e4259
Largely debugs audio state machine.
...
I think I'm still missing an address reload somewhere though, and attachment doesn't actually push.
2021-12-05 15:27:35 -05:00
Thomas Harte
9b80563443
Exposes targets for modulation.
2021-12-05 06:38:55 -05:00
Thomas Harte
91b5da06e3
Perform reload on Disabled -> WaitingForDummyDMA.
2021-12-04 19:17:40 -05:00
Thomas Harte
7320f96ae7
Capture attachment flags.
2021-12-04 18:02:43 -05:00
Thomas Harte
fdf2b9cd7b
Add local data pointers.
2021-12-04 17:58:41 -05:00
Thomas Harte
bfc70a1b60
Ensure interrupt request bits always propagate.
2021-12-04 16:50:42 -05:00
Thomas Harte
aff7a93106
Move DMAFlags to Flags.hpp.
2021-12-04 08:26:28 -05:00
Thomas Harte
3b027c4593
Switch and -> or for testing transitions from ::PlayingLow.
2021-12-04 08:24:41 -05:00
Thomas Harte
42d3bdd373
Adds a begin_state template.
2021-12-04 07:20:17 -05:00
Thomas Harte
57789092c1
Keep audio fetches in bounds.
2021-12-03 07:16:21 -05:00
Thomas Harte
6bc5268cbd
Reload period counter on low -> high transition.
2021-12-02 18:43:02 -05:00
Thomas Harte
887ab705d1
Add missing <cassert>.
2021-12-02 13:00:25 -05:00
Thomas Harte
ff6ddaed2e
Full scale is 65536.
2021-12-02 12:55:11 -05:00
Thomas Harte
e6fe36f45c
Add buffer-length assert; add <tuple> where std::tuple_size is used.
2021-12-02 12:53:20 -05:00
Thomas Harte
3a26f6b8bf
Ensure full buffer provision.
2021-12-02 12:52:43 -05:00
Thomas Harte
06b6f85d55
Correct stereo.
2021-12-02 11:15:29 -05:00
Thomas Harte
d6f1ea50a6
Switch to slightly more straightforward presumption of no data wanted.
2021-12-02 09:41:16 -05:00
Thomas Harte
9554869886
Simplify DMA logic.
2021-12-02 09:33:02 -05:00
Thomas Harte
364059551c
Add extra notes per errata, plus bonus state code repetitions.
2021-12-02 09:30:52 -05:00
Thomas Harte
06340b1ad7
Advance DMA pointer, treat audio as signed, request data on low -> high transition.
...
There's now some audio, sometimes when there should be. But it's not correct.
2021-12-01 18:34:54 -05:00
Thomas Harte
d23511860d
Attempts audio output.
2021-12-01 06:01:58 -05:00
Thomas Harte
a8dd4660b2
Adds a pipeline for audio output.
2021-12-01 05:37:58 -05:00
Thomas Harte
eb3a0eb3c7
Attempt full implementation of collisions.
2021-11-29 18:39:33 -05:00
Thomas Harte
cd0148e0bc
Switch to a default 1mb of Chip RAM.
2021-11-29 16:55:45 -05:00
Thomas Harte
8584ee609f
Support a fetch window start on line 0.
2021-11-28 05:37:49 -05:00
Thomas Harte
373847e2b7
Avoid posting redundant key events.
2021-11-28 05:31:00 -05:00
Thomas Harte
84f7d8dfc2
Factors out pixel generation, adds HAM.
2021-11-28 05:06:30 -05:00
Thomas Harte
e057a7d0dd
Attempts to implement sprite/playfield priorities.
2021-11-27 15:03:46 -05:00
Thomas Harte
7bab15bf99
Minor copy improvements.
2021-11-27 11:38:41 -05:00
Thomas Harte
dac40630fd
Adds support for the Blitter-busy flag to WAIT and SKIP.
2021-11-27 11:36:15 -05:00
Thomas Harte
33bfa1b81c
Move BitplaneShifter adjacent to expand_bitplane_byte.
2021-11-26 18:29:09 -05:00
Thomas Harte
8fc27dc292
Moves bitplane collection and shifter out of Chipset.[h/c]pp.
2021-11-26 18:16:24 -05:00
Thomas Harte
f8e8f18be5
Switch to std::clamp.
2021-11-26 18:10:29 -05:00
Thomas Harte
8b38c567d2
Add missing #include for std::clamp.
2021-11-26 18:08:39 -05:00
Thomas Harte
cd53e42d79
Resolve operator precedence.
2021-11-26 18:08:10 -05:00
Thomas Harte
bea6cf2038
Move mouse and joystick into a separate file, give a common parent.
2021-11-26 17:50:47 -05:00
Thomas Harte
eca80f1425
Sprites: avoid magic constants, ensure proper DMA resumption.
2021-11-26 16:02:18 -05:00
Thomas Harte
1c0962e53c
Move sprites into their own source file.
2021-11-26 15:30:31 -05:00
Thomas Harte
4b21549ff4
Add a couple of static asserts.
2021-11-26 15:23:54 -05:00
Thomas Harte
30d7b0129b
Correct sprite ordering within pairs.
2021-11-26 11:58:50 -05:00
Thomas Harte
ce6877d6e4
Sprites: infer part of DMA state from slot, no access during blank.
...
Also sets the proper vertical blank length.
2021-11-26 09:37:52 -05:00
Thomas Harte
0ab5177637
Allow DMAState::FetchStopAndControl on y == v_stop_.
2021-11-25 14:29:12 -05:00
Thomas Harte
276cbfa505
Simplify sprite state machine.
...
This now better matches the explanation given on Page 133 of the Amiga System Programmer's Guide.
2021-11-25 14:08:55 -05:00
Thomas Harte
610c85a354
Correct test logic.
...
All tests now pass.
2021-11-25 04:11:20 -05:00
Thomas Harte
012084b37b
Fix exclusive fill, sizing, eliminate ECS call-ins.
...
The clock test now proceeds further, but still doesn't seem to pass.
2021-11-24 17:25:32 -05:00
Thomas Harte
55af6681af
Avoid unnecessary get_port_input calls.
2021-11-24 17:15:48 -05:00
Thomas Harte
2a7a42ff8f
Add header for assert.
2021-11-24 16:28:18 -05:00
Thomas Harte
7af5737ec5
Switch to LOG.
2021-11-24 16:15:40 -05:00
Thomas Harte
0ad1529f3f
Retain delegate bit length for non-self-clocked data.
2021-11-24 16:15:27 -05:00
Thomas Harte
0df8173536
Merge branch 'master' into Amiga
2021-11-24 08:58:03 -05:00
Thomas Harte
b517811e2f
Merge pull request #988 from TomHarte/HeaderOnly6502
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Moves the 6502 towards being a header-only dependency.
2021-11-24 08:57:45 -05:00
Thomas Harte
83d3a9c6dd
Merge branch 'master' into HeaderOnly6502
2021-11-24 08:48:36 -05:00
Thomas Harte
d0402261e6
Merge pull request #993 from TomHarte/PushAudio
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Adds a push route for lowpass-filtered audio.
2021-11-24 08:47:10 -05:00
Thomas Harte
6f6e09d200
Correct: load -> store.
2021-11-22 15:18:12 -05:00
Thomas Harte
24e2fd4184
Avoid implicit conversion.
2021-11-22 11:28:02 -05:00
Thomas Harte
1aada996dc
Correct consting.
2021-11-22 11:18:17 -05:00
Thomas Harte
f5d3d6bcea
Splits the lowpass filter into push and pull variants.
2021-11-21 15:37:29 -05:00
Thomas Harte
a8a99f647f
Further improves framing.
2021-11-21 08:13:55 -05:00
Thomas Harte
ff68b26c44
Push HSYNC 11 slots over, to its proper position, and add a frame crop.
2021-11-20 12:39:50 -05:00
Thomas Harte
a94b4f62fd
Takes a stab at attached sprites.
2021-11-19 14:19:47 -05:00
Thomas Harte
bcc959d938
Sprites: deconflate vertical and modification flags; disarm on CTL not POS.
2021-11-19 08:03:10 -05:00
Thomas Harte
cf25d8a378
Increase logging (but leave it disabled).
2021-11-19 08:01:23 -05:00
Thomas Harte
c750bdafd5
Switch to a saturating conversion.
2021-11-18 18:01:30 -05:00
Thomas Harte
693d46f8ea
Mask by index, not colour.
2021-11-18 05:36:38 -05:00
Thomas Harte
3496ebd1d7
Constrain sprite fetches to Chip RAM.
2021-11-17 17:49:42 -05:00
Thomas Harte
be763cf7fe
Expose joystick to the world.
2021-11-17 15:33:46 -05:00
Thomas Harte
c3b4bee210
Adds a joystick class.
2021-11-17 14:26:51 -05:00
Thomas Harte
6df0227ab1
Hacks in a basic effort at dual playfields.
2021-11-16 18:26:27 -05:00
Thomas Harte
2a3a7fa8a0
Reset will_request_interrupt.
2021-11-15 16:00:35 -05:00
Thomas Harte
50a6496399
Avoids over-greedy DMA.
2021-11-15 12:31:15 -05:00
Thomas Harte
c99dee86dd
Adds missing low -> high actions, implements more transitions.
2021-11-15 12:29:32 -05:00
Thomas Harte
0c5bb9626b
Separates state transitions and tests.
2021-11-15 05:29:28 -05:00
Thomas Harte
a9971917f5
Attempts a translation of Commodore's documentation.
2021-11-14 14:54:33 -05:00
Thomas Harte
4c62611da3
Adds enough state machine to get into the near-incomprehensible stuff on the right.
2021-11-14 10:48:50 -05:00
Thomas Harte
47f36f08fb
Switches to a synchronous audio state machine; renames advance -> advance_dma.
...
I can worry about how to just-in-time things once I better understand the hardware in general.
2021-11-13 15:53:41 -05:00
Thomas Harte
f906bab1a5
Provides feedback on interrupt flags, starts on state machine.
2021-11-13 11:05:39 -05:00
Thomas Harte
fffc03c4e4
Propagates time to the audio subsystem.
2021-11-12 15:30:52 -05:00
Thomas Harte
0f6934a131
This uses Cycles and HalfCycles, so should include ClockReceiver.
2021-11-11 09:24:32 -05:00
Thomas Harte
0a94184d6b
Provides a greater wealth of audio data.
2021-11-11 09:24:15 -05:00
Thomas Harte
7be3578497
Adds a target for audio writes.
2021-11-09 07:11:23 -05:00
Thomas Harte
eeaccb8ac0
Implements clear_all_keys.
2021-11-08 17:49:09 -05:00
Thomas Harte
8ef9a932aa
Adds inclusive fill test; fixes inclusive fills.
2021-11-07 14:26:13 -08:00
Thomas Harte
31e22e4cfb
Provides full serial input.
2021-11-07 05:19:16 -08:00
Thomas Harte
4fc25fb798
Adds basic shift input.
2021-11-07 05:18:54 -08:00
Thomas Harte
941d9a46a2
Makes a better effort at exposition; better implements clocked line.
2021-11-07 05:18:40 -08:00
Thomas Harte
ecfe68d70f
Introduce the principle that a Serial::Line can be two-wire — clock + data.
2021-11-06 16:54:20 -07:00
Thomas Harte
c0c2b5e3a9
Post key actions to the nominated serial line.
...
Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.
2021-11-06 12:03:09 -07:00
Thomas Harte
f102d8a4b4
Extend to allow full-[byte/word/dword] writes, in LSB or MSB order.
2021-11-06 12:01:32 -07:00
Thomas Harte
471e13efbc
Transcribes keycodes.
2021-11-04 18:54:42 -07:00
Thomas Harte
6d34432988
Starts to build in a serial line for input.
2021-11-04 18:54:28 -07:00
Thomas Harte
d3f0d15732
Merge branch 'master' into Amiga
2021-11-03 19:27:06 -07:00
Thomas Harte
b827b9e33e
Add necessary shift storage.
2021-11-03 19:26:45 -07:00
Thomas Harte
29e5ecc282
Add TODOs rather than complete stop on shift register acccesses.
2021-11-02 18:19:31 -07:00
Thomas Harte
c9bf2dda16
Attempt implementation of disk sync.
2021-11-02 18:18:59 -07:00
Thomas Harte
3ceb378b9b
Relocate disk logic into a separate compilation unit.
2021-11-02 17:35:23 -07:00
Thomas Harte
1cf1c90511
Adds support for interlaced output.
2021-11-02 14:34:03 -07:00
Thomas Harte
491b9f83f2
Merge pull request #990 from mariuszkurek/master
...
Make SDL and Qt binary names consistent
2021-11-02 13:15:27 -07:00
Thomas Harte
d989825216
Add bonus notes on VPOSR.
2021-11-02 03:47:39 -07:00
Thomas Harte
3976420b88
Retains a little more of output controls.
2021-11-01 17:15:36 -07:00
Thomas Harte
2f1ce5fe43
Switch to using the swizzled palette for playfield output.
2021-11-01 14:44:30 -07:00
Thomas Harte
42145a5b8a
Delay bitplane installation until end of slot.
2021-11-01 14:18:58 -07:00
mariuszkurek
04f4536cb2
Make SDL and Qt binary names consistent
2021-11-01 09:13:06 +01:00
Thomas Harte
4e66017205
Enable sprite reuse and toggle to inactive when visible region is over.
2021-10-31 16:52:48 -07:00
Thomas Harte
2c1f2edcf2
Introduce failing 'clock' test case.
...
i.e. a few seconds of the Workbench 1.0 clock application.
2021-10-31 16:12:51 -07:00
Thomas Harte
299d517449
Performs a first implementation of fill mode.
2021-10-31 14:36:31 -07:00
Thomas Harte
561e73dbd7
Merge branch 'Amiga' of github.com:TomHarte/CLK into Amiga
2021-10-31 14:12:40 -07:00
Thomas Harte
9e6ffaad7d
Introduce test case for fill mode.
2021-10-31 14:12:26 -07:00
Thomas Harte
9cded1e92c
Introduce test case for fill mode.
2021-10-31 14:08:37 -07:00
Thomas Harte
4c1ab6ff25
Rethinks bitplane stops.
2021-10-31 09:01:38 -07:00
Thomas Harte
16f31cab6a
Avoid duplication of CIA select test.
2021-10-30 12:05:18 -07:00
Thomas Harte
02c88e6826
VHPOSR's fields are the other way around.
2021-10-30 12:04:46 -07:00
Thomas Harte
9ecd43238f
Correct 8520 TOD setting and getting.
2021-10-30 12:02:43 -07:00
Thomas Harte
5ffe71346c
Eliminate interrupt magic constants.
2021-10-29 19:04:06 -07:00
Thomas Harte
d25804f4a2
Throws in official register names.
2021-10-29 14:05:11 -07:00
Thomas Harte
edb75e69cb
Implement bitplane modulos.
2021-10-29 11:29:22 -07:00
Thomas Harte
f3e895f17c
Tag intended unused parameters.
2021-10-29 06:21:02 -07:00
Thomas Harte
b952d73e83
Disallow programmatic setting of blitter status.
2021-10-29 06:19:57 -07:00
Thomas Harte
07facc0636
Takes a stab at BZERO.
2021-10-28 18:12:46 -07:00
Thomas Harte
da1a69be27
Caps mouse speed.
...
Also takes another guess at CIA interrupt bits. To no avail.
2021-10-27 18:38:02 -07:00
Thomas Harte
7e31658932
Remove accidental commit.
2021-10-26 21:49:32 -07:00
Thomas Harte
5ebc59dd1f
Introduce additional test cases.
2021-10-26 20:58:38 -07:00
Thomas Harte
b10f5ab110
Apply A mask when loading into barrel shifter.
2021-10-26 20:02:28 -07:00
Thomas Harte
b4286bb42b
Modulos are subtracted in descending mode.
2021-10-26 07:21:51 -07:00
Thomas Harte
4d7ce3792f
Use additional test cases.
2021-10-25 21:48:43 -07:00
Thomas Harte
76767da300
Undo accidental change.
2021-10-25 21:48:19 -07:00
Thomas Harte
dc8701a929
Introduce some additional Blitter test cases.
2021-10-25 21:40:20 -07:00
Thomas Harte
139d35c6f9
Switches to basic use of sprite shifters.
2021-10-25 20:58:48 -07:00
Thomas Harte
cb24457b4a
Starts on a two-at-a-time sprite shifter.
2021-10-25 16:30:30 -07:00
Thomas Harte
9f3efb7f05
Limits graphical output to [all but one bit] of the display window.
2021-10-25 14:12:23 -07:00
Thomas Harte
e6001e0f22
Shifts bitplanes irrespective of output window.
2021-10-25 13:59:39 -07:00
Thomas Harte
c6535bf035
Switches bitplane shifter to returning four high-res pixels at a time.
2021-10-25 13:34:36 -07:00
Thomas Harte
7118a515e0
Reduce logging in trustworthy areas.
2021-10-23 20:36:41 -07:00
Thomas Harte
952451c9b8
Add mouse input.
2021-10-23 20:17:13 -07:00
Thomas Harte
610327a04e
Fix sprite H start bit order.
2021-10-22 23:20:20 -07:00
Thomas Harte
2121e32409
Fix sprite bit ordering.
2021-10-22 21:10:01 -07:00
Thomas Harte
7ec21edc2f
Attempts to hack in some form of sprite display.
2021-10-22 19:51:10 -07:00
Thomas Harte
003162f710
Limit to specific purpose.
2021-10-22 16:16:19 -07:00
Thomas Harte
040ac93042
Takes a shot at the vertical stuff of sprite DMA.
2021-10-22 14:32:59 -07:00
Thomas Harte
b489ba3d0d
Adds sprite DMA windows.
2021-10-22 13:07:20 -07:00
Thomas Harte
c5e8b547af
Captures the attach flag and observes activation rule.
2021-10-22 11:21:58 -07:00
Thomas Harte
e67de90ad0
Starts to bring sprites inside DMADevice orthodoxy.
2021-10-21 21:57:46 -07:00
Thomas Harte
c3c84c88a1
Switch to ahead-of-time planar to chunky conversion.
2021-10-21 20:48:57 -07:00
Thomas Harte
0dc9c4cee1
Undo hard-coding of fetch window.
2021-10-19 15:18:39 -07:00
Thomas Harte
544c137cb0
Add updated intel.
2021-10-16 13:30:56 -07:00
Thomas Harte
b312a61a81
Add two dummy reads.
2021-10-16 13:30:45 -07:00
Thomas Harte
4917556a99
The shift goes the other way in descending mode.
2021-10-16 11:09:40 -07:00
Thomas Harte
15ed4a0d09
Introduce failing test case for sector decoding.
2021-10-16 10:48:32 -07:00
Thomas Harte
aa6b0f07b7
Correct filename.
2021-10-16 05:37:46 -07:00
Thomas Harte
d9d20d9d30
Walk back slightly.
2021-10-14 18:02:58 -07:00
Thomas Harte
689bfbbdb3
Be overt in initialiser list.
2021-10-14 16:57:26 -07:00
Thomas Harte
e27a10bde4
Simplify control flow.
2021-10-14 16:47:18 -07:00
Thomas Harte
253a199f27
Fire sync-match interrupt upon any match.
2021-10-14 16:36:17 -07:00
Thomas Harte
61e5702520
Remove dead TODO.
2021-10-14 16:09:11 -07:00
Thomas Harte
b12c640807
Makes drives non-copyable.
...
To avoid error in the future.
2021-10-14 12:37:55 -07:00
Thomas Harte
9be23ecc34
Add end-of-Blit interrupt.
...
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
2021-10-13 15:09:19 -07:00
Thomas Harte
8960f471a0
Use unspread_bits for FM and MFM decoding.
2021-10-12 15:18:50 -07:00
Thomas Harte
955cb6411c
Factor out bit spreading.
...
(And do a better job of it)
2021-10-12 14:49:01 -07:00
Thomas Harte
fc4ca4f8e3
I don't think there are sync words at the start of the track.
2021-10-12 10:38:15 -07:00
Thomas Harte
eec068914e
Slightly improve logging.
2021-10-11 18:05:57 -07:00
Thomas Harte
a1f02d0cd8
Add track padding.
2021-10-11 18:05:37 -07:00
Thomas Harte
39b8285ba5
Trust the HRM on step bit, but catch rising edge.
2021-10-11 07:42:42 -07:00
Thomas Harte
7733fef3bd
DSKLEN has to be written twice.
2021-10-11 06:16:01 -07:00
Thomas Harte
6acddfdb98
Add the sync match interrupt.
...
Albeit that it doesn't yet unblock disk DMA.
2021-10-11 03:37:56 -07:00
Thomas Harte
ec3d5c0b32
Increase maximum number of activity LEDs to eight.
2021-10-10 18:37:33 -07:00
Thomas Harte
99492c2ec2
Further tweak logging.
2021-10-10 18:19:50 -07:00
Thomas Harte
addf9f9af4
Moves block byte writes into Storage::Encodings::MFM::Encoder.
2021-10-10 16:06:51 -07:00
Thomas Harte
846b505d27
Reduce logging; disk data probably isn't the immediate obstacle.
2021-10-10 13:04:10 -07:00
Thomas Harte
c4cfcfab8e
Checksums appear to be calculated as 32-bit quantities.
2021-10-10 12:58:10 -07:00
Thomas Harte
5e083426c5
Takes another run at checksums.
...
It turns out I'd read entirely the wrong section of the ADF FAQ. Am now trying to piece things together from various EAB threads.
2021-10-10 11:47:48 -07:00
Thomas Harte
8d43b4a98d
Expands Disk DMA access window.
2021-10-10 11:47:02 -07:00
Thomas Harte
aeaea073c6
Switch both: (i) which bits are odd/even; and (ii) nibble ordering.
2021-10-09 13:45:19 -07:00
Thomas Harte
6b0dd19442
Name file appropriately: the logo comes from Kickstart.
2021-10-09 08:02:15 -07:00
Thomas Harte
9336ffe216
Take a stab at index-hole sync.
2021-10-09 08:01:02 -07:00
Thomas Harte
eb157f15f3
Adds index hole interrupt.
2021-10-09 04:08:59 -07:00
Thomas Harte
d6e2a3f425
Make a first attempt to spool into RAM.
2021-10-08 18:11:47 -07:00
Thomas Harte
b47ca13ed3
Push disk data onwards.
2021-10-08 17:18:11 -07:00
Thomas Harte
67546c4d6e
Per the HRM, the index hole is connected to CIA B, potentially to raise an interrupt.
2021-10-08 17:12:37 -07:00
Thomas Harte
f72deb0a5c
Correct RDY position.
2021-10-08 04:32:13 -07:00
Thomas Harte
616ccbb878
Correct ID bit placement, multiplex with motor state.
...
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
2021-10-08 04:05:57 -07:00
Thomas Harte
5899af0038
Starts accumulating disk data.
2021-10-07 05:11:32 -07:00
Thomas Harte
ed303310bb
Spell out slightly more; this makes debugging a touch easier.
2021-10-06 13:40:48 -07:00
Thomas Harte
33ff4f3b5c
Eliminate drive copies.
2021-10-06 13:40:28 -07:00
Thomas Harte
20bad38d42
Add drive activity lights.
2021-10-06 04:54:40 -07:00
Thomas Harte
92a07398cd
I think CHNG works the other way around.
2021-10-06 04:47:52 -07:00
Thomas Harte
ce8f782577
Corrects meaning of IBM-style RDY.
2021-10-06 04:42:44 -07:00
Thomas Harte
e961d0b4a3
Switch RDY type.
2021-10-06 04:41:09 -07:00
Thomas Harte
2253ff656a
Adds route for inserting disks.
2021-10-05 16:12:30 -07:00
Thomas Harte
18631399ad
Attempts to clock the disk controller.
2021-10-05 15:38:56 -07:00
Thomas Harte
ad4afcdcd5
Switch stepping direction.
...
Empirically, based on the actions of Kickstart, and assuming my confusion is because the relevant signal is active low.
2021-10-05 15:23:48 -07:00
Thomas Harte
2cf5bcc5db
Clarify logic somewhat.
2021-10-05 15:20:05 -07:00
Thomas Harte
1180ad7662
Disables a couple of now-trustworthy LOGs.
2021-10-05 06:51:47 -07:00
Thomas Harte
5463cd1ae3
Attempts to support stepping and head selection.
2021-10-05 06:36:17 -07:00
Thomas Harte
647ec770ce
Implements motor latching, drive ID shift registers.
2021-10-05 05:12:01 -07:00
Thomas Harte
e47bec2e65
Switch CIA B ports over.
2021-10-05 03:38:11 -07:00
Thomas Harte
6566936be9
Be overt about the intended interface.
2021-10-04 16:45:33 -07:00
Thomas Harte
674941abdf
Starts to add a disk controller.
2021-10-04 16:45:05 -07:00
Thomas Harte
b3f0ca39ed
Adds some unused drives.
2021-10-04 08:12:13 -07:00
Thomas Harte
5ccb512883
Moves the CIAs into the Chipset class.
...
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
2021-10-04 06:44:54 -07:00
Thomas Harte
da286d5ae8
Switch spaces to tabs.
2021-10-04 05:27:25 -07:00
Thomas Harte
73e45511dc
Add missing #include.
2021-10-04 05:26:38 -07:00
Thomas Harte
a282a51673
Remove last of the direct printf'ing.
2021-09-30 02:42:59 -04:00
Thomas Harte
b7b13e20d1
Single column blits should use both masks.
2021-09-29 22:49:35 -04:00
Thomas Harte
ad90c6b6ce
Now that this is getting close, don't stop at the first error.
2021-09-29 22:19:34 -04:00
Thomas Harte
402fa41bc0
Corrects initial error value.
2021-09-29 22:19:17 -04:00
Thomas Harte
0b9ebafc0f
Flip bit deserialisation order.
2021-09-28 22:12:13 -04:00
Thomas Harte
140e24ef15
Grab further copy flags.
2021-09-28 22:11:58 -04:00
Thomas Harte
0c998d60cb
Correct test logic for line draws that repeatedly write to the same address.
2021-09-28 21:45:55 -04:00
Thomas Harte
ffcd2ea10c
Attempts more properly to implement line mode.
2021-09-28 21:39:09 -04:00
Thomas Harte
cb460de94d
Makes bad first attempt at a Bresenham inner loop.
2021-09-27 22:06:00 -04:00
Thomas Harte
f6624bf776
Edges mildly closer to line output.
2021-09-26 19:18:12 -04:00
Thomas Harte
b4b6c4d86f
Attempts to support left and right masks.
2021-09-26 18:42:08 -04:00
Thomas Harte
759689ff31
Fix line mode flag, add busy status.
2021-09-26 18:16:00 -04:00
Thomas Harte
1dfc36f311
Flip loop, add modulo mappings.
2021-09-26 18:15:32 -04:00
Thomas Harte
1c03ff1d37
Fix bltdptl to bltbptl misstatement; remove pre-DMA writes.
2021-09-26 18:14:50 -04:00
Thomas Harte
19dd2f92bd
Implements test case. Failing at present, naturally.
2021-09-25 21:52:41 -04:00
Thomas Harte
acfaa016a0
Adds a capture of traffic leading up to the Workbench boot logo.
...
Around which to construct a test case.
2021-09-25 18:10:07 -04:00
Thomas Harte
732761433a
Merge branch 'master' into HeaderOnly6502
2021-09-23 23:00:11 -04:00
Thomas Harte
9012a7f5e1
Merge branch 'master' into Amiga
2021-09-23 23:00:03 -04:00
Thomas Harte
e957b471b2
Merge pull request #989 from TomHarte/Xcode13
...
Resolves Clang 13 implicit conversion warnings.
2021-09-23 22:59:42 -04:00
Thomas Harte
e5a5faa417
Resolves Clang 13 implicit conversion warnings.
2021-09-23 22:53:41 -04:00
Thomas Harte
313dbe05e0
Switch to more consistent inlining.
2021-09-23 22:36:15 -04:00
Thomas Harte
adf7124e2c
Eliminate 6502Base.cpp.
2021-09-23 22:33:33 -04:00
Thomas Harte
c4ab2bbeed
Hard-code fetch window width. For now.
2021-09-23 22:06:13 -04:00
Thomas Harte
42ef459e20
Resolve resting values.
2021-09-23 22:05:59 -04:00
Thomas Harte
cad1a9e0f1
Correct bit test.
2021-09-23 20:42:31 -04:00
Thomas Harte
f1d514470d
Add note to future self.
2021-09-23 20:29:39 -04:00
Thomas Harte
9a7a54f22f
Take alternative guess as to meaning of 'use' bits.
2021-09-23 18:42:12 -04:00
Thomas Harte
137d1c61bd
Allow for channel enables and blitting direction.
2021-09-23 18:38:37 -04:00
Thomas Harte
adc071ed7a
Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0.
2021-09-23 18:30:35 -04:00
Thomas Harte
e06f470044
Ensure no implicit conversion from int to IntT.
2021-09-23 18:30:04 -04:00
Thomas Harte
ab69fe56c9
Take a first shot at magical instant blitting.
2021-09-23 18:13:51 -04:00
Thomas Harte
60bad22a91
Correct fetch window.
2021-09-23 18:13:24 -04:00
Thomas Harte
7092429f7c
Added some notes to self on line mode.
2021-09-20 23:08:26 -04:00
Thomas Harte
fa800bb809
Introduces code for minterm application.
2021-09-20 19:13:23 -04:00
Thomas Harte
e15f1103a0
Takes a shot at low resolution shifting.
2021-09-20 19:00:52 -04:00
Thomas Harte
a4263b5a8c
Ties bitplane collection to line position.
...
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
2021-09-19 21:55:45 -04:00
Thomas Harte
3d85f820f4
Add missing file to kiosk project.
2021-09-16 21:29:11 -04:00
Thomas Harte
245b7baa61
Moves the Copper into its own file.
2021-09-16 21:17:23 -04:00
Thomas Harte
0eeaaa150a
Correct Copper start address.
2021-09-16 21:01:37 -04:00
Thomas Harte
692d87f446
Attempts to restrict blitter slot allocation.
2021-09-16 19:56:28 -04:00
Thomas Harte
6572efe2a7
Clarifies word addressing.
2021-09-16 08:24:52 -04:00
Thomas Harte
8aac2bd029
Stubs in serial port status.
2021-09-14 21:53:07 -04:00
Thomas Harte
add11db369
Factors out DMADevice, which is now a parent of Blitter.
2021-09-14 20:51:32 -04:00
Thomas Harte
e47eab1d40
Merge branch 'master' into Amiga
2021-09-14 20:27:59 -04:00
Thomas Harte
2f86dfdf2b
Merge pull request #987 from TomHarte/IIgsImprovements
...
Further iterates the IIgs towards full functionality.
2021-09-14 20:27:25 -04:00
Thomas Harte
fa71ae3174
Add apology.
2021-09-14 20:23:36 -04:00
Thomas Harte
dfcd1508c9
Establishes valid initial BRAM.
2021-09-10 19:56:20 -04:00
Thomas Harte
0ca4631279
Switch to zero-initialised state; be more careful about resetting data.
2021-09-09 23:08:13 -04:00
Thomas Harte
7e5fc4444a
Default to ROM01.
2021-09-09 22:09:09 -04:00
Thomas Harte
a6221ca322
Reload data only if an output is found.
2021-09-09 22:07:03 -04:00
Thomas Harte
d8e42c4379
Tweak guess at initial state.
2021-09-09 22:06:36 -04:00
Thomas Harte
3bf109ae0b
Merge pull request #986 from TomHarte/IIgsSync
...
Stabilises Apple IIgs display.
2021-09-09 20:14:40 -04:00
Thomas Harte
dd37fa49a0
Stabilises Apple IIgs display.
2021-09-09 20:08:15 -04:00
Thomas Harte
3227ec72a2
Merge branch 'master' into Amiga
2021-09-08 21:08:47 -04:00
Thomas Harte
ee324c3d89
Merge pull request #985 from TomHarte/68000Improvements
...
68000: fix E alignment, expand Microcycle::apply.
2021-09-08 21:08:33 -04:00
Thomas Harte
863971f944
68000: fix E alignment, expand Microcycle::apply.
2021-09-08 21:03:37 -04:00
Thomas Harte
fd70f7ad43
Attempts to make pixel content observeable.
2021-09-08 20:57:26 -04:00
Thomas Harte
6e034c9b7f
At least manages to place a pixel region on screen.
...
Albeit that I've suddenly realised that I've failed properly to think about high-res versus low-res.
2021-08-11 20:31:37 -04:00
Thomas Harte
52e375a985
Move towards playfield decoding.
2021-08-11 18:47:35 -04:00
Thomas Harte
635c1eacd5
Merge branch 'master' into Amiga
2021-08-11 17:31:17 -04:00
Thomas Harte
f49ba18627
Merge pull request #983 from TomHarte/MachinePickerLayout
...
macOS: cleans up layout of machine picker.
2021-08-11 17:30:58 -04:00
Thomas Harte
6dbce96781
Switch to non-breaking space, to avoid orphan word.
2021-08-11 17:28:37 -04:00
Thomas Harte
9ec42f0f8f
Cleans up bottom constraints.
2021-08-11 17:12:01 -04:00
Thomas Harte
10a5e7313f
Makes a buggy first attempt at bitplane data collection.
2021-08-10 21:28:48 -04:00
Thomas Harte
ec9cb21fae
Starts towards bitplane collection.
2021-08-10 19:01:41 -04:00
Thomas Harte
fdd02ad6a6
Neaten, slightly.
2021-08-10 09:20:34 -04:00
Thomas Harte
76e9fcc94a
Obey blitter DMA-enable mask.
2021-08-10 09:19:15 -04:00
Thomas Harte
e412927415
Logs a bit more from the Blitter, gives it access to slots.
2021-08-10 07:17:01 -04:00
Thomas Harte
dda154c7c6
Adds nonsense disk reads, which seems to lead to bitplane and blitter requests.
...
Progress, at last!
2021-08-09 20:31:14 -04:00
Thomas Harte
9215535bee
Adds a container for the disk controller.
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Thereby appears to prove that my Amiga is getting as far as attempting to load from floppy.
2021-08-09 17:35:09 -04:00
Thomas Harte
27726fd2d1
Merge branch 'master' into Amiga
2021-08-09 17:24:06 -04:00
Thomas Harte
77befb7f8e
Correct Atari ST text placement; add missing Enteprise constraint.
2021-08-09 17:14:37 -04:00
Thomas Harte
86c6248b48
Merge branch 'master' into Amiga
2021-08-09 17:09:04 -04:00
Thomas Harte
f2af8ff25d
Merge pull request #981 from TomHarte/ColourPrecision
...
Increase precision of phase interpolation.
2021-08-09 17:08:17 -04:00
Thomas Harte
7d8894415c
Increase precision of phase interpolation.
2021-08-09 15:48:27 -04:00
Thomas Harte
f8380d2d4c
Add 8250 feature of 'count, regardless'.
2021-08-08 22:32:41 -04:00
Thomas Harte
5cc25d0846
Adds a further sanity assert.
2021-08-08 21:52:52 -04:00
Thomas Harte
1502c4530e
Takes a further step towards real timing.
2021-08-08 21:52:28 -04:00
Thomas Harte
c1df4d1c0b
Mirroring is correct.
2021-08-08 20:20:12 -04:00
Thomas Harte
1f9e41e9cb
Ensure TOD isn't firing from power-on.
2021-08-08 18:51:58 -04:00
Thomas Harte
e402e690b0
Assume and test that divide-by-zero posts the PC of the offending instruction.
2021-08-07 17:51:00 -04:00
Thomas Harte
6a15bb15ca
Adds a simpler way of deferring single values.
2021-08-07 17:29:21 -04:00
Thomas Harte
3255fc91fa
Merge branch 'Amiga' of github.com:TomHarte/CLK into Amiga
2021-08-07 17:00:54 -04:00
Thomas Harte
7f2610c4fc
Disambiguates serial control logs.
2021-08-07 16:57:30 -04:00
Thomas Harte
79bd3eb6ae
Merge branch 'Amiga' of github.com:TomHarte/CLK into Amiga
2021-08-07 16:56:40 -04:00
Thomas Harte
b11dd6950c
Adds an entry for DiagROM.
2021-08-07 16:56:18 -04:00
Thomas Harte
98bd6fc240
Adds a further logging hint.
2021-08-06 23:16:06 -04:00
Thomas Harte
8be053fd35
Fixes top constraint for Atari ST.
2021-08-06 22:57:45 -04:00
Thomas Harte
99fee22a9f
Adjusts defaults.
2021-08-06 22:13:21 -04:00
Thomas Harte
084d002353
Adds the Amiga to macOS File -> New...
2021-08-06 21:58:31 -04:00
Thomas Harte
dcbc9847a3
Attempts to get E synchronisation correct.
2021-08-05 20:08:34 -04:00
Thomas Harte
db3c158215
Further increases logging.
2021-08-05 20:07:14 -04:00
Thomas Harte
25e2bd307a
Sets VPA for CIA accesses; logs a little more.
2021-08-05 20:06:48 -04:00
Thomas Harte
b9f78f5d33
Fix final timer B test.
2021-08-03 22:27:23 -04:00
Thomas Harte
b4ec9d70da
Adds the CNT input.
2021-08-03 22:19:41 -04:00
Thomas Harte
738999a8b7
Further expands list of applied tests.
2021-08-03 22:08:50 -04:00
Thomas Harte
dd91d793d9
Correct typo.
2021-08-03 21:45:44 -04:00
Thomas Harte
1f0bf1b32d
Merge pull request #980 from adamsmasher/improve-apple-ii-kb
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Improve raw keyboard handling for original Apple ][
2021-08-03 21:14:06 -04:00
Thomas Harte
8e51e8eb77
Does just a touch of 6526 TOD work.
2021-08-03 21:13:08 -04:00
Thomas Harte
6210605bc7
Transfers full TOD responsibility onto the chip-specific templates.
2021-08-03 19:10:09 -04:00
Thomas Harte
0245b040b0
Splits TOD storage by model.
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TOD storage will probably end up being a full-on class.
2021-08-03 18:50:58 -04:00
Thomas Harte
34c1cc5693
Adds entry points for all remaining tests.
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Failing now: the TB123s, which are TOD related, both CIA2 tests, and CIA1TAB (which I think needs me to implement Port B output toggling).
2021-08-03 17:19:35 -04:00
Thomas Harte
8795719c18
This counts reloads, most accurately.
2021-08-03 17:12:08 -04:00
Thomas Harte
6bbbf43341
At least attempts to chain correctly.
2021-08-03 17:03:58 -04:00
Thomas Harte
f0ef45f0ca
Introduces two further tests.
2021-08-03 16:58:51 -04:00
Thomas Harte
ee6039bfa5
Writes to a timer _during reload_ now have effect.
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Net: one CIA test passed.
2021-08-03 16:57:05 -04:00
Thomas Harte
ef58ce6277
Gets a bit more rigorous about the clocking stage.
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Albeit without advancing relative to the test.
2021-08-02 21:04:00 -04:00
Thomas Harte
15de5e98c4
Adds [partial] test for whether counters are linked.
2021-08-02 20:17:37 -04:00
Thomas Harte
38848ca2db
Rationalises reload logic and cuts storage.
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Failure point is now chaining, I think.
2021-08-02 20:14:01 -04:00
Thomas Harte
77c627e822
Ensure that reading the interrupt flags really clears the master bit.
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Also makes some guesses on one-shot and reload timing. Alas the test isn't in itself specific enough to be more systematic here.
2021-08-02 07:47:08 -04:00
Thomas Harte
c640132699
Reinstates clocking.
2021-08-01 21:35:08 -04:00
Thomas Harte
60b09d9bb0
Increases compile-time logging options.
2021-08-01 21:22:33 -04:00
Thomas Harte
57dd38aef2
Reintroduces reload-on-off, adds interrupt delay.
2021-08-01 21:09:02 -04:00
Thomas Harte
460a6cb6fe
Attempts a more literal implementation.
2021-08-01 18:14:10 -04:00
Adam Smith
fdb676da4e
.
2021-08-01 00:26:14 -07:00
Thomas Harte
26aaddaa33
Adds further documentation.
2021-07-30 21:34:22 -04:00
Thomas Harte
e51151e558
Adds readme related to C64 ROMs.
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Necessary for the Lorenz 6526 tests. I've no current plans to work on the C64.
2021-07-30 21:23:12 -04:00
Thomas Harte
f576baf214
I'm not yet sure this is the best approach, but starts trying to make use of Lorenz's 6526 tests.
2021-07-30 21:21:16 -04:00
Thomas Harte
5c1ac05170
Add documentation.
2021-07-30 21:20:45 -04:00
Thomas Harte
1bae4973bc
Post the serial control write onwards.
2021-07-30 18:24:27 -04:00
Thomas Harte
3d9f86c584
Begins keyboard sketches and notes.
2021-07-30 18:23:15 -04:00
Thomas Harte
3514e537ca
Minor logging tweaks.
2021-07-30 18:22:59 -04:00
Thomas Harte
3d160ce85f
Add another potential warning.
2021-07-30 18:21:38 -04:00
Thomas Harte
b78090ec76
Fixes IOPortsAndTimers classification.
2021-07-28 19:39:42 -04:00
Thomas Harte
759007ffc1
Attempts to route CIA interrupts.
2021-07-28 19:36:30 -04:00
Thomas Harte
37a55c3a77
Corrects 6526 interrupt control write.
...
This seems to imply that the 6526 should be interrupting too.
2021-07-28 19:26:02 -04:00
Thomas Harte
69ae9d72c8
Remove dead non-access.
2021-07-27 22:27:20 -04:00
Thomas Harte
604232acd9
Establish appropriate word-size mask.
2021-07-27 22:23:38 -04:00
Thomas Harte
82205d71cc
Breaks up loop for arithmetic simplicity.
2021-07-27 21:59:27 -04:00
Thomas Harte
402eab10f8
Breaks video output while attempting to pull it into the main loop.
2021-07-27 21:33:07 -04:00
Thomas Harte
b6bf4d73ad
Blitter-finished bit aside, attempts to complete the Copper.
2021-07-27 21:10:14 -04:00
Thomas Harte
5425b5c423
Adds some form of WAITing to the Copper.
2021-07-27 19:32:55 -04:00
Thomas Harte
29cd8504ca
Implements enough Copper to get a first store.
2021-07-27 19:06:16 -04:00
Thomas Harte
3544746934
Modifies interface, starts on scheduler.
...
Probably corrects the pixel clock, which I think was scaled up by a factor of 4.
2021-07-27 16:41:18 -04:00
Thomas Harte
d8f814f1c4
If I'm going to push only a single colour, might as well make it fast.
2021-07-26 21:19:43 -04:00
Thomas Harte
a43175125a
Assuming I'm going to keep this synchronous, extends function signature.
2021-07-26 20:13:06 -04:00
Thomas Harte
1d03bc560a
Stores the colour palette, uses entry 0 as my new always output.
2021-07-26 18:59:11 -04:00
Thomas Harte
3832acf6e3
Produces a static white box, at least.
2021-07-26 18:51:01 -04:00
Thomas Harte
7894b50321
Starts towards an actual pixel output loop.
2021-07-26 18:44:20 -04:00
Thomas Harte
ffded619e6
Returns track 0 found, as a guess.
2021-07-26 18:44:01 -04:00
Thomas Harte
bcb7bb5cce
Improves logging further.
...
To investigate the new perpetual loop.
2021-07-26 17:02:30 -04:00
Thomas Harte
87dcd82f69
Makes a first attempt at some sort of interrupt functionality.
2021-07-26 16:40:42 -04:00
Thomas Harte
e671cc6056
Add stubs for joystick/mouse querying.
2021-07-26 16:21:51 -04:00
Thomas Harte
5da89b88a6
Add missing space.
2021-07-25 22:17:55 -04:00
Thomas Harte
5d60c1f20b
Stubs in Paula.
2021-07-25 22:16:31 -04:00
Thomas Harte
7fd00165c9
Switch to [hard-coded] PAL, for now.
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In the hope that I get to see some graphics soon, this should better conform to my expectations.
2021-07-25 20:41:51 -04:00
Thomas Harte
34d4420e8c
Correct reading of top byte of counter 2.
2021-07-25 20:41:15 -04:00
Thomas Harte
20da194fab
Log slightly more accurately.
2021-07-25 19:59:24 -04:00
Thomas Harte
8d2d4c850f
Revoke temporary debugging.
2021-07-25 19:59:10 -04:00
Thomas Harte
b7bed027d7
Ensures the value initially loaded to A7 is aligned.
...
This is a bit of a guess; it's likely to be true though per the rule that A7 is always kept aligned.
2021-07-25 19:55:23 -04:00
Thomas Harte
fcd6b7b0ea
Takes further aim at the conters.
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I think test cases are needed, probably.
2021-07-24 16:06:49 -04:00
Thomas Harte
ceca32ceb3
Takes a guess at one-shot mode.
2021-07-24 15:53:18 -04:00
Thomas Harte
e3bb9fc1d7
Increase logging.
2021-07-23 23:10:00 -04:00
Thomas Harte
77a8ddb95c
Edges towards working counters.
2021-07-23 22:43:47 -04:00
Thomas Harte
c733a4dbf8
Beefs up interrupt awareness.
2021-07-23 21:58:52 -04:00
Thomas Harte
d898a43dff
Implements time-of-day counters, provisionally.
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Interrupts to do.
2021-07-23 21:24:07 -04:00
Thomas Harte
6216d53b1a
Adds a faster flushing HalfCycles -> Cycles conversion.
2021-07-23 20:07:57 -04:00
Thomas Harte
86c30769d9
Add a divide-by-ten for the CIAs.
2021-07-23 19:25:53 -04:00
Thomas Harte
956a6dbd64
Improve commentary.
2021-07-23 19:23:54 -04:00
Thomas Harte
68fe19818e
Expose more information about the E clock state.
2021-07-23 19:22:00 -04:00
Thomas Harte
de208ead4e
Stubs in enough to get back into a persistent loop.
2021-07-22 22:00:53 -04:00
Thomas Harte
69d62560b4
Adds comment to avoid potential future error.
2021-07-22 22:00:33 -04:00
Thomas Harte
87d2fc1491
Adds enough raster position to return something.
2021-07-22 21:45:51 -04:00
Thomas Harte
2bc9af09e1
Factors out the chipset.
2021-07-22 21:16:23 -04:00
Thomas Harte
26f4758523
Makes a further accommodation for PermitRead/Write.
2021-07-22 21:11:25 -04:00
Thomas Harte
6123349b79
Stubs in control registers and disables exit-on-miss.
...
I think I may be running up against the limits of stubbing now. Probably time to implement some stuff.
2021-07-22 19:28:01 -04:00
Thomas Harte
d1ac54fe92
Stubs in sprite containers.
2021-07-22 19:00:26 -04:00
Thomas Harte
9468adf737
Stubs in Copper addresses.
2021-07-22 18:51:23 -04:00
Thomas Harte
e85db40b0f
Sketches out a blitter class.
2021-07-22 18:43:07 -04:00
Thomas Harte
b3d55cc16d
Adds non-committal reads for some write-only registers.
...
The hardware now proceeds to trying to talk to the Blitter. So that's next.
2021-07-22 16:10:30 -04:00
Thomas Harte
56b62a5e49
Adds a dummy interrupt control register.
2021-07-22 16:09:32 -04:00
Thomas Harte
3ee1fc544f
Fix: (1) memory base adjustment; (2) out-of-bounds writes.
2021-07-21 21:49:20 -04:00
Thomas Harte
5401744dc0
Add additional asserts.
2021-07-21 21:47:44 -04:00
Thomas Harte
fe10a10ac2
Correct address on stack upon priviliege exception.
2021-07-21 21:46:55 -04:00
Thomas Harte
ba2e5a97a9
Provisionally adds a status LED.
2021-07-19 22:31:36 -04:00
Thomas Harte
4515d1220c
Switches CIA A/B byte connections; applies reset to memory map.
2021-07-19 22:17:40 -04:00
Thomas Harte
486959bce8
With minor additional logging, it appears the Amiga just keeps resetting itself.
2021-07-19 21:50:35 -04:00
Thomas Harte
e1a410bf3d
Further mildly increases logging.
2021-07-19 20:54:32 -04:00
Thomas Harte
3767cc7c0b
Increase logging; fix set/clear of interrupt enable mask.
2021-07-19 19:03:37 -04:00
Thomas Harte
96b0ce9ef2
Merge branch 'master' into Amiga
2021-07-18 22:16:05 -04:00
Thomas Harte
038ed0551e
Merge pull request #979 from TomHarte/Warnings
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Resolve all dangling GCC warnings.
2021-07-18 22:15:45 -04:00
Thomas Harte
cfaf4a8a65
Add advised brackets; clarify type punning.
2021-07-18 22:11:11 -04:00
Thomas Harte
22dd8a8847
Stubs onward to a second endless loop.
2021-07-18 20:55:33 -04:00
Thomas Harte
b2ae8e7a4a
Adds a type for the operation bitfield.
2021-07-18 20:54:54 -04:00
Thomas Harte
3e2bac8129
Stubs in enough to get to a permanent loop.
2021-07-18 20:25:43 -04:00
Thomas Harte
50b9d0e86d
Logically, I think this should be unsigned.
2021-07-18 20:25:22 -04:00
Thomas Harte
a030d9935e
Adds port input.
2021-07-18 20:25:04 -04:00
Thomas Harte
c425dec4d5
Makes some attempt to get as far as the overlay being disabled.
2021-07-18 17:17:41 -04:00
Thomas Harte
67d53601d5
Latch and return data direction.
...
Albeit with no port-handling effect yet.
2021-07-18 12:23:47 -04:00
Thomas Harte
622cca0acf
Adds sufficient address decoding to print a more helpful exit message.
2021-07-18 12:13:56 -04:00
Thomas Harte
48999c03a5
Adds concept of time, captured port handler.
2021-07-18 11:49:10 -04:00
Thomas Harte
377cc7bdcd
Start to introduce a 6526/8250.
2021-07-18 11:36:13 -04:00
Thomas Harte
a5d0976c2d
Eliminate unused #includes.
2021-07-18 11:35:57 -04:00
Thomas Harte
ae05010255
Improve indentation.
2021-07-18 11:29:26 -04:00
Thomas Harte
66cacbd0e0
Be overt about the type being supplied.
2021-07-18 11:28:18 -04:00
Thomas Harte
b1616be4b8
Gets to what is probably a CIA access?
2021-07-17 21:36:20 -04:00
Thomas Harte
a0a9a72d8f
Begins sketching out a memory mapper.
2021-07-17 21:10:06 -04:00
Thomas Harte
0cfc7f732c
Extends to support read/write permissions in apply.
2021-07-17 21:09:52 -04:00
Thomas Harte
f7de6f790c
Meanders vaguely towards a memory map.
2021-07-16 21:42:17 -04:00
Thomas Harte
d1f3b5ed80
Obtains a Kickstart ROM, adds a 68000.
2021-07-16 21:07:12 -04:00
Thomas Harte
7925dcc5a2
Advances far enough for the Amiga to be autonomous.
2021-07-16 20:49:12 -04:00
Thomas Harte
6ade36bf09
Adds an empty shell of a machine.
2021-07-16 20:30:48 -04:00
Thomas Harte
c52945aab5
Adds passthrough for Amiga media.
2021-07-16 20:15:36 -04:00
Thomas Harte
2b0a4055f7
Makes an attempt at Amiga ADF encoding.
2021-07-16 20:07:17 -04:00
Thomas Harte
7cb16a3fc5
Introduces a shell for Amiga ADF decoding.
2021-07-16 18:11:07 -04:00
Thomas Harte
0b80c1988b
Add Amiga enums.
2021-07-16 17:59:08 -04:00
Thomas Harte
eab9bc1503
Make implicit conversion explicit.
2021-07-16 17:45:14 -04:00
Thomas Harte
5bfedff8d1
Mutate dangling printf to a LOG.
2021-07-16 17:32:05 -04:00
Thomas Harte
c8638c0ffb
Merge pull request #977 from TomHarte/MouseFade
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Slightly adjusts macOS mouse hiding semantics.
2021-07-16 17:25:59 -04:00
Thomas Harte
8a95b91e2a
Merge pull request #976 from TomHarte/DiskIIClocking
...
Correct Disk II sleeping test to allow for spin-down.
2021-07-16 17:22:04 -04:00
Thomas Harte
c226be612f
Slightly adjusts mouse hiding semantics.
...
This allows the Macintosh and ST to fade out volume and settings even without having captured the mouse.
2021-07-16 17:21:25 -04:00
Thomas Harte
c8699d9770
Correct Disk II sleeping test to allow for spin-down.
2021-07-16 17:12:57 -04:00
Thomas Harte
a0799e14cc
Merge pull request #975 from TomHarte/LEDStyles
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Classify some LEDs as 'persistent'
2021-07-15 22:05:14 -04:00
Thomas Harte
dea6048849
Add documentation.
2021-07-15 22:00:10 -04:00
Thomas Harte
813e252539
Ignore hidden files.
2021-07-15 21:57:25 -04:00
Thomas Harte
b41e29a83b
Slows CPC typer to avoid dropped characters.
2021-07-15 21:54:02 -04:00
Thomas Harte
d35c7ad127
Take advantage of persistence flag for more intelligent LED presentation.
2021-07-15 21:49:11 -04:00
Thomas Harte
ea63415d0e
Exposes persistent LED flag to Swift.
2021-07-15 21:34:14 -04:00
Thomas Harte
52ea3b741c
Introduces a presentation flag for LEDs.
...
All existing receivers ignore it.
2021-07-15 21:26:02 -04:00
Thomas Harte
2731ca8c92
Merge pull request #974 from TomHarte/KickstartROMs
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Introduces Amiga ROMs to the catalogue.
2021-07-15 21:14:50 -04:00
Thomas Harte
af1ade9433
Introduces Amiga ROMs to the catalogue.
2021-07-15 21:09:20 -04:00
Thomas Harte
fc248951cc
Merge pull request #973 from TomHarte/TransientActivity
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Converts activity indicators to transient in-window presentation.
2021-07-15 20:15:33 -04:00
Thomas Harte
84547ee1c1
Reduce spurious in-window appearances.
2021-07-15 19:53:40 -04:00
Thomas Harte
a42848c62f
Add windowed LED reappearance upon blink.
...
Also fix crash-at-startup for fullscreen.
2021-07-15 19:51:23 -04:00
Thomas Harte
c7b5d69431
Add extra usage hint.
2021-07-15 19:50:43 -04:00
Thomas Harte
81374b70b5
Switch to transient LED presentation in windowed mode.
2021-07-15 19:22:23 -04:00
Thomas Harte
47a530fd5c
Fixes LED ordering.
...
Still work to do on capturing the proper window title.
2021-07-14 22:01:42 -04:00
Thomas Harte
58451d7c0c
Attempts to incorporate LEDs into the window title when in windowed mode.
2021-07-14 21:43:58 -04:00
Thomas Harte
5c8f8c76fe
Thus ends the View menu.
2021-07-14 21:02:58 -04:00
Thomas Harte
ae1d1bdb5b
Wires up controller for QuickLoadOptions.
2021-07-14 21:02:04 -04:00
Thomas Harte
33cc1154a2
Simplify ViewFader and avoid second-guessing when to hard-set opacity.
2021-07-14 20:50:41 -04:00
Thomas Harte
4bc0b75c30
Ensure Macintosh controller is effective.
2021-07-14 20:50:12 -04:00
Thomas Harte
eb8ec1efb1
Makes ViewFader the full master of fading.
2021-07-14 19:03:44 -04:00
Thomas Harte
616f8efc47
Improves optional hysteresis.
2021-07-13 23:40:15 -04:00
Thomas Harte
29e4369420
Attempts to switch activity indicators to smart in-window presentation.
2021-07-13 23:32:00 -04:00
Thomas Harte
bd7f7bc8d7
Remove dead 'show options'.
2021-07-13 22:28:03 -04:00
Thomas Harte
e689ca92c4
Minor rearrangements, for cleanliness.
2021-07-13 22:26:50 -04:00
Thomas Harte
4ef3005072
Merge pull request #972 from TomHarte/InWindowOptions
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macOS: moves machine options into the emulation window
2021-07-13 22:06:08 -04:00
Thomas Harte
174c837767
Switches to a logarithmic volume dial.
2021-07-13 21:45:07 -04:00
Thomas Harte
486bb911a9
Adapts ZX80/81 options.
2021-07-13 21:26:20 -04:00
Thomas Harte
754221d697
Adapts QuickLoadOptions.
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Not that it currently seems to be used.
2021-07-13 21:21:02 -04:00
Thomas Harte
3c36c90729
Adapts QuickLoadCompositeOptions.
2021-07-13 21:17:52 -04:00
Thomas Harte
3d1d15a25b
Updates the Oric options.
2021-07-13 19:32:23 -04:00
Thomas Harte
000d99f26c
Adapts the Macintosh options.
2021-07-13 19:26:29 -04:00
Thomas Harte
524e2abc8c
Adapts composite options.
2021-07-13 19:19:47 -04:00
Thomas Harte
00bab98e09
Converts the Apple II options into an in-window view.
2021-07-13 19:14:54 -04:00
Thomas Harte
6d98349be1
Fully invests in options controllers, distinct from the views.
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Per MVC, I should have been doing something closer to this from day one.
2021-07-13 19:04:24 -04:00
Thomas Harte
d24d153c08
Use modern constraint specification, add layers to XIBs.
2021-07-12 22:55:53 -04:00
Thomas Harte
b01561712c
Tightens spacing slightly.
2021-07-12 22:49:42 -04:00
Thomas Harte
324edcb391
Starts towards using an in-window options panel.
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With the same fade in/out behaviour as the volume control.
2021-07-12 22:38:08 -04:00
Thomas Harte
6e62e4e296
Merge branch 'master' of github.com:TomHarte/CLK
2021-07-12 22:01:25 -04:00
Thomas Harte
f81ecbf4a0
Force icons back to white.
2021-07-12 22:01:19 -04:00
Thomas Harte
4370456323
Switch to an NSVisualEffectView for volume controls.
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It provides a background that better contrasts with arbitrary content.
2021-07-12 21:28:04 -04:00
Thomas Harte
a424ed7c00
Makes for slightly more straightforward constraints.
2021-07-12 19:25:06 -04:00
Thomas Harte
a2065f59a1
Adds a 0.1 second pause before exit-related menu fadeout.
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This is because the system may post a quick succession of exits and enters if the view hierarchy changes.
2021-07-12 19:12:04 -04:00
Thomas Harte
c1bd7f5c67
Pull release links up closer to the lede.
2021-07-12 10:03:03 -04:00
Thomas Harte
5810a1a98e
Merge pull request #971 from TomHarte/ChaseHQ
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Flip meaning of INT1 input read.
2021-07-09 22:48:01 -04:00
Thomas Harte
a4c011e3c0
Flip meaning of INT1 input read.
2021-07-09 22:39:51 -04:00
Thomas Harte
337fd15dc0
Merge pull request #970 from TomHarte/SwiftUniformity
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Swift: be consisted on `.selectedTag()`.
2021-07-08 22:43:57 -04:00
Thomas Harte
9bc94f4536
Be consisted on .selectedTag().
2021-07-08 22:38:54 -04:00
Thomas Harte
3f4cf35384
Merge pull request #969 from TomHarte/SixMHz
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Adds the option of running an Enterprise at 6MHz.
2021-07-08 22:36:22 -04:00
Thomas Harte
4dd7f2cc09
Add 6Mhz option to Qt UI.
2021-07-08 22:30:35 -04:00
Thomas Harte
1b29cc34c4
Correct input list.
2021-07-08 22:22:48 -04:00
Thomas Harte
53c3c1f5ab
Allows macOS users to select the 6MHz Enterprise.
2021-07-08 18:50:37 -04:00
Thomas Harte
6225abd751
Adds 6MHz Enterprise option.
2021-07-07 20:57:04 -04:00
Thomas Harte
c6fcd9a1eb
Merge pull request #968 from TomHarte/DaveAudio
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Dave: apply ring modulation during sync, too.
2021-07-06 23:41:37 -04:00
Thomas Harte
30fbb6ea53
Ensure run command is issued.
2021-07-06 23:16:16 -04:00
Thomas Harte
0e49258546
Remove caveman debugging.
2021-07-06 23:15:53 -04:00
Thomas Harte
264b8dfb28
Dave: apply ring modulation even in sync mode.
2021-07-06 23:11:30 -04:00
Thomas Harte
6a15b8f695
Merge pull request #967 from TomHarte/EnterpriseTiming
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Correct Enterprise timing error.
2021-07-06 22:48:58 -04:00
Thomas Harte
5167d256cc
Remove detritus.
2021-07-06 22:43:17 -04:00
Thomas Harte
16bd826491
Reduce nesting.
2021-07-06 22:32:59 -04:00
Thomas Harte
55af8fa5d9
Avoid erroneous Nick delays.
2021-07-06 22:28:44 -04:00
Thomas Harte
1ec8ff20af
Ensure data bus is 0xff during interrupts.
2021-07-06 21:58:17 -04:00
Thomas Harte
99a65d3297
Merge pull request #966 from TomHarte/DaveUnifiedTimer
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Switches to a unified counter for 1/50/1000Hz Dave interrupts.
2021-07-06 21:50:32 -04:00
Thomas Harte
94907b51aa
Remove redundant parameter.
2021-07-06 20:47:49 -04:00
Thomas Harte
0085265d13
Test for a longer period; fix expected tone 1 count.
2021-07-06 20:46:22 -04:00
Thomas Harte
8e0893bd42
Clarifies control flow.
2021-07-06 20:28:32 -04:00
Thomas Harte
704dc9bdcb
Improves test, to assert that state toggles happen at interrupts.
2021-07-06 20:25:32 -04:00
Thomas Harte
7a673a2448
Avoid confusing temporary storage.
2021-07-06 20:23:09 -04:00
Thomas Harte
33e2a4b21c
Minor cleanups.
2021-07-06 20:20:13 -04:00
Thomas Harte
3e6b804896
Switches to linked 1/50/1000 Hz timers, and per-interrupt state toggling.
2021-07-06 20:12:44 -04:00
Thomas Harte
e98165a657
Merge pull request #965 from TomHarte/DaveDivider
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Ensure two-cycle pauses in 12MHz mode.
2021-07-04 21:13:05 -04:00
Thomas Harte
2a7727d12b
Merge branch 'master' into DaveDivider
2021-07-04 21:02:09 -04:00
Thomas Harte
c20e8f4062
Honours 8/12Mhz selection in non-video delays.
2021-07-03 23:05:09 -04:00
Thomas Harte
4ca9db7d49
Merge pull request #963 from TomHarte/DaveDivider
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Obey Dave's 8/12MHz programmable divider.
2021-07-03 23:00:11 -04:00
Thomas Harte
4add48cffb
Obey Dave's 8/12MHz programmable divider.
2021-07-03 22:43:20 -04:00
Thomas Harte
adbfb009f8
Merge pull request #960 from TomHarte/QtLEDs
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Ensure LEDs are cleared between machines in Qt.
2021-07-03 19:17:51 -04:00
Thomas Harte
43ceca8711
Use type alias.
2021-07-03 19:10:39 -04:00
Thomas Harte
3ef28a4f03
Remove unused instance variable.
2021-07-03 19:10:29 -04:00
Thomas Harte
adcd580d5b
Ensure LEDs are cleared upon a new machine.
2021-07-03 19:06:15 -04:00
Thomas Harte
5715c9183f
The target is now definitely used.
2021-07-03 15:20:37 -04:00
Thomas Harte
ceb62ac7f9
Reenable the hardened runtime for macOS.
2021-07-03 13:41:32 -04:00
Thomas Harte
bda0756620
Merge pull request #959 from TomHarte/WriteCrash
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Corrects buffer placement of decoded sectors.
2021-07-03 13:41:00 -04:00
Thomas Harte
6b47fb38c6
Corrects buffer placement of decoded sectors.
2021-07-03 13:36:01 -04:00
Thomas Harte
38bf8a06a7
Merge pull request #958 from TomHarte/EnterpriseFloatingBus
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Makes a guess re: the Enterprise floating bus
2021-07-03 13:26:19 -04:00
Thomas Harte
196651d9aa
Consolidates TODO.
2021-07-03 13:08:53 -04:00
Thomas Harte
6b46212a4e
Deal with dangling TODO.
2021-07-03 13:07:41 -04:00
Thomas Harte
2a6fff2008
Takes a stab at what might happen if you read from Nick.
2021-07-03 13:06:07 -04:00
Thomas Harte
c5944efe50
Adds various method definitions.
2021-07-03 12:56:56 -04:00
Thomas Harte
f384370b18
Switch what's left of Enterprise logging to actual LOGs.
2021-07-03 12:50:46 -04:00
Thomas Harte
0c09275a9f
Merge pull request #957 from TomHarte/EnterpriseTimingWindow
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Correct various Enterprise timing discrepancies.
2021-07-03 12:47:29 -04:00
Thomas Harte
278671cdb9
Correct Nick interrupt prediction.
2021-07-03 00:05:13 -04:00
Thomas Harte
964d2d4fa4
Be consistent in expression of logic.
2021-07-03 00:00:00 -04:00
Thomas Harte
f371221dba
Add a quick test of tone generator 1.
2021-07-02 23:57:11 -04:00
Thomas Harte
27b0579ec6
Avoid stack-error test case.
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Also test that the interrupt is generated on the downward stroke.
2021-07-02 23:55:43 -04:00
Thomas Harte
283092cfbc
With a unit test in aid, corrects some lingering TimedInterruptSource issues.
2021-07-02 23:41:19 -04:00
Thomas Harte
614953a222
Allows the low-pass filter to react to high-pass effects.
2021-07-02 22:36:35 -04:00
Thomas Harte
4fffb3cf19
Allow that final Z80 cycle to start anywhere in the first three of Nick's window of six.
2021-07-02 22:29:35 -04:00
Thomas Harte
850aa2b23a
Merge pull request #956 from TomHarte/EnterpriseComposite
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Adds Enterprise composite video option.
2021-07-02 22:22:09 -04:00
Thomas Harte
d715e5fd1d
Expose composite/RGB option in Qt.
2021-07-02 21:51:48 -04:00
Thomas Harte
7826a26c7b
Adds Enterprise composite video option.
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While enabling more pixels on the left for RGB mode.
2021-07-02 21:42:09 -04:00
Thomas Harte
dc0a82cf9a
Merge pull request #955 from TomHarte/FAT12
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Adds a FAT12 parser.
2021-07-02 21:33:54 -04:00
Thomas Harte
2e60c81bd6
Enter :dir as a complete command.
2021-07-02 21:15:48 -04:00
Thomas Harte
763b9ba0ec
Ensure the splash screen is skipped for self-booting disks.
2021-07-02 21:11:54 -04:00
Thomas Harte
bae8bb0c00
Gives the FAT parser responsibility for right trims.
2021-07-02 19:50:27 -04:00
Thomas Harte
bcf483fb7e
Adds some basic loading command assistance.
2021-07-02 19:42:43 -04:00
Thomas Harte
a5b7d819a7
Correct FAT parser.
2021-07-02 19:28:13 -04:00
Thomas Harte
fe07a0b1d8
Starts to add a FAT[12] parser.
2021-07-02 18:56:43 -04:00
Thomas Harte
d9231e5d4a
Merge pull request #954 from TomHarte/stddefRedux
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The FIRFilter interface depends upon size_t.
2021-07-02 17:26:37 -04:00
Thomas Harte
b7aa1a1c84
The FIRFilter interface depends upon size_t.
2021-07-02 17:21:53 -04:00
Thomas Harte
32e144115d
Add missing article, plus other minor corrections.
2021-07-02 11:03:14 -04:00
Thomas Harte
177cc96f49
Merge pull request #953 from TomHarte/stddef
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Add missing stddef header where size_t is used.
2021-07-01 23:29:56 -04:00
Thomas Harte
51d98ef9ab
Add missing stddef header where size_t is used.
2021-07-01 23:15:32 -04:00
Thomas Harte
2327c48cc4
Merge pull request #952 from TomHarte/EnterpriseTyper
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Add typer support for the Enterprise.
2021-07-01 22:59:04 -04:00
Thomas Harte
742d44a532
Switch to an activity-based typing trigger; add a target loading command.
2021-07-01 22:53:23 -04:00
Thomas Harte
52b96db2b9
Correct syntax, mapping and inter-key timing.
2021-07-01 21:18:15 -04:00
Thomas Harte
0b9de78c38
Add typer support for the Enterprise.
2021-07-01 21:05:03 -04:00
Thomas Harte
2c28cb8c57
Merge pull request #951 from TomHarte/EnterpriseMention
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Add Enterprise screenshots
2021-06-30 22:24:43 -04:00
Thomas Harte
483fe82e9d
Add a second image, to even things out.
2021-06-30 22:23:26 -04:00
Thomas Harte
29492d6138
Add an Enterprise screenshot.
2021-06-30 22:18:29 -04:00
Thomas Harte
19310e32c4
Adds the Enterprise 64/128 as a bullet-pointed item.
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No relevant screenshots yet.
2021-06-30 08:06:20 -04:00
Thomas Harte
c04a395499
Merge pull request #950 from TomHarte/Enterprise
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Adds emulation of the Enterprise
2021-06-29 21:37:38 -04:00
Thomas Harte
1c424833a9
Correct EXDOS ROM name.
2021-06-29 21:04:53 -04:00
Thomas Harte
a46ff5590d
Adds Enterprise new machine dialogue for Qt.
2021-06-29 21:04:17 -04:00
Thomas Harte
ab059b63fd
Add Enterprise to Qt project file.
2021-06-29 20:36:28 -04:00
Thomas Harte
3d8fc9952d
Remove dead TODO, correct for overflow position.
2021-06-29 15:44:02 -04:00
Thomas Harte
8ce8fbd977
Provide correct input when one of the tone generators is the interrupt source.
2021-06-29 15:41:08 -04:00
Thomas Harte
7f08218b28
The Nick interrupt input also seems to be a live poll, not a retrieval of the mask.
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This corrects the two pieces of software I knew not to be working.
2021-06-28 22:10:11 -04:00
Thomas Harte
2c139ad931
Adds some notes to self.
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I think I'm starting to find enough information to handle tapes.
2021-06-28 22:03:06 -04:00
Thomas Harte
1119779c8b
Ensure EXDOS card is completely disabled if no FDC is present.
2021-06-28 21:47:53 -04:00
Thomas Harte
5351ac560f
Ensure the motor goes off for unselected drives.
2021-06-28 21:40:12 -04:00
Thomas Harte
49f0ab0f15
Add note to self.
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Although I still think there may be some issue lurking.
2021-06-28 21:31:55 -04:00
Thomas Harte
a5c57e777e
VRES appears to work negatively in attribute mode too.
2021-06-28 21:24:13 -04:00
Thomas Harte
3c59042388
Fixes initial state for 1kHz.
2021-06-28 21:08:41 -04:00
Thomas Harte
919e211bc4
Reduces number of interrupt-related sequence points.
2021-06-28 19:30:12 -04:00
Thomas Harte
daa0737ce4
Ensure addresses tick upwards even during sync/burst; correct 2/4/8bpp character sizing.
2021-06-28 19:00:51 -04:00
Thomas Harte
36805cb120
Correct tone channel interrupts, remove dead warning.
2021-06-27 23:21:00 -04:00
Thomas Harte
7de69e9874
Makes an attempt to round out the timed interrupts.
2021-06-27 23:09:11 -04:00
Thomas Harte
b93575bbcc
Spots that b0 and b2 of 0xb4 are 'dividers', not enables.
2021-06-27 22:33:20 -04:00
Thomas Harte
116e0f0105
Interupts 1kHz and 50Hz interrupts, while edging towards tone generator interrupts.
2021-06-27 22:08:38 -04:00
Thomas Harte
e4a650aaff
Implements the 1Hz interrupt.
2021-06-27 21:47:21 -04:00
Thomas Harte
b5312b9ba0
get_interrupt_line can be const.
2021-06-27 21:37:11 -04:00
Thomas Harte
6afee7bb9b
Captures appropriate fields.
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No action yet.
2021-06-27 21:36:55 -04:00
Thomas Harte
5729e6e13a
Corrects potential JustInTimeActor overflow.
2021-06-27 21:36:41 -04:00
Thomas Harte
2f53b105bb
The Enterprise is now an Activity::Source; also sketches out the owner of Dave's timed interrupt logic.
2021-06-27 21:02:04 -04:00
Thomas Harte
b698056f78
Correct divisor.
2021-06-27 17:39:13 -04:00
Thomas Harte
95c906f03d
Takes a serious shot at back_map.
2021-06-27 17:36:25 -04:00
Thomas Harte
be19fa9dde
This mapping needs to know where it will occur.
2021-06-27 17:30:09 -04:00
Thomas Harte
81e9ba5608
This is correct from the Enterprise's side of things, I think.
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I just need to complete the missing part of JustInTimeActor. After I do some empirical testing of this.
2021-06-27 17:24:21 -04:00
Thomas Harte
f2d7b9f6a9
Apply a crop, allow time until Z80 slot to be a future-based query.
2021-06-27 17:13:07 -04:00
Thomas Harte
1ea034310a
Edge up very close to video waits.
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I just need to implement back conversions that include marginal phase over in the JustInTimeActor.
2021-06-27 16:28:01 -04:00
Thomas Harte
bdcab447f9
Add a further accessor.
2021-06-27 16:27:26 -04:00
Thomas Harte
10bf6744aa
Correct typo.
2021-06-27 16:26:55 -04:00
Thomas Harte
895d98e266
Implements out-of-video-area pauses.
2021-06-27 16:11:22 -04:00
Thomas Harte
903e343895
Attempts to complete Dave's audio duties.
2021-06-27 14:06:49 -04:00
Thomas Harte
f8b7c59616
Corrects tone frequency.
2021-06-26 23:51:43 -04:00
Thomas Harte
fcd267a3f9
Starts implementing noise.
2021-06-26 23:48:53 -04:00
Thomas Harte
f8bb66d2a0
Attempts an essentially-complete implementation of tone channels.
2021-06-26 23:39:59 -04:00
Thomas Harte
90782d3c27
Corrects for IntType != int.
2021-06-26 23:39:37 -04:00
Thomas Harte
f2336d2efc
I think reloads occur after overflow, not before.
2021-06-26 23:16:00 -04:00
Thomas Harte
c2d093fa3c
Respect user volume input.
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Basic tones are now present. Neato!
2021-06-24 22:27:02 -04:00
Thomas Harte
1a97cc8a91
Start making some effort towards audio generation.
2021-06-24 22:21:01 -04:00
Thomas Harte
c34a548fa0
Ensure character pixel reads can't go out of bounds.
2021-06-24 22:19:50 -04:00
Thomas Harte
d1b89392a2
Improve exposiiton.
2021-06-24 22:18:31 -04:00
Thomas Harte
ed734754e5
Adds a through route for IMG files.
2021-06-24 21:04:21 -04:00
Thomas Harte
520c3c9218
Corrects colour deserialisation.
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Long story short: the documentation I'm reading inexplicably lists the bits in reverse order. Luckily, a lot of the other documentation doesn't.
2021-06-24 20:59:04 -04:00
Thomas Harte
9230cf1726
Corrects bug when left_ or right_margin_ = 0.
2021-06-24 20:28:50 -04:00
Thomas Harte
6e616972a5
Better binds margin tests to window movements; simplifies line parameter addressing.
2021-06-24 18:55:15 -04:00
Thomas Harte
f98888824d
Switches to an overt active/inactive state machine.
2021-06-24 18:34:21 -04:00
Thomas Harte
6c8b23e708
Alters 4bpp mapping; adds character mode 4bpp and 8bpp.
2021-06-23 19:35:47 -04:00
Thomas Harte
2c2bb3765f
Withdraws the EPDOS option.
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At least for now; it's something to worry about later.
2021-06-23 19:32:34 -04:00
Thomas Harte
0d165740ea
Honours memory size request.
2021-06-22 21:48:55 -04:00
Thomas Harte
88f0f2b623
Adds to the macOS UI and wires through all Enterprise options.
2021-06-22 21:39:07 -04:00
Thomas Harte
0afa143375
Add missing include.
2021-06-22 21:31:46 -04:00
Thomas Harte
8319aca351
Correct syntax errors.
2021-06-22 20:50:03 -04:00
Thomas Harte
a66734883a
Starts sketching out Dave.
2021-06-22 19:33:41 -04:00
Thomas Harte
d2ab0dd839
Adds a quick way to get the compiler to pick an integral type.
2021-06-22 19:33:29 -04:00
Thomas Harte
2574407afb
Relocates MinIntTypeValue to Numeric.
2021-06-22 19:33:02 -04:00
Thomas Harte
83a54fd6d2
Use the FAT12 boot sector to determine geometry.
2021-06-22 06:54:17 -04:00
Thomas Harte
e062780968
Extends back to 128kb and stops halting on unrecognised ports.
2021-06-22 06:15:42 -04:00
Thomas Harte
3acd0be1f7
Copy and paste 2bpp character support.
2021-06-21 23:27:13 -04:00
Thomas Harte
69c0734975
WD1770: switch motor on even if spin-up is disabled.
2021-06-21 23:26:55 -04:00
Thomas Harte
c1678d7be7
Corrects exposition and transmission of drive selection.
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What a klutz I've been.
2021-06-21 22:56:25 -04:00
Thomas Harte
117f9a9794
Adds notes on intended meaning of status register.
2021-06-21 07:31:58 -04:00
Thomas Harte
b49cc407c6
Adds some guesses as to the EXDos expansion.
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... with plenty left to do.
2021-06-20 22:30:27 -04:00
Thomas Harte
954386f1cc
Creates a shell for the disk-drive add-on card.
2021-06-20 20:50:23 -04:00
Thomas Harte
d7ff6bd04d
Adds necessary declarations to install a DOS ROM.
2021-06-20 20:30:54 -04:00
Thomas Harte
6025516f9f
Ensure addresses increment even when there's no target for pixels.
2021-06-20 14:31:02 -04:00
Thomas Harte
d8b9cdf7a2
Correct multiplier.
2021-06-20 14:25:37 -04:00
Thomas Harte
09dbff39f2
Also map keypad to F keys.
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This is a pragmatic and arguably Apple-centric decision. But also it's fairly arbitrary, as the Enterprise doesn't have a number pad.
2021-06-20 14:25:28 -04:00
Thomas Harte
2fe15a6168
Switch to idealised Nick clock rate.
2021-06-20 14:21:56 -04:00
Thomas Harte
07dc26f8fa
Adds TODO to resolve screen jumping.
2021-06-19 23:41:29 -04:00
Thomas Harte
a08d65b1ff
Adds IMG -> Enterprise connection.
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Albeit still without an Enterprise static analyser.
2021-06-19 23:16:33 -04:00
Thomas Harte
199621db08
Observes that the actual guess here is MS-DOS-style.
2021-06-19 23:11:51 -04:00
Thomas Harte
0e1e8c7faa
Attempts to support the panoply of EXOS and BASIC versions.
2021-06-19 22:59:09 -04:00
Thomas Harte
42a98e1676
Fix composition with empty nodes.
2021-06-19 22:13:17 -04:00
Thomas Harte
23e26e0333
Attempts to complete handling of VRES.
2021-06-19 22:00:19 -04:00
Thomas Harte
fadb04f3f3
Attempts to implement LSBALT and MSBALT.
2021-06-19 21:57:26 -04:00
Thomas Harte
4968ccf46d
Corrects attributed mode.
2021-06-19 13:08:14 -04:00
Thomas Harte
1dcac304d3
Implements the ALTIND bits and attempts ATTR mode.
2021-06-19 13:04:18 -04:00
Thomas Harte
1651efe4fc
Ensures all keys are initially unpressed.
2021-06-19 13:03:31 -04:00
Thomas Harte
8f24aed43e
Slightly reduces logging.
2021-06-18 23:17:44 -04:00
Thomas Harte
a381374e31
Drops back down to 64kb.
2021-06-18 23:14:44 -04:00
Thomas Harte
9411c37d23
Fleshes out the keyboard map.
2021-06-18 23:14:35 -04:00
Thomas Harte
6af6f21868
Attempts to implement interrupt latches and clears.
2021-06-18 22:59:41 -04:00
Thomas Harte
9a0022cfcb
Removes temporary work.
2021-06-18 18:44:07 -04:00
Thomas Harte
266310d9c2
Fixes automatic flushing for non-1/1-clocked actors.
2021-06-18 18:43:08 -04:00
Thomas Harte
fbf1adef05
Introduces unit test and thereby seemingly fixes get_next_sequence_point.
...
There's still improper output in the actual machine though, so maybe something else is afoot?
2021-06-18 17:44:17 -04:00
Thomas Harte
311ddfb05a
Add note to self for tomorrow.
2021-06-17 22:34:52 -04:00
Thomas Harte
2fd8a8aa66
Begins addition of interrupt feedback from Nick.
...
Also fixes clock rate. Though clearly get_next_sequence_point isn't quite right yet.
2021-06-17 22:30:24 -04:00
Thomas Harte
0c3e9dca28
Adds some basic keyboard inputs.
...
I think the next thing required is interrupts though.
2021-06-17 20:47:56 -04:00
Thomas Harte
c331d15429
Makes space to allow for 64kb EXOS ROMs.
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I think some of the later ROMs have a more thorough memory test, which might provide better detail on whatever's going on here.
2021-06-16 22:25:00 -04:00
Thomas Harte
4414e96710
Adds enough text mode for now.
...
Discovered: a memory fault is being reported at startup.
2021-06-16 21:42:20 -04:00
Thomas Harte
7161783a4f
Adds lpixel output.
2021-06-16 21:16:26 -04:00
Thomas Harte
cbac48da86
Attempts full run at pixel mode.
2021-06-16 20:43:22 -04:00
Thomas Harte
d9142d5427
Adjusts declared scale, accurately to communicate pixel clock.
2021-06-15 22:39:44 -04:00
Thomas Harte
e5e988b28f
Adds an incorrect assumed-pixel-mode serialiser.
...
This actually shows something a bit like the Enterprise boot logo.
2021-06-15 22:31:50 -04:00
Thomas Harte
e94e051c87
Adds an allocator for pixels.
2021-06-15 22:03:41 -04:00
Thomas Harte
5fc91effb5
Corrects top border.
2021-06-15 21:48:11 -04:00
Thomas Harte
6c9dacbe89
Stabilises display, albeit that top border mode now appears to be off.
2021-06-15 21:31:07 -04:00
Thomas Harte
6a7eb832cc
Introduces almost-stable block-level frame generation.
2021-06-15 20:55:58 -04:00
Thomas Harte
60cf8486bb
Makes a genuine attempt at real line counting.
...
No output yet though.
2021-06-15 18:57:14 -04:00
Thomas Harte
90b8163d54
Add exposition.
2021-06-15 17:44:39 -04:00
Thomas Harte
a1e4389f63
Give Nick some RAM to inspect and just enough sense to know when it should reload its line parameter table.
2021-06-15 17:43:13 -04:00
Thomas Harte
440b11708b
Adds an unused CRT.
2021-06-14 23:11:48 -04:00
Thomas Harte
f90dce5c54
Take a guess at Nick timing.
2021-06-14 22:56:26 -04:00
Thomas Harte
606c7709cf
Shims in enough to get the Z80 to run perpetually.
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Notably I don't actually currently know how the interrupt registers work, but getting some sort of display running might be the first order of business.
2021-06-14 22:28:31 -04:00
Thomas Harte
1d1e6d1820
Adds a shell of a Nick.
2021-06-14 22:19:25 -04:00
Thomas Harte
3eb4dd74a2
Exposes memory control.
...
Machine now runs as far as trying to interact with Nick.
2021-06-14 21:45:12 -04:00
Thomas Harte
853914480c
Revised guess; there's a jump to C02E almost immediately.
2021-06-14 21:40:19 -04:00
Thomas Harte
fe04410681
Merge branch 'master' into Enterprise
2021-06-14 21:30:49 -04:00
Thomas Harte
1f686c4e6b
Add missing AppleIIOptionsPanel class.
2021-06-14 21:30:30 -04:00
Thomas Harte
2a2ac1227b
Makes first attempt at giving the Z80 something to do.
2021-06-14 21:29:56 -04:00
Thomas Harte
b5340c8f74
Correct syntax.
2021-06-14 21:17:35 -04:00
Thomas Harte
196c4dcdd9
Adds an appropriate ROM request.
2021-06-14 21:17:09 -04:00
Thomas Harte
c5a86f0ef7
Add Enterprise parts of the static analyser.
2021-06-14 21:11:06 -04:00
Thomas Harte
88f2a2940b
Add Enterprise source paths.
2021-06-14 21:07:35 -04:00
Thomas Harte
26b019a4d4
Removes assumption that all machines produce audio.
2021-06-14 21:02:55 -04:00
Thomas Harte
5f7b3ae313
Adds bare minimum to get a non-functional machine.
2021-06-14 21:02:40 -04:00
Thomas Harte
61c127ed2e
Adds Enterprise as a File -> New... machine.
...
And, similarly, exposes it for the route used by SDL.
2021-06-14 20:55:39 -04:00
Thomas Harte
333981e2a7
Merge branch 'master' into Enterprise
2021-06-13 22:22:44 -04:00
Thomas Harte
423fbc9ac7
Merge pull request #949 from TomHarte/QtSnapshotDragAndDrop
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Adds drag-and-drop snapshot support for Qt.
2021-06-13 21:48:42 -04:00
Thomas Harte
1c1719e561
Adds drag-and-drop snapshot support for Qt.
2021-06-13 21:41:20 -04:00
Thomas Harte
56c30e1651
Merge pull request #948 from TomHarte/QtAspectRatio
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Ensures Apple II square pixels work correctly under OpenGL
2021-06-13 21:23:28 -04:00
Thomas Harte
1ea4130035
Avoid OpenGL restretching bug.
2021-06-13 19:46:47 -04:00
Thomas Harte
57713d63fa
Avoids regression of selected tab upon app restart.
2021-06-13 19:38:56 -04:00
Thomas Harte
d18a537509
Fiddles with the preprocessor to make kiosk mode match other OSes even on macOS.
2021-06-13 19:28:05 -04:00
Thomas Harte
8e0a6df03b
Merge branch 'master' into Enterprise
2021-06-10 21:41:57 -04:00
Thomas Harte
95a52a9f62
Merge pull request #947 from TomHarte/AppleIISquarePixels
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Adds optional square pixel output for the Apple II
2021-06-08 18:04:08 -04:00
Thomas Harte
ae2993625c
Add missing header.
2021-06-08 17:54:30 -04:00
Thomas Harte
0982141442
Corrects many minor errors.
2021-06-08 17:52:39 -04:00
Thomas Harte
85fab2abc4
Takes a swing at adding a square pixels toggle for Qt.
2021-06-08 17:37:46 -04:00
Thomas Harte
de3b37799c
Switches to a static_cast. No need for reflection here.
2021-06-08 17:37:28 -04:00
Thomas Harte
70851f3b2d
Resolve misplacement.
2021-06-07 21:43:26 -04:00
Thomas Harte
462bbf2e40
Exposes square pixels option on macOS.
2021-06-07 21:21:45 -04:00
Thomas Harte
778b9ef683
Ensures set_square_pixels is exposed, works around OpenGL aspect ratio bug.
2021-06-07 20:41:02 -04:00
Thomas Harte
96e7eb1bed
Adds a use-square-pixels option for the Apple II.
2021-06-07 20:16:01 -04:00
Thomas Harte
05671f3553
Merge pull request #946 from TomHarte/OptionalOricColourROM
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Introduces a new grammar for ROM requests.
2021-06-06 22:47:46 -04:00
Thomas Harte
6e4832f999
Ensures Oric honours absence of the colour ROM.
2021-06-06 22:43:53 -04:00
Thomas Harte
54e3332673
Ensure optionals appear at the end of any ROM request list.
2021-06-06 22:36:26 -04:00
Thomas Harte
6c559d7556
Fix lead-in text.
2021-06-06 22:02:11 -04:00
Thomas Harte
9165a85484
Correct wstring conversion.
2021-06-06 21:58:38 -04:00
Thomas Harte
98ada2588a
Resolve name confusion.
2021-06-06 21:51:51 -04:00
Thomas Harte
43f686c22d
Correct return type and map insertion.
2021-06-06 21:44:37 -04:00
Thomas Harte
4a2673d757
Make a prima facie attempt to adapt the Qt build.
2021-06-06 20:47:25 -04:00
Thomas Harte
f27e331462
Updates autotests to new RomFetcher world.
2021-06-06 20:34:55 -04:00
Thomas Harte
dd64aef910
Improves request construction and improves descriptions.
2021-06-06 20:25:26 -04:00
Thomas Harte
95971f39f1
Reintroduces full messaging to macOS.
2021-06-06 20:02:13 -04:00
Thomas Harte
83beb3c0e6
Introduces slightly-less manual ROM::Request::visit.
2021-06-06 18:28:02 -04:00
Thomas Harte
76335e5cf2
Factors out and slightly generalises textual descriptions of ROM::Descriptions.
2021-06-06 18:15:00 -04:00
Thomas Harte
4494320238
Corrects the macOS Swift side of things.
2021-06-06 14:56:43 -04:00
Thomas Harte
5acd97c860
Puts enough in place for a GUI-led installation process.
...
... and provides a lot of the Objective-C wiring necessary to expose that to Swift.
2021-06-06 14:24:38 -04:00
Thomas Harte
b0f551c307
Ensures only _missing_ ROMs are reported.
2021-06-05 21:09:35 -04:00
Thomas Harte
b6b3d845a3
Correct Apple IIe and Enhanced IIe startup.
2021-06-04 22:48:08 -04:00
Thomas Harte
505d84f336
Corrects Amstrad 664 and 6128 ROM collection.
2021-06-04 22:43:26 -04:00
Thomas Harte
1d5144b912
Correct no-interrupt signal.
2021-06-04 22:38:07 -04:00
Thomas Harte
deff91e460
Correct Electron name mapping.
2021-06-04 22:25:11 -04:00
Thomas Harte
afd8dc0915
Nudge just far enough to be able to launch again under macOS.
2021-06-04 22:24:31 -04:00
Thomas Harte
fbee74e1fe
Avoids storing or printing a CRC if none is known.
2021-06-04 22:03:08 -04:00
Thomas Harte
ccd82591aa
Reinstates SDL error message; adds expansion of ~.
2021-06-04 21:53:56 -04:00
Thomas Harte
64931e476d
Completes transcription of ROM details with the Oric and MSX.
2021-06-04 19:50:49 -04:00
Thomas Harte
604a715a49
Transcribes the Spectrum, Electron, Master System and Vic-20 ROMs.
2021-06-04 19:45:47 -04:00
Thomas Harte
24757ef20c
Transcribes the Macintosh, Atari ST, ColecoVision and ZX80/81 ROMs.
2021-06-04 19:24:57 -04:00
Thomas Harte
e36cc9e777
Transcribes the Apple II ROM descriptions.
2021-06-04 19:19:55 -04:00
Thomas Harte
2e999889bd
Attempts to implement tree construction.
2021-06-04 19:03:07 -04:00
Thomas Harte
f4db4c3a73
Implements ROM::Request::validate.
...
It now also validates ROM sizes, so can no longer take a const Map.
2021-06-04 18:54:50 -04:00
Thomas Harte
d923fe72c0
Resolves various ROM selection warnings.
2021-06-03 22:46:47 -04:00
Thomas Harte
f05cdd5e34
With large swathes of implementation missing, compiles.
2021-06-03 22:39:18 -04:00
Thomas Harte
f9954619d4
Add missing header file.
2021-06-03 22:28:30 -04:00
Thomas Harte
0aa8c3c40d
For SDL at least, advances to failed linking.
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... and with error reporting currently AWOL.
2021-06-03 22:22:56 -04:00
Thomas Harte
a30eeaab6a
Starts to introduce a new grammar for ROM requests.
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They can be optional, and chained together in AND or OR combinations. A central catalogue knows the definitions of all ROMs.
2021-06-03 21:55:59 -04:00
Thomas Harte
3858e79579
Merge pull request #944 from TomHarte/SDLErrorReporting
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Improve SDL failed-ROM reporting.
2021-05-30 19:50:53 -04:00
Thomas Harte
b4a5fa33b0
Improve SDL failed-ROM reporting.
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Specifically to include all paths tried, and not use the plural for 'crc32' when only one is present.
2021-05-30 19:40:29 -04:00
Thomas Harte
2a6e9c5e8a
Add readme for Enterprise ROM names.
2021-05-30 19:28:26 -04:00
Thomas Harte
488c2aed51
Merge pull request #939 from TomHarte/DragAndDropState
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Accept insertion of state snapshots into existing windows
2021-05-16 20:47:36 -04:00
Thomas Harte
5483f979dc
Merge branch 'master' into DragAndDropState
2021-05-16 20:42:44 -04:00
Thomas Harte
ea11f3826a
Merge pull request #941 from TomHarte/LargeDSK
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Adds support for Macintosh SCSI drive images.
2021-05-13 19:17:18 -04:00
Thomas Harte
ceae81a332
Add missing header.
2021-05-13 19:11:19 -04:00
Thomas Harte
50ea56e908
Adds support for Macintosh SCSI device images.
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This is now in addition to the single-partition images previously supported.
2021-05-13 19:06:00 -04:00
Thomas Harte
bfb2f79cff
That's two learning curves.
2021-05-10 21:33:40 -04:00
Thomas Harte
8268e8ee4c
Ensures music survives a machine switch.
2021-05-08 20:46:17 -04:00
Thomas Harte
cb31e22f59
Merge branch 'master' into DragAndDropState
2021-05-08 20:41:44 -04:00
Thomas Harte
6752f4fd73
Merge pull request #940 from TomHarte/TighterTapeStop
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Tightens automatic tape control timing.
2021-05-08 18:21:14 -04:00
Thomas Harte
22c31e4f55
Tightens automatic tape control timing.
2021-05-08 17:34:59 -04:00
Thomas Harte
c2ff64c1e0
Removes dangling OpenGL reference, attempts to ensure audio handover upon a machine change.
2021-05-08 14:42:43 -04:00
Thomas Harte
4db792591a
macOS: ensure activity and options panels change upon a drag-and-drop state.
2021-05-08 14:35:57 -04:00
Thomas Harte
1290a8e32b
SDL: Ensures joysticks, mouse, LEDs, etc, all update to a dragged state snapshot.
2021-05-08 13:30:07 -04:00
Thomas Harte
8ae38991b0
Factor out machine wiring.
2021-05-08 13:15:18 -04:00
Thomas Harte
6d40549c0c
Merge branch 'master' into DragAndDropState
2021-05-07 21:56:36 -04:00
Thomas Harte
93d5c9a3c7
Tighten wording further.
2021-05-07 18:55:15 -04:00
Thomas Harte
9af6c0b37a
Improves comment.
2021-05-06 12:57:32 -04:00
Thomas Harte
7e3528c692
Shunt the tech/URL stuff below the headline feature list.
2021-05-06 09:44:40 -04:00
Thomas Harte
41f2fc51be
Clarify second sentence.
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As per discussion at https://www.retrogameboards.com/t/clock-signal-a-multi-platform-emulator-that-focuses-on-a-better-user-experience/2375 — the previous could be read as "no emulator | or per-emulated-machine learning curve". But there is an emulator.
2021-05-06 09:43:19 -04:00
Thomas Harte
11228dc265
Merge pull request #937 from TomHarte/XKeySyms
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Eliminate magic constants in Qt/X11 keyboard code.
2021-05-05 22:21:31 -04:00
Thomas Harte
ef50967793
Limit X11 linkage to Linux.
2021-05-05 22:17:24 -04:00
Thomas Harte
5f6c08b7e0
Avoid partial struct instantiation.
2021-05-05 22:00:50 -04:00
Thomas Harte
6cb23ec5be
Tidy up and comment.
2021-05-05 21:58:54 -04:00
Thomas Harte
1bae70bcf8
Correct capitalisation.
2021-05-05 21:49:01 -04:00
Thomas Harte
9820591ba4
Corrects enum references.
2021-05-05 21:46:34 -04:00
Thomas Harte
77071b3c69
Adds KeySym -> key lookup.
2021-05-05 21:41:59 -04:00
Thomas Harte
335e839b31
Wrangles a single working call to XKeysymToKeycode.
2021-05-05 21:35:08 -04:00
Thomas Harte
6fe947b8b9
Fix class name, add constructor.
2021-05-05 19:17:23 -04:00
Thomas Harte
22b29e77a7
Add keyboard.cpp/h to the Qt project.
2021-05-05 19:06:25 -04:00
Thomas Harte
4858cfce6b
Starts to factor out the keyboard mapper.
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The more easily to clarify as to #includes, etc, and to allow for a relevant constructor.
2021-05-05 18:56:10 -04:00
Thomas Harte
8da3e91f5e
Merge branch 'master' into XKeySyms
2021-05-03 22:23:55 -04:00
Thomas Harte
012235bfeb
Merge pull request #936 from TomHarte/Style
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Correct minor style errors.
2021-05-03 22:23:27 -04:00
Thomas Harte
052e284c33
Add overt fallthrough.
2021-05-03 22:17:43 -04:00
Thomas Harte
32e3dd71b1
Be overt in empty std::string construction.
2021-05-03 22:17:32 -04:00
Thomas Harte
95f4272919
Make sure size_t is visible.
2021-05-03 22:17:25 -04:00
Thomas Harte
00679b6135
t may be unused, per the if constexpr.
2021-05-03 22:17:19 -04:00
Thomas Harte
2c18bb4508
Make it overt that this can't return without a value.
2021-05-03 22:17:12 -04:00
Thomas Harte
0cf1c9040a
Add missing fallthrough declaration.
2021-05-03 22:17:06 -04:00
Thomas Harte
9196341482
Retrenches: it seems nativeVirtualKey does what I want.
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Hooray!
2021-05-03 21:45:53 -04:00
Thomas Harte
685140a4c2
Correct Qt -> QT.
2021-05-03 21:18:14 -04:00
Thomas Harte
1465b0ee4d
Shunt X11 code to bottom of file, to avoid #include interference.
2021-05-03 21:15:20 -04:00
Thomas Harte
0bf6b765d3
Further namespace/name corrections.
2021-05-03 21:11:47 -04:00
Thomas Harte
4774676e2a
Correct keypad symbols, push X11 into a namespace.
2021-05-03 21:09:01 -04:00
Thomas Harte
9c29655da2
Add x11extras as per use of <QX11Info>.
2021-05-03 20:43:22 -04:00
Thomas Harte
c8ab18f2b6
Add overt fallthrough.
2021-05-03 20:38:50 -04:00
Thomas Harte
8ebce466db
Be overt in empty std::string construction.
2021-05-03 20:35:23 -04:00
Thomas Harte
1b39b17125
Make sure size_t is visible.
2021-05-03 20:33:25 -04:00
Thomas Harte
5a46853075
t may be unused, per the if constexpr.
2021-05-03 20:32:16 -04:00
Thomas Harte
48ad4d4c4c
Make it overt that this can't return without a value.
2021-05-03 20:31:39 -04:00
Thomas Harte
056a036712
Add missing fallthrough declaration.
2021-05-03 20:31:13 -04:00
Thomas Harte
70eaa79108
Makes an attempt to use X11 KeySyms.
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Rather than hard-coding a mapping.
2021-05-03 18:51:58 -04:00
Thomas Harte
20c814a4dd
Factors out boilerplate around full-device sector images.
2021-05-01 21:10:46 -04:00
Thomas Harte
6a052e1900
Starts working on SDL drag-and-drop support for snapshots.
2021-04-30 22:56:13 -04:00
Thomas Harte
cecdf8584a
Ensures proper propagation of will_change_owner.
2021-04-30 22:51:26 -04:00
Thomas Harte
4758bc8615
Attempts to support insertion of states into existing windows.
2021-04-30 21:37:41 -04:00
Thomas Harte
c906dc3c0a
Merge pull request #935 from TomHarte/OricJoystick
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Adds Altai-style joystick support for the Oric.
2021-04-29 20:15:42 -04:00
Thomas Harte
d1dcb41b6f
Adds Altai-style joystick support.
2021-04-29 18:29:29 -04:00
Thomas Harte
96ac86a757
Merge pull request #934 from TomHarte/OricTapes
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Relaxes Oric .tap signature check.
2021-04-29 18:14:36 -04:00
Thomas Harte
4919786825
Relaxes Oric .tap signature check.
2021-04-29 18:00:02 -04:00
Thomas Harte
24b4185714
Merge pull request #933 from TomHarte/SpectrumJoystick
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Adds ZX Spectrum joystick support.
2021-04-28 21:08:36 -04:00
Thomas Harte
ad10d0037a
Inverts the Game Controller Framework value of the y axis.
2021-04-28 20:31:35 -04:00
Thomas Harte
b6554c8255
Adds joystick support.
2021-04-28 20:19:01 -04:00
Thomas Harte
01dc83d0d6
Merge pull request #932 from MaddTheSane/xcodemaintenance
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Xcode maintenance.
2021-04-27 19:53:51 -04:00
C.W. Betts
2fd08789ab
Xcode maintenance.
2021-04-27 12:50:26 -06:00
Thomas Harte
bc9e529995
Merge pull request #931 from TomHarte/FieldName
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This field is counted in half-cycles.
2021-04-26 21:33:38 -04:00
Thomas Harte
708c24cc57
This field is counted in half-cycles.
2021-04-26 21:20:32 -04:00
Thomas Harte
7fb3048257
Update AllDisk and AllTape.
2021-04-26 21:04:25 -04:00
Thomas Harte
9319f0525a
Merge pull request #930 from TomHarte/SZX
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Adds SZX support.
2021-04-26 20:57:06 -04:00
Thomas Harte
b7a62e0121
Adds SZX support.
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Tweaking exposed Spectrum state object as relevant.
2021-04-26 20:47:28 -04:00
Thomas Harte
bd5dd9b9a3
Merge pull request #929 from TomHarte/SpectrumSnapshots
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Adds loading of state snapshots for the ZX Spectrum
2021-04-26 17:44:02 -04:00
Thomas Harte
3348167c46
Ensures AY registers are conveyed.
2021-04-26 17:39:11 -04:00
Thomas Harte
700c505974
Ensures the ZX Spectrum properly reports its display type.
2021-04-25 21:16:22 -04:00
Thomas Harte
d403036d86
Reduce bounce at Spectrum startup.
2021-04-25 20:56:57 -04:00
Thomas Harte
5e08d7db39
Carries through paging state; avoids file rereads.
2021-04-25 20:46:49 -04:00
Thomas Harte
c34cb310a8
Switches to more straightforward handler for .z80-style compression.
2021-04-25 18:07:36 -04:00
Thomas Harte
8d86aa69bc
Adds an assert to check handling of compressed data.
2021-04-25 18:02:31 -04:00
Thomas Harte
cc41ccc5f1
Adds RAM deserialisation.
2021-04-25 17:55:52 -04:00
Thomas Harte
e6252fe0ed
Sneaks up towards loading RAM.
2021-04-25 17:34:43 -04:00
Thomas Harte
03577de675
Adds an empty vessel for .z80 support.
2021-04-25 16:54:34 -04:00
Thomas Harte
205518ba75
Switch to more efficient copy.
2021-04-25 16:51:07 -04:00
Thomas Harte
2510064218
Completes state object.
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Subject to not yet dealing with last_fetches_ and last_contended_access_ correctly. Thought required.
2021-04-25 14:20:40 -04:00
Thomas Harte
0ef2806970
Adds just enough to ensure that border state gets through.
2021-04-25 14:16:35 -04:00
Thomas Harte
d80f03e369
Corrects longstanding deviation from naming convention.
2021-04-25 14:11:36 -04:00
Thomas Harte
fd271d920b
Adds capture and forwarding of border colour.
2021-04-25 14:00:12 -04:00
Thomas Harte
2bbf8bc9fa
Ensures 16/48kb snapshots are properly copied into place.
2021-04-25 13:27:11 -04:00
Thomas Harte
9b65d56ed0
Resolves potential flaw in POPping here.
2021-04-25 13:26:53 -04:00
Thomas Harte
a5098a60ec
Attempts to get in-SNA software to start.
2021-04-25 13:18:26 -04:00
Thomas Harte
0ebd900e40
Baby steps: apply Z80 state.
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As far as it currently is. Since SNA is leaving the PC at the default of 0x0000, this currently has no visible effect.
2021-04-25 13:03:24 -04:00
Thomas Harte
7aeb17ac92
Corrects HeaderDoc/etc directive.
2021-04-25 13:01:23 -04:00
Thomas Harte
cc78bfb229
Forwards most of the Z80 state.
2021-04-25 13:00:43 -04:00
Thomas Harte
485c2a866c
Without yet a struct for Spectrum states, at least checks general wiring.
2021-04-24 23:38:00 -04:00
Thomas Harte
5b419ca5bf
Add State folder to Scons and Qt projects.
2021-04-24 23:25:08 -04:00
Thomas Harte
14ae579fca
Add further note to future self.
2021-04-24 23:19:41 -04:00
Thomas Harte
1c2ea0d7fe
unique_ptr makes more sense here.
2021-04-24 23:19:30 -04:00
Thomas Harte
e7a9ae18a1
Introduce further default state.
2021-04-24 23:18:00 -04:00
Thomas Harte
d61f478a39
Basic sketch for state snapshots: an extra field on Target.
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I think it doesn't make sense for states to own a target as that complicates the concept of Media. Plus they're distinct because it makes sense to have only one per Target. Let's see how this pans out.
2021-04-24 23:17:47 -04:00
Thomas Harte
9cc747b3e2
Resolves potential source of errors: specifying incorrect table size.
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(Having made exactly this mistake with the ZX Spectrum)
2021-04-24 12:10:28 -04:00
Thomas Harte
2f223f7db2
Spectrum emulation is no longer +2a/+3 specific.
2021-04-23 22:55:54 -04:00
Thomas Harte
17f11a3be3
Merge pull request #928 from TomHarte/ContentionTests
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Add timing tests, fix +3 discrepancy.
2021-04-23 22:54:34 -04:00
Thomas Harte
37dcf61130
Add timing tests, fix +3 discrepancy.
2021-04-23 22:29:57 -04:00
Thomas Harte
856ebfacca
Merge pull request #927 from TomHarte/SimplifiedTiming
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Moves horizontal sync on the 48kb.
2021-04-21 19:50:40 -04:00
Thomas Harte
9731fdd33b
Moves horizontal sync on the 48kb.
2021-04-21 19:46:44 -04:00
Thomas Harte
5ea605ccf7
Merge pull request #926 from TomHarte/SimplifiedTiming
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Attempts more cleanly to express ZX Spectrum timing.
2021-04-21 19:46:23 -04:00
Thomas Harte
d0c789ff9a
Locks declarative form of contention closer to regular expressions.
2021-04-21 19:37:36 -04:00
Thomas Harte
9baa861742
Simplifies timing calculation expression.
2021-04-21 19:18:07 -04:00
Thomas Harte
30a1a53c97
Merge pull request #925 from TomHarte/ZXROMSpeed
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Corrects timing error in Spectrum 48kb and 128kb ROM accesses.
2021-04-21 18:54:16 -04:00
Thomas Harte
bdb1b7e77c
Reinstate the +2 as the default Spectrum.
2021-04-21 18:49:39 -04:00
Thomas Harte
9293bcbc88
Exclude the ROM from contention on 48kb and 128kb models.
2021-04-21 18:49:18 -04:00
Thomas Harte
c481f475e7
Merge pull request #923 from TomHarte/STStartup
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Resolves failure of ST to startup
2021-04-20 22:43:55 -04:00
Thomas Harte
ef01471e17
Ensures the DMA controller remains clocked.
2021-04-20 22:34:13 -04:00
Thomas Harte
73c8157197
Retain 6850 time tracking at all times.
2021-04-20 22:26:43 -04:00
Thomas Harte
af1dc2d3b2
Switches to correct non-value sentinel.
2021-04-20 21:56:58 -04:00
Thomas Harte
8f6b3feee1
Merge pull request #921 from TomHarte/Plus2aDefault
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Switches default machine back to +2a.
2021-04-19 22:15:48 -04:00
Thomas Harte
a20f5528b7
Switches default machine back to +2a.
2021-04-19 22:04:49 -04:00
Thomas Harte
f48876d80e
Merge pull request #920 from TomHarte/AppleIIVirtual
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Disambiguates `reset_all_keys`.
2021-04-19 22:03:01 -04:00
Thomas Harte
db52f13c32
Disambiguates reset_all_keys.
2021-04-19 21:49:06 -04:00
Thomas Harte
2590769d3f
Merge pull request #919 from TomHarte/XcodeProjectTweaks
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Increases warnings, cleans up a touch.
2021-04-19 21:33:04 -04:00
Thomas Harte
5667dcac36
Increases warnings, cleans up a touch.
2021-04-19 21:28:12 -04:00
Thomas Harte
bec71ead39
Merge pull request #918 from TomHarte/macOS13
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Reintroduces macOS 10.13 support.
2021-04-19 21:12:57 -04:00
Thomas Harte
e4d9022d37
Returns deployment target to 10.13.
2021-04-19 20:57:56 -04:00
Thomas Harte
572be48f38
Attempts to add an early exit for non-Metal Macs.
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This will be necessary only prior to 10.14.
2021-04-19 20:55:25 -04:00
Thomas Harte
6f4ccebfa1
Merge pull request #917 from TomHarte/InterruptAddress
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Put the program counter on the bus during interrupt acknowledge.
2021-04-19 20:08:22 -04:00
Thomas Harte
77fcf52d27
Purely style: remove some redundant nullptrs.
2021-04-19 18:53:00 -04:00
Thomas Harte
79c2bc1fd7
Put the program counter on the bus during interrupt acknowledge.
2021-04-19 18:43:50 -04:00
Thomas Harte
76370d9418
Merge pull request #916 from TomHarte/OffByOne
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Corrects off-by-one timing errors in the ZX Spectrum.
2021-04-18 20:25:13 -04:00
Thomas Harte
7bac18bd65
Address bus load time is not + 1/2.
2021-04-18 18:41:24 -04:00
Thomas Harte
704737144a
Corrects all interrupt timing for sign and off-by-one errors.
2021-04-18 18:40:44 -04:00
Thomas Harte
2a9c73a1d3
Merge pull request #915 from TomHarte/SpectrumSDLOptions
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Adds display of Spectrum command-line options.
2021-04-18 12:08:02 -04:00
Thomas Harte
e87e851401
Add a redundant but idiomatic initial value.
2021-04-18 11:56:22 -04:00
Thomas Harte
80d4846a27
Respond with 0xff during an interrupt acknowledge.
2021-04-18 11:56:00 -04:00
Thomas Harte
9fd53c9c91
Adds the ZX Spectrum to ::AllMachines.
2021-04-17 23:06:37 -04:00
Thomas Harte
53eae873d8
Merge pull request #913 from TomHarte/LowerModelTiming
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Brings timings into line with WoS specs.
2021-04-16 22:45:54 -04:00
Thomas Harte
93422f4b1c
Brings timings into line with WoS specs.
2021-04-16 22:40:51 -04:00
Thomas Harte
06cedb2e50
Merge pull request #912 from TomHarte/128kDecoding
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Corrects Spectrum 128kb partial decoding.
2021-04-16 22:02:25 -04:00
Thomas Harte
7fdb1d848b
Corrects Spectrum 128kb partial decoding.
2021-04-16 21:54:52 -04:00
Thomas Harte
246fd9442f
Merge pull request #911 from TomHarte/48kbSpectrum
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Adds the 48kb and 128kb Spectrums.
2021-04-15 22:25:07 -04:00
Thomas Harte
eb99a64b29
Adds new Spectrum models to Qt UI.
2021-04-15 22:20:34 -04:00
Thomas Harte
d7954a4cb1
Tweaks timing a little.
2021-04-15 21:51:49 -04:00
Thomas Harte
ef636da866
Attempts 48/128kb floating bus behaviour.
2021-04-15 21:19:21 -04:00
Thomas Harte
fa18b06dbf
Correct get_floating_value to be consistent in out-of-bounds behaviour.
2021-04-15 21:13:36 -04:00
Thomas Harte
349b9ce502
Don't post contended accesses other than on the +2a/+3.
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Those machines have an actual latch for this stuff, the others don't.
2021-04-15 21:13:06 -04:00
Thomas Harte
b2cf121410
Regresses default to the more-compatible +2.
2021-04-15 19:31:45 -04:00
Thomas Harte
71cf63bd35
Corrects internal cycle contention.
2021-04-15 19:17:11 -04:00
Thomas Harte
d1bb3aada4
Attempts to complete the in-machine application of contention.
2021-04-15 18:57:34 -04:00
Thomas Harte
b4214c6e08
Blocks off the AY from inputs in 48kb mode.
2021-04-15 18:04:16 -04:00
Thomas Harte
f5c7746493
Extends fast loading support to the just-introduced models.
2021-04-15 17:31:42 -04:00
Thomas Harte
f10ec80153
Gets started on different video timings.
2021-04-14 22:23:27 -04:00
Thomas Harte
0af405aa46
Starts working in the 48kb and 128kb Spectrums.
2021-04-14 21:37:10 -04:00
Thomas Harte
cf481effa6
Merge pull request #910 from TomHarte/FastContention
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Establishes that the 48/128kb contention patterns can be derived from my partial machine cycles alone.
2021-04-14 20:21:52 -04:00
Thomas Harte
a1511f9600
Establishes that the 48/128kb contention patterns can be derived from my partial machine cycles alone.
2021-04-14 20:15:40 -04:00
Thomas Harte
325e2b3941
Merge pull request #902 from TomHarte/Z80Lines
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Spell out, test and correct Z80 bus activity.
2021-04-13 22:22:26 -04:00
Thomas Harte
7017324d60
r_step is obsolete now that I know that [DD/FD]CB don't have a refresh cycle.
2021-04-13 22:17:30 -04:00
Thomas Harte
deb5d69ac7
Consolidates macros.
2021-04-13 22:11:28 -04:00
Thomas Harte
68a04f4e6a
Adds IN/OUT I/D [R] to complete tests.
2021-04-13 22:00:24 -04:00
Thomas Harte
0d61902b10
Adds CP[I/D/IR/DR] tests.
2021-04-13 20:03:11 -04:00
Thomas Harte
3eec210b30
Adds LDI/LDD/LDIR/LDDR tests.
2021-04-13 20:00:29 -04:00
Thomas Harte
5998f3b35b
Corrects LD[I/D/IR/DR] timing.
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Macro cleanup to come.
2021-04-13 20:00:18 -04:00
Thomas Harte
869567fdd9
Corrects EX (SP), HL breakdown.
2021-04-13 19:45:48 -04:00
Thomas Harte
2e70b5eb9f
Advances to EX (SP), HL, leaving only [LD/CP/IN/OT][I/D]{R}.
2021-04-13 19:45:29 -04:00
Thomas Harte
8a3bfb8672
Adds an IN/OUT test.
2021-04-13 17:55:51 -04:00
Thomas Harte
06f1e64177
Advances to IO.
2021-04-12 21:41:20 -04:00
Thomas Harte
b42780173a
Establishes that there really is no Read4 and Read4Pre distinction.
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Will finish these unit tests, then clean up.
2021-04-12 20:54:10 -04:00
Thomas Harte
36c8821c4c
Reaches the halfway point in tests.
2021-04-12 17:29:03 -04:00
Thomas Harte
947de2d54a
Switches five-cycle read to a post hoc pause.
2021-04-12 17:17:08 -04:00
Thomas Harte
9347fe5f44
Advances to next failing test: LD (ii+n), n.
2021-04-12 17:11:58 -04:00
Thomas Harte
e82367def3
Switches to test-conformant behaviour for (IX/IY+n) opcode fetches.
2021-04-11 23:01:00 -04:00
Thomas Harte
9cde7c12ba
Shifts responsibility for refresh into the fetch-decode-execute sequence.
2021-04-11 22:50:24 -04:00
Thomas Harte
015556cc91
Switch (ii+n) to Read4Pre.
2021-04-11 10:26:14 -04:00
Thomas Harte
47c5a243aa
Restructures, the better to explore errors.
2021-04-10 21:32:42 -04:00
Thomas Harte
070e359d82
Introduces failing test for BIT b, (ii+n).
2021-04-10 18:00:23 -04:00
Thomas Harte
b397059d5e
Moves read time in Read4Pre.
2021-04-10 17:54:20 -04:00
Thomas Harte
400f54e508
Introduces failing test for bit b, (hl).
2021-04-10 12:04:48 -04:00
Thomas Harte
e0736435f8
Makes assumption that the address bus just holds its value during an internal operation.
2021-04-10 12:00:53 -04:00
Thomas Harte
b09c5538c6
Adds failing test for simple (ii+n) tests.
2021-04-09 21:28:35 -04:00
Thomas Harte
ce3d2913bf
Advances to 9 source table rows tested out of 37.
2021-04-09 20:38:17 -04:00
Thomas Harte
87202a2a27
Add two further tests, add checking of collected data size for all tests.
2021-04-09 18:32:03 -04:00
Thomas Harte
818a4dff25
Corrects ADD HL, dd test.
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Or, at least, likely corrects. The bus cycle breakdown in the Z80 data sheet implies these accesses should come after completion of the refresh cycle, not during its long tail, so I think +1 is correct.
2021-04-08 22:23:15 -04:00
Thomas Harte
eacffa49f5
Exposes IR during 'internal' operations.
2021-04-08 22:22:26 -04:00
Thomas Harte
9e506c3206
Adds failing ADD hl, dd test.
2021-04-08 22:19:22 -04:00
Thomas Harte
29cf80339a
Corrects too-short buffer.
2021-04-08 22:15:03 -04:00
Thomas Harte
50f53f7d97
Adds INC/DEC rr and LD SP, HL tests.
2021-04-08 22:14:53 -04:00
Thomas Harte
73fbd89c85
Correct opcodes, ability to terminate on a single-cycle contention.
2021-04-08 22:09:33 -04:00
Thomas Harte
f74fa06f2d
Introduces failing test for LD [A/I/R], [A/I/R].
2021-04-08 20:28:55 -04:00
Thomas Harte
ee989ab762
Fills in the rest of the simple two-byte instructions.
2021-04-08 20:13:52 -04:00
Thomas Harte
818655a9b6
Starts on two-bus-cycle instructions, correcting validators.
2021-04-08 20:01:46 -04:00
Thomas Harte
57a7e0834f
Corrects sampling of MREQ.
2021-04-08 19:21:35 -04:00
Thomas Harte
cd787486d2
Tests all of the single-byte, no-access opcodes.
2021-04-07 22:07:52 -04:00
Thomas Harte
67fd6787a6
Builds what I think I need to validate Z80 address, MREQ, IOREQ and RFSH.
2021-04-07 21:57:40 -04:00
Thomas Harte
627b96f73c
Merge branch 'master' into Z80Lines
2021-04-07 21:02:15 -04:00
Thomas Harte
8a6985c2e8
Merge pull request #909 from TomHarte/BackToFive
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Tweaks video timing, again.
2021-04-06 21:16:50 -04:00
Thomas Harte
60e8273de2
Tweaks video timing, again.
2021-04-06 21:04:54 -04:00
Thomas Harte
aa8ce5c1ac
Merge pull request #908 from TomHarte/ZXSpectrumInterrupts
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Better indicate ZX Spectrum interrupt timing.
2021-04-06 13:49:25 -04:00
Thomas Harte
dd28246f9f
Better indicate interrupt timing.
2021-04-06 12:06:13 -04:00
Thomas Harte
dc25a60b9b
Merge pull request #907 from TomHarte/TMSSequencePoints
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Makes the TMS a sequence-point-generating JustInTimeActor.
2021-04-06 12:03:22 -04:00
Thomas Harte
094d623485
Updates unit tests.
2021-04-05 21:33:04 -04:00
Thomas Harte
1266bbb224
Makes the TMS a sequence-point-generating JustInTimeActor.
2021-04-05 21:02:37 -04:00
Thomas Harte
bd1ea5740a
Merge pull request #906 from TomHarte/LoadingImprovements
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Attempts to improve ZX fast-loading compatibility
2021-04-05 19:20:46 -04:00
Thomas Harte
3e04b51122
Walks back pretty names. Probably a bad idea.
2021-04-05 17:26:18 -04:00
Thomas Harte
76f2aba51a
Makes use of pretty names in descriptions optional.
2021-04-05 17:24:16 -04:00
Thomas Harte
fd88071c0a
Remove further detritus.
2021-04-05 17:21:26 -04:00
Thomas Harte
16bfe1a55c
Resolves use-after-return memory error.
2021-04-04 22:45:56 -04:00
Thomas Harte
90c3d6a1e8
Attempts a later interception of tape loading.
2021-04-04 22:39:30 -04:00
Thomas Harte
18d6197d6c
Makes provision for pretty-printed key names.
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i.e. keys that don't fit C++ naming rules.
2021-04-04 22:20:35 -04:00
Thomas Harte
27eddf6dff
Merge pull request #905 from TomHarte/JustInTimeOric
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Adopts JustInTimeActor in the Oric.
2021-04-04 20:57:52 -04:00
Thomas Harte
57b32d9537
Avoid adding additional threading constraints.
2021-04-04 20:48:15 -04:00
Thomas Harte
837b9499d5
Translates Oric video and Disk II into JustInTimeActors.
2021-04-04 20:43:16 -04:00
Thomas Harte
c2fde2b147
Merge pull request #900 from TomHarte/SpeccyTiming
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Further tweaks Spectrum timing.
2021-04-04 20:19:54 -04:00
Thomas Harte
f26bf4b9e4
Splitting here isn't achieving anything.
2021-04-04 19:52:38 -04:00
Thomas Harte
1da51bee6c
14368 and six seem to be the proper numbers, per my comprehension of Patrick Rak.
2021-04-04 19:52:19 -04:00
Thomas Harte
5a66956221
Merge branch 'master' into SpeccyTiming
2021-04-04 19:12:37 -04:00
Thomas Harte
91d973c4a9
Merge pull request #904 from TomHarte/JITElectron
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Moves the Electron to JustInTimeActor video.
2021-04-04 19:12:06 -04:00
Thomas Harte
fa79589db8
Minor style improvements.
2021-04-04 18:59:46 -04:00
Thomas Harte
e52649f74d
Normalises logging.
2021-04-04 17:39:49 -04:00
Thomas Harte
d77ddaf4fa
Switches the Electron to JustInTimeActor video.
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Also reorders template parameters; I think that specifying a different time base is likely to be more common than using a divider.
2021-04-04 17:33:49 -04:00
Thomas Harte
9ff392279a
Merge pull request #895 from TomHarte/JITSleeper
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Works `ClockingHint` logic into `JustInTimeActor`.
2021-04-04 17:11:05 -04:00
Thomas Harte
448d9dc3e1
Correct article.
2021-04-04 16:14:47 -04:00
Thomas Harte
afb4e6d37d
Merge branch 'master' into JITSleeper
2021-04-04 15:37:19 -04:00
Thomas Harte
158122fbf4
Determine TargetTimeScale automatically.
2021-04-04 15:37:07 -04:00
Thomas Harte
417ece2386
Adds a couple of TODOs and some further documentation.
2021-04-04 00:25:22 -04:00
Thomas Harte
77b241af4f
Eliminates unused RealTimeActor, provides more feedback from +=, gets specific as to nodiscards.
2021-04-03 21:26:43 -04:00
Thomas Harte
25b8c4c062
Provide clearer failure case.
2021-04-03 21:04:44 -04:00
Thomas Harte
1be88a5308
Remove first draft.
2021-04-02 07:39:22 -04:00
Thomas Harte
294280a94e
Spells out everything except interrupt acknowledge.
2021-04-02 07:38:06 -04:00
Thomas Harte
32aebfebe0
Starts spelling out meaning of the Z80's partial machine cycles.
2021-04-02 07:37:56 -04:00
Thomas Harte
14663bd06b
I think 3 is what I'm aiming for here.
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But this probably isn't correct for IO cycles.
2021-04-02 07:36:57 -04:00
Thomas Harte
68abd197aa
'Dock' is a common noun here.
2021-04-02 07:11:28 -04:00
Thomas Harte
18fd21eae7
Merge pull request #901 from TomHarte/ReadMeClarity
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Clarifies the object in the 'Single-click Loading' readme section
2021-04-01 23:25:01 -04:00
Thomas Harte
3296347370
Hit this point even harder.
2021-04-01 23:22:47 -04:00
Thomas Harte
28c9463e0d
Clarify object.
2021-04-01 23:18:20 -04:00
Thomas Harte
044ac949ba
Rearrange fields.
2021-04-01 12:44:00 -04:00
Thomas Harte
87317f5673
Improve documentation, pin down read/write times.
2021-04-01 12:38:58 -04:00
Thomas Harte
5e21a49841
Merge pull request #898 from TomHarte/LoadingImprovements
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Include AF' in Z80 state.
2021-03-31 23:08:43 -04:00
Thomas Harte
687c05365e
Flushes before set_last_contended_area_access.
2021-03-31 22:52:41 -04:00
Thomas Harte
4f80523828
Tweaks contended timing.
2021-03-31 22:51:20 -04:00
Thomas Harte
76299a2add
Include AF' in Z80 state.
2021-03-29 22:58:52 -04:00
Thomas Harte
48f794dc2d
Merge pull request #897 from TomHarte/LoadingImprovements
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Corrects Spectrum TAP `is_at_end`.
2021-03-29 15:27:06 -04:00
Thomas Harte
51b8dcd011
Fixes is_at_end — must be at end of file and have finished final block.
2021-03-28 23:25:29 -04:00
Thomas Harte
acdbd88b9e
Merge pull request #896 from TomHarte/FastLoadUponInsert
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Ensure CPC and Spectrum update fast-tape flag upon media insertion.
2021-03-28 11:44:01 -04:00
Thomas Harte
00a3a3c724
Merge pull request #894 from TomHarte/AYCleanup
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Uses `GI::AY38910::Utility` far and wide.
2021-03-28 11:43:43 -04:00
Thomas Harte
729edeac6c
Ensure CPC and Spectrum update fast-tape flag upon media insertion.
2021-03-27 18:08:46 -04:00
Thomas Harte
faaa4961ed
Attempts to rely on JustInTimeActor's built-in ClockingHint::Observer.
2021-03-26 23:54:08 -04:00
Thomas Harte
7937cc2d0f
Imputes ClockingHint::Observer logic into JustInTimeActor.
2021-03-26 23:44:15 -04:00
Thomas Harte
8a11a5832c
Uses GI::AY38910::Utility far and wide.
2021-03-26 23:19:47 -04:00
Thomas Harte
53ba0e67d1
Revert change to screenshot destination.
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For a sandboxed app, there's a lot more to it than this.
2021-03-25 22:44:18 -04:00
Thomas Harte
e8825aeada
Merge pull request #893 from TomHarte/DesktopScreenshots
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Switches to a more compact macOS machine picker
2021-03-25 22:42:56 -04:00
Thomas Harte
e90e30e766
Enables start by double-click.
2021-03-25 17:53:07 -04:00
Thomas Harte
9f6bb325e6
Fixes longstanding issue with initial target for input.
2021-03-25 17:48:48 -04:00
Thomas Harte
6e2c65435a
Tweaks cell height slightly further.
2021-03-25 17:44:46 -04:00
Thomas Harte
052ab44f1c
Adds a title and adjusts aspect ratio.
2021-03-25 17:37:40 -04:00
Thomas Harte
daa5679241
Don't allow cell editing, lock size.
2021-03-25 16:48:11 -04:00
Thomas Harte
e055668554
With no space constraint, this can be 'ZX Spectrum'.
2021-03-25 16:27:12 -04:00
Thomas Harte
c96829c29e
Adds a table view to control tab selection.
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This should allow the new machine dialogue to retain a sensible width from here onwards.
2021-03-25 16:25:11 -04:00
Thomas Harte
c88abed2dc
Merge branch 'master' into DesktopScreenshots
2021-03-24 21:47:40 -04:00
Thomas Harte
e42b6cb3c8
Merge pull request #892 from TomHarte/FixedFloatingBus
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Attempts to implement proper floating bus behaviour.
2021-03-24 21:44:01 -04:00
Thomas Harte
465ecc4a78
Attempts to implement proper floating bus behaviour.
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As per http://sky.relative-path.com/zx/floating_bus.html
2021-03-24 20:23:33 -04:00
Thomas Harte
ae4ccdf5e6
Merge branch 'master' into DesktopScreenshots
2021-03-24 18:40:20 -04:00
Thomas Harte
6bdaa54aaf
Bumps copyright year.
2021-03-23 17:46:32 -04:00
Thomas Harte
3543a25168
Merge pull request #890 from TomHarte/SpectrumPolish
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Adds Spectrum polish
2021-03-23 17:23:15 -04:00
Thomas Harte
03ef81b07c
Attempts to reduce initial bounce.
2021-03-23 17:12:00 -04:00
Thomas Harte
0ac11fc39e
Add floating bus.
2021-03-23 17:09:42 -04:00
Thomas Harte
3d0503a35e
Adds a genuine Spectrum mapping, tweaks timing.
2021-03-23 16:59:43 -04:00
Thomas Harte
ad8cb52f11
Improves const correctness.
2021-03-23 16:59:26 -04:00
Thomas Harte
496a294c71
Adds clocking observers for the tape and FDC.
2021-03-23 16:38:04 -04:00
Thomas Harte
465c74ab86
Adds the Spectrum side of typing.
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The character mapper itself needs some Spectrum logic.
2021-03-23 10:44:43 -04:00
Thomas Harte
4e8f82a39c
Adds ZX Spectrum activity indicators.
2021-03-23 10:32:22 -04:00
Thomas Harte
584a5ad7fb
Maps HFE files to the Spectrum.
2021-03-23 10:30:30 -04:00
Thomas Harte
0ab85cce20
Merge pull request #888 from TomHarte/SpectrumShots
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Adds mention of the ZX Spectrum.
2021-03-23 08:01:41 -04:00
Thomas Harte
44e5caf803
Adds mention of the ZX Spectrum.
2021-03-23 08:00:10 -04:00
Thomas Harte
04291e9a86
Merge pull request #883 from TomHarte/ZXSpectrum
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Adds the ZX Spectrum +2a and +3 as emulated machines.
2021-03-22 23:28:04 -04:00
Thomas Harte
d0776b58cf
Tweaks timing empirically.
2021-03-22 23:20:49 -04:00
Thomas Harte
6da099d7e1
Ensures the enter key is cleared before fast-loading tapes have loaded.
2021-03-22 22:42:10 -04:00
Thomas Harte
60e77785e8
Makes an attempt to provide the necessary hook for floating bus behaviour.
2021-03-22 22:34:28 -04:00
Thomas Harte
19cd6a55d3
Rejigs the way video is counted to orient it around fetch times.
2021-03-22 22:18:38 -04:00
Thomas Harte
08432dd94b
Adds automatic media starts.
2021-03-22 20:12:03 -04:00
Thomas Harte
cc3c3663f6
Makes minor style improvements.
2021-03-22 19:55:03 -04:00
Thomas Harte
b76c923ff4
Adds detection of Spectrum-bootable disks.
2021-03-22 19:53:51 -04:00
Thomas Harte
3c1131a84b
Attempts to implement the +3.
2021-03-22 19:36:05 -04:00
Thomas Harte
a3cd953415
Fixes Spectrum machine selection.
2021-03-22 19:28:12 -04:00
Thomas Harte
c0abdf1b86
Factors out the CPC's simple FDC adaptor.
2021-03-22 19:12:10 -04:00
Thomas Harte
3ef2715eee
Implements the ROM version of fast loading.
2021-03-22 19:04:38 -04:00
Thomas Harte
4a12d7086d
Makes another guess at total colour phase.
2021-03-22 17:24:38 -04:00
Thomas Harte
a6b75b8637
Attempts improvements to video fetch timing. Alas, a lot of guess work here.
2021-03-22 15:59:03 -04:00
Thomas Harte
bdb3bce8d6
Corrects semantics on contended-timing calculation.
2021-03-22 15:48:51 -04:00
Thomas Harte
a26716919c
Switches to an is-in-video test that allows for video memory being paged twice.
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This is trivially possible even in plain 128kb mode.
2021-03-22 15:46:02 -04:00
Thomas Harte
8dbc7649aa
Adds note-to-self re: FDC.
2021-03-22 09:15:00 -04:00
Thomas Harte
42a9dc7c2b
Minimises video flushing, moves it to the proper time.
2021-03-22 09:02:49 -04:00
Thomas Harte
7965772745
Moves contention delays up to the time of MREQ going active.
2021-03-21 23:04:20 -04:00
Thomas Harte
f37f89a7d3
Merge branch 'master' into ZXSpectrum
2021-03-21 22:44:37 -04:00
Thomas Harte
d987e5a9d7
Merge pull request #887 from TomHarte/ZX80Wait
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Ensures no signalling to wait by a ZX80, ever.
2021-03-21 22:44:11 -04:00
Thomas Harte
fcba0cc3d6
Merge pull request #886 from TomHarte/AppleIIgsWarnings
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Resolves GCC warnings from dangling Apple IIgs work.
2021-03-21 22:40:56 -04:00
Thomas Harte
c097ed348a
Ensures no signalling to wait by a ZX80, ever.
2021-03-21 22:38:50 -04:00
Thomas Harte
0f9ab53ea0
Resolves GCC warnings from dangling Apple IIgs work.
2021-03-21 22:36:18 -04:00
Thomas Harte
21b1dab4a5
Adds the ZX Spectrum to Qt's New... menu.
2021-03-21 22:35:46 -04:00
Thomas Harte
dd7419282d
Resolves GCC warnings from dangling Apple IIgs work.
2021-03-21 22:25:14 -04:00
Thomas Harte
7562917740
Adds the Spectrum to the macOS New... menu.
2021-03-21 21:50:50 -04:00
Thomas Harte
3925eee575
Attempts more relaxed decoding of AY accesses.
2021-03-21 21:03:35 -04:00
Thomas Harte
6482303063
Reduces code duplication slightly.
2021-03-21 20:34:58 -04:00
Thomas Harte
388b136980
Relaxes test for a valid TAP.
2021-03-21 20:31:09 -04:00
Thomas Harte
9ce1dbaebb
Switches to partial decoding for paging registers; permits video address changes after paging is locked.
2021-03-21 20:23:00 -04:00
Thomas Harte
064667c0c3
Corrects asymmetrical flash, ensures consistent burst phase.
2021-03-21 20:22:27 -04:00
Thomas Harte
58be770eaa
Factors out some boilerplate.
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When I'm confident this is correct, I can fix up the other call sites.
2021-03-21 00:14:48 -04:00
Thomas Harte
1b0f45649e
Improves contended timing.
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Still not quite on the money, but this was an overt bug.
2021-03-21 00:00:18 -04:00
Thomas Harte
42bfabbe8c
The implication seems to be of a fixed phase swing.
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I'm enquiring further.
2021-03-20 23:46:13 -04:00
Thomas Harte
986c4006a6
Corrected: PAL machines can now be overt in terms of odd/even colour burst.
2021-03-20 23:45:49 -04:00
Thomas Harte
07a63d62dd
Adds some quick arithmetic on the clock speed.
2021-03-20 11:19:44 -04:00
Thomas Harte
26911a16e8
Lengthens sync, better to conform to PAL; experiments with fixed-phase colour burst.
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I need to get hold of real documentation here.
2021-03-20 10:38:21 -04:00
Thomas Harte
cf9a5d595b
Completes piping of audio.
2021-03-19 23:33:46 -04:00
Thomas Harte
09a6a1905b
Implements TAP support.
2021-03-19 23:29:09 -04:00
Thomas Harte
2ad2b4384b
Introduces a container for ZX Spectrum-style TAPs.
2021-03-19 23:01:49 -04:00
Thomas Harte
7729f1f3d0
Attempts automatic Spectrum tape control.
2021-03-19 22:43:48 -04:00
Thomas Harte
7d59ff6d8f
Builds in a colour burst, producing colour composite.
2021-03-19 22:25:37 -04:00
Thomas Harte
2ee478b4c4
Goes some way towards wiring up Spectrum options.
2021-03-19 22:17:20 -04:00
Thomas Harte
bb0d35e3d0
Minor formatting/layout fixes.
2021-03-19 22:17:03 -04:00
Thomas Harte
84774a7910
Update Qt and SDL build files.
2021-03-19 11:19:10 -04:00
Thomas Harte
a482ce1546
Adds a tape player.
2021-03-19 11:12:50 -04:00
Thomas Harte
a35e1f4fbe
Starts to make formal Spectrum accommodations.
2021-03-19 11:06:09 -04:00
Thomas Harte
2371048ad1
Formally separates keyboard code.
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With an eye to formalising the Spectrum/ZX81/ZX80 differences.
2021-03-19 10:36:08 -04:00
Thomas Harte
93b9ea67e6
Takes a run at contended timings.
2021-03-19 08:49:56 -04:00
Thomas Harte
60a0f8e824
Merge pull request #885 from TomHarte/MasterSystemBlue
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Tweak Master System blue scale.
2021-03-19 08:48:47 -04:00
Thomas Harte
b3fc64d4f2
Merge pull request #884 from MaddTheSane/master
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Minor pokes to the test files code.
2021-03-19 08:40:16 -04:00
Thomas Harte
650b9a139b
Tweak Master System blue scale.
2021-03-19 08:38:21 -04:00
C.W. Betts
5758693b7d
Minor pokes to the test files code.
2021-03-19 02:19:49 -06:00
Thomas Harte
f8c9ef2950
Add necessary header for memset.
2021-03-19 00:00:59 -04:00
Thomas Harte
69ca2e8803
Update Xcode project.
2021-03-18 23:52:35 -04:00
Thomas Harte
87fac15cc4
This is going to remain purely a template; no .cpp.
2021-03-18 23:51:45 -04:00
Thomas Harte
2d51924a3c
Wires up Spectrum keyboard.
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The machine now appears to be fully interactive and functional. Timing and media aside, that is.
2021-03-18 23:51:21 -04:00
Thomas Harte
c3d96b30d7
Factors out a little of the ZX81's keyboard logic.
2021-03-18 23:45:57 -04:00
Thomas Harte
44240773ef
Corrects address generation, ink/paper selection.
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Seemingly to give a correct +2a boot. Time to add a keyboard and find out, I guess.
2021-03-18 23:30:48 -04:00
Thomas Harte
ed587a4db5
Provides a better no-port-here value.
2021-03-18 23:14:39 -04:00
Thomas Harte
020a04006e
Adds flashing, randomises initial RAM contents.
2021-03-18 23:07:51 -04:00
Thomas Harte
622a8abf7f
Takes a stab at pixel output.
2021-03-18 22:57:10 -04:00
Thomas Harte
871bac6c8a
Marks out and approximately centres a pixel region.
2021-03-18 22:41:20 -04:00
Thomas Harte
fe3e8f87e7
Takes a shot at an all-border output.
2021-03-18 22:29:24 -04:00
Thomas Harte
87fc7c02e8
Provides a base pointer for video output.
2021-03-18 22:04:41 -04:00
Thomas Harte
f2620e6afb
Adds a CRT. Not yet clocked.
2021-03-18 21:54:42 -04:00
Thomas Harte
ab2ad70885
Takes a run at interrupts.
2021-03-18 21:29:52 -04:00
Thomas Harte
135134acfd
Adds a shell for video emulation.
2021-03-18 12:47:48 -04:00
Thomas Harte
5664e81d48
It appears the +2a and +3 have a different clock rate.
2021-03-18 12:41:24 -04:00
Thomas Harte
c353923557
This can be constexpr.
2021-03-18 12:40:59 -04:00
Thomas Harte
b830d62850
Adds quick notes on port FE.
2021-03-18 12:32:54 -04:00
Thomas Harte
17f551e89d
Attempts a full audio wiring.
2021-03-18 12:23:54 -04:00
Thomas Harte
4a4da90d56
Implements some of the memory map, and instantiates audio objects.
2021-03-18 12:14:48 -04:00
Thomas Harte
404c1f06e6
Insert missing space.
2021-03-18 10:44:01 -04:00
Thomas Harte
730bfcd1fd
Stumbles towards a memory map.
2021-03-18 10:43:51 -04:00
Thomas Harte
97249b0edd
Slow walks further towards a functioning Spectrum.
2021-03-18 10:18:17 -04:00
Thomas Harte
5a1bda1d82
Performs boilerplate towards a ZX Spectrum class.
2021-03-17 23:38:55 -04:00
Thomas Harte
b7d6b8efcf
Fix Xcode project.
2021-03-17 23:27:34 -04:00
Thomas Harte
9bec91c2b9
Correct further namespace references.
2021-03-17 22:56:03 -04:00
Thomas Harte
3d1775d853
Correct namespace.
2021-03-17 22:52:23 -04:00
Thomas Harte
814c057570
Update further path references.
2021-03-17 22:46:25 -04:00
Thomas Harte
b63ca16ce2
Attempts to hatch a Sinclair namespace.
2021-03-17 22:40:29 -04:00
Thomas Harte
0ddf09ac0f
Adds the +2a/+3 ROM.
2021-03-17 22:16:57 -04:00
Thomas Harte
e53586df1d
Adds tape-file static analysis for a hypothetical ZX Spectrum.
2021-03-17 22:09:44 -04:00
Thomas Harte
54491b35ef
Merge branch 'master' into ZXSpectrum
2021-03-17 12:39:20 -04:00
Thomas Harte
b447f5f174
Starts adding the Spectrum to the static analyser.
2021-03-17 12:38:37 -04:00
Thomas Harte
39a105b48a
Merge pull request #879 from TomHarte/CPCTapes
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Slightly Improves CPC tape loading times
2021-03-16 22:09:15 -04:00
Thomas Harte
cdc19c6990
Adds TODO.
2021-03-15 11:39:15 -04:00
Thomas Harte
397704a1e6
Withdraws published quick-load option for the CPC.
2021-03-15 11:37:23 -04:00
Thomas Harte
1a5dafae00
Slightly neatens.
2021-03-15 11:37:03 -04:00
Thomas Harte
d368dae94a
Adds tape motor LED.
2021-03-12 23:09:51 -05:00
Thomas Harte
54e2eb0948
Shortens wasted typing.
2021-03-12 23:04:45 -05:00
Thomas Harte
7d778bc328
Formally introduces fast tape support as an option.
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It doesn't feel that fast yet though.
2021-03-12 22:57:02 -05:00
Thomas Harte
7a8317ad81
It seems a full CRC is in play.
2021-03-12 22:45:48 -05:00
Thomas Harte
a32a2f36be
Advances to correctly reading bytes.
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Something is still amiss though. Maybe I'm supposed to update the checksum?
2021-03-12 19:15:35 -05:00
Thomas Harte
064fe7658c
Adds necessary interface to inherit a CPC tape-speed byte.
2021-03-12 18:43:20 -05:00
Thomas Harte
cd215ef521
Stumbles towards supporting fast tape loading.
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Right now: in a non-optional manner.
2021-03-12 18:42:17 -05:00
Thomas Harte
14c5e038e2
Merge pull request #881 from Cacodemon345/patch-1
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Fix compilation on GCC 10
2021-03-12 16:02:10 -05:00
Cacodemon345
82717b39bb
Fix compilation on GCC 10
2021-03-13 01:27:29 +06:00
Thomas Harte
f190a1395a
Enables detection of CPC-format tape data.
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It turns out that the Spectrum's timings are its alone; speed autodetection added.
2021-03-10 22:02:10 -05:00
Thomas Harte
4eaf3440bd
Add note to self.
2021-03-07 21:21:58 -05:00
Thomas Harte
f985248902
Add header for memcpy.
2021-03-07 21:20:35 -05:00
Thomas Harte
5c90744f0c
More minor style improvements.
2021-03-07 20:49:40 -05:00
Thomas Harte
e9177bbb2a
Makes an attempt to parse headers.
2021-03-07 20:49:09 -05:00
Thomas Harte
ab5e4ca9c7
Factors proceed_to_symbol upwards.
2021-03-07 20:48:51 -05:00
Thomas Harte
40516c9cec
Minor style improvements: some local consts, and overrides.
2021-03-07 15:56:58 -05:00
Thomas Harte
d93d380c88
Adds bit-level Spectrum-style tape parsing.
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More to do, obviously.
2021-03-07 15:51:25 -05:00
Thomas Harte
8a1c6978de
Merge pull request #877 from TomHarte/MissingConstraints
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Corrects minor macOS layout constraint issues.
2021-03-07 13:12:02 -05:00
Thomas Harte
6839e9e3b3
Ensures no double definition of NDEBUG.
2021-03-07 12:52:54 -05:00
Thomas Harte
83cbbe09c6
Adds missing constraints; eliminates magic constants.
2021-03-07 12:52:39 -05:00
Thomas Harte
166ddab5e0
Merge pull request #876 from TomHarte/SafeQuickboot
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Makes absolutely sure not to try to use quickboot workaround for Mac 128kb/512kb.
2021-03-06 22:40:35 -05:00
Thomas Harte
67408521cd
Makes absolutely sure not to try to use quickboot workaround for Mac 128kb/512kb.
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Albeit that it should be harmless; it's just seeding RAM.
2021-03-06 22:34:35 -05:00
Thomas Harte
f05260b839
ZX80/1: fix initial key state, wait line when NMI disabled.
2021-03-06 21:59:45 -05:00
Thomas Harte
62949d2f8b
Merge pull request #875 from TomHarte/InitialSelection
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Ensures machine selection carries over sessions.
2021-03-06 21:38:41 -05:00
Thomas Harte
2f18f40697
Ensures machine selection carries over sessions.
2021-03-06 21:32:35 -05:00
Thomas Harte
eea4c1f148
Wires up machineSelectionTabs.
2021-03-06 21:31:08 -05:00
Thomas Harte
63a792f434
Merge pull request #844 from TomHarte/AppleIIgs
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Adds incomplete Apple IIgs emulation.
2021-03-06 21:27:39 -05:00
Thomas Harte
7b164de6fd
Reenables interrupts.
2021-03-06 18:53:39 -05:00
Thomas Harte
26ad760904
Withdraws the Apple IIgs tab item.
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Also makes some Swift style changes while I'm here: I'm pervasively assuming that all these objects exist, might as well be upfront about it.
2021-03-06 18:53:09 -05:00
Thomas Harte
24e68166c6
Minor clean-ups of my temporary cruft.
2021-03-06 17:11:06 -05:00
Thomas Harte
b72474f418
Reduces debugging shout outs a touch.
2021-03-03 20:53:05 -05:00
Thomas Harte
38046d49aa
Increases debugging noise.
2021-03-03 20:52:14 -05:00
Thomas Harte
4601421aa6
This conditional is gone.
2021-03-03 20:52:01 -05:00
Thomas Harte
86fd47545d
Silences.
2021-03-03 20:51:33 -05:00
Thomas Harte
c8471eb993
Adds various asserts, some comments.
2021-03-03 20:47:45 -05:00
Thomas Harte
83d0cfc24e
Improves commentary.
2021-03-03 20:33:28 -05:00
Thomas Harte
cbf5a79ee8
Takes a swing at improper key repeat.
2021-02-28 16:46:09 -05:00
Thomas Harte
2f45e07d82
Further consolidates region map, now that shadowing is orthogonal.
2021-02-28 15:22:36 -05:00
Thomas Harte
496b6b5cfc
Introduces a further 128 bits of storage to eliminate the conditional in IsShadowed.
2021-02-28 15:14:32 -05:00
Thomas Harte
8604b1786e
Simplifies banks $02+ to a single region.
2021-02-27 23:34:51 -05:00
Thomas Harte
267e28e012
Adds various bits of debugging detritus.
2021-02-27 22:27:57 -05:00
Thomas Harte
631a8a7421
Adds bitset header.
2021-02-27 22:13:49 -05:00
Thomas Harte
7dcb0553e4
Switches to a target-centric view of shadowing.
2021-02-27 22:13:10 -05:00
Thomas Harte
2a7ea9f57c
Merge branch 'master' into AppleIIgs
2021-02-26 21:31:18 -05:00
Thomas Harte
e2b20568c6
Merge pull request #873 from TomHarte/Mac128kb
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Fixes 400kb drive PWM interpretation; enables Mac 128kb and 512kb.
2021-02-26 21:29:57 -05:00
Thomas Harte
4f5eb4d71b
Adds the Mac 128k & 512k as Qt options.
2021-02-26 21:25:11 -05:00
Thomas Harte
a1df8452ce
Add the 128kb and 512kb Macintoshes as selectable options in macOS.
2021-02-26 21:22:54 -05:00
Thomas Harte
9781460c41
Thanks to a hint from the MAME guys: finally completes Macintosh 128kb and 512kb emulation (!)
2021-02-26 21:22:35 -05:00
Thomas Harte
55c9d152e9
Slightly smarter: this does branchless shadowing without additional storage.
2021-02-24 18:46:41 -05:00
Thomas Harte
71a107fe75
Silences the IWM again, for now.
2021-02-23 21:57:19 -05:00
Thomas Harte
6cf9099ce1
Don't clear the mouse data full flag until both registers have been read.
2021-02-23 21:57:02 -05:00
Thomas Harte
e6dc39f6f0
Makes an attempt at mouse event transmission.
2021-02-19 22:48:15 -05:00
Thomas Harte
f6466fd657
Remove temporary hackery.
2021-02-19 22:47:50 -05:00
Thomas Harte
28ce675c96
Takes a further stab at ::CommandDataIsValid.
2021-02-19 22:22:14 -05:00
Thomas Harte
3d91b0a31b
Fixes keyboard data return.
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Input sort of works now! Except that key repeat is way out of control.
2021-02-19 21:55:06 -05:00
Thomas Harte
5d1970d201
Adds a hacky different guess at how register access might work.
2021-02-19 21:46:18 -05:00
Thomas Harte
72d7901c88
Takes a shot at the keyboard data full flag.
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Just a guess. But likely?
2021-02-19 20:06:12 -05:00
Thomas Harte
60cfec6a65
Amongst ever more cruft, adds a couple of extra asserts.
2021-02-18 22:49:48 -05:00
Thomas Harte
2e9065b34c
Increases number of fixed initial values.
2021-02-18 22:48:53 -05:00
Thomas Harte
992ee6d631
Don't zero out the program bank until after it has headed stackward.
2021-02-17 22:08:08 -05:00
Thomas Harte
772093c311
Add missing header.
2021-02-16 22:51:57 -05:00
Thomas Harte
e42843cca0
This may temporarily exhaust my wit for asserts.
2021-02-16 22:47:46 -05:00
Thomas Harte
3336a123f8
Asserts even more overtly.
2021-02-16 22:33:28 -05:00
Thomas Harte
bd54e30748
Adds workaround for Sweet 16, which can produce bad data.
2021-02-16 22:21:10 -05:00
Thomas Harte
35be402354
Improve sanity check.
2021-02-16 19:47:25 -05:00
Thomas Harte
28bd620e7f
Adds joystick support to the IIgs.
2021-02-16 19:39:22 -05:00
Thomas Harte
96f2d802d9
Adds a safeguard against undefined behaviour in the debugger.
2021-02-16 19:17:54 -05:00
Thomas Harte
b117df3367
Factors out joystick logic.
2021-02-16 19:17:32 -05:00
Thomas Harte
fa8236741d
Takes a shot at an ADB mouse.
2021-02-15 20:49:16 -05:00
Thomas Harte
e16d5f33d1
Adds service requests. The microcontroller now appears to consume keyboard events.
2021-02-15 20:33:10 -05:00
Thomas Harte
2a45e7a8d4
Slows timer X, to what may or may not be correct.
2021-02-15 16:40:27 -05:00
Thomas Harte
f8f0ff0fae
Add timer X counting.
...
Still no interrupts.
2021-02-15 16:29:25 -05:00
Thomas Harte
f5dcff2f29
Honours interrupt vector.
2021-02-15 15:05:56 -05:00
Thomas Harte
e773b331cd
Implements register 2 listen.
2021-02-15 15:05:46 -05:00
Thomas Harte
99c21925f4
Makes attempt at keyboard mapping.
2021-02-15 15:00:12 -05:00
Thomas Harte
eccf5ca043
Makes first effort to wire up the ADB vertical blank input.
...
However: looking at the disassembly, I'm not sure it really is wired to INTR. So work to do.
2021-02-14 22:20:58 -05:00
Thomas Harte
24af62a3e5
Sets a default handler of 1.
2021-02-14 22:20:07 -05:00
Thomas Harte
52cf15c3e6
Attempts to route out modifier state.
2021-02-14 21:15:31 -05:00
Thomas Harte
a791680e6f
Implements set_status as per advice.
2021-02-14 21:04:20 -05:00
Thomas Harte
a3e98907ca
Removes temporary printf.
2021-02-14 21:03:54 -05:00
Thomas Harte
6e53b4c507
Corrects centralised ADB decoder.
...
I still think it's appropriate to do this in only a single place, given that using it is optional.
2021-02-14 20:41:05 -05:00
Thomas Harte
52c38e72f6
Starts seeking to automate register 3 handling.
...
Immediate pitfall: byte capture on the bus side isn't working correctly.
2021-02-14 20:37:33 -05:00
Thomas Harte
a51d143c35
Corrects reactive-device transmission logic.
...
Albeit that I'm still not properly responding to register 3 stuff, so the ADB bus needn't believe anything is out there. Also, without VSYNC being piped to the microcontroller it may well just not be polling anyway.
2021-02-14 18:54:22 -05:00
Thomas Harte
17e9305282
Starts adding a keyboard.
2021-02-13 23:16:45 -05:00
Thomas Harte
c284b34003
Resolves inability of ADB microcontroller to read its own ROM (!)
2021-02-13 17:53:40 -05:00
Thomas Harte
2ab3bba695
Attempts GLU register latching, restoring expected startup sequence.
2021-02-13 17:38:42 -05:00
Thomas Harte
2c4dcf8843
Edges towards implementing an ADB device.
2021-02-12 21:50:24 -05:00
Thomas Harte
ea40b2c982
Takes a stab at implementing device response.
2021-02-12 18:56:43 -05:00
Thomas Harte
adfdfa205f
Starts to establish the means by which I'll implement ADB devices.
2021-02-12 18:42:12 -05:00
Thomas Harte
e83b2120ce
Tidies up, allows Operations and AddressingModes to be posted directly to ostreams.
2021-02-10 21:46:56 -05:00
Thomas Harte
33abdc95aa
Adds a helper for decoding ADB commands.
...
Still very noticeably to do: any sort of standard part for devices to respond to the bus.
2021-02-10 21:39:33 -05:00
Thomas Harte
6ca8aa99fc
Commit SDL and Qt project files; improve commenting.
2021-02-10 21:28:32 -05:00
Thomas Harte
17bac4c8cf
Starts to formalise the ADB bus.
2021-02-10 21:24:31 -05:00
Thomas Harte
46bd20b5e0
Attempts to simplify ADB bit parsing.
...
On-line output still looks reasonable, albeit that the microcontroller suddenly seems to be interested in devices F and 3 rather than 2 and 3.
2021-02-08 22:08:49 -05:00
Thomas Harte
3c7f9a43ad
Merge branch 'AppleIIgs' of github.com:TomHarte/CLK into AppleIIgs
2021-02-08 18:43:27 -05:00
Thomas Harte
82312d3b59
Provide a more convincing version of port output.
2021-02-08 18:14:08 -05:00
Thomas Harte
93a80a30d3
With correct divider appears to get reset requests posted.
2021-02-07 23:05:01 -05:00
Thomas Harte
77b1efd176
Sets sensible 'reset' values.
2021-02-07 21:53:57 -05:00
Thomas Harte
acfab1dfb3
Starts to make some effort at timers.
2021-02-06 21:02:44 -05:00
Thomas Harte
819e9039ab
Corrects printed target address for ZeroPageRelative.
2021-02-04 20:54:31 -05:00
Thomas Harte
6526c645a5
Merge branch 'master' into AppleIIgs
2021-02-02 21:29:38 -05:00
Thomas Harte
3d2490b774
Merge pull request #869 from TomHarte/OricReads
...
Flips conditionals to ensure 65802 safety.
2021-02-02 21:03:08 -05:00
Thomas Harte
1e041f1adf
Flips conditionals to ensure 65802 safety.
2021-02-02 20:52:34 -05:00
Thomas Harte
4fdf01a1a8
Merge pull request #868 from TomHarte/ElectronSCSI
...
Adds Electron hard disk support.
2021-02-02 20:43:08 -05:00
Thomas Harte
beb514b231
Adds an additional mapping for copy.
2021-02-02 20:37:15 -05:00
Thomas Harte
f57e897085
Corrects visibility of SCSI output.
2021-02-02 20:24:39 -05:00
Thomas Harte
2a8e8a4982
Slightly increases logging.
2021-02-02 20:24:19 -05:00
Thomas Harte
9f202d4238
Adds SCSI interrupt support.
2021-02-01 17:40:11 -05:00
Thomas Harte
1a40cc048e
Niceties: include AP6 ROM for hard-disk users; show SCSI activity indicator.
2021-01-31 21:41:11 -05:00
Thomas Harte
53514c7fdc
Ensures non-breakage of Qt interface.
2021-01-31 21:28:55 -05:00
Thomas Harte
274b3c7d24
Handles SCSI changes on-demand.
2021-01-31 21:24:54 -05:00
Thomas Harte
07df7572b3
Switch to preferred Acorn-world extension: DAT.
2021-01-31 21:03:09 -05:00
Thomas Harte
906b6ccdb7
This appears to be sufficient for the Electron to _read_ SCSI.
...
So that's step one.
2021-01-31 18:36:29 -05:00
Thomas Harte
f1ba040dd8
This is probably how Acorn hard disk images look (?)
2021-01-31 16:00:52 -05:00
Thomas Harte
8db289e229
Adds some notes-to-self on SCSI and a route to using Acorn's ADFS.
2021-01-31 13:12:59 -05:00
Thomas Harte
8142487d57
Merge pull request #867 from TomHarte/ElectronStarCommand
...
Pause longer for Electron commands that start with a modifier.
2021-01-31 12:34:19 -05:00
Thomas Harte
2860be7068
Permit a longer pause at startup for Electron commands that start with shift, control or func.
2021-01-31 12:25:22 -05:00
Thomas Harte
b5ecd5f7ef
Merge branch 'master' into AppleIIgs
2021-01-31 11:47:40 -05:00
Thomas Harte
7e720e754b
Merge pull request #866 from TomHarte/ElectronUI
...
Adds UI for the new Electron configuration options.
2021-01-31 11:44:47 -05:00
Thomas Harte
41a618c957
Adds new Electron configuration options to the Qt UI.
2021-01-31 10:13:32 -05:00
Thomas Harte
3d85e6bb97
Adds Mac UI for new Electron configuration options.
2021-01-31 09:49:51 -05:00
Thomas Harte
d54085c7fd
Merge pull request #865 from TomHarte/ADL
...
Electron: adds support for the ADL file format, and logic for AP6 and sideways RAM selection
2021-01-31 09:37:24 -05:00
Thomas Harte
0bb8bdf938
Switch to O(1) test, which avoids an extra #include.
2021-01-30 23:33:03 -05:00
Thomas Harte
865058b8d6
Adds basic text search to achieve AP6 detection.
2021-01-30 23:32:04 -05:00
Thomas Harte
b6bc0a21fb
Adds a TODO on intended logic around the AP6 ROM.
...
... plus a promise as to intent in the Electron-specific ROM readme.
2021-01-30 23:20:43 -05:00
Thomas Harte
8311ac4a7c
Adds parsing of the top-level directory for ADFS images.
2021-01-30 23:10:59 -05:00
Thomas Harte
4636d8dfb7
Adds support for installing the AP6 ROM and/or sideways RAM.
2021-01-30 19:38:19 -05:00
Thomas Harte
ac95e4d758
Adds support for ADL-format disk images.
2021-01-30 18:39:29 -05:00
Thomas Harte
b8c6d4b153
Rips out my high-level ADB microcontroller protocol implementation.
...
Adds just enough that the main computer validates the ADB controller as present and talking.
2021-01-30 17:53:27 -05:00
Thomas Harte
5eddc92846
Implements direction registers.
2021-01-28 21:06:11 -05:00
Thomas Harte
f50e8b5106
If I'm going to maintain the max_address approach, & is 'correct'.
...
% +1 would be 'more correct', but I think this approach is probably misguided.
2021-01-27 18:31:11 -05:00
Thomas Harte
dcc2fe0990
Improves M50470 entry-point detection, adds test output.
2021-01-26 21:29:17 -05:00
Thomas Harte
56111c75ae
Makes first efforts towards disassembly.
2021-01-26 19:52:30 -05:00
Thomas Harte
cc90935abd
Starts to provide just a touch of reflection.
2021-01-26 19:22:00 -05:00
Thomas Harte
413e42e1b6
Attempts to fix BBC.
...
But thereby stops all ADB output.
2021-01-25 22:34:03 -05:00
Thomas Harte
fc4bda0047
Experimentally flipping interpretation of the output bit gives something closer to coherent.
2021-01-25 22:02:39 -05:00
Thomas Harte
c8beb59172
Attempts properly to track ADB bus activity.
...
Output is not yet a valid ADB stream. Work to do.
2021-01-25 17:43:22 -05:00
Thomas Harte
8789ffda15
Corrects performer storage, RMW/W confusion, implicit casts, port readback.
2021-01-24 22:30:42 -05:00
Thomas Harte
e8e604dc3c
Attempts to wire up M50470 and GLU.
...
Resulting in an unexpected interest in R15. Bugs to find, I guess.
2021-01-24 18:07:05 -05:00
Thomas Harte
57e0fdfadc
Ensures ADB microcontroller is clocked.
...
And runs at the 'correct' speed (i.e. modulo my instruction-by-instruction implementation).
2021-01-23 22:55:12 -05:00
Thomas Harte
7f62732476
Fixes kiosk target, accepts that I'll probably never add UI tests.
2021-01-23 21:59:21 -05:00
Thomas Harte
36aebe0ff9
Posts cycle lengths.
2021-01-23 21:58:52 -05:00
Thomas Harte
051d2b83f4
Corrects TSX lookup.
2021-01-23 15:45:21 -05:00
Thomas Harte
17b12120eb
Corrects bit-selection shifts.
2021-01-21 23:13:00 -05:00
Thomas Harte
6e9ce50569
Corrects duration-based iteration.
2021-01-21 23:05:43 -05:00
Thomas Harte
adef2e9b4e
Starts formalising end conditions.
2021-01-21 22:36:44 -05:00
Thomas Harte
0fafbf5092
Completes M50740 instruction set.
2021-01-21 19:08:38 -05:00
Thomas Harte
3c887aff95
Improves consistency.
2021-01-21 18:58:22 -05:00
Thomas Harte
e5076b295b
Corrects namespace.
2021-01-21 18:58:11 -05:00
Thomas Harte
c10c161d39
Implements ADC and SBC.
2021-01-21 18:53:24 -05:00
Thomas Harte
04024ca159
Adds BIT.
2021-01-20 21:41:43 -05:00
Thomas Harte
64d556f60f
Implements shifts and rotates.
2021-01-20 21:39:13 -05:00
Thomas Harte
8564e7406b
Corrects index-mode CMP, LDA.
2021-01-20 21:32:46 -05:00
Thomas Harte
ebdb58d790
Seemingly advances to the first indefinite loop.
2021-01-20 21:18:52 -05:00
Thomas Harte
cf8afc70b2
Takes a swing at BBC, BBS.
2021-01-20 20:52:04 -05:00
Thomas Harte
4f02e8fbaf
Knocks off the low-hanging instruction fruit.
2021-01-20 20:41:35 -05:00
Thomas Harte
6e618a6bb7
Adds a list of missing instructions.
...
Not looking too bad; subject to not yet having a strategy for interrupts, timing, nothing yet implemented for timers, IO ports...
2021-01-20 20:37:35 -05:00
Thomas Harte
df1bc18fb3
Pushes ahead to what will be my first interaction with the T flag.
2021-01-20 20:27:09 -05:00
Thomas Harte
9f12ce2fb8
Corrects RTS, adds the remainder of the direct flag manipulations.
2021-01-20 20:16:55 -05:00
Thomas Harte
b9672c0669
Gets beyond a prima facie convincing JSR/RET.
2021-01-20 18:21:44 -05:00
Thomas Harte
e58608b25a
Gets as far as executing a first loop.
2021-01-20 18:15:24 -05:00
Thomas Harte
e502d76371
Corrects immediate instruction length, muddles through to having to parse a second program segment.
...
Albeit with JSR not yet properly implemented.
2021-01-19 22:12:18 -05:00
Thomas Harte
b0c790f3c6
Adds enough flags seemingly to reach an ASL.
2021-01-19 21:54:15 -05:00
Thomas Harte
aa478cd222
Stops trying to force bit ID into the addressing mode.
2021-01-19 21:51:01 -05:00
Thomas Harte
c78c121159
Succeeds at executing a single instruction.
2021-01-18 20:16:01 -05:00
Thomas Harte
e71e506883
This assert is redundant; not worth an extra #include.
2021-01-18 17:56:40 -05:00
Thomas Harte
a601ac0cab
Corrects performer population, lookup, calls.
2021-01-18 17:53:14 -05:00
Thomas Harte
9b92753e0a
In theory this should 'execute' up to the first unconditional branch.
...
Where execution means: do very little.
2021-01-18 17:11:11 -05:00
Thomas Harte
ec0018df79
Routes in the ADB keyboard ROM. This should get as far as parsing.
2021-01-18 16:59:49 -05:00
Thomas Harte
8b19c523cf
Starts to bend towards getting some performers in motion.
2021-01-18 16:45:52 -05:00
Thomas Harte
5ace61f9b9
Continues walking very slowly towards cached execution.
2021-01-18 11:20:45 -05:00
Thomas Harte
8a74f5911c
Minor reorganisation to finish the day.
2021-01-17 21:56:15 -05:00
Thomas Harte
4982430a29
Takes a run at most of the remaining addressing modes.
2021-01-17 21:52:16 -05:00
Thomas Harte
dea79c6dea
Adds missing #include.
2021-01-17 20:56:22 -05:00
Thomas Harte
ad03858c6e
Switches performers to member functions. Very slightly starts work on M50740 performers.
2021-01-17 20:53:11 -05:00
Thomas Harte
54b26c7991
Bends to using 8-bit lookups for M50740 instructions.
2021-01-17 20:03:36 -05:00
Thomas Harte
17c3a3eb4b
Seeks to switch to maintaining a bank of performers.
...
My thinking here is that for really simple processors there'll be 256 or less, meaning that they can be stored by simple uint8_t; for every other processor I can currently think of it'll likely be uint16_t.
Either way, that's a much better outcome than using plain pointers, which on architectures I currently build for will always be 8 bytes. For the simple processors I can get eight times as much into the cache; for the others four times.
2021-01-17 19:38:23 -05:00
Thomas Harte
5f413a38df
Switches all American-style dates.
...
I'd failed to configure my new computer appropriately, it seems.
2021-01-16 22:09:19 -05:00
Thomas Harte
8860d0ff51
Starts to establish the CachingExecutor.
2021-01-16 22:06:16 -05:00
Thomas Harte
8bd471fa3c
Corrects recursive call.
2021-01-16 21:50:48 -05:00
Thomas Harte
cd6ac51aa6
Muddles along to generating functions.
...
Albeit right now without a body.
2021-01-16 21:45:44 -05:00
Thomas Harte
10caa1a1fb
Steps gingerly towards execution.
2021-01-16 20:51:02 -05:00
Thomas Harte
722e0068ca
Adds additional exposition.
2021-01-16 20:10:20 -05:00
Thomas Harte
8f2eea8819
Corrects AccessType::Read.
2021-01-16 20:04:48 -05:00
Thomas Harte
3b2d65fa16
Adds access type declaration.
2021-01-16 20:04:01 -05:00
Thomas Harte
3dc36b704a
Starts on the next piece: parsers.
2021-01-16 19:54:40 -05:00
Thomas Harte
37a20e125c
Completes the M50740 decoder.
...
Completely untested.
2021-01-15 22:47:52 -05:00
Thomas Harte
2910faf963
Adds missing #include.
2021-01-15 22:33:14 -05:00
Thomas Harte
321e10fffb
Adds 'InstructionSets' to the SDL and Qt projects.
2021-01-15 22:30:02 -05:00
Thomas Harte
1acb8c3c42
Completes the opcode map.
2021-01-15 22:24:37 -05:00
Thomas Harte
f667dd223f
Advances to 50% of the opcode map.
2021-01-15 22:05:34 -05:00
Thomas Harte
e0d90f69ec
Fills in the first quarter of the opcode map.
2021-01-15 21:58:46 -05:00
Thomas Harte
d82187bee2
Decides to shove bit number into AddressingMode.
2021-01-15 21:50:05 -05:00
Thomas Harte
3c20e1f037
Adds files for the M50740 and corrects namespace errors elsewhere.
2021-01-15 21:30:30 -05:00
Thomas Harte
15bedc74d4
Merge branch 'master' into AppleIIgs
2021-01-15 21:15:10 -05:00
Thomas Harte
4bd6ffa9e4
Merge pull request #863 from TomHarte/DecodersAhoy
...
Sketches out the concept of a `Decoder`
2021-01-15 21:14:49 -05:00
Thomas Harte
9c2c918760
Better sorts by function, corrects TEST description.
2021-01-15 21:07:02 -05:00
Thomas Harte
47d20699d8
Completes list, ensures POP acts as documented.
2021-01-15 20:48:31 -05:00
Thomas Harte
e8ce70dccb
Chips further away at documentation.
2021-01-15 18:52:59 -05:00
Thomas Harte
fa4938f29c
Establishes the reason I'm sort-of documenting these.
2021-01-15 18:27:55 -05:00
Thomas Harte
ddb4bb1421
Better plans project layout.
2021-01-15 18:16:01 -05:00
Thomas Harte
ca94e9038e
Introduces 'far' test, fixes parsing.
2021-01-14 22:15:38 -05:00
Thomas Harte
2c72a77a25
Adds byte-by-byte decoder test; corrects divergences.
2021-01-13 21:51:18 -05:00
Thomas Harte
8c0e06e645
Adds a test for 0x83 and fixes sign extension.
...
ODA doesn't seem to accept 0x82, but testing 0x83 adds some confidence.
2021-01-13 20:42:21 -05:00
Thomas Harte
a24ae727a7
Takes a run at 0x82 and 0x83, completing the set.
2021-01-13 20:29:44 -05:00
Thomas Harte
5058a8b96a
Completes the first test stream.
...
... and improves decoding consistency in conjunction.
2021-01-12 21:49:22 -05:00
Thomas Harte
762ecab3aa
Adds operand/displacement capture.
...
This gets unit test as far as a disagreement over how to handle bad 0xc4 suffixes.
2021-01-10 22:55:25 -05:00
Thomas Harte
9ba5b7c1d4
Adds a few more asserts.
...
It's still just operands and displacements failing, which is nice.
2021-01-08 23:21:01 -05:00
Thomas Harte
5f807b6e47
Ensures that the operand is the only thing failing in decoding of the first instruction.
2021-01-08 23:02:06 -05:00
Thomas Harte
718f950071
Implements 80 and 81.
2021-01-08 22:50:59 -05:00
Thomas Harte
68fe16a092
Marks intent for operand/displacement.
2021-01-08 22:45:27 -05:00
Thomas Harte
97a64db5e0
Edges closer towards full x86 recording.
2021-01-08 22:38:56 -05:00
Thomas Harte
86577b772b
Rethinks size; packs all captured information into an x86 Instruction.
...
Albeit that operand and displacement are't yet captured. Or extractable.
2021-01-08 22:22:07 -05:00
Thomas Harte
306df7554e
Starts trying to find a good packing for X86 instructions.
...
To consider: do I really need `size` on every instruction?
2021-01-08 21:33:01 -05:00
Thomas Harte
30c2c0f050
Attempts to complete operand recognition.
2021-01-07 21:59:00 -05:00
Thomas Harte
205649cac2
Decodes 8e.
2021-01-07 21:36:05 -05:00
Thomas Harte
fd49b72e31
Simplifies macros, implements d0, d1, d2 and d3.
2021-01-07 21:30:01 -05:00
Thomas Harte
995904993d
Fills in 8f, c2, c3, ca and cb.
...
Also switches to RETN and RETF for near/far RET as this seems idiomatic.
2021-01-06 21:18:24 -05:00
Thomas Harte
17cbba85fc
Formalises what's missing in terms of opcodes and fills in some blanks.
2021-01-05 21:47:12 -05:00
Thomas Harte
9d7d45338f
Ostensibly gets the instruction stream correct for test case 1.
...
Subject to operand and displacement currently being absent, and likely inconsistencies in field population, most of which are omitted from the Instruction anyway.
2021-01-05 21:34:35 -05:00
Thomas Harte
3b55d3f158
Nudges up to a need to decode operation from the ModRegRM byte.
2021-01-05 21:25:12 -05:00
Thomas Harte
fda2293d6b
Improves constness.
2021-01-04 22:36:39 -05:00
Thomas Harte
da814c62bc
Merge branch 'master' into AppleIIgs
2021-01-03 20:57:08 -05:00
Thomas Harte
d4095b1b3b
Merge branch 'master' into DecodersAhoy
2021-01-03 20:56:47 -05:00
Thomas Harte
ed41154338
Merge pull request #862 from MaddTheSane/madds-patch-1
...
Madd's improvements
2021-01-03 20:53:39 -05:00
Thomas Harte
38bca5f0f0
Finally runs into the wall of trying to merge operands and offsets.
2021-01-03 20:08:13 -05:00
Thomas Harte
a8738b533a
Switch for now to block-level decoding.
...
It's easier to step debug.
2021-01-03 20:07:46 -05:00
Thomas Harte
29cf96c703
Adds decoding of disp16 RETs.
2021-01-03 19:39:28 -05:00
Thomas Harte
782dc3d046
Distinguishes inter- and intra-segment RET.
2021-01-03 19:37:37 -05:00
Thomas Harte
0ae217f51d
Improves exposition, adds decoding of the 0xbx patch of MOVs.
2021-01-03 19:33:16 -05:00
Thomas Harte
adcb2e03e8
Attempts to consolidate source/destination ordering.
2021-01-03 17:28:29 -05:00
Thomas Harte
11b6c1d4b5
Proceeds to three instructions correctly decoded. 'Wow'.
2021-01-03 17:03:50 -05:00
Thomas Harte
367cb1789d
Starts building an x86 test.
2021-01-03 16:37:35 -05:00
Thomas Harte
adf1484ecc
Introduces third test sequence, uneventfully.
2021-01-03 16:21:23 -05:00
Thomas Harte
5401ff6c78
Proactively fixes li sign extension.
2021-01-03 11:14:43 -05:00
Thomas Harte
eb8d0eefd5
Factors out some boilerplate and introduces second sequence.
2021-01-03 11:14:30 -05:00
Thomas Harte
c934e22cee
Introduces a first test of PowerPC decoding.
...
Corrected as a result: the bcx conditional, that stdu is 64-bit only, extraction of the li field.
2021-01-02 22:47:42 -05:00
Thomas Harte
1a3effc692
Modifies contract again. This is why I'm doing this now.
2021-01-02 21:19:45 -05:00
Thomas Harte
32c942d154
Muddles drunkenly towards decoding ModRM.
2021-01-02 21:11:19 -05:00
Thomas Harte
9c5dc0ed29
Deferring ModRM work, proceeds to 0x9f.
2021-01-02 19:29:43 -05:00
Thomas Harte
290972cedf
Adds health warning.
2021-01-02 19:16:21 -05:00
Thomas Harte
dc9d370952
Does the easier part of the easier half of 8086 decoding.
2021-01-02 19:16:07 -05:00
Thomas Harte
a41be61f99
Slightly fleshes out models, for a sensible beginning.
2021-01-01 17:36:47 -05:00
Thomas Harte
3d1783ddae
Add exposition as to the purpose of decoders.
2021-01-01 17:32:57 -05:00
Thomas Harte
8151c8e409
Rounds out field list.
2021-01-01 16:38:40 -05:00
Thomas Harte
0ef42f93ff
Further rounds out decoder.
2021-01-01 11:46:26 -05:00
Thomas Harte
d318ab4e70
Edges further onwards.
2020-12-31 21:12:36 -05:00
Thomas Harte
ebfa35c2c7
Conquers another page of instructions; adds supervisor flag.
2020-12-31 18:14:38 -05:00
Thomas Harte
db50b0fe23
Gets started on 6+10 decoding, places stake as to other fields.
2020-12-31 16:51:31 -05:00
Thomas Harte
233a69a1d8
Decodes operations for the simplest 45.
2020-12-31 16:02:52 -05:00
C.W. Betts
3749b7b776
My improvements:
...
Use synthesized properties for CSMissingROM.
Remove openGLView from the xib: that will quiet a warning.
Add nullability metadata to CSStaticAnalyser.
2020-12-31 13:23:46 -07:00
Thomas Harte
ed63e7ea75
Starts building out a PowerPC decoder.
2020-12-30 22:55:59 -05:00
Thomas Harte
31d68622c8
Better ensures frame buffer can be cleared.
2020-12-29 22:26:19 -05:00
Thomas Harte
ee5f45c979
Merge branch 'master' into AppleIIgs
2020-12-29 22:16:23 -05:00
Thomas Harte
3d79b11f92
Merge pull request #861 from TomHarte/DiskIIOtherROM
...
Ensure proper in-memory ordering of the b72a2c70 ROM.
2020-12-29 22:13:24 -05:00
Thomas Harte
dfe4e49110
Ensure proper in-memory ordering of the b72a2c70 ROM.
2020-12-29 22:08:48 -05:00
Thomas Harte
12784a71e2
A stab in the dark: does the IOLC inhibit also affect vector fetches?
2020-12-29 20:53:56 -05:00
Thomas Harte
e0b36c9c3d
Corrects PBR/DBR resetting upon an exception.
2020-12-29 15:27:49 -05:00
Thomas Harte
c5c56f9d05
Mention my manual list sorting.
2020-12-23 11:15:57 -04:00
Thomas Harte
9f0129cab8
Merge pull request #859 from MaddTheSane/gcJoystick
...
Initial GameController joystick support.
2020-12-16 21:39:28 -04:00
C.W. Betts
5a48e50355
Use isEqual: to compare GCController when connecting/disconnecting.
...
Only remove observers for GCController notifications.
2020-12-14 15:41:11 -07:00
C.W. Betts
86283b1815
Actually write the setup code.
2020-12-14 01:14:40 -07:00
C.W. Betts
a38d964f62
Initial GameController joystick support.
2020-12-13 11:23:33 -07:00
Thomas Harte
114d48b076
This register appears to be read/write.
2020-12-11 21:43:34 -05:00
Thomas Harte
6e9d517c26
Minor cleanliness improvement.
2020-12-11 21:43:13 -05:00
Thomas Harte
3b2e97e77c
Introduces basic auxiliary switch tests.
...
All of which pass. Grrr.
2020-12-11 21:30:03 -05:00
Thomas Harte
159924dcc0
More clarity tweaks.
2020-12-10 22:47:11 -05:00
Thomas Harte
5d8f284757
Makes minor style improvements.
2020-12-10 22:11:53 -05:00
Thomas Harte
c978a95463
Increases asserts and adds a test.
...
Thereby discovers and fixes a problem with set_main_paging().
2020-12-10 21:49:23 -05:00
Thomas Harte
fe4caf7a41
Nudges tick frequency up to match the other platforms.
2020-12-10 21:02:13 -05:00
Thomas Harte
4bf85abf30
Ensure defined initial state for the frame buffer.
2020-12-10 18:15:07 -05:00
Thomas Harte
49cee90b4d
Ensures no retraces are missed.
2020-12-09 20:32:26 -05:00
Thomas Harte
394f6b58d8
Ensure _finalisedLineTexture really is cleared.
2020-12-09 20:18:53 -05:00
Thomas Harte
dbdea95241
Ensure use_automatic_tape_control_ is always a valid bool.
2020-12-09 20:10:56 -05:00
Thomas Harte
1928c955d9
Ensures safe startup of the Ensoniq.
2020-12-09 19:46:32 -05:00
Thomas Harte
a91a13b46b
Merge branch 'master' into AppleIIgs
2020-12-09 19:33:23 -05:00
Thomas Harte
2f86d5ebaf
Merge pull request #858 from TomHarte/M1ForLife
...
Corrects Metal buffer sizing on Retina displays.
2020-12-09 19:18:56 -05:00
Thomas Harte
b589d6e3ef
Fixes retina-display buffer size.
2020-12-09 18:51:10 -05:00
Thomas Harte
db8b265e80
Enable M1 release builds.
2020-12-09 18:38:14 -05:00
Thomas Harte
8560b38ffa
Reduce to less-daunting URL.
2020-12-09 16:38:59 -05:00
Thomas Harte
049a78c667
Slightly restricts video flushing test.
2020-12-08 18:47:15 -05:00
Thomas Harte
574a37814c
Attempts to fix exception selection and timing.
2020-12-08 18:46:30 -05:00
Thomas Harte
94eb17db0c
Add sponsorship exposition; improve general wording
2020-12-08 16:35:00 -05:00
Thomas Harte
9577c8e27f
Experiment with F
2020-12-08 16:08:25 -05:00
Thomas Harte
c72bdd776e
Adds a new assert: I think this is the issue getting into GS/OS.
2020-12-07 22:43:24 -05:00
Thomas Harte
d35def4bbc
Ensures a consistent initial state.
2020-12-06 22:01:59 -05:00
Thomas Harte
d5f209366a
Extends testing to disabling IO space.
2020-12-06 21:53:53 -05:00
Thomas Harte
9062e80e9d
Adds anti-IO protection.
2020-12-06 21:46:04 -05:00
Thomas Harte
fd3760cedc
Adds passing test of basic $00 -> $01 -> $e1 shadowing.
2020-12-06 21:19:38 -05:00
Thomas Harte
9b73331ee9
Resolves deprecated use of scanHexInt32.
2020-12-06 20:49:12 -05:00
Thomas Harte
65ca931e83
Throws in a new assert, against the unimplemented bit 0 of new video.
2020-12-06 20:26:24 -05:00
Thomas Harte
6cb71eb11b
This needs explicitly to be a bool for the table lookups to work.
2020-12-06 16:43:07 -05:00
Thomas Harte
43251193ee
The actual maximum line length is now 656.
2020-12-06 16:42:43 -05:00
Thomas Harte
55de98fb46
Adds a new statement of intent.
...
Now I need to try to decide whether I like my current all-in-one mapping for shadowing + paging, or whether it's better to split the things. I'm tending towards the latter at least until the functionality works.
2020-12-05 19:09:21 -05:00
Thomas Harte
1422d43c35
Corrects documentation errors and ambiguities.
2020-12-05 19:07:38 -05:00
Thomas Harte
6273ef8ba2
Adds means to force specific ROM 03 self tests.
2020-12-02 20:48:19 -05:00
Thomas Harte
3c6f09a898
Corrects super high-res aspect ratio and placement.
2020-12-02 20:47:26 -05:00
Thomas Harte
24fcb0c24b
Corrects video counter values.
...
The built-in speed test now passes.
2020-12-01 18:35:55 -05:00
Thomas Harte
3162873a9c
Improves the meaning and result of time_since_flush().
2020-12-01 18:35:07 -05:00
Thomas Harte
03e2b6a265
Makes a slightly more rigorous attempt at discerning 1Mhz and 2.8Mhz operation.
2020-12-01 17:46:30 -05:00
Thomas Harte
ee22cf7ca1
Ensures that PAGE2 propagates from the state register to video.
2020-11-30 22:56:19 -05:00
Thomas Harte
187f507532
The soft switch is LCBANK2, not LCBANK1.
...
[This also jimmys the IIgs into always entering its extended self test, for now]
2020-11-30 22:35:51 -05:00
Thomas Harte
6000bd3a5e
Adds a bonus debugging assert. Let's see.
2020-11-30 18:15:02 -05:00
Thomas Harte
87069da3dd
Improves exposition, eliminates a couple of redundant map adjustments.
2020-11-30 18:07:03 -05:00
Thomas Harte
5cb4077576
Switches from modulo to and.
2020-11-30 17:47:57 -05:00
Thomas Harte
e9c7e0b9dd
Provisionally reverses meaning of language card RAM bank select.
2020-11-29 21:57:17 -05:00
Thomas Harte
35aa7612bb
Ensures that auxiliary/language-card soft switches don't trigger my assert.
2020-11-29 21:32:24 -05:00
Thomas Harte
acaa841822
Adds guaranteed trip to ROM for vector pulls.
2020-11-29 21:29:15 -05:00
Thomas Harte
46c1c9b5ee
CLRVBLINT calls it 3.75Hz. Which makes the arithmetic nicer.
2020-11-29 21:25:06 -05:00
Thomas Harte
4bdbca64b2
Takes a shot at the Mega II-style video interrupts.
2020-11-29 21:21:46 -05:00
Thomas Harte
3da6b4709c
Fixes sign of arithmetic.
2020-11-29 20:23:33 -05:00
Thomas Harte
11fe8ab6db
Corrects counter scales, adds a read for $c032.
...
Albeit that I have no idea what that's supposed to read as.
2020-11-29 20:08:59 -05:00
Thomas Harte
a9ce43d244
Takes a shot at the two video counter registers.
2020-11-29 19:57:35 -05:00
Thomas Harte
091bce9350
Merge branch 'master' into AppleIIgs
2020-11-29 00:09:20 -05:00
Thomas Harte
32ccce3040
Merge pull request #855 from TomHarte/QtNoKeyboardCopy
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Qt: don't copy the result of get_keyboard().
2020-11-29 00:05:26 -05:00
Thomas Harte
ab3fcb3ea0
Qt: don't copy the result of get_keyboard().
2020-11-29 00:01:11 -05:00
Thomas Harte
9610672615
Merge pull request #854 from TomHarte/OpenGLNoColourBurst
...
Avoids all risk of infinities when there is no colour burst
2020-11-28 23:54:29 -05:00
Thomas Harte
5ee9630624
Use compositeAmplitude in favour of its reciprocal.
2020-11-28 19:53:34 -05:00
Thomas Harte
1b3836eb1c
Adds an overt branch for mono/colour composite selection.
2020-11-28 19:47:04 -05:00
Thomas Harte
1302a046e9
Merge branch 'OpenGLNoColourBurst' of github.com:TomHarte/CLK into OpenGLNoColourBurst
2020-11-28 17:19:42 -05:00
Thomas Harte
33dec3c220
Given that lineCompositeAmplitude is not normalised, ups threshold.
2020-11-28 17:19:28 -05:00
Thomas Harte
7c29c3a944
Given that lineCompositeAmplitude is not normalised, ups threshold.
2020-11-28 17:13:18 -05:00
Thomas Harte
c9ca1fc7a0
Merge pull request #853 from TomHarte/AppleIIReset
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Improves Apple II keyboard input, especially under SDL.
2020-11-28 12:43:32 -05:00
Thomas Harte
a965c8de9f
Resolves intended reset_all_keys.
2020-11-27 21:53:34 -05:00
Thomas Harte
0b4b271e3d
Pulls out redundant check.
2020-11-27 21:04:20 -05:00
Thomas Harte
5fc6dd1a4d
Regresses macOS deployment target for kiosk mode to avoid OpenGL warning.
2020-11-27 21:02:04 -05:00
Thomas Harte
79ef026b93
Allows machines to declare a preference for logical input.
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It's only a preference, and the Apple II does prefer it.
2020-11-27 21:00:48 -05:00
Thomas Harte
a4ab5b0b49
Does a better job of ensuring sensible key mappings.
2020-11-27 20:49:38 -05:00
Thomas Harte
310282b7c9
Ensures extra_border_length always has a defined value.
2020-11-27 10:31:04 -05:00
Thomas Harte
af667c718e
Gets a bit more rigorous in remaining missing parts.
2020-11-26 22:36:32 -05:00
Thomas Harte
950f5b1691
Closes the loop on interrupts.
2020-11-26 19:56:42 -05:00
Thomas Harte
f54a3f8619
Limit test target to latest macOS, current architecture.
2020-11-26 19:50:38 -05:00
Thomas Harte
cbc0d848ad
Implements most of get_data.
2020-11-26 17:25:27 -05:00
Thomas Harte
f4d13d1f6f
Takes a run at the bus side of honouring Ensoniq sequence points.
2020-11-26 17:14:46 -05:00
Thomas Harte
6808ad6f5d
Adds a getter for the interrupt line.
2020-11-26 16:44:35 -05:00
Thomas Harte
7a8920ee38
Takes a stab at next_sequence_point.
2020-11-26 16:41:11 -05:00
Thomas Harte
4870506f6e
Implements skip_audio.
2020-11-26 16:24:48 -05:00
Thomas Harte
6f47f9d67c
Corrects placement of address bits.
2020-11-26 16:15:40 -05:00
Thomas Harte
8093f67173
Ensures video interrupts can't be missed by a suitably-timed access.
2020-11-26 16:11:03 -05:00
Thomas Harte
72884f37c3
It's still interrupt-deficient, but fills in additional Ensoniq audio generation.
2020-11-26 16:03:28 -05:00
Thomas Harte
8edb3fcd5f
Attempts to obey accumulator size in determining sample end.
2020-11-26 15:07:29 -05:00
Thomas Harte
b0efc647f1
An OpenGL context is neither still necessary nor desirable.
2020-11-26 13:49:41 -05:00
Thomas Harte
fdd102df52
Resolves border colour resets.
2020-11-26 13:13:48 -05:00
Thomas Harte
73d28838c0
Slightly rebalances template.
...
More clearly to ensure the lock_guard stays in the correct place.
2020-11-26 13:08:40 -05:00
Thomas Harte
03a893dc74
Quick refactor: this clearly isn't a VideoBase, it's the full implementation.
2020-11-26 12:54:20 -05:00
Thomas Harte
56de2512ae
Adds a further safety assert.
2020-11-25 23:34:30 -05:00
Thomas Harte
cdc2311045
Enables fuzzing, adds a definite no-op write.
2020-11-25 23:33:55 -05:00
Thomas Harte
c6c12209e8
Corrects end_data thread safety; permits caller not to have reached new_modals before a machine starts trying to push data.
2020-11-25 23:32:37 -05:00
Thomas Harte
eec27c3406
Reaches for marginally more coherent ADB data.
2020-11-25 17:34:00 -05:00
Thomas Harte
2ac6f96806
Merge branch 'AppleIIgs' of github.com:TomHarte/CLK into AppleIIgs
2020-11-24 18:28:24 -05:00
Thomas Harte
0bd3103949
Wires in the most common IIgs style of 2MG.
2020-11-24 18:19:34 -05:00
Thomas Harte
098a22aa95
Avoid out-of-bounds access of double_bytes.
2020-11-24 09:38:07 -05:00
Thomas Harte
9a819d6ca0
Transcribes interesting 2MG fields, albeit without acting on them.
2020-11-23 22:02:32 -05:00
Thomas Harte
b4bf541eec
Adds boilerplate route into a 2MG-handling class.
2020-11-23 21:42:18 -05:00
Thomas Harte
7ede3d2b9e
Corrects collection of palettes other than palette 0.
2020-11-23 21:00:26 -05:00
Thomas Harte
e7160fe3c3
Rounds out the IIgs video hardware, bugs aside.
2020-11-23 20:58:32 -05:00
Thomas Harte
9d61665014
Attempts to add colour double [low/high] resolution output.
2020-11-23 19:05:18 -05:00
Thomas Harte
d2938ad7c8
Eliminate magic constants.
2020-11-23 18:36:44 -05:00
Thomas Harte
9e0e063f8a
Resolves one further GCC warning.
...
Technically this leaves one further, on a temporary printf I have in my IIgs. I'll fix that when I strip all this caveman stufff.
2020-11-22 21:57:48 -05:00
Thomas Harte
46f7ff07f7
Adds support for fill mode.
2020-11-22 21:55:21 -05:00
Thomas Harte
8ace258fbc
Tackles outstanding GCC warnings.
2020-11-22 21:43:56 -05:00
Thomas Harte
4359fb1746
Enables undefined-behaviour sanitiser.
2020-11-22 21:30:00 -05:00
Thomas Harte
a34f294ba8
Pulls out commonalities re: NTSC colour, ensures mixed modes on a line works.
2020-11-22 21:29:40 -05:00
Thomas Harte
cd7d080b7a
Corrects low-resolution mode.
2020-11-22 20:52:42 -05:00
Thomas Harte
b0936b6ef4
Resolves high-resolution output.
...
Yet to optimise, but working.
2020-11-22 19:10:05 -05:00
Thomas Harte
8fae74f93e
Reintroduces delay bit, reverses phase.
...
There are stray columns of errors, but otherwise this is almost correct.
2020-11-22 11:06:14 -05:00
Thomas Harte
fca48e4b66
Makes hasty attempt to shift 'NTSC' in the most natural direction.
2020-11-21 23:39:58 -05:00
Thomas Harte
dd816c5a0a
Restore valid buffering.
2020-11-21 22:55:54 -05:00
Thomas Harte
3b2ea37428
Slightly cleans up.
2020-11-21 22:53:26 -05:00
Thomas Harte
8a805b6ba1
Ensures that get_average_output_peak() returns something sensible even before a set_relative_volumes.
2020-11-21 22:52:57 -05:00
Thomas Harte
3cc89cb4d2
Seeks to avoid false assert failures.
2020-11-21 22:52:19 -05:00
Thomas Harte
9b45c5a1cd
Resolves out-of-bounds reads.
2020-11-21 22:36:10 -05:00
Thomas Harte
3cba3a5ac0
Corrects card mask test outside of bank $00.
2020-11-21 22:22:27 -05:00
Thomas Harte
4b024c5787
Starts to make some attempt at classic II modes.
2020-11-21 18:07:51 -05:00
Thomas Harte
4a42de4f18
Attempts to add 5.25" drive support to the IIgs.
...
I want to try some classic software.
2020-11-20 21:37:17 -05:00
Thomas Harte
d00e5d23ef
Takes a second shot at the MemoryWrite constructor complaint.
2020-11-19 22:28:10 -05:00
Thomas Harte
2c9ce116a2
Resolves various GCC-reported issues.
2020-11-19 22:21:20 -05:00
Thomas Harte
3512352c32
Attempt to use the most-significant relevant bits for sample position.
2020-11-19 22:13:09 -05:00
Thomas Harte
4d9372c52f
Also takes a stab at swap mode.
2020-11-19 21:56:49 -05:00
Thomas Harte
1d288b08b6
Attempts the two most basic forms of DOC output.
...
Sans interrupts. Or register reads of any variety.
2020-11-19 21:19:27 -05:00
Thomas Harte
f3c7c11772
Register writes now reach the audio thread.
2020-11-18 21:52:03 -05:00
Thomas Harte
4b9fe805e9
Sets up a queue to push memory writes onto the audio thread.
2020-11-18 21:40:56 -05:00
Thomas Harte
a7051e4e42
Strip this forceinline until I've satisfied myself that it works in declarations.
2020-11-18 21:40:25 -05:00
Thomas Harte
34794223b4
For now, at least, c800–cfff is always built-in ROM.
...
Otherwise I probably need to extend my c3 logic to cover the other built-in cards (?)
2020-11-18 19:49:45 -05:00
Thomas Harte
96cf617ee6
Advances slightly. I think I need a custom queue for RAM writes.
2020-11-18 19:48:53 -05:00
Thomas Harte
69dddf34b9
Adds bonus sanity check.
2020-11-18 19:47:56 -05:00
Thomas Harte
8f4597f742
Hacks in double text.
...
Actually, only one error: it should start half a column earlier. All 'double' output should. TODO.
2020-11-18 19:47:22 -05:00
Thomas Harte
98347cb1c3
Starts in the direction of audio support.
2020-11-18 18:39:11 -05:00
Thomas Harte
c7ab3d4075
Reduces cost of bookending video data.
2020-11-18 17:32:11 -05:00
Thomas Harte
cddd72876f
Flips meaning of ejected bit, to please the IIgs.
2020-11-18 17:20:48 -05:00
Thomas Harte
62f936128d
It seems possibly there is a distinct IIgs character ROM?
2020-11-16 22:22:26 -05:00
Thomas Harte
bb80e53021
Reduces frequency of video flushes.
2020-11-16 21:55:41 -05:00
Thomas Harte
952891d1b6
Improves commentary.
2020-11-16 21:46:35 -05:00
Thomas Harte
6dfad6a44b
Slightly reduces logging.
...
Hopefully soon I can tear the whole lot out.
2020-11-16 21:46:19 -05:00
Thomas Harte
e4c5bfdd5c
Takes a repeat shot at proper shadowing.
...
I think the Apple IIgs Technical Reference explains how these bits interact, and I just had inhibit_all_pages off all on my own.
2020-11-16 19:54:12 -05:00
Thomas Harte
da8563733b
Adds an informal guarantee.
2020-11-16 19:53:17 -05:00
Thomas Harte
e41faeb557
Adds a quick protection against sector ID buffer overrun.
2020-11-16 19:52:42 -05:00
Thomas Harte
9a55eb56ea
Attempts to provide saner sequence point behaviour.
2020-11-16 19:00:11 -05:00
Thomas Harte
9206ab5dc3
Adds notes to self; implements get_next_sequence_point for video, allowing per-line interrupts.
2020-11-16 14:42:50 -05:00
Thomas Harte
7e39550fc0
Attempts to make JustInTimeActor sequence-point aware.
...
With the objective of chopping out a lot of future boilerplate.
2020-11-15 21:58:18 -05:00
Thomas Harte
96e79301f3
Clamps 16-bit positioning values.
2020-11-15 19:14:57 -05:00
Thomas Harte
c3f5fbd300
Picks a better framing compromise for classic and new video modes.
2020-11-15 19:14:43 -05:00
Thomas Harte
1db713fec1
Attempts more meaningful super high-res pixel output.
...
With a timing hack as noted.
2020-11-15 18:36:24 -05:00
Thomas Harte
68ba73bee0
Ensures I get some sort of feedback for non-text modes.
2020-11-15 17:16:52 -05:00
Thomas Harte
cdacf280e1
After much extra logging, corrects destination bank for MVN and MVP.
2020-11-15 16:08:29 -05:00
Thomas Harte
1538a02e18
Better explains concern.
2020-11-14 19:27:20 -05:00
Thomas Harte
f9cec9a102
Attempts also to implement 1Mhz access costs.
...
Subject to TODO, and same observation as before: this is as to my current understanding only.
2020-11-14 19:23:01 -05:00
Thomas Harte
adda3d8f42
Attempts a 'full' model of 2.8Mhz access timing.
...
i.e. full to my current understanding.
2020-11-14 19:10:41 -05:00
Thomas Harte
ec3ff0da12
Steps towards proper calculation of time.
2020-11-14 18:39:16 -05:00
Thomas Harte
73c38b3b0d
Collapses nested conditionals.
2020-11-14 18:23:31 -05:00
Thomas Harte
edc8050b36
Adds activity indicators.
2020-11-14 18:00:06 -05:00
Thomas Harte
37815a982a
Much logging later, corrects 7Mhz IWM windows.
...
Confirmed by mathematics — the new ones are seven-eighths the length of the established 8Mhz windows — and with reference to suitable Apple documentation.
2020-11-13 22:05:45 -05:00
Thomas Harte
bd8af25294
Merge branch 'master' into AppleIIgs
2020-11-13 21:27:47 -05:00
Thomas Harte
3207183f05
Merge pull request #850 from TomHarte/BigSurAgain
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Takes a second stab at resolving Big Sur File -> New...
2020-11-13 20:02:29 -05:00
Thomas Harte
e803f993b7
Increases minimum macOS version to 10.14.
...
This is lazy, but it means I definitely don't need non-Metal fallback code.
2020-11-13 19:48:45 -05:00
Thomas Harte
5dbc87caf0
Smarter: just ensures any attached panels are closed at close().
2020-11-13 19:09:30 -05:00
Thomas Harte
4862ccc947
Dismisses ROM requester upon that cancel too.
2020-11-13 19:01:53 -05:00
Thomas Harte
e1ecf66485
Dismisses sheet before closing document.
2020-11-13 19:00:37 -05:00
Thomas Harte
2c71ba0744
Ameliorates against a potential NSRangeException.
2020-11-13 18:29:48 -05:00
Thomas Harte
a7aeb779e9
Disables Apple Silicon binaries until I have some means to test.
2020-11-13 18:07:45 -05:00
Thomas Harte
e72cfbf447
Stop assuming that NSNotification => window.isVisible.
2020-11-13 18:04:31 -05:00
Thomas Harte
0c04a376c4
Stop assuming that NSNotification => window.isVisible.
2020-11-13 18:03:46 -05:00
Thomas Harte
3c6dc4c448
Merge branch 'master' into AppleIIgs
2020-11-13 12:51:53 -05:00
Thomas Harte
5d154e3d0c
Merge pull request #849 from TomHarte/BigSur
...
Slightly tweaks machine picker for macOS Big Sur.
2020-11-13 12:37:36 -05:00
Thomas Harte
86a24cc928
Allows Xcode to bump its versioning on the ROM requester too.
2020-11-13 12:23:48 -05:00
Thomas Harte
e8b52d20e9
Slightly tweaks machine picker for macOS Big Sur.
2020-11-13 12:14:35 -05:00
Thomas Harte
b0fc2f6ecf
Amps up logging.
...
Current suspicion is that the IIgs isn't getting a clean byte stream, never mind whether my assumption of exactly-Mac-style GCR holds (which it probably doesn't).
2020-11-12 21:54:54 -05:00
Thomas Harte
715a1b9cd6
Ensures safe shutdown.
2020-11-12 21:44:51 -05:00
Thomas Harte
81969bbea9
Improves logging, at least for now.
2020-11-12 21:17:14 -05:00
Thomas Harte
86310849eb
Corrects IWM clocking.
2020-11-12 18:09:31 -05:00
Thomas Harte
a2a928e262
Takes a guess at the format of IIgs .po files; wires them through to the actual machine.
...
... which still declines to boot.
2020-11-12 18:01:26 -05:00
Thomas Harte
ffc9e229b6
Adds a route for 'DiskII' images to the IIgs.
2020-11-12 17:35:27 -05:00
Thomas Harte
3813e00ca3
Adds the Apple II toggle speaker.
2020-11-11 21:04:38 -05:00
Thomas Harte
5698aa6499
Corrects colour mapping and improves documentation for self.
2020-11-11 20:41:30 -05:00
Thomas Harte
1f5908dc51
Corrects logging output.
2020-11-11 20:26:04 -05:00
Thomas Harte
72884c3ead
Does a better job of shifting output; takes a new guess at the no-receiver case.
...
ROM03 at least now reaches "check startup device!"
2020-11-11 20:19:35 -05:00
Thomas Harte
80358cf5bd
Shift output even if nobody is listening.
2020-11-11 20:04:48 -05:00
Thomas Harte
a15af1df5e
Attempts to use the other bit of disk drive control, the 5.25"/3.5" select.
...
For the record, the ROM thinks it finds some Smartport devices and then attempts to talk to them. Since none is present, it blocks forever.
2020-11-11 17:55:50 -05:00
Thomas Harte
6d511f01a4
Ensures intended no-drive behaviour; no more risks with dangling pointers or nullptr.
2020-11-11 17:54:21 -05:00
Thomas Harte
da9e378ab1
Quietens, for now.
2020-11-11 17:53:21 -05:00
Thomas Harte
6d3d7c6006
It seems like this fix is no longer needed.
2020-11-11 17:30:22 -05:00
Thomas Harte
8024bbd721
Provides minor extra detail.
2020-11-11 17:08:56 -05:00
Thomas Harte
ece9382a4e
Also attaches IWM select line.
2020-11-10 18:59:23 -05:00
Thomas Harte
6ba517a4c1
Applies a will-do-for-now crop to video output.
2020-11-10 18:50:23 -05:00
Thomas Harte
20fd5adb24
Makes a first effort at attaching an IWM.
2020-11-10 18:38:23 -05:00
Thomas Harte
abb350ff5b
Stubs in audio toggle and disk control.
...
It appears that ROM 01 now fails because reading the disk interface register doesn't do as expected. ROM 03 starts hitting what should be the IWM and dies in a surplus of logging.
2020-11-09 22:21:52 -05:00
Thomas Harte
dc8d4d49f5
Gives the two sets of switches responsibility for supplying 'state'.
...
(And fixes language-card state value.)
2020-11-09 22:11:20 -05:00
Thomas Harte
54352cb1cb
Stubs in a couple more registers.
...
PC now hits $0000. Likely a bug.
2020-11-09 21:54:25 -05:00
Thomas Harte
7e106c6add
Attempts to stub in read from microcontroller, and extends command 0x06.
...
A complete guess on the latter, as if you didn't know.
2020-11-09 21:20:53 -05:00
Thomas Harte
0ae49b356a
Seems to do enough padding out to get me to my second failing ADB command.
...
That's better than failing at the first.
2020-11-09 19:05:48 -05:00
Thomas Harte
32374444ba
Fixes text output window.
2020-11-08 17:04:04 -05:00
Thomas Harte
287bfeb924
Hacks in 40-column text.
...
Hot gossip: my IIgs is reporting a system error. A clue!
2020-11-08 17:01:23 -05:00
Thomas Harte
b5fa574686
Merge pull request #847 from TomHarte/MetalTones
...
Corrects R4G4B4 and R2G2B2 output in Metal.
2020-11-07 23:22:36 -05:00
Thomas Harte
7aea3dc124
Corrects R4G4B4 and R2G2B2 output.
2020-11-07 23:15:48 -05:00
Thomas Harte
81c38c7200
Per the IIgs tech note, this value works the other way around.
2020-11-07 23:15:07 -05:00
Thomas Harte
3bb3d8c5c1
Adds text colour register.
...
Oddly this isn't currently being set. So probably another latent fault elsewhere.
2020-11-07 23:14:50 -05:00
Thomas Harte
b57a2bfec9
Completes logic for pixel framing. Well, mostly; this doesn't yet allow for auxiliary-using II modes being off to the left.
...
The perceived effect though is that a frame appears and then freezes. So a clocking issue may still be afoot.
2020-11-07 22:23:48 -05:00
Thomas Harte
93968d267d
Corrects R4G4B4 and R2G2B2 output.
2020-11-07 22:19:27 -05:00
Thomas Harte
d27fb5f199
Merge branch 'AppleIIgs' of github.com:TomHarte/CLK into AppleIIgs
2020-11-07 22:03:31 -05:00
Thomas Harte
a51f4122f0
Attempts to respect border colour.
...
Though for now my display is just a sea of purple.
2020-11-07 22:03:05 -05:00
Thomas Harte
35ba5fc894
Resolves video timing issues.
2020-11-07 21:28:08 -05:00
Thomas Harte
228d901253
Attempts to stabilise image horizontally.
2020-11-07 21:10:05 -05:00
Thomas Harte
d37ba62343
Makes first, faltering steps towards video display.
2020-11-07 20:42:34 -05:00
Thomas Harte
699fb0aa4b
Switches to just-in-time video, for easy access to a clock divider.
2020-11-07 19:40:26 -05:00
Thomas Harte
613d4b7c8b
Migrates character ROM handling; supplies one for the IIgs.
2020-11-07 17:45:03 -05:00
Thomas Harte
4f9d06d8c7
Merge pull request #846 from MaddTheSane/maddsIIgs
...
Use url(forResource:... instead of path(forResource:…
2020-11-06 09:39:27 -05:00
Thomas Harte
5149e4364a
Merge pull request #845 from MaddTheSane/patch-1
...
Update 65816kromTests.swift
2020-11-06 09:38:59 -05:00
Thomas Harte
6b29e1f598
Corrects accesses to switch values.
2020-11-05 21:25:06 -05:00
Thomas Harte
6c9edbb7a2
Resolves specious interrupts.dic
2020-11-05 20:51:00 -05:00
Thomas Harte
282d0f1ebb
For debugging, adds a dump of anything in the [presumably] text buffer.
...
Nothing is there.
2020-11-05 18:17:21 -05:00
Thomas Harte
f466cbadec
Attempts to do just enough with video to get a functioning vertical blank query.
2020-11-05 17:56:20 -05:00
C.W. Betts
189a468ad4
Use url(forResource:... instead of path(forResource:… as it cuts down on creating a URL struct.
2020-11-05 14:42:39 -07:00
C.W. Betts
a3414c2673
Update 65816kromTests.swift
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Only have one runTest method.
2020-11-05 14:36:34 -07:00
Thomas Harte
5126163c5d
Attempts to reduce pull request heft.
...
Given that the licensing of krom's tests is uncertain, and I've given credit and an appropriate link, I needn't include the original code.
2020-11-04 21:49:45 -05:00
Thomas Harte
46ee98639e
Stubs in $c010.
...
Also reduces memory map logging.
2020-11-04 21:35:11 -05:00
Thomas Harte
cc6c0d535c
Stubs in some of the sound GLU registers.
2020-11-04 21:29:44 -05:00
Thomas Harte
78b57e73d5
Hacks in a lying vertical blank value.
2020-11-04 21:18:27 -05:00
Thomas Harte
9e2a6526d1
Corrects interpretation of bit 3 of the state register.
...
And attempts to be a bit more careful with the language card in general.
2020-11-04 21:15:10 -05:00
Thomas Harte
d3c7253981
Shifts size-limiting of X and Y to transitions and mutations, away from reads.
...
Primarily to remove potential bug-causing complexity — this is easier to debug. But let's see.
2020-11-04 20:35:41 -05:00
Thomas Harte
e3147b6b45
Introduces a pre-STP/WAI limit for the MSC test.
...
This way I retain testing of NOP, BRK, COP and WDM.
2020-11-03 20:59:07 -05:00
Thomas Harte
d50b059a17
Imports 6502-esque test for decimal SBC overflow.
...
All applicable krom tests now pass.
2020-11-03 20:37:30 -05:00
Thomas Harte
cc5ec78156
Provides something on WAI/STP; sizes STY by the x flag; disables MSC test.
2020-11-03 20:17:44 -05:00
Thomas Harte
ddc44ce0d1
Reshuffles enum to make macro tests marginally easier.
2020-11-03 20:17:09 -05:00
Thomas Harte
5cbb91f352
Fixes COP vector, ensures WDM skips a byte.
2020-11-03 20:01:02 -05:00
Thomas Harte
91ea2eff4c
Corrects MVN/MVP off-by-one and failure to store what was read.
2020-11-03 18:29:35 -05:00
Thomas Harte
bf85d71674
Brings ADC into conformance. Fixes JML.
2020-11-03 18:12:10 -05:00
Thomas Harte
426e90eebf
Adds logic to work around Nintendo dependence in the krom tests.
...
Let the real work begin!
2020-11-03 14:18:40 -05:00
Thomas Harte
3889646d6b
Takes a swing at incorporating krom's 65816 test suite. At least as far as ADC.
2020-11-02 21:09:32 -05:00
Thomas Harte
0178aaee2b
Attempts retroactively to enforce the rule that 8-bit index modes => no top byte.
...
(Rather than a preserved but ignored top byte)
2020-11-02 18:55:28 -05:00
Thomas Harte
53f60f7c87
Adds some notes for a pending ADB implementation.
2020-11-01 14:49:04 -05:00
Thomas Harte
2da71acefd
Stubs in the ADB GLU.
2020-10-31 21:00:15 -04:00
Thomas Harte
45f5896b76
Stubs video switches into the IIgs.
2020-10-31 20:39:32 -04:00
Thomas Harte
531a3bb7e6
Ensures RAM is zero-initialised, for now, to aid in repeatable bug finding.
2020-10-31 20:03:23 -04:00
Thomas Harte
1b28d929e4
Factors out the Apple II/IIe video switches and mode selection logic.
2020-10-31 20:02:50 -04:00
Thomas Harte
e8943618dc
Adds some extra commentary and distinguishes X/Y sizing from M.
2020-10-31 10:21:13 -04:00
Thomas Harte
1ae2f6f449
PHD and PLD should always be 16-bit; PLP 8-bit.
2020-10-31 09:22:35 -04:00
Thomas Harte
88e26b42f5
Fixed: PHP pushes only 8 bits regardless of mode.
2020-10-30 22:36:00 -04:00
Thomas Harte
03d1aff6c0
Fixes 8-bit read/write.
2020-10-30 22:17:55 -04:00
Thomas Harte
e4459b6256
Adds power-on bit to speed register.
2020-10-30 21:50:39 -04:00
Thomas Harte
2be817a6a1
Maps in "the interrupt ROM addresses".
2020-10-30 21:42:43 -04:00
Thomas Harte
a833bb892b
Increases logging substantially.
2020-10-30 20:11:55 -04:00
Thomas Harte
7f3f6c339f
Corrects stacked program bank during native-mode exceptions.
2020-10-30 20:11:39 -04:00
Thomas Harte
0d562699a2
Ensures unmapped regions are really unmapped.
2020-10-29 22:18:01 -04:00
Thomas Harte
034056d0cd
Adds full 8-bit clock addressing; stubs clock into the IIgs.
2020-10-29 21:38:36 -04:00
Thomas Harte
1249fb598b
Factors Apple's RTC out of the Macintosh.
2020-10-29 21:03:02 -04:00
Thomas Harte
5a8b8478d2
Corrects unhandled IO assert.
...
The IIgs proper is actually waiting on communication with the RTC.
2020-10-28 22:14:02 -04:00
Thomas Harte
6c54699c44
Connects up an SCC.
...
Thereby putting my IIgs into its first perpetual loop. Trying to do something with the SCC I haven't implemented yet perhaps?
2020-10-28 22:07:34 -04:00
Thomas Harte
266022b193
Fixes PEA.
2020-10-28 22:00:28 -04:00
Thomas Harte
94a6da6b7d
Exposes much of the auxiliary and language card stuff to the IIgs bus.
2020-10-28 21:58:20 -04:00
Thomas Harte
885fae1534
Stubs in a speed register.
2020-10-28 21:23:45 -04:00
Thomas Harte
1df2ce513a
Ensures that reset doesn't push to the stack.
2020-10-28 21:23:35 -04:00
Thomas Harte
1e4679ae14
Corrects JSL and RTL.
2020-10-28 17:25:40 -04:00
Thomas Harte
267dd59a59
Gets as far as seemingly yet another memory-map setting.
...
Tomorrow, maybe?
2020-10-27 22:31:58 -04:00
Thomas Harte
0a91ac5af5
Adds some extra notes, starts getting into trying to run the IIgs.
2020-10-27 22:09:45 -04:00
Thomas Harte
ad93ad6018
Attempts to finish off shadowing.
2020-10-27 22:05:04 -04:00
Thomas Harte
0c700094ea
Goes branchless on shadowing.
2020-10-27 21:56:03 -04:00
Thomas Harte
20631a157b
Contorts somewhat in pursuit of branchless shadowing regardless of page and without extra storage.
2020-10-27 21:37:39 -04:00
Thomas Harte
bdda84dfde
Adds a very basic shadowing test.
...
For the record, I'm aware that there's a lot here that I'm not testing. I think the smart move is to get towards a running machine and see which configurations it actually tries to set up, then follow along with appropriate testing; it might cause me to discover a flaw in my comprehension before I've made the same mistake in both the code and a test.
2020-10-27 19:59:41 -04:00
Thomas Harte
e44f95a882
Takes a first, faltering shot at shadowing.
2020-10-27 19:49:47 -04:00
Thomas Harte
31cd45f8b5
Takes a run at set_card_paging and simplifies method of shadowing.
2020-10-27 19:33:47 -04:00
Thomas Harte
74f9f6ad3b
Tests and corrects ROM access beyond bank $00.
2020-10-27 19:02:15 -04:00
Thomas Harte
1dfdb51e61
Hits a few other easy cases.
...
Still to do: card paging, and finding out which banks that applies to, and shadowing. So: everything with flags.
2020-10-26 21:49:47 -04:00
Thomas Harte
18832dc19d
Attempts to expand the language card stuff to all affected pages.
2020-10-26 20:30:41 -04:00
Thomas Harte
3dee0666cb
Corrects current bank $00 language card behaviour.
2020-10-26 17:46:40 -04:00
Thomas Harte
f830f6a57a
Adds failing test of initial ROM mirroring.
...
It's the end of the evening, so this is it for today.
2020-10-25 22:13:54 -04:00
Thomas Harte
82c733c68c
Adds some very basic actual tests.
2020-10-25 21:40:50 -04:00
Thomas Harte
ed510409c4
Starts memory map test class, already finding a typo.
2020-10-25 21:31:21 -04:00
Thomas Harte
7614eba4bf
Factors out the IIgs memory map logic.
...
As testing would be rational.
2020-10-25 21:10:04 -04:00
Thomas Harte
13c8032465
ROM isn't writeable. The clue is in the name.
2020-10-25 18:29:17 -04:00
Thomas Harte
44fc08cd5b
Switches to a mapping system that supports non-continuous regions, and is smaller.
2020-10-25 18:28:32 -04:00
Thomas Harte
7631b11c55
Corrects double low-res colour serialisation.
2020-10-24 19:26:32 -04:00
Thomas Harte
726b5f62bb
Corrects read/write access to auxiliary soft switches.
2020-10-24 19:00:03 -04:00
Thomas Harte
ddd84db510
Edges towards a functioning IIgs memory map.
...
Next up: making sure language and auxiliary switches apply. That should get something from the ROM.
2020-10-23 19:41:10 -04:00
Thomas Harte
966241b4cc
Adds documentation, ensures the language card signals less noisily.
2020-10-23 18:44:47 -04:00
Thomas Harte
9371a8993f
Factors out auxiliary memory switches and related decisions.
2020-10-22 22:33:31 -04:00
Thomas Harte
410c99de54
Factors out the language card memory selection logic.
2020-10-22 21:01:12 -04:00
Thomas Harte
817f93a490
Edges towards a working memory subsystem. At least structurally.
2020-10-22 19:25:04 -04:00
Thomas Harte
43611792ac
Adds just enough to get a 65816 ticking over.
2020-10-21 21:19:18 -04:00
Thomas Harte
62231708d7
read_pages_ can be const.
2020-10-21 21:17:15 -04:00
Thomas Harte
a5dcab4092
Ensures machines with no audio output are handled correctly.
2020-10-21 21:16:00 -04:00
Thomas Harte
8bde2e5f4c
Slightly neatens Cocoa machine picker.
2020-10-20 22:25:39 -04:00
Thomas Harte
5287c57ee0
Adds the IIgs as a user-selectable machine.
...
Albeit that there is no underlying machine yet.
2020-10-20 22:18:11 -04:00
Thomas Harte
3aa47f9c68
Merge pull request #843 from TomHarte/MoreDormann
...
Introduces a build of Dormann's 65C02 tests that is 65816 compatible.
2020-10-19 21:13:46 -04:00
Thomas Harte
ab07814614
Eliminates now-broken 65816 flow test.
2020-10-19 21:02:46 -04:00
Thomas Harte
1653abdf88
Adds the .lst; otherwise I'll probably just lose it.
2020-10-19 20:58:24 -04:00
Thomas Harte
b3ab9fff9b
Imports a custom-built copy of Klaus Dormann's 65C02 test, with only 65816-compatible parts.
...
Thereby fixes another couple of 65816 issues — BRK(, etc) not clearing the decimal flag, and `TRB d` being mismapped.
2020-10-19 19:27:16 -04:00
Thomas Harte
14718b93a4
Improve commentary.
2020-10-19 09:32:50 -04:00
Thomas Harte
69450e27ad
Merge pull request #839 from TomHarte/65816
...
Adds emulation of the 65816.
2020-10-18 21:49:46 -04:00
Thomas Harte
0cd08aa79d
Permits the Oric analyser to check CPC-style DSKs.
...
Oric Mist seems to use that format, so some of these now exist out in the wild.
2020-10-18 21:44:44 -04:00
Thomas Harte
1fa94e1b08
Adds the 65816 as an in-code option for Oric emulation.
...
This also means it'll be exposed via the SDL build, but that's okay.
2020-10-18 21:43:08 -04:00
Thomas Harte
76d9893866
Declares address-bus sizes formally.
...
This allows me to fix the final two implicit conversion warnings, albeit that it would have been nice to find a templatey way just to get the type directly from the declaration of `perform_bus_operation`.
2020-10-18 15:08:21 -04:00
Thomas Harte
c3f8982c62
Resolves all internal implicit type-conversion warnings.
...
Chasing those down, it looks like flags were wrong for PLB and PLD. So it's official: warnings help.
2020-10-18 14:55:17 -04:00
Thomas Harte
99eba2f8ba
Ensures intended 65816 exception behaviour.
...
i.e. the relevant micro-op sequence exists, and its operation isn't lost. Also sets the 65816 by default to jump straight into power-on, not to execute an instruction first. That shouldn't make a functional difference, but it makes debugging easier because it makes startup fully deterministic.
2020-10-18 14:43:47 -04:00
Thomas Harte
69509f6502
Attempts to bring a little more consistency to my use of Swift in test code.
2020-10-17 22:42:54 -04:00
Thomas Harte
c3187fdbe1
Makes minor formatting improvement.
2020-10-17 22:31:51 -04:00
Thomas Harte
42228ea955
Adds 65C02As6502 test, to round out the set.
2020-10-17 22:31:32 -04:00
Thomas Harte
e5f57ea743
Make isReadOperation more overt.
2020-10-17 22:27:04 -04:00
Thomas Harte
3b398f7a9a
Attempts to complete all 65816 bus signalling.
2020-10-16 21:56:20 -04:00
Thomas Harte
096add7551
Exposes non-BusOperation bus outputs.
2020-10-16 21:05:42 -04:00
Thomas Harte
334e0666b7
Reports ::Ready upon a WAI.
2020-10-15 21:37:37 -04:00
Thomas Harte
98c81749c8
Adds the conventional flush.
2020-10-15 21:36:04 -04:00
Thomas Harte
5dcf720bb5
Extends list of BusOperations.
...
Now to retest, widely.
2020-10-15 21:35:01 -04:00
Thomas Harte
9c0c0255f6
Ensures data/program bank can't accidentally be set to 16-bit values.
2020-10-15 21:10:32 -04:00
Thomas Harte
68c15bd605
Updates Qt project; catches another couple of issues via its compiler.
2020-10-15 21:09:22 -04:00
Thomas Harte
9a2f32795f
Revokes stack-local storage non-optimisation.
2020-10-15 21:03:10 -04:00
Thomas Harte
7aa6cf4c6b
Tidies up layout very slightly.
2020-10-15 20:51:23 -04:00
Thomas Harte
dfda2adf0d
Attempts implementations of both ready and abort.
...
Which I think concludes the inputs?
2020-10-15 20:46:18 -04:00
Thomas Harte
c0a1c34012
Wraps all registers into a struct, so that I can implement abort.
...
Makes some preparations for ready too.
2020-10-15 18:42:38 -04:00
Thomas Harte
3c6adc1ff4
Completes 65816 addressing mode tests and corresponding fixes.
2020-10-14 22:00:52 -04:00
Thomas Harte
e511d33a7c
Adds test for [d], y; fixes implementation.
2020-10-14 21:42:41 -04:00
Thomas Harte
c35969d677
Adds tests for (d, x) and (d), y. Both amply tested in emulation mode, so no problems.
...
Five to go, all potentially troublesome.
2020-10-14 21:38:00 -04:00
Thomas Harte
27afb8f0a7
Adds direct indirect long test, and thereby fixes addressing mode.
...
Nine to go!
2020-10-14 21:26:20 -04:00
Thomas Harte
327ab81436
Fills in direct, x and (direct) tests, fixing implementation of the latter.
...
10 to go.
2020-10-14 21:17:28 -04:00
Thomas Harte
db7178495f
Implements direct and final absolute test.
...
14 to go.
2020-10-14 20:57:47 -04:00
Thomas Harte
979186e71d
Transcribes the English-language versions of the outstanding tests.
...
Passing these will make me willing to call the 65816 functionality provisionally done, other than making sureI signal VPA, VDA, VPB, etc, correctly.
2020-10-14 13:56:37 -04:00
Thomas Harte
f05e0d956b
Adds a TODO list in order to keep an end in sight.
2020-10-13 21:43:42 -04:00
Thomas Harte
b22aa5d699
Starts transcribing the addressing examples I have into tests.
...
Correspondingly extends the exposed register set and test-machine addressing range.
2020-10-13 21:38:30 -04:00
Thomas Harte
3e6a2adaaf
Corrects absolute, x and absolute, y addressing modes.
2020-10-13 20:30:39 -04:00
Thomas Harte
8f5537aaaa
Attempts to resolve my direct-indirect addressing stumble.
2020-10-13 20:21:53 -04:00
Thomas Harte
a15d4a156b
Starts trying to ensure appropriate address wrapping.
2020-10-12 22:33:43 -04:00
Thomas Harte
6a47571d17
Stops truncating tests by two bytes.
...
Not that it seems to have been problematic.
2020-10-12 21:53:27 -04:00
Thomas Harte
7479dc74ed
Removes printf. It's no longer telling me anything.
2020-10-12 21:52:58 -04:00
Thomas Harte
28da1a724a
Introduces Jeek816 test case.
2020-10-12 21:43:44 -04:00
Thomas Harte
f529eadbec
Corrects 16-bit read-modify-write.
...
Subject to the TODO proviso on 'correct'; has my 6502 prejudice pushed me into unrealistic bus signalling?
2020-10-12 18:36:09 -04:00
Thomas Harte
5dc3cd3a2f
Starts using Jeek816 for a basic native-mode audit. Fixes absolute long addressing.
2020-10-11 22:02:46 -04:00
Thomas Harte
3039a445f0
Ups the 65816 test machine to a full 16mb RAM.
2020-10-11 21:18:01 -04:00
Thomas Harte
82797fd395
Attempts to do the proper thing for interrupts.
2020-10-11 21:10:44 -04:00
Thomas Harte
a0885ab7d0
Implements STP and WAI.
...
Albeit still without fully-implemented reactions to exceptions in general.
2020-10-11 17:56:55 -04:00
Thomas Harte
8eaf1303a3
Attempts proactively to ensure proper RTI behaviour on the 65816.
2020-10-11 15:25:13 -04:00
Thomas Harte
20cbe72985
Ties to 8- or 16-bit those instructions that aren't M/X-dependent.
...
This is technically redundant for PEI, PEA and PER since they have dedicated bus programs anyway, but it's good to be explicit.
2020-10-11 14:38:35 -04:00
Thomas Harte
071ad6b767
I don't think RTL is needed; JML looks like it covers it.
2020-10-10 22:16:35 -04:00
Thomas Harte
0619e49eac
Takes a short at TSB and TRB.
...
Three to go.
2020-10-10 22:00:17 -04:00
Thomas Harte
b8848d8580
Implements TCD, TDC, TCS, TSC.
2020-10-10 21:43:05 -04:00
Thomas Harte
aface1f8be
Implements XBA and XCE.
2020-10-10 21:34:22 -04:00
Thomas Harte
ae87728770
Ensures M and X are exposed to the public interface.
2020-10-10 21:33:56 -04:00
Thomas Harte
28c8ba70c1
Implements REP and SEP and exposes the MX flags generally.
2020-10-10 21:23:59 -04:00
Thomas Harte
486324ecab
This test isn't actually 65816-compatible.
2020-10-10 18:19:48 -04:00
Thomas Harte
6892ac13e8
Corrects BIT. All 65816-applicable Wolfgang Lorenz tests now pass.
2020-10-10 17:47:33 -04:00
Thomas Harte
340ad093a6
Adds 65816 runs of the final tranche of applicable tests.
2020-10-10 17:26:41 -04:00
Thomas Harte
0fe09cd1e4
Knocks SBC into producing likely results; disables Lorenz testing.
2020-10-10 17:13:16 -04:00
Thomas Harte
da4702851f
Fixes ADC.
2020-10-10 16:29:48 -04:00
Thomas Harte
09fba72d58
Adds flag manipulation, ADC and SBC 65816 tests.
...
The latter two fail.
2020-10-10 11:30:15 -04:00
Thomas Harte
d17c90edf7
Corrects ROL d, x.
2020-10-10 11:25:14 -04:00
Thomas Harte
7966592fae
Corrects ROL d.
2020-10-10 11:22:23 -04:00
Thomas Harte
6efe4e1753
Fixes AND, EOR, ORA. Takes an unsuccessful shot at ROL.
2020-10-10 10:53:17 -04:00
Thomas Harte
536c4d45c1
Adds additional 65816 tests, some failing; seeks to improve carry behaviour in ASL and ROL.
2020-10-10 10:11:57 -04:00
Thomas Harte
a02f88fe7c
Confirms a couple more of the easy sets.
2020-10-10 09:34:29 -04:00
Thomas Harte
d9be6ab806
Confirms that a few other simple tests work immediately on the 65816.
2020-10-09 23:26:35 -04:00
Thomas Harte
290598429a
Applies indirect page zero emulation mode addressing constraint to ix addressing.
...
Lorenz's LDA tests now pass in emulation mode.
2020-10-09 23:22:48 -04:00
Thomas Harte
92e72959c3
Makes corrections to ix addressing mode and shift/roll flags.
2020-10-09 23:12:20 -04:00
Thomas Harte
776f014dbe
Attempts LDA tests against the 65816.
...
Result: ix is faulty. Which we already knew.
2020-10-09 22:23:54 -04:00
Thomas Harte
c01bc784b9
Slightly reduces branching.
2020-10-09 22:21:55 -04:00
Thomas Harte
abcd86a294
Fixes accumulator instructions.
2020-10-09 22:18:22 -04:00
Thomas Harte
451f83ba51
Corrects emulation-mode read-modify-writes not to empty the data buffer.
2020-10-09 22:14:42 -04:00
Thomas Harte
b439f40fe2
Corrects INC and DEC.
2020-10-09 22:04:25 -04:00
Thomas Harte
968166b06d
Resolves incorrectly flow after setting up an absolute address.
2020-10-09 21:48:35 -04:00
Thomas Harte
88293909f4
Enables running of a first test on the 65816.
2020-10-09 21:44:47 -04:00
Thomas Harte
9b6c48631d
Removes usage of a JAM instruction to spot end-of-tests.
2020-10-09 21:39:34 -04:00
Thomas Harte
0ed98cbfac
Attempts to fix direct indirect indexed; not yet successful I think.
2020-10-08 22:15:19 -04:00
Thomas Harte
7dde7cc743
Implements altered direct indexed addressing in emulation mode.
2020-10-08 22:02:14 -04:00
Thomas Harte
755627f12d
Corrects direct addressing.
2020-10-08 20:00:01 -04:00
Thomas Harte
f8004d7096
Implements RTI, corrects TAY.
2020-10-08 18:06:11 -04:00
Thomas Harte
0418f51ef2
Takes a shot at emulation-mode 'exceptions'.
...
It's just RTI and correct decimal SBC left of the official 6502s now, I think.
2020-10-08 17:52:13 -04:00
Thomas Harte
054e0af071
Corrects RTS behaviour: the return address on the stack is off by one.
...
Dormann's tests now proceed to a BRK.
2020-10-08 16:55:45 -04:00
Thomas Harte
907c3374c3
Attempts to clean up my JMP/JSR mess.
...
Also takes a step forwards in decimal SBC, but it's not right yet.
2020-10-08 16:48:46 -04:00
Thomas Harte
b578240993
Adds a further error.
...
Clearly I've severely overloaded 'JMP' and not fully thought through where it gets its addresses from.
2020-10-07 21:47:58 -04:00
Thomas Harte
f83ee97439
PHP pushes with the BRK flag set in emulation mode.
2020-10-07 21:37:50 -04:00
Thomas Harte
19aea85184
Corrects CMP, CPX, CPY carry flags.
2020-10-07 21:23:29 -04:00
Thomas Harte
1ba0a117e7
Corrects PLB, PLD, PLP.
2020-10-07 20:23:53 -04:00
Thomas Harte
b510b9d337
Adds PHD, PHK and 8-bit PHP and PLP.
2020-10-07 20:13:12 -04:00
Thomas Harte
b608e11965
Realises that not all non-incrementing PC fetches should be thrown away.
2020-10-07 20:06:27 -04:00
Thomas Harte
e68b3a2f32
Corrects JMP program.
2020-10-07 19:59:29 -04:00
Thomas Harte
f7b119ffe1
Moves temporary logging, fixes branch instructions.
2020-10-07 19:57:58 -04:00
Thomas Harte
a4cec95db1
Corrects load and transfer flag oversights.
2020-10-07 19:36:23 -04:00
Thomas Harte
84c4fa197b
Corrects DEX mapping, notes new Dormann failure case.
2020-10-07 18:48:03 -04:00
Thomas Harte
eac722cf59
Implements enough of ADC and SBC for the Dormann test definitively to fail.
2020-10-07 18:36:17 -04:00
Thomas Harte
7439a326a6
Implements BIT (in regular and immediate forms).
2020-10-07 18:15:18 -04:00
Thomas Harte
5ca1c0747f
Generalises CMP to implement CPX and CPY.
2020-10-07 18:09:56 -04:00
Thomas Harte
466ca38dfa
Corrects TXY and TYX; kudos to PatrickvL for the spot!
2020-10-07 18:05:42 -04:00
Thomas Harte
93b0839036
Knocks out some transfer operations.
...
I'm possibly only seven or eight away from being able to test with complete official-opcode-only 6502 code?
2020-10-06 22:29:34 -04:00
Thomas Harte
e068cbc103
Implements CMP and fixes a zero-flag error on 16-bit operations.
2020-10-06 21:47:26 -04:00
Thomas Harte
5c809e5fbf
Implements rolls and shifts.
2020-10-06 21:34:39 -04:00
Thomas Harte
3933bf49cf
Implements BRL.
2020-10-06 21:28:54 -04:00
Thomas Harte
7065ba4857
Implements the single-byte branches.
2020-10-06 21:24:43 -04:00
Thomas Harte
ebff83018e
Implements the bitwise operators.
2020-10-06 20:17:03 -04:00
Thomas Harte
9ce9167e3c
Formalises work left to do.
2020-10-06 19:12:19 -04:00
Thomas Harte
993eff1d3d
Starts slowly, with flag manipulation.
2020-10-06 16:25:30 -04:00
Thomas Harte
7be983ec00
Slightly improve exposition.
2020-10-05 22:25:20 -04:00
Thomas Harte
18e8d6ce06
Makes an effort to factor out the 6502's [lazy] flags.
...
This is preparatory to deciding which instructions, if any, are worth factoring out.
2020-10-05 22:23:33 -04:00
Thomas Harte
b7ba0d4327
Attempts to complete all addressing modes.
...
So, if bugs didn't exist, it'd just be members of the Operation enum to go.
2020-10-05 17:04:57 -04:00
Thomas Harte
825201f4f2
Adds direct indirect.
2020-10-04 22:11:41 -04:00
Thomas Harte
9a05c68ce7
Attempts direct and direct indexed indirect.
2020-10-04 22:06:25 -04:00
Thomas Harte
d8dccf2500
Attempts a full implementation of MVN and MVP.
2020-10-04 19:21:04 -04:00
Thomas Harte
b416aa640f
Slightly tidies up, eliminating some store bugs.
2020-10-04 19:12:04 -04:00
Thomas Harte
4ebf594b3b
This should bring me up to absolute, y.
...
i.e. next is datasheet program 7.
2020-10-04 19:02:47 -04:00
Thomas Harte
8a83024962
Starts a dash towards just completing the addressing modes for now.
...
This brings me up to the end of absolute long (i.e. 4a on the datasheet).
2020-10-04 18:52:46 -04:00
Thomas Harte
bdc1136b96
Edges towards working short absolute addressing mode.
2020-10-03 21:30:24 -04:00
Thomas Harte
da78dea98f
Merge branch 'master' into 65816
2020-10-03 21:00:29 -04:00
Thomas Harte
dcf8cb14e2
Merge pull request #842 from TomHarte/QtMouseEscape
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Adds F8+F12 as an alternative mouse-release combo for Qt.
2020-10-02 20:37:46 -04:00
Thomas Harte
38912859e1
Adds F8+F12 as an alternative mouse-release combo for Qt.
2020-10-02 20:31:47 -04:00
Thomas Harte
b83d93abc2
Accepts that whether instructions do 8- or 16-bit bus accesses depends on either M or X depending on the operation.
2020-10-02 17:08:30 -04:00
Thomas Harte
36f843bc6e
Ensure std::function is visible to 65816Storage.cpp.
2020-09-29 19:23:38 -04:00
Thomas Harte
15c87e02e9
Ditto for printf.
2020-09-29 18:53:02 -04:00
Thomas Harte
00923eac7c
Ensure assert is visible to 65816Implementation.hpp.
2020-09-29 18:52:25 -04:00
Thomas Harte
a72ac8294c
Adds 65816 alternates to Klaus Dormann's tests.
...
While also correcting a couple of misspellings of his name. Apologies, Klaus!
2020-09-29 18:49:58 -04:00
Thomas Harte
4f03bf754d
Adds the 65816 to SConstruct.
2020-09-29 18:43:39 -04:00
Thomas Harte
78b3ec4b10
The actual work begins: starts implementing 65816 micro-ops.
2020-09-29 18:42:07 -04:00
Thomas Harte
ef1a514785
Introduces 6502Selector, for picking either a 6502 or a 65816 based on a single template parameter.
2020-09-28 21:35:46 -04:00
Thomas Harte
6635876e7e
Performs a bare factoring out of the 6502 bus handler.
2020-09-28 18:43:53 -04:00
Thomas Harte
5645f90abe
Takes a minor first step towards actually performing 65816 instructions.
2020-09-27 22:20:58 -04:00
Thomas Harte
b96cd4d18b
Resolves another unsafe pointer assumption.
2020-09-27 22:20:13 -04:00
Thomas Harte
ad8a2e2cb9
Corrects a long-standing naming obscurity.
2020-09-27 22:19:42 -04:00
Thomas Harte
fa438e5113
Merge branch 'master' into 65816
2020-09-27 15:10:54 -04:00
Thomas Harte
8641494809
Resolve various test-case warnings.
2020-09-27 15:10:29 -04:00
Thomas Harte
f4a23af5d6
Merge pull request #840 from MaddTheSane/patch-1
...
Update 6502TimingTests.swift
2020-09-27 15:02:10 -04:00
Thomas Harte
5449e90b34
Edges towards offering the 65816 as another type of 6502 for testing.
2020-09-26 22:31:50 -04:00
Thomas Harte
1cd664ad85
Adds a sanity check.
2020-09-26 21:43:26 -04:00
Thomas Harte
e680022b1f
Completes the opcode set.
...
A million bugs yet to find.
2020-09-26 21:35:31 -04:00
Thomas Harte
67c2ce2174
Takes a run at completing the stack section.
...
I'm not really sure about BRK though — does it gain a signature on the 65816?
2020-09-26 21:20:01 -04:00
Thomas Harte
596e700b60
Drags myself onto the final page of bus programs.
...
233 opcodes now complete; six bus programs to go.
2020-09-26 20:57:24 -04:00
Thomas Harte
4a53b6e538
Adds push and pull, reaching 229/256 opcodes.
2020-09-26 20:38:29 -04:00
Thomas Harte
687f4bb3bb
Adds relative and relative long bus patterns.
...
Many of the rest cover only one or two opcodes so this puts me at 216/256 opcodes covered; 35/47 bus programs; just more than 5/7 pages.
2020-09-26 20:24:50 -04:00
Thomas Harte
473799cb62
There's not a lot to STP and WAI from a bus program point of view.
2020-09-26 20:18:30 -04:00
C.W. Betts
ce0536cdfa
Update 6502TimingTests.swift
2020-09-26 16:13:27 -06:00
Thomas Harte
3dc22a9fd5
Adds implied and immediate modes.
...
... for 204/256 opcodes covered.
2020-09-26 17:42:42 -04:00
Thomas Harte
f54b655606
Adds d, x and d, y.
2020-09-26 17:26:17 -04:00
Thomas Harte
d2e868ea2b
Adds (d), y; [d], y; and [d].
...
Now covered: 146/256 opcodes, 4/7 pages, 25/47 bus programs.
2020-09-26 16:55:58 -04:00
Thomas Harte
3fc649359a
Transcribes the titles of all remaining bus programs.
...
Thereby frames the distance yet to travel.
2020-09-25 22:29:19 -04:00
Thomas Harte
1512ac11da
Adds (d, x) and (d) modes. Albeit by deferring the hard work.
...
That's: 122/256 opcodes; 22/47 bus programs, ~3.5/7 pages transcribed. Maybe I'll be able to get to the runtime stuff sooner rather than later?
2020-09-25 22:22:30 -04:00
Thomas Harte
5039cc7bb2
Adds direct page.
...
... to cover 106 opcodes.
2020-09-25 22:01:36 -04:00
Thomas Harte
5360a7b4ce
Adds block moves.
...
These are fairly specialised, dealing in two data addresses simultaneously.
2020-09-25 21:49:03 -04:00
Thomas Harte
2957a31f40
Adds absolute, x; absolute,y; and accumulator addressing modes.
...
Now covered: 80/256 opcodes, from 2/6 pages of the data sheet; or 16/47 bus programs.
2020-09-25 21:16:36 -04:00
Thomas Harte
8c11df52bf
Adds absolute long, x.
...
Factors out the commonality of a closing read/write while I'm here.
2020-09-25 19:27:17 -04:00
Thomas Harte
2b7ffcd48f
Takes a run at JSL al.
2020-09-25 18:35:00 -04:00
Thomas Harte
7980a9033e
Adds two-thirds of absolute long.
...
Working total: 31 opcodes covered; 10/47ths of bus patterns.
Next is JSL, which I think will require additional operations.
2020-09-25 18:16:49 -04:00
Thomas Harte
125ddfa513
Pays a little attention to runtime storage; completes the first page of bus patterns.
2020-09-25 18:00:02 -04:00
Thomas Harte
636e929607
Adds a check for 8/16-bit redundancy.
2020-09-25 17:42:42 -04:00
Thomas Harte
22c792dc46
Adds enough logic to start serialising instructions to somewhere.
...
Possibly extraneous for now, but it means I can start stepping and testing.
2020-09-25 17:18:25 -04:00
Thomas Harte
95af1815c8
Completes absolute indexed indirect micro-ops.
...
For the record: this is just six out of forty-seven codes complete. Or about two-thirds of six pages. Plenty to do even before I start trying to interpret these things.
2020-09-24 22:37:31 -04:00
Thomas Harte
d707c5ac95
Switches to generators with stable pointers; adds 2a.
2020-09-24 22:27:20 -04:00
Thomas Harte
5c9192e5e6
Switches to generators for spitting out micro-ops.
...
Hopefully with a lot of parts to factor out naturally.
2020-09-24 17:36:11 -04:00
Thomas Harte
72b5584042
Immediately runs afoul of a read/write difference in the specs between 8/16-bit mode that suggests maybe this isn't a good structure.
...
Perhaps generators of some sort?
2020-09-23 22:28:15 -04:00
Thomas Harte
f9045b5352
Rounds out declaration of the absolutes.
2020-09-23 22:23:23 -04:00
Thomas Harte
f87fe92bc8
Begins a meandering road towards the 65816.
2020-09-23 22:14:42 -04:00
Thomas Harte
669d8e64ab
Merge pull request #838 from TomHarte/MTKViewRace
...
Resolves a minor MTKView main-thread race condition.
2020-09-22 22:18:57 -04:00
Thomas Harte
9447aa38be
Removes debugging printf.
2020-09-22 22:13:54 -04:00
Thomas Harte
a781c3eb4d
Resolves thread-unsafe access of _view.bounds.
2020-09-22 22:13:37 -04:00
Thomas Harte
c0b1308dfd
Merge branch 'Vic20Tests'
2020-09-22 22:08:29 -04:00
Thomas Harte
2d9dd6704a
Merge branch 'master' of github.com:TomHarte/CLK
2020-09-22 22:07:47 -04:00
Thomas Harte
94dba70bbe
Merge pull request #837 from TomHarte/Vic20Tests
...
Further improves 6522 emulation.
2020-09-22 22:07:34 -04:00
Thomas Harte
022ec20e75
Tries to add semantic meaning to the various auxiliary control fields.
...
To consider: decoding at set?
2020-09-22 20:50:39 -04:00
Thomas Harte
41f69405d8
Don't decrement timer 1 from the system clock when in PB6 mode.
...
TODO: rest of PB6 mode.
2020-09-21 22:39:49 -04:00
Thomas Harte
5741e22e29
Switch back to debug-by-default builds.
2020-09-20 18:22:13 -04:00
Thomas Harte
8e242eea54
Ensures timer-linked PB7 output is actually output.
2020-09-20 15:03:26 -04:00
Thomas Harte
703065a0a5
Takes a run at timer-linked PB7 output behaviour.
...
Seemingly sufficiently to pass the VICE test (which I've transcribed), though with some guesswork.
2020-09-20 14:51:59 -04:00
Thomas Harte
291aa42fe1
Corrects test target.
2020-09-19 21:20:37 -04:00
Thomas Harte
8fc3496cc9
Merge pull request #836 from TomHarte/Vic20Tests
...
Corrects a couple of minor VIA timer issues
2020-09-17 21:56:43 -04:00
Thomas Harte
e807a462a1
My new reading is that only a write to the counter should affect the interrupt flag.
2020-09-17 21:31:29 -04:00
Thomas Harte
18790a90ae
Ensures timer 2 doesn't use timed behaviour when in pulse mode.
2020-09-17 21:09:32 -04:00
Thomas Harte
21afc70261
Adds formal data-sheet names.
2020-09-17 19:00:46 -04:00
Thomas Harte
7bb74af478
Merge pull request #835 from TomHarte/ErrantScan
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Allows for permitted 1/32nd timing error in `time_multiplier_`.
2020-09-17 18:17:37 -04:00
Thomas Harte
894269aa06
Allows for permitted 1/32nd timing error in time_multiplier_.
2020-09-17 18:12:21 -04:00
Thomas Harte
8b16da9695
Merge pull request #834 from TomHarte/FloatingSpeaker
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Resolves lowpass-speaker position aliasing
2020-09-16 19:05:54 -04:00
Thomas Harte
f783ec6269
Since input and output are floating point, using an integer Stepper is not appropriate.
2020-09-16 18:53:44 -04:00
Thomas Harte
22c9734874
Merge pull request #832 from TomHarte/MetalScanTarget
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Adds a Metal ScanTarget, for macOS.
2020-09-16 18:19:58 -04:00
Thomas Harte
a17d0e428f
Protects against some further uninitialised values.
2020-09-16 18:15:57 -04:00
Thomas Harte
bb57f0bcc7
Ensures all 6560 properties have a valid default value.
2020-09-16 17:24:18 -04:00
Thomas Harte
b1aefbfe85
Separates asserts.
2020-09-15 23:24:06 -04:00
Thomas Harte
061288f5a7
Add the Macintosh to the Mac kiosk mode informal test set.
2020-09-15 22:49:00 -04:00
Thomas Harte
5a53474536
Ensure MultiKeyboard deconstructs properly.
2020-09-15 22:48:44 -04:00
Thomas Harte
18d0fff8da
Graduates the Atari ST.
2020-09-15 22:46:38 -04:00
Thomas Harte
0ac2145740
Add Metal/OpenGL distinction.
2020-09-15 22:43:39 -04:00
Thomas Harte
bc8787ded6
Improves macro safety.
2020-09-15 22:26:33 -04:00
Thomas Harte
69d21daaa3
Improves commentary.
2020-09-15 22:21:05 -04:00
Thomas Harte
5651ef606d
Resolves failure to advance video address when output is blocked.
2020-09-15 22:20:06 -04:00
Thomas Harte
b831b31382
Adds a further sanity check.
2020-09-15 17:04:04 -04:00
Thomas Harte
2fd5cc056c
Adds std::atomic_thread_fences, but these seem not to be a magic bullet.
2020-09-15 16:34:34 -04:00
Thomas Harte
82dbdf7dfc
Switches to using regular linear interpolation for supersampling.
2020-09-14 22:36:00 -04:00
Thomas Harte
eb9903cd10
Defensively disables allocation of anything outside of visible lines.
2020-09-14 22:29:05 -04:00
Thomas Harte
227e98d6d7
Slightly simplifies control flow.
2020-09-14 22:27:25 -04:00
Thomas Harte
35476063b7
Resolves potential data races.
2020-09-14 21:07:50 -04:00
Thomas Harte
8557bb2136
Adds minor exposition.
2020-09-14 20:39:52 -04:00
Thomas Harte
c0c7818d5d
Reintroduces screenshots.
2020-09-14 20:33:05 -04:00
Thomas Harte
ceeadd6a33
Edges up towards reimplementing screenshots.
2020-09-13 22:30:17 -04:00
Thomas Harte
1a2545fdea
Excises dangling references to OpenGLView, reinstates display link.
2020-09-13 22:11:51 -04:00
Thomas Harte
c5e9a74c88
Uses DisplayMetrics to disable supersampling when too slow.
2020-09-13 21:07:59 -04:00
Thomas Harte
d7972a7b86
Enforces across-the-board supersampling.
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I'm damned if I can figure out how to talk an MTKView, or Metal in general, into supersampling so as a first effort this does it in software.
2020-09-13 19:30:26 -04:00
Thomas Harte
7dd4c67304
Corrects access to data_type_size, adds sanity check on output area return.
2020-09-13 18:59:27 -04:00
Thomas Harte
e113780fd1
Minor: ensures no possibility of a dangling(-ish) pointer within the Mac video.
2020-09-10 22:13:19 -04:00
Thomas Harte
e32ae6c191
Adds UGLY HACKs to workaround uncovered issues in the OpenGL scan target.
2020-09-10 22:10:24 -04:00
Thomas Harte
bcaceff378
Simplifies in-Metal transform logic, loading responsibility for setup onto the CPU.
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I think I've also finally excised whatever order-of-operations issue I was having with regard to non-4:3 displays.
2020-09-10 20:32:58 -04:00
Thomas Harte
d7b405c6f8
Ensures direct luminance -> 'RGB' video doesn't go down the composition pipeline.
2020-09-10 13:20:40 -04:00
Thomas Harte
edf8cf4dc6
Completes the set of with/without gamma, and ensures correct alpha selection.
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Also culls some other repetitive TODOs.
2020-09-09 19:28:38 -04:00
Thomas Harte
dfcc8e9822
Switches some of the interpolated fields to half precision.
2020-09-09 18:17:05 -04:00
Thomas Harte
016e96e6f8
Extends usage of half. Possibly towards its conclusion.
2020-09-09 15:10:19 -04:00
Thomas Harte
e7ce03c418
Attempts to ensure initial finalised line texture state.
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This was an attempt to remove the vertical line on the left of a composite display. Obviously the cause is not as suspected.
2020-09-09 13:15:21 -04:00
Thomas Harte
3d392dd81d
Completes conversion of composite & S-Video per-pixel processing to 16-bit floats.
2020-09-09 13:02:04 -04:00
Thomas Harte
42d810db7f
Switches per-pixel uniforms to halfs.
2020-09-09 10:53:09 -04:00
Thomas Harte
18571e8351
Also calculates a chroma kernel size, though it isn't used for anything yet.
2020-09-08 20:08:56 -04:00
Thomas Harte
dda1649ab7
Introduces smaller luma kernel functions where useable.
2020-09-08 19:55:37 -04:00
Thomas Harte
c82e0df071
Starts a transition towards half-precision arithmetic.
2020-09-08 19:37:36 -04:00
Thomas Harte
06b7ea5a6e
Strips the luma kernel back to 1d.
2020-09-08 19:15:19 -04:00
Thomas Harte
c49fcb9ec9
Based on further play: one box filter to separate luma/chroma, another to filter chroma, plus a FIR sharpen on luma.
2020-09-08 16:35:05 -04:00
Thomas Harte
0e44d6d214
Experiments with an all-box filter.
2020-09-08 16:19:08 -04:00
Thomas Harte
6adad7fbf5
Starts experimenting again with box filters.
2020-09-07 22:47:49 -04:00
Thomas Harte
de6ed7b615
Corrects phase-linked luminance support.
2020-09-07 20:53:28 -04:00
Thomas Harte
07dcb4dbb1
Starts reintroducing brightness, gamma and transparency for composite and S-Video pipelines.
2020-09-07 18:19:13 -04:00
Thomas Harte
e99896eadc
At least nominates alpha, gamma and brightness to metal.
2020-09-04 16:07:58 -04:00
Thomas Harte
489701afcb
Fixes window resizing.
2020-09-03 21:28:39 -04:00
Thomas Harte
55e576cc57
Ensures unpainted areas in composite displays have a non-asymptotic effect on luminance calculations.
2020-09-03 21:10:30 -04:00
Thomas Harte
6bd8ec9545
Alas, 1.0 seems to be the limit for proper artefact colour.
2020-09-03 20:53:45 -04:00
Thomas Harte
5cd8d86eef
Switches to dynamic generation of the 'sharpness' filter, correcting issues with the Apple II (amongst others).
2020-09-03 20:48:44 -04:00
Thomas Harte
74d0acdaec
Fixes non-RGB colour composite generation.
...
The hard-coded sharpen filter proves to be a really bad fit for the Apple II though.
2020-09-03 19:04:17 -04:00
Thomas Harte
0288a1974b
Tries: separate filters for chroma and luma, plus a post-separation sharpen filter on the latter.
2020-09-03 13:18:21 -04:00
Thomas Harte
6efd8782fe
Tweaks coefficients some more; makes sure that data is never larger than the intermediate buffers.
2020-09-02 20:14:41 -04:00
Thomas Harte
8bab9d5d60
Corrects S-Video and composite generation for RGB[1/2/4] sources.
...
Also toys with a double luminance filter in order to try to sharpen chrominance. But maybe I should be looking at other convolutions entirely?
2020-09-02 19:13:54 -04:00
Thomas Harte
6ef1dfd8be
Sets a more realistic colour subcarrier amplitude.
2020-09-02 15:52:05 -04:00
Thomas Harte
7e58648743
Corrects front-running bug, plays further with colour amplitude.
2020-09-02 15:51:48 -04:00
Thomas Harte
0f0c3e616d
Tweaks some numbers.
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I'm largely treading water here. Probably time to think about the race.
2020-09-02 08:17:01 -04:00
Thomas Harte
c7ce65ea4c
Attempts fully to restore composite video.
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Subject to some sort of nasty race condition for the time being.
2020-09-02 08:03:10 -04:00
Thomas Harte
c36247b609
Ensures reuse of offset buffers.
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There seems to be some sort of epic race condition as the drawing pipeline lags though. Will need to investigate.
2020-09-01 22:11:48 -04:00
Thomas Harte
15296e43a4
Attempts correctly to set up the CPU side of a composite video pipeline, at least.
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So: I think this is really close, but I'm out of time for the day.
2020-09-01 21:58:33 -04:00
Thomas Harte
f2929230a2
[Experimentally] introduces blending between computed S-Video fragments.
2020-09-01 21:37:36 -04:00
Thomas Harte
bf252b8061
Fixes sizing of buffers to the current output.
2020-09-01 21:33:54 -04:00
Thomas Harte
9e2bf2af7e
Restricts S-Video processing to updated lines.
2020-09-01 21:27:40 -04:00
Thomas Harte
245f2654f0
Shifts S-Video processing into the compute shader.
2020-09-01 20:37:11 -04:00
Thomas Harte
67ca298a72
Forces a no-op compute shader into the S-Video pipeline.
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The intention is to restrict the area acted over, and to do the S-Video filtering in there. Then I'll just need two such stages for composite.
2020-09-01 18:39:52 -04:00
Thomas Harte
67d4dbf91a
Starts girding for a third pipeline.
2020-08-31 20:01:59 -04:00
Thomas Harte
b344269140
I think I accept the need for intermediate steps now.
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This allocates storage.
2020-08-30 20:21:01 -04:00
Thomas Harte
bb547610f2
Adds commentary, shrinks some intermediate texture sizes.
2020-08-30 12:06:29 -04:00
Thomas Harte
1e1f007bb7
Possibly convinces myself that no-separation chroma/luma isn't practical.
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... as appealing as it may be, were filters perfect.
2020-08-29 21:25:49 -04:00
Thomas Harte
c40d858f02
Switches back to angular stuff at input resolution; ensures all S-Video modes work.
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Now to roll back onto composite. Fingers crossed!
2020-08-29 20:54:46 -04:00
Thomas Harte
3d564d85fd
Proves that per-pixel sine/cos evaluation avoids phase issues.
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Even in PAL mode. But I'd rather not _require_ this as it kind of negates directly-sampled input.
2020-08-29 18:53:37 -04:00
Thomas Harte
02cea40ffa
Attempts to avoid introducing phase error in scanToComposition.
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Also brightens S-Video up to RGB levels.
2020-08-25 22:41:37 -04:00
Thomas Harte
e502d336db
Having decided that these things probably need to be separate, starts drilling down on S-Video.
2020-08-25 22:05:19 -04:00
Thomas Harte
807cb99f6d
Composite angles are signed.
2020-08-23 21:39:04 -04:00
Thomas Harte
8b6879a782
Brief detour: introduces myself to C++11 multiline string literals.
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A full cleaning coming soon, I imagine.
2020-08-23 21:18:38 -04:00
Thomas Harte
7ca0362f23
Treads water.
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Difficult current question: why does the Atari 2600's display change colours as the display tries to achieve horizontal lock? Phase should be unchanged. Ergo something is amiss.
2020-08-23 21:03:26 -04:00
Thomas Harte
56c7bd242a
Marginally tidies.
2020-08-22 16:38:36 -04:00
Thomas Harte
5c6112415a
Sets appropriate clear colour for composition render pass.
2020-08-21 22:41:54 -04:00
Thomas Harte
bf6a0c9fc4
Achieves a return of composite colour for RGB-producing machines.
2020-08-21 22:06:36 -04:00
Thomas Harte
d54b937ab6
Starts trying to do actual composite processing.
2020-08-21 21:11:25 -04:00
Thomas Harte
7c23c32e44
Corrects composition colour phase.
2020-08-20 20:45:45 -04:00
Thomas Harte
4e21d24b5f
Corrects composition colour amplitude.
2020-08-20 20:34:37 -04:00
Thomas Harte
ad6fb85fda
Corrects use of composition buffer.
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Something is still very obviously amiss in colour processing somewhere down the line, but the correct forms are once again visibly in evidence.
2020-08-20 20:21:28 -04:00
Thomas Harte
5dc39a5d24
Adds the composition render pass.
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Albeit that something here doesn't work at present.
2020-08-19 21:56:53 -04:00
Thomas Harte
3597f687de
Continues sidling towards composite & S-Video handling.
2020-08-19 21:20:06 -04:00
Thomas Harte
8811506adf
Starts towards building a compound[/composition?] buffer.
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I now need to discover whether I can use natural integer texture coordinates.
2020-08-17 22:10:02 -04:00
Thomas Harte
11dec6fc0f
Avoids a redundant clear.
2020-08-17 22:09:15 -04:00
Thomas Harte
59c4c8233f
Generalises existing scanToDisplay to add lineToDisplay.
2020-08-17 21:15:19 -04:00
Thomas Harte
9da79d2d81
Clarifies scaling logic.
2020-08-17 20:29:46 -04:00
Thomas Harte
246b474a25
Removes ONE_BIG_LOCK, having effectively neutered it anyway.
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Starts work on more explicit API usage validation. Maybe the issue isn't a race condition?
2020-08-16 22:09:25 -04:00
Thomas Harte
27e8a3a1b5
Obeys modals' zoom.
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Subject to an attempt at factoring aspect ratio differences.
2020-08-16 21:11:43 -04:00
Thomas Harte
745797b596
Introduces a stencil buffer plus the inter-frame clearing it allows.
2020-08-16 16:42:32 -04:00
Thomas Harte
940e9e037e
Adds first_scan to LineMetadata.
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Also reorders `Line` fields to match `Scan` fields, just for visual consistency.
2020-08-16 08:59:37 -04:00
Thomas Harte
512c0079a9
Makes thread safe.
2020-08-15 21:52:55 -04:00
Thomas Harte
645c29f853
Adds an intermediate buffer to correct inter-frame smoothing.
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Also goes someway back to the old scan output scheduling, albeit presently with limited thread safety.
2020-08-15 21:24:10 -04:00
Thomas Harte
e55945674d
Reduces main thread blocking.
2020-08-14 22:16:49 -04:00
Thomas Harte
7ac88536dd
Respects machine aspect ratio.
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To an extent. Doesn't currently deal with cropping of machines when the window aspect ratio is smaller.
2020-08-14 21:24:25 -04:00
Thomas Harte
230b9fc9e6
Permits multiple simultaneous scan reading ranges.
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Also updates the OpenGL scan target as per the latest movements of things.
2020-08-12 22:08:41 -04:00
Thomas Harte
27ca782cac
Enables blending; attempts to enable frame preservation.
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The latter seems to be evidencing a double buffer at play. More investigation required.
On the plus side, the direct route is still well within GPU budget at 4k on my Core M. So a huge improvement there.
2020-08-12 19:34:07 -04:00
Thomas Harte
a136a00a2f
Takes a shot at adding RGB -> S-Video and composite conversion, for all RGB types.
2020-08-11 22:11:50 -04:00
Thomas Harte
637ec35d6a
Adds getters for standard colour-space conversion matrices.
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These are just more details on the meaning of the colour spaces, so I think they belong here.
2020-08-11 19:58:57 -04:00
Thomas Harte
4b55df1cb4
Starts upon a macro-oriented means of RGB input function generation.
2020-08-10 22:03:39 -04:00
Thomas Harte
b9309268ba
Possibly finally succeeds at moving Accelerate.framework to where it should be.
2020-08-10 21:46:11 -04:00
Thomas Harte
8fa89baf54
Slightly cleans up Xcode project; reenables kiosk-for-Mac builds.
2020-08-10 21:43:32 -04:00
Thomas Harte
8374a5e579
Adds superficially correct compositeSampleLuminance8Phase8 function.
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Thereby uncovering a minor error in my decoding of colour phase.
2020-08-10 21:33:59 -04:00
Thomas Harte
525233e10b
Ensures all input data types are parseable in Metal.
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Though now I need to think a bit more about the best way to compose signal-type conversions, and whether output-type calculations (i.e. gamma, brightness) are applied.
2020-08-10 19:47:47 -04:00
Thomas Harte
eadda6a967
Further strips OpenGL from the macOS target.
2020-08-09 22:17:27 -04:00
Thomas Harte
3d6590af89
Throws out a little more OpenGL.
2020-08-09 22:11:31 -04:00
Thomas Harte
28d933d5d6
Does just enough to get 8-bit RGB and 1-bit luminance machines to display.
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Assuming an 'RGB' output.
2020-08-09 21:19:07 -04:00
Thomas Harte
c1dc42a094
Add comment on latent design aim.
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In the hope that I don't forget why I did this.
2020-08-09 21:18:23 -04:00
Thomas Harte
6384ff3ee7
Add fix for data_type_size_ for owners that don't change texture pointer upon new modals.
2020-08-09 21:17:51 -04:00
Thomas Harte
a118594c8b
Hacks to make RGB1 visible (in a fashion).
2020-08-09 20:45:51 -04:00
Thomas Harte
93c6105442
Corrects calculation of dirty texture area.
2020-08-09 20:45:14 -04:00
Thomas Harte
ced4a75a1a
Adds note on the buffering scan target's minor adaptation of data_offset.
2020-08-09 20:44:46 -04:00
Thomas Harte
57fecdc09e
Ties everything together in an attempt to display RGB scans.
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I'm actually just getting a mess of pixels, but it's something!
2020-08-09 18:41:15 -04:00
Thomas Harte
cd491bb6e0
Cleans up project file; macOS 10.13 is definitely the deployment target.
2020-08-09 18:27:57 -04:00
Thomas Harte
f16ad8f71d
Takes a shot at submitting texture changes.
2020-08-09 17:59:52 -04:00
Thomas Harte
e340685a99
Seemingly proves that proper geometry is reaching Metal by drawing scans.
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No in-buffer accumulation yet, but this is progress. If I can add accumulation and stencil clearing, I'm not doing badly.
2020-08-08 23:11:44 -04:00
Thomas Harte
df89a8771c
Makes an attempt to have the emulator fill the actual GPU buffers.
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Not that they're drawn from correctly yet. I might first take a run at a new quick-path output route for emulated RGB displays, that just seeks to use the scans directly. No intermediate buffers. Besides probably being a good feature, it'll be a good way to ramp further up with Metal.
2020-08-08 22:49:02 -04:00
Thomas Harte
bdcf266e45
Having learnt a bit more: eliminates Metal attribute tags, switches to more natural expression of structs.
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Also thereby eliminates the need for a forced alignas(4) on various structs.
2020-08-08 17:27:32 -04:00
Thomas Harte
edf41b06fd
Eliminates the quad buffer.
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Vertices can be adduced from vertex ID.
2020-08-08 17:12:49 -04:00
Thomas Harte
38960a08d6
Adds adjustment for display aspect ratio.
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While also realising that I appear to be getting away without an MTLVertexDescriptor for Scans. Maybe OpenGL has prejudiced me, and they're actually optional for interleaved data?
2020-08-07 22:29:24 -04:00
Thomas Harte
fbda7aab23
Does just enough to get the correct (aspect ratio aside) output of scan outlines.
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So, up next, can I start streaming these things?
2020-08-07 22:20:01 -04:00
Thomas Harte
c575aa0640
Adds a buffer for scans, and posts two test instances.
2020-08-07 22:03:54 -04:00
Thomas Harte
583f6b1ba2
Modifies BufferingScanTarget to allow has-a relationship.
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I might switch fully to has-a. Further consideration required.
2020-08-07 22:03:27 -04:00
Thomas Harte
bb55ecc101
Disables --volume for kiosk mode testing.
2020-08-07 21:19:53 -04:00
Thomas Harte
4421acef34
Gets some uniforms in on the action.
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With some effort towards scans, but incompletely so.
2020-08-07 21:19:17 -04:00
Thomas Harte
4c9418f59a
Guarantees alignof(4) on all GPU-bound structures.
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Taken as given: Metal's requirement here is reasonable enough that it'll either be the same as other frameworks, or at least possibly help them down a fast path.
2020-08-07 21:18:08 -04:00
Thomas Harte
219923bd63
Reduces vertex size, draws a quad.
2020-08-05 21:33:25 -04:00
Thomas Harte
7551782a25
Switches to interleaved vertex data.
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This more closely relates to what I actually want to do.
2020-08-05 17:27:43 -04:00
Thomas Harte
5c836604c0
Reenable MaserSystem code.
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Accidental/poor branch management is evidenced here.
2020-08-04 21:50:54 -04:00
Thomas Harte
eff24a8726
My first baby steps in Metal continue; here's a triangle.
2020-08-04 21:49:01 -04:00
Thomas Harte
72df6e52cd
This is possibly at least dispatching an empty command buffer correctly.
2020-08-04 19:44:56 -04:00
Thomas Harte
e235a45abb
Breaks all output.
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... by switching out NSOpenGLView for MKLView with no drawing infrastructure yet in place.
2020-08-04 18:22:14 -04:00
Thomas Harte
d20c11e401
Merge pull request #831 from TomHarte/MultiKeyboard
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Ensures that the MultiKeyboard functions.
2020-07-31 22:08:08 -04:00
Thomas Harte
693b889fdd
Ensures that the MultiKeyboard functions.
2020-07-31 21:48:20 -04:00
Thomas Harte
671f48dc10
Merge pull request #830 from TomHarte/MSXCrash
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Restores audio to multimachines
2020-07-31 18:31:23 -04:00
Thomas Harte
7b1708f0bc
Gets explicit that the delegate_ doesn't need a memory barrier.
2020-07-31 18:21:47 -04:00
Thomas Harte
f34a9b4346
Corrects audio output from the multi-speaker.
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Specifically: local duplication of the delegate is unnecessary, and leads to confusion.
2020-07-31 18:18:19 -04:00
Thomas Harte
1e6d03246b
Merge pull request #829 from TomHarte/MSXCrash
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Ensures proper handover of speaker state when picking in a multimachine.
2020-07-30 23:04:55 -04:00
Thomas Harte
cdde57fcf2
Remove unused code.
2020-07-30 23:02:01 -04:00
Thomas Harte
c0a61ac1ee
Ensures proper handover of speaker state when picking in a multimachine.
2020-07-30 22:50:32 -04:00
Thomas Harte
9c97c0a906
Merge pull request #828 from TomHarte/LockFreeQueue
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Completes LockFreeQueue branch.
2020-07-30 21:46:56 -04:00
Thomas Harte
8cacab196d
Merge branch 'master' into LockFreeQueue
2020-07-30 21:43:25 -04:00
Thomas Harte
b14bedbe29
Merge pull request #817 from TomHarte/LockFreeQueue
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Fully splits buffering from drawing for the existing OpenGL scan target.
2020-07-30 21:42:20 -04:00
Thomas Harte
6bc66d8b96
Tidies, ensures ::will_change_owner acquires the producer mutex.
2020-07-29 23:18:03 -04:00
Thomas Harte
23f381f381
Fixes frame_is_complete_, gets rid of active_line_, explains ONE_BIG_LOCK in set_write_area.
2020-07-29 23:03:38 -04:00
Thomas Harte
51ad423eca
Resolves off-by-one error in line writing, adds diagnostic one-big-lock option.
2020-07-29 22:45:13 -04:00
Thomas Harte
72a8fef989
Switches to much more straightforward Line/LineMetadata storage.
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Spoiler: covering this whole segment behind producer_mutex_ seems to resolve all output issues, so clearly the existing logic isn't functioning correctly. Making it simpler seems like a pretty obvious way to get to the bottom of that.
2020-07-29 21:49:17 -04:00
Thomas Harte
02f41ee513
This has become the general producer mutex, might as well name it as such.
2020-07-29 21:34:07 -04:00
Thomas Harte
9410594486
Merge branch 'master' into LockFreeQueue
2020-07-29 21:22:19 -04:00
Thomas Harte
1c6223cc11
Merge pull request #825 from TomHarte/Microdisc
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Gives Qt disk controllers independent ROM/RAM selection logic.
2020-07-29 21:21:29 -04:00
Thomas Harte
82d6a5387f
Gives Qt disk controllers independent ROM/RAM selection logic.
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In particular, this fixes the Microdisc.
2020-07-29 21:06:41 -04:00
Thomas Harte
5165e65021
Reduces scan_buffer_ to a saner size.
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Albeit still probably overspecified.
2020-07-28 22:36:57 -04:00
Thomas Harte
1942742d73
Resolves thread data race on Macintosh audio output.
2020-07-28 22:21:52 -04:00
Thomas Harte
b7760bb052
Reorders code, gets explicit about memory ordering.
2020-07-28 22:02:22 -04:00
Thomas Harte
2470055d90
Hides the modals.
2020-07-27 23:33:39 -04:00
Thomas Harte
62be2a2eec
Merge branch 'master' into LockFreeQueue
2020-07-27 23:18:45 -04:00
Thomas Harte
b1e062945e
Merge pull request #821 from TomHarte/QtThreading
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Qt issue mega ticket
2020-07-27 21:19:12 -04:00
Thomas Harte
3db4a8c312
Attempts to improve vsync deadline estimation.
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Also increases probability of bad estimation being discarded.
2020-07-27 21:08:00 -04:00
Thomas Harte
db8e1b0edf
Adds feedback on unidentified ROMs.
2020-07-27 20:45:47 -04:00
Thomas Harte
71c3f58c99
Provides user feedback upon improper command-line usage.
2020-07-27 20:40:38 -04:00
Thomas Harte
7c05b1788e
Ensures proper thread confinement for updateStatusBarText.
2020-07-27 20:25:52 -04:00
Thomas Harte
77c5b86acc
Moves ownership of the scan and line buffers out of the BufferingScanTarget.
2020-07-26 22:46:03 -04:00
Thomas Harte
bc6426313e
Localises three of the four macros.
2020-07-26 17:54:33 -04:00
Thomas Harte
8bef7ff4c5
Makes all three PointerSets and is_updating_ private.
2020-07-26 17:27:19 -04:00
Thomas Harte
a2db6ddea5
Add link to Snap releases.
2020-07-25 23:00:29 -04:00
Thomas Harte
f9f500c194
Merge branch 'master' into LockFreeQueue
2020-07-24 22:29:45 -04:00
Thomas Harte
6ad1e3e17e
Merge pull request #819 from TomHarte/Warnings
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Resolves GCC 7 warnings.
2020-07-24 22:17:50 -04:00
Thomas Harte
e097a841d2
Adds a c++1z fallback for SDL builds, too.
2020-07-24 22:01:22 -04:00
Thomas Harte
fa95a17af5
Resolves receive_bit_count-unused warnings.
2020-07-24 21:59:27 -04:00
Thomas Harte
b961665985
Ensures WOZ2 behaviour even if type_ has an invalid value.
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This pleases GCC 7.
2020-07-24 21:56:20 -04:00
Thomas Harte
8af35bc6bb
Resolves signed comparison mismatches.
2020-07-24 21:55:33 -04:00
Thomas Harte
9b75287a52
Merge pull request #818 from TomHarte/QtC++1z
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Add c++1z as a config option, for older versions of Qt.
2020-07-24 16:34:04 -04:00
Thomas Harte
84d5316aa7
Add c++1z as a config option, for older versions of Qt.
2020-07-24 16:32:59 -04:00
Thomas Harte
89acb70091
Slightly reorganise.
2020-07-24 16:20:20 -04:00
Thomas Harte
66165a6dea
Add missing include files.
2020-07-23 23:24:24 -04:00
Thomas Harte
84dcf9925b
Updates Scons and Qt projects to include new files.
2020-07-23 23:14:10 -04:00
Thomas Harte
ee1d7eb61f
Makes more buffer-specific stuff private.
2020-07-23 23:06:14 -04:00
Thomas Harte
e260f92988
Privatises write_pointers_mutex_ and write_pointers_.
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Also gives subclasses control over write-area texture space allocation.
2020-07-23 22:54:40 -04:00
Thomas Harte
74788ccf8e
Pulls the BufferingScanTarget into a separate file.
2020-07-22 22:16:47 -04:00
Thomas Harte
0da5c07942
Starts splitting ring-buffer stuff from OpenGL stuff.
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Initially via two very codependent classes.
2020-07-21 22:49:46 -04:00
Thomas Harte
e8cd5a0511
Merge pull request #816 from TomHarte/RelaxedTracks
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Corrects a regression in disk image handling; liberalises Disk II analyser
2020-07-20 19:53:34 -04:00
Thomas Harte
5ebbab6f35
Further relax Apple GCR static analysis requirements.
2020-07-20 19:50:33 -04:00
Thomas Harte
84dd194afd
Corrects test for ::tracks_differ.
2020-07-20 19:48:20 -04:00
Thomas Harte
e1ad1a4cb6
Update Qt status.
2020-07-20 09:17:43 -04:00
Thomas Harte
9de43dac95
Merge pull request #815 from TomHarte/WOZ2
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Support WOZ 2 disk images
2020-07-19 23:22:55 -04:00
Thomas Harte
47f121ee4c
Mark WOZs as read-only, with exposition as to why.
2020-07-19 00:08:49 -04:00
Thomas Harte
d8b699c869
Corrects index pulse signalling.
2020-07-19 00:06:27 -04:00
Thomas Harte
a7855e8c98
Ensure float literals are floats.
2020-07-17 23:18:41 -04:00
Thomas Harte
8dcb48254a
Simplifies calculations very slightly.
2020-07-17 23:18:08 -04:00
Thomas Harte
f6b7467d75
Implement custom tracks_differ; support WOZ 2 3.5" drive geometry properly.
2020-07-17 22:09:55 -04:00
Thomas Harte
9d1d162cc8
Add an ability to avoid track flushing when file formats have sub-track precision.
2020-07-17 22:09:21 -04:00
Thomas Harte
4ee29b3266
Switches disk seeking logic fully to floating point.
2020-07-17 22:08:58 -04:00
Thomas Harte
cbb0594e6b
Use 16-sector state machine even with the 13-sector boot ROM.
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I think I've proven that the Disk II doesn't decode the 13-sector state machine correctly. Work to do there.
2020-07-16 23:27:27 -04:00
Thomas Harte
8aeebdbc99
Remove redundant comment.
2020-07-16 23:26:45 -04:00
Thomas Harte
c7ef258494
Ensures that five-and-three sectors pass static analysis.
2020-07-16 21:44:14 -04:00
Thomas Harte
4fec7c82ab
Very minor grammar improvement.
2020-07-16 21:43:03 -04:00
Thomas Harte
9a952c889f
Fixes exit from random gain noise.
2020-07-15 22:44:54 -04:00
Thomas Harte
8da7806ee9
Liberalises segment parser not necessarily to require a standard epilogue.
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It seems that real disks don't always have them; I guess the boot ROM doesn't require one.
2020-07-15 22:27:04 -04:00
Thomas Harte
aed61f6251
Implements latest advocated MC3470 behaviour.
2020-07-15 19:34:05 -04:00
Thomas Harte
d065d6d98f
Adds read-only WOZ 2 support.
2020-07-15 19:15:03 -04:00
Thomas Harte
ab20a23f2b
Merge pull request #814 from TomHarte/ZX81Autosrun
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Ensures the ZX80 and ZX81 automatically RUN software that doesn't do that itself
2020-07-14 23:53:17 -04:00
Thomas Harte
e1c57b6fbe
Further ensures both ZX80 and ZX81 functionality.
2020-07-14 23:45:51 -04:00
Thomas Harte
371c26251c
Switches strategy for the ZX80.
2020-07-14 22:36:04 -04:00
Thomas Harte
645d198bee
Causes ZX80 and ZX81 software that doesn't already autorun to do so.
2020-07-14 22:17:56 -04:00
Thomas Harte
ab1a999df4
Merge pull request #812 from TomHarte/QtLoadAtLaunch
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Qt: Attempt to load a file if passed on the command line.
2020-07-13 22:00:11 -04:00
Thomas Harte
42f2bf05bf
Attempt to load a file if passed on the command line.
2020-07-13 21:51:55 -04:00
Thomas Harte
5e55d3d7c7
Merge pull request #660 from TomHarte/FurtherSCC
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IN PROGRESS. More fully implements the Macintosh's SCC.
2020-07-12 00:05:59 -04:00
Thomas Harte
1288369865
Merge branch 'master' into FurtherSCC
2020-07-11 23:54:40 -04:00
Thomas Harte
d86b0d4213
Merge pull request #811 from TomHarte/QtPaths
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Ensures qmake paths are explicit.
2020-07-11 17:47:29 -04:00
Thomas Harte
d91cf598be
Ensures qmake paths are explicit.
2020-07-11 17:46:32 -04:00
Thomas Harte
9be56aa4a2
Merge pull request #809 from TomHarte/QtActivity
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Exposes activity lights in Qt.
2020-07-10 23:32:38 -04:00
Thomas Harte
86737454a0
Exposes activity lights in Qt.
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As a status bar, which is a bit of a quick fix, but it's better than not displaying this information.
2020-07-10 23:18:38 -04:00
Thomas Harte
f0c0caf800
Merge pull request #807 from TomHarte/QtSDL
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Works around Qt's keyboard limitations, under X11 at least
2020-07-10 22:36:27 -04:00
Thomas Harte
223a960a06
Implements standard keyboard -> joystick mapping.
2020-07-10 22:30:43 -04:00
Thomas Harte
f72570386c
Installs and removes an 'Input' menu where required.
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Also ensures safe shutdown of a second machine.
2020-07-09 23:47:38 -04:00
Thomas Harte
56e5491e5c
Ensures safe startup.
2020-07-09 23:06:32 -04:00
Thomas Harte
be1c3e9136
Ensures key state is cleared upon activation changes.
2020-07-08 21:31:29 -04:00
Thomas Harte
2d223305eb
Correct subject of switch.
2020-07-08 00:49:29 -04:00
Thomas Harte
48c2dcf50e
Introduce provisional X11 bindings.
2020-07-08 00:46:29 -04:00
Thomas Harte
fa26c82273
Undoes extra dependency, checks for X11 at runtime.
2020-07-08 00:15:44 -04:00
Thomas Harte
0763ae38dd
Attempts to add conditional include for non-Mac UNIX only.
2020-07-07 23:57:32 -04:00
Thomas Harte
2230ac6c38
Merge pull request #800 from TomHarte/QtProject
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UNREADY. Adds a provisional Qt target.
2020-07-06 22:33:39 -04:00
Thomas Harte
abe1e7f244
Provide current thoughts on Qt and the keyboard.
2020-07-06 22:27:50 -04:00
Thomas Harte
24b03f733f
Switches to an image more distinct from the existing.
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i.e. less heavy on blue and green.
2020-07-04 22:03:08 -04:00
Thomas Harte
5a729f92c1
Attempts to move the 'Help' menu to the correct place.
2020-07-04 19:19:41 -04:00
Thomas Harte
366793498a
Ensures ScanTargetWidget doesn't eat irrelevant keypresses.
2020-07-04 19:12:34 -04:00
Thomas Harte
cdda3f74ab
Attempts mouse event capture.
2020-07-04 00:29:37 -04:00
Thomas Harte
51f4242e9b
Reapplies image optimisation, saving a few bytes.
2020-07-04 00:29:10 -04:00
Thomas Harte
d97ebae200
Request Qt deprecation warnings.
2020-07-03 23:16:49 -04:00
Thomas Harte
daa195a7fb
Add Qt to the main README.
2020-07-03 23:16:35 -04:00
Thomas Harte
2d5e9bf1bb
Declines to set up audio output if none is available.
2020-07-02 22:58:15 -04:00
Thomas Harte
402f2ddbd9
Increases likelihood of 68000 Program offset-size assumptions being met.
2020-07-02 22:24:04 -04:00
Thomas Harte
8bf5ed52ea
Ensures keyboard events are restricted to single windows.
2020-07-02 22:03:12 -04:00
Thomas Harte
b850183a1e
Switches to an alternative to window(), for older Qt support.
2020-07-02 21:53:30 -04:00
Thomas Harte
f7e13356c4
FunctionThreads no longer automatically start.
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Improvements as a result: audio works in a second machine started in an existing window; there is no audio thread footprint if there is no audio.
2020-07-01 18:55:42 -04:00
Thomas Harte
55cc3089f9
Ensures complete deallocation of the QAudioOutput.
2020-06-30 23:33:41 -04:00
Thomas Harte
a096a09c72
Trusts Qt to supply a refresh rate, and handles retina <-> non-retina window transitions.
2020-06-30 23:03:39 -04:00
Thomas Harte
365e1f2e85
Merge pull request #803 from Margen67/actions
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ccpp.yml: Changes
2020-06-29 15:26:17 -04:00
Thomas Harte
b9e117cdcf
Centralises window title responsibility.
2020-06-28 23:08:40 -04:00
Margen67
fc3a03a856
ccpp.yml: Changes
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Build all branches.
Delete whitespace.
Use checkout v2.
Change ; to &&.
Use working-directory instead of cd.
Add -j to speed up build.
2020-06-28 19:53:19 -07:00
Thomas Harte
f6e5a2fb04
Resolves duplicative enums.
2020-06-28 22:50:24 -04:00
Thomas Harte
404c35feb5
Implements Atari 2600 switches menu.
2020-06-28 17:57:20 -04:00
Thomas Harte
b5962c58bb
Completes ZX80/81-specific menu.
2020-06-28 16:23:35 -04:00
Thomas Harte
74da762ae1
Starts sketching out the ZX80/81 menu items.
2020-06-28 01:04:32 -04:00
Thomas Harte
d87c840b76
Adds quick load and quick boot options.
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This should leave only the ZX80/81 and 2600 as special cases.
2020-06-27 17:08:29 -04:00
Thomas Harte
afb835398f
Ensures display selection is preserved in the app settings.
2020-06-27 16:26:39 -04:00
Thomas Harte
c982c78285
Ensures Reflection::set is widely available.
2020-06-27 16:26:01 -04:00
Thomas Harte
b4cdf8d987
Separates runtime TypeInfo into its own header.
2020-06-27 15:53:06 -04:00
Thomas Harte
6925a04088
Ensures 'Display' menu is removed if machine is closed.
2020-06-26 23:27:14 -04:00
Thomas Harte
a0e534b309
Starts towards offering display-type selection.
2020-06-26 23:04:45 -04:00
Thomas Harte
74d1ca4fa8
Simplifies indentation, correcting flow while there.
2020-06-26 21:16:15 -04:00
Thomas Harte
3c896050fb
Ensures proper output sizeing on HiDPI displays.
2020-06-26 21:14:43 -04:00
Thomas Harte
387500f01a
Implements 'Insert...' menu item.
2020-06-26 18:25:56 -04:00
Thomas Harte
21c41ed4cb
Reduces boilerplate and key repetition.
2020-06-26 00:39:30 -04:00
Thomas Harte
293ab25634
Ensures complete machine picker state is stored.
2020-06-26 00:23:52 -04:00
Thomas Harte
3ddc1a1722
Eliminates hard-coded concept of timer jitter.
2020-06-25 23:59:44 -04:00
Thomas Harte
478d081095
Ensures machines take user-friendly default settings.
2020-06-23 23:27:56 -04:00
Thomas Harte
9d4b49bbb5
Attempts to be more rigorous in vsync prediction.
2020-06-23 22:59:12 -04:00
Thomas Harte
4417f81014
Attempts to set a meaningful window title.
2020-06-22 22:58:58 -04:00
Thomas Harte
b96f7711e3
Corrects attempt at back-to-UI final window SDI behaviour.
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Maybe it'll turn out to be not what I want, but at least now it works.
2020-06-22 22:36:36 -04:00
Thomas Harte
1875a03757
Plugs a per-window memory leak.
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While also ensuring proper OpenGL resource destruction.
2020-06-22 20:32:44 -04:00
Thomas Harte
13336b8ad5
Consolidates and disables failed attempt at final-window close behaviour.
2020-06-21 23:52:41 -04:00
Thomas Harte
b17cceaeaf
Tidies up and makes a failing attempt at SDI improvements.
2020-06-21 23:50:18 -04:00
Thomas Harte
782a62585e
Preserves open path between launches.
2020-06-21 19:10:06 -04:00
Thomas Harte
c5d8d9127b
Rejigs ScanTarget relationship from pull to push, so it can be set whenever it is safe.
2020-06-21 18:25:38 -04:00
Thomas Harte
336dffefe0
Ensures changes in the framebuffer are passed onward.
2020-06-21 17:25:21 -04:00
Thomas Harte
e297d4cced
Decouples scan target drawing and lifetime.
2020-06-21 17:20:44 -04:00
Thomas Harte
b052ca5ca2
Switch to Qt-style member naming.
2020-06-21 17:16:11 -04:00
Thomas Harte
68d4d7d10a
Ensures no out-of-bounds access for unlabelled keys.
2020-06-21 17:11:24 -04:00
Thomas Harte
a03211c410
Makes an attempt at the single document interface.
2020-06-21 12:30:18 -04:00
Thomas Harte
c953ab09db
Ensures overloaded assignments work.
2020-06-20 00:17:16 -04:00
Thomas Harte
68645742f7
This is a deliberate fallthrough.
2020-06-20 00:12:08 -04:00
Thomas Harte
1fbb733f7f
Expands upon comment.
2020-06-20 00:05:41 -04:00
Thomas Harte
6e4b8d58a5
Completes [[fallthrough]]s.
2020-06-19 23:50:37 -04:00
Thomas Harte
7af8646470
Allowing for the constexpr, this is maybe_unused.
2020-06-19 23:47:43 -04:00
Thomas Harte
945a9da94f
Adds further [[fallthrough]]s.
2020-06-19 23:44:20 -04:00
Thomas Harte
2477752fa4
Adds further [[fallthrough]] attributes.
2020-06-19 23:36:51 -04:00
Thomas Harte
240d3c482b
Removes redundant constructors.
2020-06-19 23:26:22 -04:00
Thomas Harte
91229a1dbd
Adds overt fallthrough attributes.
2020-06-19 23:22:29 -04:00
Thomas Harte
4f9b3259d5
Adds explicit conversions to qint64.
2020-06-19 23:12:18 -04:00
Thomas Harte
3cb1072c29
Adds an explicit [[fallthrough]] tag.
2020-06-19 23:10:25 -04:00
Thomas Harte
12ee8e4db4
Ensures audio is not being pumped while the AudioBuffer is being destructed.
2020-06-19 23:09:39 -04:00
Thomas Harte
95e98323c5
Adds missing header for lock_guard and mutex.
2020-06-19 23:09:20 -04:00
Thomas Harte
7431d56166
Ensures is_in_retrace is properly initialised.
2020-06-19 23:09:02 -04:00
Thomas Harte
222c16c5b8
Ensures newly-hidden widgets aren't still in focus.
2020-06-19 22:01:53 -04:00
Thomas Harte
4e83e80962
Goes further in ensuring safe shutdown.
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Especially if no machine has been started.
2020-06-19 20:17:47 -04:00
Thomas Harte
4fdbe578cc
Wires up all new machine options.
2020-06-18 23:34:37 -04:00
Thomas Harte
c5cad865d7
Tidies up: arranges initialisers into alphabetical order, shortens some enum references.
2020-06-18 23:34:28 -04:00
Thomas Harte
ae5fe9225f
Fills in all machine options.
2020-06-18 22:24:45 -04:00
Thomas Harte
327b9051c8
Adds necessary layouts for Apple II type selection.
2020-06-18 20:30:50 -04:00
Thomas Harte
8151c24cf5
Starts the machine-picker side of the interface.
2020-06-18 20:05:46 -04:00
Thomas Harte
ee659095c2
Retains the default window background colour until a machine is running.
2020-06-17 23:16:29 -04:00
Thomas Harte
8c35fe1062
Finally succeeds at making the missingROMsBox resize with the window.
2020-06-17 22:22:15 -04:00
Thomas Harte
9ca6a1031c
Adds an 'about' box and a hypothetical 'New' file option.
2020-06-16 23:15:47 -04:00
Thomas Harte
59458f6444
Resolves errant spaces.
2020-06-16 23:15:38 -04:00
Thomas Harte
e8939aada4
Now that this spin blocks at startup, I can use a standard atomic_flag.
2020-06-16 23:12:58 -04:00
Thomas Harte
17bb3dce26
Makes a firmer attempt at enforcing safe shutdown.
2020-06-16 22:33:50 -04:00
Thomas Harte
495024d6fe
Cleans up all redundant lock/unique_guard declarations.
2020-06-15 00:24:10 -04:00
Thomas Harte
902b33d25d
Makes more failing attempts at a clean shutdown.
2020-06-15 00:00:44 -04:00
Thomas Harte
ac732e2e7b
Attempts to ensure clean shutdown.
2020-06-14 23:38:44 -04:00
Thomas Harte
d08ffd6c8b
Makes sure the timer really, really is on a different thread.
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Thereby allows me substantially to reduce audio latency.
2020-06-14 23:22:00 -04:00
Thomas Harte
530ff7471d
Adds a virtual destructor, given how these things might be held.
2020-06-14 21:14:51 -04:00
Thomas Harte
79833deeaf
With some attempt at vsync prediction, seeks to smooth audio/video output.
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There's plenty more work to do here, but hopefully it takes the issue immediately off the table.
2020-06-14 19:26:56 -04:00
Thomas Harte
405e9e7c68
Shunts audio into its own QThread.
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For the record, this was the first means I found of attempting that which actually seemed to work. A plain QThread, with something `connect`ed to its `started` signal didn't seem to work (perhaps `connect` is smart at thread confinement?), `moveToThread` didn't work on the audio output after the fact, etc.
2020-06-10 22:14:54 -04:00
Thomas Harte
5f13ee7c19
Simplifies AudioBuffer by consolidating logic into writes.
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This is kind of fiddling in the margins though; I'm having a lot of difficulty determining the semantically-correct way to get Qt not to funnel all activity through a single thread.
2020-06-09 23:56:08 -04:00
Thomas Harte
d9f02aecdf
Adds an additional buffer. To reduce latency. No, really.
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Specifically: there's no way to guarantee no overbuffering due to the startup race, other than having QAudioOutput obtain data by pull rather than push. But if it's pulling then that implies an extra buffer. And since the sizes it may pull are not explicit, there's guesswork involved there.
So: no extra buffer => uncontrollable risk of over-buffering. Extra buffer => a controllable risk of over-buffering.
2020-06-09 00:01:22 -04:00
Thomas Harte
bcb23d9a15
Attempt to reduce audio latency. Unsuccessfully.
2020-06-08 21:30:35 -04:00
Thomas Harte
d027450502
Consolidates timer/thread ownership for the timer.
2020-06-07 00:31:46 -04:00
Thomas Harte
63ad1290f4
Actually, QIODevice is listed as reentrant. So no need to forward audio.
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That said, latency is still absurd for some reason.
2020-06-06 23:47:57 -04:00
Thomas Harte
7c7cb61d2f
Corrects missing audio, at the cost of frame rate.
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I'm now spinning on the ability of QAudioOutput to accept additional data.
2020-06-06 22:35:50 -04:00
Thomas Harte
68b165e244
QIODevice isn't guaranteed thread safe, so use of it is now thread confined.
2020-06-06 21:14:04 -04:00
Thomas Harte
fe1b6812f1
Fixes processing cap and attempts full-rate video output.
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Audio now seems to be present, though hugely stuttered.
2020-06-06 19:47:35 -04:00
Thomas Harte
378ff39e5e
Makes an unsuccessful attempt at producing audio.
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On the plus side, it does seem successfully to sniff out an appropriate audio format and to communicate mono/stereo onward.
2020-06-06 19:19:01 -04:00
Thomas Harte
e47cb91223
Pushes rudimentary keyboard input.
2020-06-05 23:06:28 -04:00
Thomas Harte
d62fb16a58
Adds an eventFilter, in order to steal keypresses.
2020-06-05 22:11:17 -04:00
Thomas Harte
235efcb2d4
Attempts to silence asserts, etc, for release builds.
2020-06-04 23:14:51 -04:00
Thomas Harte
a6ada129e8
Adds very low quality, race-condition infested video output.
2020-06-04 22:58:02 -04:00
Thomas Harte
a681576d6c
Adds redraw logic.
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If you sit around and constantly reeize the window, you can now see that a machine is running.
2020-06-04 22:39:32 -04:00
Thomas Harte
fdc234ed3b
Advances to having a selected machine actually run.
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Albeit, invisibly.
2020-06-03 23:39:16 -04:00
Thomas Harte
e2ceb77501
Attempts to start updating a started machine.
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No real progress on graphics output though.
2020-06-03 00:21:37 -04:00
Thomas Harte
11c28357a1
Implements a basic ROM installation loop.
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Albeit that I need to figure out how layouts work to keep that request view at least centred.
2020-06-02 23:35:01 -04:00
Thomas Harte
f215405beb
Corrects capitalisation errors.
2020-06-02 23:27:29 -04:00
Thomas Harte
ba2a0600dc
Adds a basic Qt ROM fetcher and attempt to create a machine.
2020-06-01 23:14:57 -04:00
Thomas Harte
ab53165b34
Adds note on implementation obstacle.
2020-06-01 22:08:21 -04:00
Thomas Harte
a30723c3d4
Cleans up a little and ensures a safe exit of the timer thread.
2020-05-31 23:58:19 -04:00
Thomas Harte
d64b4fbc26
Adds a Qt timer class. Precision seems to be 'acceptable'.
2020-05-31 23:39:08 -04:00
Thomas Harte
73131735fa
Further qmake warning corrections.
2020-05-30 19:31:17 -04:00
Thomas Harte
5e0bea9d1c
Adds all header files to the QMake project.
2020-05-30 16:48:52 -04:00
Thomas Harte
48afc54af6
Cuts down unused parameter warnings to just a few that may well indicate implementation errors.
2020-05-30 01:06:43 -04:00
Thomas Harte
d066dd2b44
Resolves further unused parameter warnings.
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Also adds warning to Xcode build, for better symmetry with Qt defaults.
2020-05-30 00:58:10 -04:00
Thomas Harte
0bf7de9d43
Advances to actually completing a build.
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Many more warnings to iron out, however.
2020-05-30 00:47:43 -04:00
Thomas Harte
267006782f
Starts to add Qt target; resolves many build warnings.
2020-05-30 00:37:06 -04:00
Thomas Harte
a9de745e51
Merge pull request #798 from qeeg/master
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Fix Windows MSYS2 build (mostly)
2020-05-27 21:52:49 -04:00
Thomas Harte
ca1f3c600d
Merge branch 'master' into master
2020-05-27 21:52:39 -04:00
Thomas Harte
743353a0ed
Merge pull request #799 from TomHarte/WindowsBuildErrors
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Fixes a couple of Windows build errors.
2020-05-27 21:42:06 -04:00
Thomas Harte
f7c10ef9e9
Replaces POSIX stpncpy with ANSI strlen, memcpy and memset.
2020-05-27 21:31:46 -04:00
Thomas Harte
ecb44711d1
Add glext.h.
2020-05-27 21:20:43 -04:00
Melissa Goad
603b747ac5
Fix Windows MSYS2 build (mostly)
2020-05-27 18:09:56 -05:00
Thomas Harte
0f2f776e6a
Merge pull request #797 from TomHarte/Serialisation
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Adds BSON serialisation and deserialisation for all reflectable structs.
2020-05-26 23:18:41 -04:00
Thomas Harte
1308f119a6
Relocates cassert.
2020-05-26 23:07:26 -04:00
Thomas Harte
51d684820f
Attempts to add array support to ::set and BSON deserialisation.
2020-05-26 22:55:55 -04:00
Thomas Harte
023d76a3e7
Permits int truncation, adds double decoder. Arrays still TODO.
2020-05-26 22:20:15 -04:00
Thomas Harte
4d34d9ae2b
Implements BSON deserialisation, other than arrays.
2020-05-25 23:39:00 -04:00
Thomas Harte
c83c827484
Adds necessary header for math.
2020-05-24 12:19:20 -04:00
Thomas Harte
b8b880a91d
Extends encoding to handle vector<uint8_t>, floats and doubles.
2020-05-24 01:20:48 -04:00
Thomas Harte
bb2f21a22e
Encodes enumerated values as strings.
2020-05-23 22:54:43 -04:00
Thomas Harte
b3587d4cde
Corrects: logic for int promotion, object sizes, int64_t gets, sizes prefixed to objects.
2020-05-22 23:38:07 -04:00
Thomas Harte
39ffe45f3c
Attempts to add support for arrays.
2020-05-22 21:55:12 -04:00
Thomas Harte
d36e592afb
Starts towards BSON serialisation for all deflectable structs.
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Still to be tackled: arrays, enumerated types should probably be encoded as strings, deserialisation, probably distinguish get and fuzzy_get...
2020-05-22 00:31:40 -04:00
Thomas Harte
74fb697fa6
Merge pull request #796 from TomHarte/MintBuildIssues
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Increases const correctness.
2020-05-20 23:52:16 -04:00
Thomas Harte
512a52e88d
Increases const correctness, marks some additional constructors as constexpr, switches std::atomic construction style.
2020-05-20 23:34:26 -04:00
Thomas Harte
41fc6c20a0
Merge pull request #794 from TomHarte/68000State
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Adds a `State` for the 68000.
2020-05-19 22:33:57 -04:00
Thomas Harte
28881cb391
Implements apply.
2020-05-19 18:27:10 -04:00
Thomas Harte
a16b710d22
Removes <cassert> from Struct.h (which means it's needed in the 68000's State).
2020-05-19 00:06:29 -04:00
Thomas Harte
a3d4c7599b
Attempts fully to capture 68000 state.
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Albeit that it can't be put back yet.
2020-05-18 23:55:54 -04:00
Thomas Harte
6f16928215
Adds all remaining simple scalar fields.
2020-05-16 22:47:04 -04:00
Thomas Harte
ff3c2fdc59
Adds 68000 state to SConstruct.
2020-05-16 18:33:36 -04:00
Thomas Harte
57edfe8751
Formalises TODO list and marches onward into execution state.
2020-05-16 18:31:43 -04:00
Thomas Harte
dcc0ee3679
Adds input line capture.
2020-05-16 17:44:15 -04:00
Thomas Harte
f7a16762b4
Starts populating the 68000 state registers.
2020-05-16 00:06:04 -04:00
Thomas Harte
375835a950
Extends .description() to handle arrays.
2020-05-14 23:58:17 -04:00
Thomas Harte
4481386a3d
Extends Reflection::Struct slightly to capture the lengths of arrays.
2020-05-14 22:59:44 -04:00
Thomas Harte
8b76d4007e
Starts adding State for the 68000.
2020-05-14 22:46:40 -04:00
Thomas Harte
4f30118b37
Merge pull request #793 from TomHarte/Z80State
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Adds reflective state for the Z80.
2020-05-14 00:18:58 -04:00
Thomas Harte
c5b746543b
Factors the half mask into steps count.
2020-05-14 00:09:01 -04:00
Thomas Harte
11d936331d
Attempts to preserve scheduled_program_counter_.
2020-05-13 23:58:04 -04:00
Thomas Harte
4f619de675
Permits ::get from a reflective enum to an int.
2020-05-13 23:48:28 -04:00
Thomas Harte
80f2836cb8
Adds Z80 state to SConstruct.
2020-05-13 22:05:23 -04:00
Thomas Harte
3709aa7555
Edges almost up to an initially complete implementation.
2020-05-13 22:04:04 -04:00
Thomas Harte
7c9d9ee048
Adds basic Z80 state.
2020-05-13 20:15:22 -04:00
Thomas Harte
e4335577ca
Merge pull request #792 from TomHarte/BIOSFreeMasterSystem
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Ensures the Master System makes a genuine attempt to boot sans BIOS
2020-05-12 22:35:17 -04:00
Thomas Harte
66c2eb0414
Further tightens const and constexpr usage.
2020-05-12 22:22:21 -04:00
Thomas Harte
f82e4ee923
Makes additional minor const improvements.
2020-05-12 00:31:16 -04:00
Thomas Harte
b62ee33318
Improves constness of Joystick interface.
2020-05-12 00:19:48 -04:00
Thomas Harte
8596a9826f
Whether the BIOS is available in hardware is now decided entirely based on whether it is on disk.
2020-05-12 00:11:46 -04:00
Thomas Harte
3f2fb1fa58
Merge pull request #790 from ajacocks/master
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Create RPM package and man page
2020-05-11 13:06:47 -04:00
Alexander Jacocks
5f39938a19
add Ansible build playbook to create RPM package for clksignal and create basic man page
2020-05-11 00:52:51 -04:00
Thomas Harte
d964ebd4c1
Merge pull request #789 from TomHarte/OPLLDrums
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Softens OPLL tremolo and vibrato; adds drum damping.
2020-05-10 15:51:34 -04:00
Thomas Harte
9458963311
Factors out shift by 7.
2020-05-10 13:57:50 -04:00
Thomas Harte
44690b1066
Halves effect of vibrato.
2020-05-10 12:05:14 -04:00
Thomas Harte
c41028cdc7
Adds further exposition.
2020-05-10 00:44:03 -04:00
Thomas Harte
64c62c16fb
Adjusts tremolo scale.
2020-05-10 00:43:46 -04:00
Thomas Harte
afef4f05fe
Adds damping and phase resets for the rhythm section.
2020-05-10 00:10:51 -04:00
Thomas Harte
fc0f290c85
Merge pull request #788 from TomHarte/ConstFun
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Cleans up a variety of dangling issues.
2020-05-09 23:57:22 -04:00
Thomas Harte
81d70ee325
Adds in a few further consts.
2020-05-09 23:49:37 -04:00
Thomas Harte
6dc7a4471d
Removes unused .cpp file.
2020-05-09 23:43:05 -04:00
Thomas Harte
fcb8bd00b6
Adds further costs.
2020-05-09 23:42:42 -04:00
Thomas Harte
05c3f2a30d
Adds some further `costs.
2020-05-09 23:03:33 -04:00
Thomas Harte
25996ce180
Further doubles down on construction syntax for type conversions.
2020-05-09 23:00:39 -04:00
Thomas Harte
3729bddb2a
Farewell, BestEffortUpdater.
2020-05-09 21:48:04 -04:00
Thomas Harte
4136428db3
Removes dead StandardOptions.cpp.
2020-05-09 21:35:15 -04:00
Thomas Harte
31c6faf3c8
Adds a bunch of consts.
2020-05-09 21:23:52 -04:00
Thomas Harte
5c1ae40a9c
Merge pull request #783 from TomHarte/OPL2
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Adds provisional OPLL emulation.
2020-05-09 18:28:03 -04:00
Thomas Harte
4c6d0f7fa0
Corrects SConstruct; applies default initialisation in Struct.cpp.
2020-05-09 18:11:50 -04:00
Thomas Harte
40b60fe5d4
Renames folder as per intended scope.
2020-05-09 18:04:11 -04:00
Thomas Harte
eed357abb4
Introduces concept of 'average peak volume' in order better to normalise audio sources like the OPLL.
2020-05-09 17:57:21 -04:00
Thomas Harte
8f541602c1
Moves modulator updates a sample behind operator updates.
2020-05-08 21:14:25 -04:00
Thomas Harte
668f4b77f3
Implements feedback.
2020-05-08 21:05:23 -04:00
Thomas Harte
303965fbb8
Removes the crutch of my first-attempt implementation.
2020-05-08 20:53:34 -04:00
Thomas Harte
792aed242d
Fixes the use-sustain flag.
2020-05-08 20:49:39 -04:00
Thomas Harte
dc5654b941
Attempts to implement the proper attack phase.
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It's sounding pretty good now, but for sustain.
2020-05-08 18:59:05 -04:00
Thomas Harte
e51e2425cc
Attempts to implement decay and release the right way around and with full precision.
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Higher numbers = decay/release more quickly, not more slowly.
2020-05-08 18:40:49 -04:00
Thomas Harte
95c6b9b55d
Declare proper envelope precision.
2020-05-08 17:58:50 -04:00
Thomas Harte
ea25ead19d
Ensures rhythm envelope generators don't pick up should_damp state.
2020-05-08 00:18:31 -04:00
Thomas Harte
24100ec3b0
Switches snare and high-hat envelope generators.
2020-05-08 00:08:14 -04:00
Thomas Harte
32437fbf8b
Attempts to use the proper rhythm mode envelope generators.
2020-05-07 23:56:15 -04:00
Thomas Harte
5219a86a41
In principle fully implements rhythm mode.
2020-05-07 23:38:51 -04:00
Thomas Harte
e12dc5d894
Reduce the amount of time spent installing instruments.
2020-05-06 00:15:28 -04:00
Thomas Harte
75315406bb
Ensure all channels begin in 'release' phase, which is currently code for 'off' in conjunction with attenuation of 511.
2020-05-06 00:13:01 -04:00
Thomas Harte
ea42fe638a
Corrects channel attenuation and carrier sustain level settings.
2020-05-05 23:41:15 -04:00
Thomas Harte
744211cec0
Ensures rhythm instruments are installed.
2020-05-05 23:13:13 -04:00
Thomas Harte
1a4321d7d0
Attempts better to balance attenuations.
2020-05-05 22:14:11 -04:00
Thomas Harte
b943441901
Marks up more specific TODOs.
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I think I'm already much happier with this factoring.
2020-05-05 00:35:03 -04:00
Thomas Harte
0505b82384
Restores top bit of channel period, propagates it to the envelope generator.
2020-05-05 00:28:24 -04:00
Thomas Harte
c9fb5721cd
Makes first attempt to reintroduce full-melodic output.
2020-05-05 00:16:45 -04:00
Thomas Harte
386a7ca442
Continues doing away with the attempt heavily to interleave the OPLL and OPL2, creating a new OPLL class.
2020-05-04 21:14:51 -04:00
Thomas Harte
e929d5d819
Ensures proper dereferencing of the std::optional.
2020-05-03 21:57:15 -04:00
Thomas Harte
94614ae4c3
Shifts the LFO implementation inline.
2020-05-03 21:44:22 -04:00
Thomas Harte
1223c99e0f
Adds waveform generation logic to the new factoring.
2020-05-03 21:38:20 -04:00
Thomas Harte
1ff5ea0a6e
Adds KeyLevelScaler, implements EnvelopeGenerator, adds reset to PhaseGenerator.
2020-05-03 16:24:55 -04:00
Thomas Harte
9d2691d1d2
Taking it as given that outstanding deficiencies are mostly due to poor design, starts breaking out the envelope and phase generators.
2020-05-01 23:46:42 -04:00
Thomas Harte
e4ef2c68bb
Feeds through drum volume levels.
2020-04-30 19:35:09 -04:00
Thomas Harte
7fffafdfd4
Wires the high-hat through, possibly incorrectly.
2020-04-29 22:44:15 -04:00
Thomas Harte
5896288edd
Adapts to new interface.
2020-04-29 22:08:36 -04:00
Thomas Harte
c4135fad2b
Attempts completely to decouple updates and audio outputs.
2020-04-29 22:07:40 -04:00
Thomas Harte
1f34214fb3
Imagines a future of being able to boot into the BIOS.
2020-04-29 22:07:20 -04:00
Thomas Harte
f899af0eef
Fixes OPL tests.
2020-04-28 20:17:16 -04:00
Thomas Harte
9f0c8bcae7
Attempts to add the missing noise generators. I think I may still be astray on volumes.
2020-04-26 15:51:33 -04:00
Thomas Harte
2bc36a6cde
Eliminates branch within snare output.
2020-04-26 00:21:15 -04:00
Thomas Harte
ee10fe3d2c
Fully separates updates and outputs in operators; takes a shot at the snare.
2020-04-26 00:18:09 -04:00
Thomas Harte
a424e867f9
Continues factoring this apart, albeit with a decision on whether to retain update-and-output still pending.
2020-04-25 23:07:40 -04:00
Thomas Harte
f52b40396a
Re-ups output level.
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Though it's still quiet compared to the SN.
2020-04-25 23:07:06 -04:00
Thomas Harte
cd2ab70a58
Moves the LFSR to the LowFrequencyOscillator.
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Possibly I should come up with a better name for that?
2020-04-25 22:21:42 -04:00
Thomas Harte
a5d1941d28
Adds necessary standalone #imports; makes safe for signed types.
2020-04-25 22:21:10 -04:00
Thomas Harte
65a3783dd2
Attempts the tom tom.
2020-04-25 19:21:55 -04:00
Thomas Harte
b9b5c2a3bc
Takes a first run at proper slot mixing and the bass drum.
2020-04-25 18:01:05 -04:00
Thomas Harte
12c618642e
Corrects output range.
2020-04-25 00:07:58 -04:00
Thomas Harte
6ebc93c995
Switches to maximum-rate multiplexing. Hopefully to eliminate the mixer as a consideration for now.
2020-04-24 23:50:06 -04:00
Thomas Harte
6d4e29c851
Strips mixer back to basics in search of audio issues.
2020-04-24 23:32:02 -04:00
Thomas Harte
b3979e2fda
Looking towards rhythm mode, and in search of bugs: factors out ADSR.
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Further factorings to come.
2020-04-24 18:48:32 -04:00
Thomas Harte
983c32bf75
Adds vibrato.
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This would complete melodic output, subject to bug fixes.
2020-04-24 18:02:41 -04:00
Thomas Harte
9e3614066a
Adds tremolo support, switches to global timer for ADSR stages other than attack.
2020-04-23 23:55:49 -04:00
Thomas Harte
c7ad6b1b50
Minor layout and commenting improvements.
2020-04-21 23:35:48 -04:00
Thomas Harte
676dcf7fbb
Calculates the proper key scale rate, though ADSR itself is still lacking that precision.
2020-04-21 22:57:56 -04:00
Thomas Harte
50d725330c
Adds missing header.
2020-04-21 22:48:52 -04:00
Thomas Harte
2886dd1dae
Collapses key-level scaling to a single 2d table.
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I dare imagine I can do better; the columns in particular look like arithmetic progressions.
2020-04-21 20:19:02 -04:00
Thomas Harte
40424ac38b
Re-enables key-level scaling, with 3db and 1.5db the correct way around.
2020-04-21 20:10:40 -04:00
Thomas Harte
a4d3865394
Decreases sustain level attenuation; disables key-level scaling for now.
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The latter was definitely wrong, I also think I don't need the big four tables.
2020-04-21 19:58:40 -04:00
Thomas Harte
0ac99e8d42
Disables low low-pass filter, honours audio control bits for better volume usage.
2020-04-21 19:57:13 -04:00
Thomas Harte
bdce1c464a
Takes a shot at key-level scaling. Testing to come.
2020-04-21 00:09:42 -04:00
Thomas Harte
475d75c16a
Preserves fractional part of modulator phase.
2020-04-20 23:35:37 -04:00
Thomas Harte
32fd1897d0
Via a unit test, confirms and fixes relative volumes of OPLL channels.
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Also rejigs responsibility for scaling to emulator-standard volume.
2020-04-20 23:17:29 -04:00
Thomas Harte
39e6a28730
Rearranges file.
2020-04-20 19:41:04 -04:00
Thomas Harte
3852e119aa
Adds test data for FM wave generation.
2020-04-20 19:33:03 -04:00
Thomas Harte
f19fd7c166
Pulls out common melodic update calls.
2020-04-20 18:58:31 -04:00
Thomas Harte
100fddcee1
Corrects divider, takes another whack at ADSR.
2020-04-20 18:58:10 -04:00
Thomas Harte
99fa86a67e
Adds a test for lookup sine. And fixes lookup sine.
2020-04-20 18:40:47 -04:00
Thomas Harte
6568c29c54
Improves commentary.
2020-04-19 22:42:25 -04:00
Thomas Harte
c54bbc5a04
Rename Table.h; LogSin -> LogSign and make it a bit more typer.
2020-04-19 13:33:17 -04:00
Thomas Harte
92d0c466c2
Moves complete phase -> output calculation inside Operator.
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Reasoning being: otherwise I wasn't currently enforcing non-sine waveforms.
2020-04-19 13:27:24 -04:00
Thomas Harte
020c760976
Simplifies the phase counter.
2020-04-19 00:30:14 -04:00
Thomas Harte
cdfd7de221
Minor: enables all melodic channels when rhythm mode is disabled; supports non-modulated channels.
2020-04-18 17:48:29 -04:00
Thomas Harte
3da2e91acf
Adjusts range of output, makes declaration of level full owner of type information.
2020-04-17 23:29:09 -04:00
Thomas Harte
3948304172
Attempts to use table-based maths.
2020-04-17 23:23:16 -04:00
Thomas Harte
4a295cd95e
Wraps log_sin in an access function to enshrine sign and mask rules; switches both functions to non-math.h clashing names.
2020-04-17 23:22:42 -04:00
Thomas Harte
6f7c8b35c5
Applies an ahead-of-time transformation to the exp table, and wraps it in a helper function.
2020-04-17 22:33:13 -04:00
Thomas Harte
e58ba27c00
Clarifies meaning of scaling. Though it isn't yet applied.
2020-04-17 22:30:10 -04:00
Thomas Harte
0aceddd088
Starts tidying up the OPL2.
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This is as a precursor to switching to using the proper table lookups, which I hope will automatically fix my range issues.
2020-04-15 22:10:50 -04:00
Thomas Harte
30ff399218
With some fixes for scale, I think possibly this is close for melodic channels.
2020-04-15 21:27:27 -04:00
Thomas Harte
a7e63b61eb
Just from printing numbers: corrects transition from attack to decay.
2020-04-15 00:26:01 -04:00
Thomas Harte
b13b0d9311
Starts towards implementing some OPL test cases.
2020-04-14 23:51:45 -04:00
Thomas Harte
d8380dc3e2
Tries to be a little neater in spelling out the work here.
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I think I'm somewhat circling here now; I need to think of a way of getting clean comparison data.
2020-04-14 21:55:42 -04:00
Thomas Harte
d805e9a8f0
Actually, octave probably works this way around? Higher octaves = higher frequencies.
2020-04-14 21:39:12 -04:00
Thomas Harte
aa45142728
Endeavours to fix attenuation and add FM synthesis.
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I now definitely think my frequency counting is wrong.
2020-04-14 18:32:06 -04:00
Thomas Harte
09d1aed3a5
Attempts to voice the current attenuation (and, therefore, the ADSR output), even if linearly rather than logarithmically.
2020-04-13 22:12:55 -04:00
Thomas Harte
a1f80b5142
Takes a stab at per-operator ADSR.
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Heavy caveats apply: no KSR is applied, non-ADSR attenuation isn't applied, attenuation isn't voiced in general.
2020-04-13 21:39:06 -04:00
Thomas Harte
cb1970ebab
Switch to more compact form of output for bool.
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This also will hopefully deal with GCC's slightly confused claim that 'value' may be used without having been initialised down at #define OutputIntC (i.e. after it's out of scope, but I can sort of see why GCC might get confused while it remains in scope).
2020-04-12 14:40:32 -04:00
Thomas Harte
d3fbdba77c
Add missing #include.
2020-04-12 14:20:02 -04:00
Thomas Harte
632d797c9d
Adjusts frequency formula. This could be close.
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I guess next I need to get ADSR/volume in general working, before I can go FM? Then I'll worry about using the proper log-sin/exp tables.
2020-04-12 14:15:09 -04:00
Thomas Harte
559a2d81c1
Baby step: starts trying to output the raw FM carrier, no modulation, no ADSR.
2020-04-12 12:46:40 -04:00
Thomas Harte
7a5f23c0a5
Adds accommodations for the OPLL.
2020-04-10 22:05:22 -04:00
Thomas Harte
84b115f15f
Attempts to move forward in defining what the parts of an OPL are meant to do.
2020-04-10 19:13:52 -04:00
Thomas Harte
a0d14f4030
Starts trying to make sense of the various fields at play.
2020-04-08 23:15:44 -04:00
Thomas Harte
dd6769bfbc
Splits OPLL and OPL2 classes.
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Logic is: they have different mixers (additive in the OPL2, time-division multiplexing in the OPLL) as well as different register sets. So I'll put operator and channel logic directly into those structs.
2020-04-07 23:15:26 -04:00
Thomas Harte
027af5acca
Allow LFSR to be instantiated with a given value.
2020-04-05 22:58:09 -04:00
Thomas Harte
db4b71fc9a
Adds correct LSFR, something of OPLL -> OPL2 logic.
2020-04-05 22:57:53 -04:00
Thomas Harte
d9e41d42b5
Adds the OPL2 to SConstruct.
2020-04-05 21:34:19 -04:00
Thomas Harte
0ed7d257e1
Add some extra notes, implement correct mapping to only 18 operators. Not 22.
2020-04-05 14:32:55 -04:00
Thomas Harte
335a68396f
Attempts to complete OPL2 register decoding.
2020-04-04 23:39:09 -04:00
Thomas Harte
84cdf6130f
Starts at least trying to decode OPL2 register writes.
2020-04-04 23:29:25 -04:00
Thomas Harte
b0abc4f7bb
Implements enough wiring that the Master System will instantiate and talk to an OPLL.
2020-04-03 20:05:36 -04:00
Thomas Harte
ab81d1093d
Merge pull request #782 from TomHarte/6502Tidy
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Makes `State`, and therefore the 'Reflection' dependency, an optional adjunct to the 6502.
2020-04-02 20:49:18 -04:00
Thomas Harte
e4d4e4e002
Adds 6502 State to the SConstruct file.
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On the assumption I'll actually use it at some point.
2020-04-02 19:16:22 -04:00
Thomas Harte
cc357a6afa
Removes boilerplate from header.
2020-04-02 19:15:57 -04:00
Thomas Harte
dfc1c7d358
Separates 6502 State object to make it optional.
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Also makes a few minor const improvements while I'm poking around.
2020-04-02 19:11:27 -04:00
Thomas Harte
7ed8e33622
Eliminates unused 6502 counter.
2020-04-02 18:49:28 -04:00
Thomas Harte
474822e83d
Merge pull request #781 from TomHarte/NoMoreCRTMachine
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Splits 'CRTMachine' into three parts: ScanProducer, AudioProducer, TimedMachine.
2020-04-02 09:46:54 -04:00
Thomas Harte
fe3942c5b3
Updates comments.
2020-04-01 23:49:07 -04:00
Thomas Harte
f417fa82a4
Splits 'CRTMachine' into three parts: ScanProducer, AudioProducer, TimedMachine.
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Simultaneously cleans up some of the naming conventions and tries to make things a bit more template-compatible.
2020-04-01 23:19:34 -04:00
Thomas Harte
c4b114133a
Merge pull request #779 from TomHarte/6502State
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Provisionally adds `State` and `get/set_state` to the 6502.
2020-03-31 21:05:29 -04:00
Thomas Harte
2f4b0c2b9a
Removes non-functional assert.
2020-03-30 21:48:07 -04:00
Thomas Harte
a491650c8b
Adds safety asserts.
2020-03-30 21:39:31 -04:00
Thomas Harte
6805acd74f
Adds padding for all integer types.
2020-03-30 00:31:25 -04:00
Thomas Harte
95c68c76e1
Corrects use of StructImpl.
2020-03-30 00:27:40 -04:00
Thomas Harte
60aa383c95
Makes a not-quite-correct attempt at a .description for reflective structs.
2020-03-30 00:24:49 -04:00
Thomas Harte
edc553fa1d
Removes duplicative 'register'.
2020-03-29 22:58:00 -04:00
Thomas Harte
4f2ebad8e0
Takes a shot a set_state.
2020-03-29 22:50:30 -04:00
Thomas Harte
1810ef60be
Adds --fix-missing in the hope of catching more issues automatically.
2020-03-29 18:41:30 -04:00
Thomas Harte
f720a6201b
Adds explicit type cast.
2020-03-29 18:36:57 -04:00
Thomas Harte
cfb75b58ca
Pulls all 6502 MicroOp sequences into the main operations_ table.
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This will make state restoration somewhat more tractable.
2020-03-29 18:36:41 -04:00
Thomas Harte
4fbe983527
Provisionally adds State and get_state to the 6502.
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`set_state` may be a little more complicated, requiring a way to advance in single-cycle steps **without applying bus accesses**.
2020-03-28 00:33:27 -04:00
Thomas Harte
272383cac7
Merge pull request #778 from TomHarte/AppleIIDisks
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Resolves a potential crash with NIB files
2020-03-25 21:52:26 -04:00
Thomas Harte
39380c63cb
Throws in some consts.
2020-03-25 21:25:50 -04:00
Thomas Harte
ea26f4f7bf
Eliminates test code, adds a caveat.
2020-03-25 21:22:30 -04:00
Thomas Harte
5fd2be3c8e
Makes a genuine attempt at five and three decoding.
2020-03-25 20:50:26 -04:00
Thomas Harte
2320b5c1fe
Takes some steps towards five-and-three decoding.
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Now I 'just' need to figure out how bits are distributed within the decoded sector. The XORing and data checksum seem the same (?)
2020-03-25 00:15:31 -04:00
Thomas Harte
e5cbdfc67c
It turns out that 5-and-3 disks have a different header prologue.
2020-03-24 21:59:55 -04:00
Thomas Harte
894d196b64
Avoids massive overallocation where sync blocks overlap the index hole.
2020-03-24 21:34:33 -04:00
Thomas Harte
af037649c3
Merge pull request #777 from TomHarte/ShowCRCs
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Show CRC32s of missing ROMs.
2020-03-23 21:33:10 -04:00
Thomas Harte
cfca3e2507
Adds missing header for std::setw, std::set fill.
2020-03-23 21:26:50 -04:00
Thomas Harte
7a12a0149a
Ensures BIOS is really not paged if not loaded.
2020-03-23 20:00:31 -04:00
Thomas Harte
fcdc1bfbd0
Prints the CRC32(s) of any missing ROMs.
2020-03-23 20:00:13 -04:00
Thomas Harte
d1d14ba9a0
Merge pull request #775 from TomHarte/SavedVolume
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Ensures the macOS version retains volume.
2020-03-23 00:18:51 -04:00
Thomas Harte
0e502f6d5c
Ensures the macOS version retains volume.
2020-03-23 00:10:56 -04:00
Thomas Harte
d3bac57d6a
Merge pull request #774 from TomHarte/VolumeControl
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Adds output volume control.
2020-03-22 21:23:49 -04:00
Thomas Harte
bd1b4b8a9f
Increases volume fade-out speed.
2020-03-22 21:13:55 -04:00
Thomas Harte
38d81c394f
Switches OSAtomics to stdatomics. The former were deprecated by macOS 10.12.
2020-03-22 21:11:04 -04:00
Thomas Harte
72103a4adb
Corrects execution cap for splitAndSync ticks.
2020-03-22 19:25:02 -04:00
Thomas Harte
e6bae261c4
Ensures volume controls appear for mouse-capture machines when not capturing.
2020-03-22 19:06:38 -04:00
Thomas Harte
5edb0c0ee7
Adds animated fade-out to volume control. Bumps macOS version to 10.12.2.
2020-03-22 18:45:24 -04:00
Thomas Harte
442ce403f9
It's a bit jarring, but ensures volume control shows and hides according to mouse cursor.
2020-03-22 16:25:07 -04:00
Thomas Harte
7398cb44e2
Adds a functioning volume control for macOS, it just doesn't know how to hide yet.
2020-03-22 13:24:23 -04:00
Thomas Harte
15d54dfb4c
Adds 'volume' command-line parameter for kiosk mode.
2020-03-21 22:24:31 -04:00
Thomas Harte
9087bb9b08
Allows audio volume to be set.
2020-03-21 22:00:47 -04:00
Thomas Harte
0c689e85a5
Use screen number for spotting screen changes.
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NSScreen implements Swift Equatable but doesn't seem officially to implement -isEqual:.
2020-03-21 17:01:57 -04:00
Thomas Harte
75f2b0487e
Merge pull request #773 from TomHarte/MacCrashAgain
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Ensures proper NSScreen comparison...
2020-03-20 23:19:53 -04:00
Thomas Harte
5a1bae8a9c
Ensures proper NSScreen comparison, and no never-ending setupDisplayLink loop on exit.
2020-03-20 23:00:16 -04:00
Thomas Harte
129bc485bf
Merge pull request #772 from TomHarte/ReflectiveEnum
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Endeavours to bring introspection to machine selection options.
2020-03-19 23:30:19 -04:00
Thomas Harte
69277bbb27
Renames files to match project convention.
2020-03-19 23:24:06 -04:00
Thomas Harte
b8b335f67d
Exposes the Master System's region for SDL selection.
2020-03-19 21:46:42 -04:00
Thomas Harte
eef7868199
Ensures 'new' overrides default selection; doesn't try to propagate multiple files if machines won't take them.
2020-03-19 21:15:38 -04:00
Thomas Harte
23aa7ea85f
Revives MultiConfigurable.
2020-03-19 21:02:14 -04:00
Thomas Harte
c1b69fd091
Attempts to support multiple pieces of media on the SDL command line, ensures proper window titling.
2020-03-19 20:40:43 -04:00
Thomas Harte
7ab7efdbc1
Ensures consistent ordering.
2020-03-19 19:41:50 -04:00
Thomas Harte
b8ebdc012f
Ensure normative construction declaration ordering.
2020-03-19 18:58:36 -04:00
Thomas Harte
9995d776de
Attempts to fix the macOS version, plus some implicit type conversions.
2020-03-18 23:29:09 -04:00
Thomas Harte
c6f35c9aac
Rejigs help output.
2020-03-18 23:11:25 -04:00
Thomas Harte
615ea2f573
Applies parsed arguments.
2020-03-18 22:31:32 -04:00
Thomas Harte
311458f41f
Restores Macintosh 'runtime' options.
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Also cleans up some leftover parts elsewhere.
2020-03-18 21:50:02 -04:00
Thomas Harte
b2a381d401
Restores Vic-20 runtime options.
2020-03-18 20:23:55 -04:00
Thomas Harte
ffc1b0ff29
Reintroduces Oric runtime options.
2020-03-18 18:31:31 -04:00
Thomas Harte
ead2823322
Reintroduces MSX and Master System runtime options.
2020-03-18 18:26:22 -04:00
Thomas Harte
a7e1920597
Restores ColecoVision runtime options.
2020-03-18 00:06:52 -04:00
Thomas Harte
ec6664f590
Takes steps to guarantee property naming; reintroduces Electron runtime options.
2020-03-17 23:52:55 -04:00
Thomas Harte
8c6ca89da2
Restores runtime options for the Acorn Electron.
2020-03-17 22:06:20 -04:00
Thomas Harte
b6e81242e7
Reintroduces Apple II runtime options.
2020-03-17 21:53:26 -04:00
Thomas Harte
f9ca443667
Adds the ability for reflective structs to limit the permitted values to enumerated properties.
2020-03-17 21:44:04 -04:00
Thomas Harte
394ee61c78
Starts a switch to reflectable-style runtime options.
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The Amstrad CPC and ZX80/81 have made the jump so far, subject to caveats. The macOS build is unlikely currently to work properly.
2020-03-16 23:25:05 -04:00
Thomas Harte
1d40aa687e
Adds necessary include for unique_ptr.
2020-03-15 23:52:24 -04:00
Thomas Harte
8e3bf0dbca
Starts moving towards a Deflectable-based system of runtime options.
2020-03-15 23:48:53 -04:00
Thomas Harte
2031a33edf
Technically SDL users can now start a new machine.
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Missing though: all the old per-machine command-line options, and any control over the new one.
2020-03-15 21:50:43 -04:00
Thomas Harte
fc3d3c76f8
Edges further towards providing enough information for dynamic user-provided machine creation.
2020-03-15 12:54:55 -04:00
Thomas Harte
880bed04f5
Adds AllMachines, rounds out ConstructionOptionsByMachineName.
2020-03-15 00:15:19 -04:00
Thomas Harte
f9c8470b20
Ensure targets always nominate a machine.
2020-03-15 00:13:38 -04:00
Thomas Harte
36acc2dddd
Add necessary include for std::find.
2020-03-14 00:22:23 -04:00
Thomas Harte
a59963b6a0
Adds necessary header for memcpy.
2020-03-14 00:17:58 -04:00
Thomas Harte
cab4bead72
Promotes explicit specialisations to namespace scope.
2020-03-13 23:38:29 -04:00
Thomas Harte
1a2872c815
Starts to build an easy set interface.
2020-03-13 22:42:37 -04:00
Thomas Harte
f27e0a141d
Sketches but doesn't implement an interface for serialisation.
2020-03-13 20:16:36 -04:00
Thomas Harte
52f644c4f1
Ensures that reflection is completely blind; starts adding SDL instantiation logic.
2020-03-12 20:56:02 -04:00
Thomas Harte
06c08a0574
Merge branch 'ReflectiveEnum' of github.com:TomHarte/CLK into ReflectiveEnum
2020-03-11 23:30:27 -04:00
Thomas Harte
724e2e6d27
Withdraws ability to select an integer size for ReflectableEnums.
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It isn't that useful, and this'll help if/when I get to serialisation.
2020-03-11 23:28:38 -04:00
Thomas Harte
fd052189ca
Adds reflection to all of the other computer targets.
2020-03-11 23:25:29 -04:00
Thomas Harte
044a2b67e1
Beefs up documentation on this miniature sort-of reflection.
2020-03-11 23:03:05 -04:00
Thomas Harte
7e8b86e9bb
Attempts to flesh out Reflection::Enum.
2020-03-11 23:03:05 -04:00
Thomas Harte
ce80825abb
Starts working towards a registration-based model of reflective enums.
2020-03-11 23:03:05 -04:00
Thomas Harte
a99bb3ba6d
Switches to class storage.
2020-03-11 23:03:05 -04:00
Thomas Harte
3428e9887d
Starts experimenting with declared reflection.
2020-03-11 23:03:05 -04:00
Thomas Harte
5a8fcac4dc
Gives function overloading a try.
2020-03-11 23:03:05 -04:00
Thomas Harte
6a9b14f7d1
Adds a prototype reflective enum.
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I need to make this scopeable before it is acceptable.
2020-03-11 23:03:05 -04:00
Thomas Harte
a74d8bd6e8
Merge pull request #771 from TomHarte/MacShutdownRace
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Ensure race condition workaround is applied for all CVDisplayLinkStops.
2020-03-11 22:47:17 -04:00
Thomas Harte
3c70f056ed
Ensure race condition workaround is applied for all CVDisplayLinkStops.
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This also centralises the workaround, the better for replacing it when I discover a safer alternative.
2020-03-11 22:09:36 -04:00
Thomas Harte
a546880a65
Beefs up documentation on this miniature sort-of reflection.
2020-03-11 22:06:16 -04:00
Thomas Harte
238145f27f
Attempts to flesh out Reflection::Enum.
2020-03-10 23:36:52 -04:00
Thomas Harte
0502e6be67
Starts working towards a registration-based model of reflective enums.
2020-03-10 22:32:55 -04:00
Thomas Harte
6a8c6f5a06
Switches to class storage.
2020-03-10 22:32:55 -04:00
Thomas Harte
5248475e73
Starts experimenting with declared reflection.
2020-03-10 22:32:55 -04:00
Thomas Harte
d6c6b9bdb8
Gives function overloading a try.
2020-03-10 22:32:55 -04:00
Thomas Harte
7bf04d5338
Adds a prototype reflective enum.
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I need to make this scopeable before it is acceptable.
2020-03-10 22:32:55 -04:00
Thomas Harte
9668ec789a
Merge pull request #769 from TomHarte/SDLKeyboardAgain
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Return to old SDL behaviour if --logical-keyboard isn't specified.
2020-03-09 23:18:14 -04:00
Thomas Harte
ead32fb6b2
Return to old behaviour if --logical-keyboard isn't specified.
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This is at least until I'm more confident in the keypress/text input merging. Also, switches to a vector for intermediate keypresses, to ensure order is retained even if timestamps are absent.
2020-03-09 23:10:39 -04:00
Thomas Harte
2ee24d29e5
Merge pull request #766 from TomHarte/6502CleanUp
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Standardises 6502 casts.
2020-03-06 22:03:37 -05:00
Thomas Harte
a560601338
Corrects virtual F keys.
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They're FUNC+, not SHIFT+.
2020-03-06 21:56:08 -05:00
Thomas Harte
a51fe70498
Standardises cast syntax.
2020-03-06 21:55:00 -05:00
Thomas Harte
e47aa7653b
Merge pull request #765 from TomHarte/SDLKeyInput
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Attempts to make use of SDL_StartTextInput.
2020-03-05 22:05:13 -05:00
Thomas Harte
58b8dfb929
Attempts to improve SDL key merging.
2020-03-05 21:56:26 -05:00
Thomas Harte
462a76dd96
Adds virtual keys for F1, F2, etc.
2020-03-05 21:01:30 -05:00
Thomas Harte
3758ec79ac
Adds potential test argument.
2020-03-03 23:09:22 -05:00
Thomas Harte
a0311858f9
Adds mappings for curly brackets.
2020-03-03 23:04:10 -05:00
Thomas Harte
f08d500fd6
Attempts to factor out the latest keyboard logic and hook it in from SDL also.
2020-03-03 22:58:15 -05:00
Thomas Harte
df76d57c47
Experimentally attempts to tie together input and keypresses by timestamp.
2020-03-03 21:30:30 -05:00
Thomas Harte
0ef953a1ea
Adjusts EDIT for the ZX80.
2020-03-02 23:36:38 -05:00
Thomas Harte
05cbed6b6c
Merge pull request #764 from TomHarte/ZX80Cursors
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Adds better guesses for unmapped physical keys.
2020-03-02 23:23:25 -05:00
Thomas Harte
9225c4ef70
Lowers audio frequency cut-off. Still doing this by ear.
2020-03-02 23:11:09 -05:00
Thomas Harte
32136b75cd
Modifies mappings to improve key repeat on backspace and potentially allow mapping of other keys.
2020-03-02 23:10:18 -05:00
Thomas Harte
1f41d9c5f5
Further improvement: if in physical mode, but pressing an unrecognised key, attempt to 'type' it.
2020-03-02 22:08:54 -05:00
Thomas Harte
dc47a2b7d7
Adds virtual key for EDIT.
2020-03-02 21:44:15 -05:00
Thomas Harte
1a539521f2
Merge pull request #763 from TomHarte/LogicalKeyboards
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Adds support for 'logical' keyboard entry
2020-03-01 23:21:46 -05:00
Thomas Harte
2db30a91c6
'Corrects' but disables SDL logical keyboard entry.
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I'm just not sure that SDL supports what I want.
2020-03-01 23:11:14 -05:00
Thomas Harte
b2c07b3110
The Atari ST doesn't offer quick loading.
2020-03-01 22:10:41 -05:00
Thomas Harte
90e6bef6d7
Adds virtual keys for F2, F4, F6 and F8.
2020-03-01 21:47:28 -05:00
Thomas Harte
535634daca
Introduces virtual left and up keys for the Vic-20.
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Thereby allowing all cursor keys to be mapped.
2020-03-01 21:42:30 -05:00
Thomas Harte
575d0da4d1
Attempts better to describe options.
2020-03-01 21:31:40 -05:00
Thomas Harte
ed18092088
Extends logic for when to fall back on standard keypress logic even in logical mode.
2020-03-01 20:25:12 -05:00
Thomas Harte
611182910a
Slightly rejigs character mapper ownership.
2020-03-01 18:44:26 -05:00
Thomas Harte
9273e9b6ed
Adds a second virtual key, for break.
2020-02-29 23:11:02 -05:00
Thomas Harte
77c0cc8b5f
Provisionally adds logical keyboard support to SDL.
2020-02-29 23:07:14 -05:00
Thomas Harte
0705a99ea0
Adds a virtual delete key to the ZX80 and ZX81.
2020-02-29 22:51:42 -05:00
Thomas Harte
560394fead
Ensures keys without symbols are forwarded.
2020-02-29 22:37:15 -05:00
Thomas Harte
86a09b5e7d
Slightly improves ZX80 and ZX81 typing speed.
2020-02-29 22:31:45 -05:00
Thomas Harte
32b2026734
Alters shortcut.
2020-02-29 20:01:21 -05:00
Thomas Harte
b33f568fdd
Makes basic typing adaptations.
2020-02-29 19:59:51 -05:00
Thomas Harte
6e4bd4f505
Ensures new text is appended to any existing buffer.
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TODO: move this into add_typer?
2020-02-29 19:58:56 -05:00
Thomas Harte
b971e2a42c
Adds get_is_resetting to the Z80, eliminating the CPC's custom version.
2020-02-29 19:58:25 -05:00
Thomas Harte
3c103506c9
Optimises Electron typer speed.
2020-02-29 19:26:15 -05:00
Thomas Harte
41d2062342
Ensures that sequences of the same character are broken up properly.
2020-02-29 19:22:54 -05:00
Thomas Harte
672c59f970
Adds use of append with typer.
2020-02-29 18:52:47 -05:00
Thomas Harte
99229df017
Slightly improves syntax.
2020-02-29 18:52:12 -05:00
Thomas Harte
346d80e30b
Corrects phase counting for machines that pause after clear. Which is all of them by default.
2020-02-29 18:51:55 -05:00
Thomas Harte
54b3e511e9
Extends mapping slightly for potential duplicate delete and return.
2020-02-29 18:40:41 -05:00
Thomas Harte
f25683ebec
Fixes off-by-one range test.
2020-02-29 18:35:13 -05:00
Thomas Harte
d5e781e8e1
Adds macOS UI option to use logical keyboard input.
2020-02-29 18:30:58 -05:00
Thomas Harte
4572c86f0f
Adds a third keyboard input mode, which maps to posting things as a typer.
2020-02-29 18:17:39 -05:00
Thomas Harte
8a5c4e384a
Minimises typer timing.
2020-02-29 18:13:05 -05:00
Thomas Harte
4594a3c02b
Ensures final thing in a key sequence is fully typed; adds ability to quicken input.
2020-02-29 18:12:32 -05:00
Thomas Harte
bd45c1c963
Adds append and generally seeks to improve string accumulation.
2020-02-29 17:34:21 -05:00
Thomas Harte
5f8bb92f36
Merge pull request #761 from TomHarte/Z80Tests
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Imports and satisfies additional Z80 unit tests
2020-02-27 22:43:30 -05:00
Thomas Harte
3f64cdaff8
Improves documentation.
2020-02-27 22:33:34 -05:00
Thomas Harte
7ac0ea8529
Corrects test cases, as far as they go.
2020-02-27 22:33:18 -05:00
Thomas Harte
a3569d7201
Corrects so as not to test header. Both Zexall and Zexdoc pass.
2020-02-27 22:09:56 -05:00
Thomas Harte
01faffd5bf
Corrects memptr behaviour of OTIR/OTDR and INIR/INDR.
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This seemingly perfects memptr.
2020-02-27 20:55:43 -05:00
Thomas Harte
26de5be07c
Corrects memptr behaviour of LDIR/LDDR and CPIR/CPDR.
2020-02-27 20:44:53 -05:00
Thomas Harte
87474d5916
Corrects memptr behaviour of OUT (C), 0.
2020-02-27 20:38:27 -05:00
Thomas Harte
a366077509
Updates failure count.
2020-02-26 22:26:23 -05:00
Thomas Harte
06163165d9
Corrects memptr effect of LD rr, (nn).
2020-02-26 22:22:54 -05:00
Thomas Harte
ec82c075be
Fixes memptr for IN C, (C).
2020-02-26 22:19:37 -05:00
Thomas Harte
3b0df172a7
Corrects memptr behaviour of JP nn.
2020-02-26 22:02:15 -05:00
Thomas Harte
7058dbc3cc
Corrects memptr for LD HL, (nn).
2020-02-26 21:54:49 -05:00
Thomas Harte
b64de89d2d
Corrects JR memptrs.
2020-02-26 21:47:34 -05:00
Thomas Harte
8878396339
Corrects DJNZ memptr behaviour.
2020-02-26 21:42:31 -05:00
Thomas Harte
da6d5e2e24
Adds memptr testing.
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30 failures, for the record.
2020-02-26 20:05:14 -05:00
Thomas Harte
18bb90329a
Apparently tStates is decimal. Of course it is.
2020-02-26 20:04:55 -05:00
Thomas Harte
604bb50adf
Imports and converts updated FUSE tests.
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Now with added MEMPTR.
2020-02-25 23:15:27 -05:00
Thomas Harte
e4887c0c56
Corrects JR cc tests.
2020-02-24 23:36:05 -05:00
Thomas Harte
3097c4ccae
Improves MEMPTR testing and some results.
2020-02-24 23:32:18 -05:00
Thomas Harte
7959d243f6
Adds single-stepping. Of a kind.
2020-02-24 23:31:42 -05:00
Thomas Harte
79dd402bc8
Consolidates different test port input selection.
2020-02-23 16:12:28 -05:00
Thomas Harte
3f3229851b
Implements MEMPTR for IN.
2020-02-23 00:32:33 -05:00
Thomas Harte
989628a024
Switches to looking for "Result: all tests passed." as a success/failure test.
2020-02-22 23:07:14 -05:00
Thomas Harte
e0475343f5
Makes collated text easier to read.
2020-02-22 18:58:24 -05:00
Thomas Harte
da0a9113d4
Introduces the full range of tests.
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Albeit that I don't know the correct output yet.
2020-02-22 18:44:15 -05:00
Thomas Harte
cf7ab97451
Gets the first test to run (and terminate).
2020-02-22 18:42:23 -05:00
Thomas Harte
2370575eb5
Starts introducing the Patrik Rak tests.
2020-02-22 15:49:36 -05:00
Thomas Harte
825b68e5c4
Adds separate entry points for zexall and zexdoc.
2020-02-22 12:34:47 -05:00
Thomas Harte
851cba0b25
Corrects lambda capture.
2020-02-22 12:34:16 -05:00
Thomas Harte
f0ec168ac7
Merge pull request #760 from TomHarte/MoreAsserts
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Throws in additional asserts.
2020-02-20 11:19:03 -05:00
Thomas Harte
fa933952f7
Throws in additional asserts, so far without uncovering anything.
2020-02-19 23:14:18 -05:00
Thomas Harte
ba6e23784c
Merge pull request #759 from TomHarte/CPCCorruption
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Resolves a variety of potential startup data races.
2020-02-19 21:28:22 -05:00
Thomas Harte
614032198e
Ensures no divide by zero during initial construction.
2020-02-18 22:58:37 -05:00
Thomas Harte
3715e6b48a
Resolves potential data race on write_area_texture_.
2020-02-18 22:41:46 -05:00
Thomas Harte
91e7400bbb
Avoids double-setting of the OpenGL view.
2020-02-18 22:33:16 -05:00
Thomas Harte
a8d082c7d2
Makes audioQueue atomic to avoid potential data race.
2020-02-18 22:31:24 -05:00
Thomas Harte
95756f9716
Resolves data race on write_pointers_ close to machine setup.
2020-02-18 20:41:51 -05:00
Thomas Harte
a5e1765ce4
Eliminates potential race conditions on validity of delegate_.
2020-02-18 20:33:31 -05:00
Thomas Harte
f43c31da1f
Tries a new arrangement of hsync response.
2020-02-17 22:24:01 -05:00
Thomas Harte
95d0adf10e
Moves the icon off the first text line.
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Again, in the hope of having GitHub's search pick it up.
2020-02-17 00:35:06 -05:00
Thomas Harte
2e1b245cd8
Merge pull request #758 from TomHarte/JasminDriveSelection
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Switches Jasmin drive selection logic.
2020-02-16 21:21:41 -05:00
Thomas Harte
5400c47f07
Merge pull request #757 from TomHarte/ByteDrive
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Updates Byte Drive implementation as per latest information.
2020-02-16 21:16:58 -05:00
Thomas Harte
4153442703
Switches Jasmin drive selection logic.
2020-02-16 21:15:16 -05:00
Thomas Harte
5e4b721e97
Updates Byte Drive implementation as per latest information.
2020-02-16 21:07:03 -05:00
Thomas Harte
aca41ac089
Merge pull request #756 from TomHarte/Stereo
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Adds stereo sound processing.
2020-02-16 19:20:21 -05:00
Thomas Harte
01a883e669
Corrects fullscreen switch.
2020-02-16 19:07:13 -05:00
Thomas Harte
1e4356f83a
Adds a sensible is_stereo to the MultiSpeaker.
2020-02-16 18:50:34 -05:00
Thomas Harte
545a6177bb
Makes CompoundSource mono/stereo-aware.
2020-02-16 18:45:36 -05:00
Thomas Harte
50d356be2f
Ensures all audio sources, including compound sources, announce whether they're stereo correctly.
2020-02-16 18:31:45 -05:00
Thomas Harte
9835e800ec
Fixed: individual audio generators now either are or are not stereo. The speaker acts accordingly.
2020-02-16 18:28:03 -05:00
Thomas Harte
5242362f31
Slightly shuffles preprocessor use, the better for testing.
2020-02-16 17:53:26 -05:00
Thomas Harte
808e4e8537
Adds comment to explain channel allocations.
2020-02-16 15:04:52 -05:00
Thomas Harte
43740a4b2f
Adds support for stereo output.
2020-02-16 14:14:10 -05:00
Thomas Harte
f99d672237
The macOS port now selects stereo output if appropriate.
2020-02-16 14:05:50 -05:00
Thomas Harte
337cb4fb86
Resolves implicit type conversion warnings.
2020-02-16 14:05:23 -05:00
Thomas Harte
90856a0e7a
Adds mixdown/up capability to Speaker.
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To deal with occasions when the host machine just always is either mono or stereo, and the emulated machine must cope.
2020-02-16 13:50:18 -05:00
Thomas Harte
ea1c8a3b81
Ensures the stereo audio queue is the same length (in time) as the mono.
2020-02-16 12:46:25 -05:00
Thomas Harte
d55d077a95
Fixes the input buffer partial-keep step in stereo.
2020-02-16 00:20:22 -05:00
Thomas Harte
f760a68173
Corrects stereo audio generation.
2020-02-16 00:19:49 -05:00
Thomas Harte
e66a3523b6
Makes some attempt at stereo support, with the Amstrad CPC being the test case.
2020-02-15 18:55:19 -05:00
Thomas Harte
89d6b85b83
Adds optional stereo output for the AY.
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The real chip provides the three tone channels as separate outputs, so a variety of different mixings can exist.
2020-02-15 18:09:17 -05:00
Thomas Harte
e02d109864
Nudges the LowpassSpeaker towards supporting stereo generation.
2020-02-15 18:03:12 -05:00
Thomas Harte
743981e9ad
Adds stereo output for SDL.
2020-02-15 17:23:40 -05:00
Thomas Harte
49b8e771b5
Adds the messaging that would allow a Speaker to output stereo, semantically.
2020-02-15 13:40:19 -05:00
Thomas Harte
dde672701f
Merge pull request #755 from TomHarte/ExpliticLambdas
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Tries to be less lazy with lambda captures.
2020-02-15 12:38:12 -05:00
Thomas Harte
9ca2d8f9f2
Tried to be less lazy with lambda captures.
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This is primarily defensive.
2020-02-14 23:39:08 -05:00
Thomas Harte
fd786412aa
Merge pull request #754 from TomHarte/AYVolume
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Introduces more correct AY volume levels.
2020-02-14 23:38:17 -05:00
Thomas Harte
eb88c7cfba
Allows up to half a second of hard processing.
2020-02-14 23:24:51 -05:00
Thomas Harte
e1892ff370
Resolves crash upon File -> New..., Cancel; also ensures slow performance can't equal no progression.
2020-02-14 23:16:44 -05:00
Thomas Harte
763159a6f6
More neatly ties volume level 0 to silence.
2020-02-14 23:16:10 -05:00
Thomas Harte
6810a6ee58
Adjusts the AY volume scale.
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Hopefully more accurately to model the real thing.
2020-02-14 22:51:20 -05:00
Thomas Harte
65e6c3a9fe
Merge pull request #753 from TomHarte/IconForReal
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Experimentally introduces an application icon to the README
2020-02-13 23:39:06 -05:00
Thomas Harte
dcbbf988c1
Crops empty space around icon, and increases size slightly.
2020-02-13 23:27:33 -05:00
Thomas Harte
199cafebcf
Attempts direct HTML tag for image sizing.
2020-02-13 23:25:26 -05:00
Thomas Harte
555d807d76
Attempt smaller icon.
2020-02-13 23:23:09 -05:00
Thomas Harte
003c6ad11b
Fixes image link.
2020-02-13 23:21:48 -05:00
Thomas Harte
dc77d87427
Experiments with a README icon.
2020-02-13 23:20:19 -05:00
Thomas Harte
cfc44cf778
Merge pull request #752 from TomHarte/MacintoshBus
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Reduces 8-bit memory access costs for the Macintosh.
2020-02-13 23:03:07 -05:00
Thomas Harte
3df99788ff
Removes TODOs, as I think they're probably inappropriate.
2020-02-13 21:19:23 -05:00
Thomas Harte
3600d2d193
Starts switching towards a byte-oriented bus.
2020-02-13 21:14:13 -05:00
Thomas Harte
5f661adb7f
Merge pull request #750 from TomHarte/CatchupCap
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Avoids trying to paper over huge gaps in running time.
2020-02-12 23:57:01 -05:00
Thomas Harte
109d072cb6
Avoids trying to paper over huge gaps in running time. Also attempts to improve SDL shutdown reliability.
2020-02-12 23:47:04 -05:00
Thomas Harte
0c1c5a0ab8
Merge pull request #749 from TomHarte/DiskIndicator
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Moves ownership of drives inside Disk::Controller.
2020-02-12 23:37:32 -05:00
Thomas Harte
e01c66fd65
Implements multidrive support.
2020-02-12 23:32:01 -05:00
Thomas Harte
9f32fa7f5b
Resolves potential random RAM writes at startup.
2020-02-12 23:31:48 -05:00
Thomas Harte
91a3d42919
Ensures no DMA clocking whatsoever when asleep.
2020-02-12 23:23:42 -05:00
Thomas Harte
3cb6bbf771
Uses the union of all drive statuses to determine Drive::Controller's preferred clocking.
2020-02-12 22:28:42 -05:00
Thomas Harte
452e281009
Ensures what is currently the only drive is selected.
2020-02-11 22:13:13 -05:00
Thomas Harte
3da948db52
Eliminates local drive. They're not local any more.
2020-02-11 22:12:54 -05:00
Thomas Harte
0c2f77305f
Eliminates dangling printf.
2020-02-11 22:12:30 -05:00
Thomas Harte
05bcd73f82
Attempts to pull drive ownership into DiskController.
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For the sake of being more intelligent as to drive clocking, hopefully. And, eventually, to support multiple drive selection.
2020-02-11 21:59:13 -05:00
Thomas Harte
654f5b0478
Merge pull request #748 from TomHarte/SDLLatency
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Introduces sync matching to the SDL version.
2020-02-10 23:38:24 -05:00
Thomas Harte
886d923e30
Attempts to permit fixed speed multiplication.
2020-02-10 23:30:32 -05:00
Thomas Harte
6624cb7a78
Corrects set_ram macro to act more like a function.
2020-02-10 23:19:47 -05:00
Thomas Harte
6147134423
Introduces frame locking for SDL.
2020-02-10 23:07:09 -05:00
Thomas Harte
bf6bc7c684
Adds speed control into the SDL build.
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If I can just figure out how to manipulate OpenGL from the timer thread to SDL's satisfaction, this'll be as good as it probably gets via SDL.
2020-02-09 22:27:02 -05:00
Thomas Harte
0b0a7e241b
Factors out the stuff of time warping.
2020-02-09 22:11:06 -05:00
Thomas Harte
705d14259c
Experimentally switches to a 'high-resolution' clock for SDL.
2020-02-09 21:44:55 -05:00
Thomas Harte
f1cd35fa16
Merge pull request #746 from TomHarte/LatencyChop
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Reduces latency in macOS, improves concurrency
2020-02-09 21:07:40 -05:00
Thomas Harte
6bda4034c6
Ensures no input data is dropped when changing output rates.
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I think this 'completely' deals with the problem. At least until someone wants dynamic output buffer sizes or something like that. We'll see.
2020-02-09 19:14:25 -05:00
Thomas Harte
b04daca98e
Picks a safer default construction.
2020-02-09 19:13:21 -05:00
Thomas Harte
85dcdbfe9e
Adopts a log prefix for the Master System.
2020-02-09 19:12:44 -05:00
Thomas Harte
24340d1d4f
Resolves fetch errors.
2020-02-09 17:04:49 -05:00
Thomas Harte
6ae42d07a7
Retains existing output when switching filter coefficients.
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This eliminates an issue with dynamic rate matching and throwing away the beginnings of buffers.
2020-02-09 16:42:07 -05:00
Thomas Harte
2ea1e059a8
Softens swings in emulated machine speed.
2020-02-09 16:34:13 -05:00
Thomas Harte
b5d6126a2d
Avoids unnecessary filter recalculation.
2020-02-09 16:32:32 -05:00
Thomas Harte
dac217c98c
Defers starting the macOS audio queue, and attempts to restart it upon packet loss.
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Hopefully forever to vanish permanent audio loss?
2020-02-08 22:08:27 -05:00
Thomas Harte
c26c8992ae
Reintroduces joystick support; eliminates CSBestEffortUpdater.
2020-02-08 21:27:04 -05:00
Thomas Harte
b76a5870b3
Moves drawing into the next timer tick after retrace if sync locked.
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... which should mean it occurs within 1/600th of a second of announced retrace, which I assume always will be less than the retrace period. So: does the frame buffer update during retrace.
This should completely eliminate tearing for machines that can be synced to the native output rate.
2020-02-08 18:07:13 -05:00
Thomas Harte
7c0f3bb237
Gets to slightly adjusting execution speed and matching up respective vertical syncs.
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I probably still need to move the ->draw inline.
2020-02-08 18:01:48 -05:00
Thomas Harte
f615d096ca
Switch to obtaining refresh periods ephemerally.
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Which simplifies the necessary delegate protocol.
2020-02-08 15:03:18 -05:00
Thomas Harte
09132306e4
Removes two temporary debugging steps.
2020-02-06 23:35:23 -05:00
Thomas Harte
f95b07efea
Continues edging towards raster racing and/or time warping.
2020-02-06 23:35:03 -05:00
Thomas Harte
14d976eecb
Starts towards an implementation of time warping.
2020-02-04 23:08:54 -05:00
Thomas Harte
e1cbad0b6d
Ensures new displayLinkDelegates get a nudge with the initial display link.
2020-02-04 23:08:25 -05:00
Thomas Harte
e7410b8ed8
Uses objective clock for updates.
2020-02-04 22:24:54 -05:00
Thomas Harte
5caf74b930
Corrects typo.
2020-02-04 22:24:37 -05:00
Thomas Harte
b41920990f
Moves submit step to end of line, rather than end of scan.
2020-02-04 22:15:20 -05:00
Thomas Harte
709c229cd7
Gets a bit more explicit with ScanTarget documentation.
2020-02-04 20:19:46 -05:00
Thomas Harte
01fd1b1a2e
Pulls out ticks as a macro constant.
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For playing.
2020-02-03 22:44:39 -05:00
Thomas Harte
96769c52f6
Prevents an endless queue of backlogged updates.
2020-02-03 22:08:07 -05:00
Thomas Harte
cf9729c74f
Takes a first shot at running OpenGL work throughout a frame.
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Rather than en masse at the end. But it seems I've been lazy with my threading. Work to do!
2020-02-03 21:58:29 -05:00
Thomas Harte
0f2783075f
Moves responsibility for timed updates to CSMachine, which gives the CSHighPrecisionTimer a shot.
2020-02-02 21:39:20 -05:00
Thomas Harte
256f4a6679
Fixes -invalidate: cancel the dispatch source, don't just suspend it, and wait until that is done.
2020-02-02 21:29:22 -05:00
Thomas Harte
0310f94f0c
Merge pull request #745 from TomHarte/STMonochrome
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Adds some amount of 1bpp/72Hz output support for the Atari ST.
2020-02-02 17:46:36 -05:00
Thomas Harte
085529ed72
Makes the shifter behaviour conform to its documentation.
2020-02-02 17:26:39 -05:00
Thomas Harte
8aabf1b374
Allows receivers of nullptr from begin_data to output any quantity of data.
2020-02-01 21:43:48 -05:00
Thomas Harte
ff39f71ca0
Eliminates meaningless constants from the Macintosh video's CRT setup.
2020-01-30 23:29:04 -05:00
Thomas Harte
019474300d
Centralises responsibility for picking irrelevant numbers for a computer-style monitor.
2020-01-30 23:26:02 -05:00
Thomas Harte
af976b8b3d
Eliminates modulus operation per ROM access.
2020-01-30 23:09:24 -05:00
Thomas Harte
f3db1a0c60
Eliminates ad hoc scheduling for delayed DE -> LOAD.
2020-01-29 22:50:22 -05:00
Thomas Harte
ce28213a5e
[Mostly] unifies deferral process.
2020-01-29 22:46:08 -05:00
Thomas Harte
f9ce50d2bb
Adds some debugging `asserts.
2020-01-29 22:45:44 -05:00
Thomas Harte
ee16095863
Withdraws advance_to_next; once it has to cope with simultaneous events it stops being faster than advance.
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I could possibly try to deal with those at insertion time, but it'd get messy.
2020-01-29 22:45:10 -05:00
Thomas Harte
f0a6e0f3d5
Splits out the queue management stuff from queue+action.
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Temporarily breaks ST video in the endeavour.
2020-01-29 22:18:41 -05:00
Thomas Harte
8c4fb0f688
Extends the DeferredQueue to allow out-of-order enqueing.
2020-01-29 21:49:52 -05:00
Thomas Harte
baa51853c4
Introduces RealTimeActor, providing the same interface as JustInTimeActor.
2020-01-29 21:26:15 -05:00
Thomas Harte
0e29c6b0ab
On further reflection, I think events should occur after the running period.
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I'm testing this now for sanity in 2/4bpp mode.
2020-01-28 23:26:37 -05:00
Thomas Harte
1b27eedf6b
Ensure this can definitely never divide by 0.
2020-01-28 23:25:21 -05:00
Thomas Harte
8b1f183198
Reduce test duration much closer to two frames.
2020-01-28 23:25:01 -05:00
Thomas Harte
4766ec55fe
Documents units.
2020-01-28 23:23:51 -05:00
Thomas Harte
c5edc879b6
Switches back to testing the monochrome monitor.
2020-01-28 22:12:57 -05:00
Thomas Harte
65309e60c4
Corrects sequence point generation by allowing for hsync_end != end of line.
2020-01-28 20:38:20 -05:00
Thomas Harte
5c4623e9f7
Adds a sequence-point test for 72Hz mode.
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Which immediately appears to trigger the hsync issue I'm also seeing in manual testing.
2020-01-28 20:27:24 -05:00
Thomas Harte
2c0cab9e4d
Adds line length latching as a line event.
2020-01-28 20:22:37 -05:00
Thomas Harte
d0117556d1
Reintroduces CSHighPrecisionTimer.
2020-01-28 20:09:46 -05:00
Thomas Harte
b1ff031b54
Fixes runtime test.
2020-01-27 23:41:08 -05:00
Thomas Harte
7e8405e68a
Makes 72Hz horizontal sync independently relocatable.
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... and moves and shortens it, based on my guesswork as to requirements.
2020-01-27 23:40:01 -05:00
Thomas Harte
c8fd00217d
Resolves loss of horizontal resolution in 1bpp mode.
2020-01-27 23:08:28 -05:00
Thomas Harte
9d340599a6
Towards ST 1bpp support: puts vsync in an appropriate location, starts experimenting with proper CRT timings.
2020-01-27 23:00:30 -05:00
Thomas Harte
8e094598ca
Merge pull request #744 from TomHarte/CRCTemplate
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Better templates the CRC generator.
2020-01-27 21:54:32 -05:00
Thomas Harte
189122ab84
Fixes test units.
2020-01-27 20:35:58 -05:00
Thomas Harte
4b53f6a9f0
Renames T to the more-communicative IntType, adds some explicit constexpra.
2020-01-27 08:28:20 -05:00
Thomas Harte
561e149058
Better templates the CRC generator.
2020-01-27 00:03:01 -05:00
Thomas Harte
5975fc8e63
Merge pull request #738 from TomHarte/FinalOverride
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Switches to [just] `final` where relevant to mark overrides.
2020-01-26 23:50:05 -05:00
Thomas Harte
7316a3aa88
Merge branch 'master' into FinalOverride
2020-01-26 23:42:25 -05:00
Thomas Harte
50be991415
Merge pull request #743 from TomHarte/macOSScreens
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Ensures macOS window can properly be dragged between screens, Retina or not.
2020-01-26 23:33:50 -05:00
Thomas Harte
52e49439a6
Recreates display link upon a screen change.
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Different screens may have different refresh rates, and I can find no guarantees about how Apple handles that.
2020-01-26 23:23:33 -05:00
Thomas Harte
6bcdd3177d
Ensures that a change of screen issues a reshape. Just in case.
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Thereby resolves display mis-sizing when dragging from a Retina display to a regular one, or vice versa.
2020-01-26 18:04:25 -05:00
Thomas Harte
fbe479c43f
Switch to saving screenshots to the desktop.
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Or, at least, try. User permission would be required. More reading necessary.
2020-01-26 17:36:16 -05:00
Thomas Harte
83dbd257e1
Merge pull request #742 from TomHarte/SpeedMultiplier
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Adds the option to run machines at a multiple of their real speeds.
2020-01-26 13:30:43 -05:00
Thomas Harte
b514756272
Adds the option to run machines at a multiple of their real speeds.
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Exposed to SDL users only, for now.
2020-01-26 13:25:23 -05:00
Thomas Harte
7e4c13c43e
Merge pull request #741 from TomHarte/ZX80RateReporting
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Corrects ZX80, ZX81 and Amstrad CPC scan status scales.
2020-01-26 11:42:54 -05:00
Thomas Harte
79bb0f8222
Updates comment.
2020-01-26 11:36:06 -05:00
Thomas Harte
43bf6aca67
Corrects reported scan status for the Amstrad CPC.
2020-01-25 23:46:18 -05:00
Thomas Harte
03d23aad41
Corrects reported ZX80/81 scan status.
2020-01-25 23:27:09 -05:00
Thomas Harte
c398aa60c1
Merge pull request #739 from TomHarte/SDLThreadSafety
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Resolves thread safety issues in SDK kiosk mode.
2020-01-25 14:56:29 -05:00
Thomas Harte
9666193c67
Pulls the call to .update out of the critical section.
2020-01-25 14:50:28 -05:00
Thomas Harte
3f57020b00
Resolves thread safety oversights in SDK kiosk mode.
2020-01-25 14:48:00 -05:00
Thomas Harte
294e09f275
All these 'override's can be 'final's.
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At least for the purpose of being communicative. I doubt there's much to gain in terms of compiler output — the DiskImageHolder can avoid some virtual lookups but nothing else leaps out.
2020-01-23 22:57:51 -05:00
Thomas Harte
ba516387ba
In all these instances, final => override. So no need to repeat myself.
2020-01-23 22:35:39 -05:00
Thomas Harte
2103e1b470
Merge pull request #737 from TomHarte/Multisync
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Adds multisync monitor support to the Oric.
2020-01-23 22:20:34 -05:00
Thomas Harte
7bac439e95
Adds, and comments out, a useful temporary piece of debugging logging.
2020-01-23 22:14:22 -05:00
Thomas Harte
9136917f00
Enables the Oric for 50/60Hz mode switching, inventing PAL60 for the purpose.
2020-01-23 22:14:02 -05:00
Thomas Harte
6802318784
Removes audio_queue_.flush() calls; I don't think I really need to block. At least, not usually.
2020-01-23 20:13:16 -05:00
Thomas Harte
428d141bc9
Factors out the logic behind the Atari 2600's frequency switching.
2020-01-23 20:12:44 -05:00
Thomas Harte
a86fb33789
Ensures that the ColecoVision, MSX and Master System fully flush.
2020-01-22 22:57:16 -05:00
Thomas Harte
beefb70f75
Adds vertical sync as something that can be run_until.
2020-01-22 22:20:56 -05:00
Thomas Harte
3c6a00dc3c
Breaks a potential deadlock.
2020-01-22 22:10:20 -05:00
Thomas Harte
8404409c0d
Causes the Atari 2600 to obey normal flush semantics.
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This stuff is going to become more important with run_until.
2020-01-22 22:05:51 -05:00
Thomas Harte
a5f285b4ce
Enhances reported data.
2020-01-22 22:01:17 -05:00
Thomas Harte
9d97a294a7
Corrects the TMS' get_scaled_scan_status.
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I think all platforms are now returning credible numbers.
2020-01-22 19:34:10 -05:00
Thomas Harte
56448373ae
Splits one line into two, for the benefit of step debugging.
2020-01-22 19:32:23 -05:00
Thomas Harte
a71c5946f0
Ensures proper manipulation of scan_statuses, leading to the correct result out of a CRTMachine.
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Possibly with the exception of the TMS, as I appear to have uncovered an unrelated issue there.
2020-01-21 22:28:25 -05:00
Thomas Harte
e7fff6e123
Minor step towards correct answers: divide by time_multiplier_.
2020-01-20 22:33:51 -05:00
Thomas Harte
82e5def7c4
Implements get_scan_status, but for scale being incorrect.
2020-01-20 21:58:34 -05:00
Thomas Harte
d97a073d1b
Adds the necessary routine for all machines to be able to respond to get_scan_status.
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They all just as the CRT, as all are currently based on the CRT. Which doesn't currently know the total clock rate it would need to in order properly to scale the answer to the question. Further thought coming.
2020-01-20 21:45:10 -05:00
Thomas Harte
e74f37d6ed
Merge pull request #736 from TomHarte/RunUntil
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Implements a nascent `run_until`
2020-01-20 17:48:13 -05:00
Thomas Harte
3aa2c297a2
Adds feedback to the best-effort updater; enables the Cocoa port for audio event requests.
2020-01-20 17:38:25 -05:00
Thomas Harte
290db67f09
Adds a forward route for event flags. Doesn't yet account for extra time expended.
2020-01-20 17:09:01 -05:00
Thomas Harte
4de121142b
Adds a flags parameter to the BestEffortUpdater delegate.
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On the Cocoa side, cuts Swift out of the update loop, as that seems merely to add code.
2020-01-20 16:21:53 -05:00
Thomas Harte
3c760e585a
Switches to accepting a bit mask of events to run_until.
2020-01-20 16:08:21 -05:00
Thomas Harte
8adb2283b5
Rewrites the best-effort updater to try to get better thread affinity.
2020-01-20 13:38:46 -05:00
Thomas Harte
cb61e84868
Starts building out higher-level run_until functionality.
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Specifically: you can now run until the next set of speaker samples has been delivered.
2020-01-20 12:12:23 -05:00
Thomas Harte
8349005c4b
Adds CRTMachine::run_until, which will run until a condition is true.
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I want to get to being able to say "run until the beam is 60% of the way down", "run until a new packet of audio has been delivered", etc.
2020-01-19 23:52:47 -05:00
Thomas Harte
a2847f4f8e
Merge pull request #735 from TomHarte/Numeric
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Eliminates homegrown factoring code
2020-01-19 23:32:50 -05:00
Thomas Harte
add3ebcb44
Updates Xcode project.
2020-01-19 23:23:44 -05:00
Thomas Harte
98daad45c7
Removers Factors.hpp; now this is a C++17 project.
2020-01-19 23:18:59 -05:00
Thomas Harte
1b4b6b0aee
Renames: NumberTheory -> Numeric.
2020-01-19 23:14:35 -05:00
Thomas Harte
8f94da9daf
Merge pull request #734 from TomHarte/FuzzyBits
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Adds PCMSegementEventSource support for 'fuzzy' bits
2020-01-19 21:48:07 -05:00
Thomas Harte
357137918d
Adds fuzzy but marking through the GetTrackWithSectors interface.
2020-01-19 21:41:10 -05:00
Thomas Harte
b0f7b762af
Adds a possible const.
2020-01-19 21:40:30 -05:00
Thomas Harte
da3ee381f4
Attempts a full wiring up of fuzzy bits.
2020-01-19 21:20:21 -05:00
Thomas Harte
d27d14d2b0
Supplies fuzzy masks where specified.
2020-01-19 21:08:49 -05:00
Thomas Harte
b0326530d6
Allows fuzzy masks to be fed into the FM and MFM encoders.
2020-01-19 21:08:15 -05:00
Thomas Harte
c2bd5be51a
This seems to be the proper interpretation of speeds?
2020-01-19 20:42:51 -05:00
Thomas Harte
84f5feab70
Properly flags up overloads.
2020-01-19 20:37:54 -05:00
Thomas Harte
4b2c68c3d3
Documents next.
2020-01-19 20:32:58 -05:00
Thomas Harte
5391a699a4
Adds the ability for a PCMSegment to maintain 'fuzzy' (i.e. random) bits. Implements an LFSR for bit generation.
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I'm not necessarily happy with the idea of just shoving in a [pseudo-]random number generator in rather than emulating the proper process underneath, but for now I throw my arms up.
2020-01-19 20:09:11 -05:00
Thomas Harte
f3f8345e5e
Corrects spelling mistake.
2020-01-19 20:05:52 -05:00
Thomas Harte
c755411636
Slightly improves comments.
2020-01-19 20:05:22 -05:00
Thomas Harte
f02759b76b
Merge pull request #733 from TomHarte/STXTiming
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Adds support for STX speed zones.
2020-01-19 12:41:31 -05:00
Thomas Harte
f34ddce28f
Adds support for STX speed zones.
2020-01-19 12:38:33 -05:00
Thomas Harte
50348c9fe7
Adds the ability to substitute a target during encoding.
2020-01-19 12:11:56 -05:00
Thomas Harte
3bfeebf2a1
Merge pull request #732 from TomHarte/TraceFlag
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Improves 68000 trace support
2020-01-18 23:17:21 -05:00
Thomas Harte
dca79ea10e
Requires trace flag currently set.
2020-01-18 22:52:53 -05:00
Thomas Harte
b7fd4de32f
Ensures a one-instruction latency on the trace flag.
2020-01-18 22:06:00 -05:00
Thomas Harte
78d08278ed
Merge pull request #731 from TomHarte/ShifterSync
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Improves STX track locating, plus minor WD emulation improvements
2020-01-18 14:59:07 -05:00
Thomas Harte
d4be052e76
Switch to matching fragments.
2020-01-18 14:18:59 -05:00
Thomas Harte
d674fd0e67
The WD uses only the low two bits for sector size.
2020-01-18 13:40:50 -05:00
Thomas Harte
229b7b36ed
Merge branch 'master' into ShifterSync
2020-01-18 13:38:56 -05:00
Thomas Harte
8a8b8db5d1
Merge pull request #729 from TomHarte/JasminLED
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Corrects Jasmin activity light.
2020-01-16 23:16:55 -05:00
Thomas Harte
d30f83871d
Corrects Jasmin activity light.
2020-01-16 22:59:43 -05:00
Thomas Harte
1422f8a93a
Merge pull request #728 from TomHarte/HardenedRuntime
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Opts in for the hardened macOS runtime.
2020-01-16 22:27:58 -05:00
Thomas Harte
f0da75f8e9
Opts in for the hardened macOS runtime.
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Seemingly with no ill effects.
2020-01-16 22:18:18 -05:00
Thomas Harte
cb8a7a4137
Merge pull request #727 from TomHarte/RDYs
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Adds emulation of non-default types of floppy drive RDY output
2020-01-16 22:07:41 -05:00
Thomas Harte
efd684dc56
Opts the BD-500 in for modified Shugart RDY.
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Hopefully this is correct. I'm presently mystified as to other options.
2020-01-16 21:34:57 -05:00
Thomas Harte
aeac6b5888
Allows the type of RDY signal to be specified.
2020-01-16 21:34:48 -05:00
Thomas Harte
9bb294a023
Merge pull request #726 from TomHarte/BD-DOS
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Implements highly-provisional Byte Drive 500 support for the Oric.
2020-01-16 00:09:34 -05:00
Thomas Harte
1972ca00a4
Fixes quick-NTSC-avoidance fix.
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I suspect this is very temporary, but here it is.
2020-01-16 00:01:16 -05:00
Thomas Harte
6a185a574a
Adds the BD-500 to the Mac GUI.
2020-01-15 23:56:56 -05:00
Thomas Harte
c606931c93
Ensures a safe default-selected drive.
2020-01-15 23:56:44 -05:00
Thomas Harte
93cecf0882
Ensures no possible initial NTSC, removes printfs.
2020-01-15 23:47:45 -05:00
Thomas Harte
aac3d27c10
Adds activity indicators for the BD-500 and Jasmin.
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Also slightly cleans up DiskController a little further.
2020-01-15 23:39:15 -05:00
Thomas Harte
99122efbbc
Adds a slight cool-down period on end-of-rotation.
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Along with the corresponding inactive transition of the ready signal.
2020-01-15 23:29:52 -05:00
Thomas Harte
30e856b9e4
Renames motor_is_on_ to motor_input_is_on_ to start to disambiguate the two things.
2020-01-15 23:16:25 -05:00
Thomas Harte
91fae86e73
Factors out paging, implements a bit more of the BD500.
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That is, enough seemingly fully to work, if I force the drive to report ready.
2020-01-15 23:15:39 -05:00
Thomas Harte
f5c194386c
Ties head load to ready.
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BD-DOS no longer perpetually retries.
2020-01-14 23:45:36 -05:00
Thomas Harte
98f7662185
Force BASIC 1.0 for the BD-500.
2020-01-14 23:33:52 -05:00
Thomas Harte
62c3720c97
Adds status register and shout-outs on other address access.
2020-01-14 23:24:11 -05:00
Thomas Harte
6b08239199
Adapts slightly; it would seem that BD-DOS disks really fill up space.
2020-01-14 23:16:06 -05:00
Thomas Harte
f258fc2971
Adds enough of a BD500 for the boot sector seemingly to load.
2020-01-14 23:15:27 -05:00
Thomas Harte
6b84ae3095
Makes the Microdisc also a DiskController, and simplifies delegate interface.
2020-01-14 22:53:27 -05:00
Thomas Harte
5dd8c677f1
Factors out from the Jasmin the stuff that I'm going to need to repeat for the BD-500.
2020-01-14 22:23:00 -05:00
Thomas Harte
1cbcd5355f
Adds a detector and enumerated Byte Drive 500 disk interface type.
2020-01-14 21:55:04 -05:00
Thomas Harte
9799250f2c
Updates to mention the Jasmin's ROM and list the BD-DOS.
2020-01-14 21:54:37 -05:00
Thomas Harte
ecb5807ec0
Enssures STX interprets sector sizes correctly.
2020-01-14 21:35:37 -05:00
Thomas Harte
942986aadc
Insures against badly-placed locations.
2020-01-13 22:49:12 -05:00
Thomas Harte
1f539822ee
Adds better support for WD-esque false sync, improves STX track patching.
2020-01-13 22:19:48 -05:00
Thomas Harte
fab35b360a
Ensure an encoder is created even if no sectors are placed.
2020-01-12 22:37:00 -05:00
Thomas Harte
80fcf5b5c0
Merge pull request #724 from TomHarte/STX2
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Adds some support for the STX file format.
2020-01-12 22:28:50 -05:00
Thomas Harte
b3b2e18c4b
Ensures head and track counts are reported accurately.
2020-01-12 22:23:34 -05:00
Thomas Harte
2d233b6358
Makes a more concrete attempt at track/sector combination.
2020-01-12 22:18:31 -05:00
Thomas Harte
83ed36eb08
Add missing #include.
2020-01-12 17:56:04 -05:00
Thomas Harte
89f4032ffc
Merge branch 'master' into STX2
2020-01-12 17:55:19 -05:00
Thomas Harte
8c90ec4636
Merge pull request #725 from TomHarte/FasterDPLL
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Improve DPLL implementation.
2020-01-12 17:54:55 -05:00
Thomas Harte
514141f8c5
Eliminates the optionality of a DPLL receiver.
2020-01-12 17:45:02 -05:00
Thomas Harte
8e3a618619
Corrects Mac build, shrinks default history [back] to 3 slots.
2020-01-12 17:33:34 -05:00
Thomas Harte
6df6af09de
Remove dead .cpp.
2020-01-12 17:25:59 -05:00
Thomas Harte
f42655a0fc
Promote DigitalPhaseLockedLoop to a template, simplify to O(1) add_pulse.
2020-01-12 17:25:21 -05:00
Thomas Harte
f81a7f0faf
Ensures prefixes are MFM encoded and decoded.
2020-01-11 22:10:41 -05:00
Thomas Harte
2b4c924399
Makes an effort to locate address and data bodies within track.
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"Not completely successful" would be the polite term.
2020-01-09 23:28:07 -05:00
Thomas Harte
64517a02b7
Adds code to deal with sector-free tracks.
2020-01-09 21:50:32 -05:00
Thomas Harte
b4befd57a9
Advances to being able to cope with STXs with no special features whatsoever.
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Well, other than perhaps a broken data CRC. Fuzzy bits, timing differences and the stuff between sectors are all currently absent.
2020-01-09 21:03:01 -05:00
Thomas Harte
2c742a051e
Merge pull request #723 from TomHarte/LSLTiming
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Introduces a timing test for LSL. Which already passes.
2020-01-08 22:43:50 -05:00
Thomas Harte
6595f8f527
Introduces a timing test for LSL. Which already passes.
2020-01-08 22:35:28 -05:00
Thomas Harte
985b36da73
Starts towards STX support.
2020-01-07 23:21:32 -05:00
Thomas Harte
cdb31b1c2b
Merge pull request #721 from TomHarte/AYZero
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Ensures programmatic AY volume level 0 is completely off.
2020-01-05 22:50:42 -05:00
Thomas Harte
6a44936a7c
Ensures programmatic volume level 0 is completely off.
2020-01-05 22:44:52 -05:00
Thomas Harte
45afb13a54
Merge pull request #720 from TomHarte/Jasmin
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Adds emulation of the Oric's Jasmin disk interface.
2020-01-05 22:13:11 -05:00
Thomas Harte
3ced31043a
Makes Jasmin autoboot optional, adds a Jasmin reset key, adds the Jasmin to File -> New... .
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Also finally implements KeyNMI.
2020-01-05 21:57:33 -05:00
Thomas Harte
7361e7ec34
Fixed: the issue was failing to propagate motor control.
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Also it seems to be incorrect to have the Jasmin paged at initial boot.
2020-01-05 21:35:20 -05:00
Thomas Harte
533729638c
It seems like Jasmin paged in at boot, and button = page back in and reset works?
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At least, that gets me a 'boot failed' error. Which is something.
2020-01-05 20:34:15 -05:00
Thomas Harte
9f30be1c13
Attempts to implement most of a Jasmin disk interface.
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With one obvious omission: there's no way to start it? The real interface had a dedicated button, but I don't yet know what that button did. Research needed.
2020-01-05 20:05:55 -05:00
Thomas Harte
09289f383d
Makes an effort to detect Jasmin disks, and flags the target if found.
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It'll try the Jasmin only if the Microdisc check fails; this is because the latter is preferable — it automatically boots, and is much better tested in Clock Signal terms.
2020-01-05 18:44:58 -05:00
Thomas Harte
20b25ce866
Merge pull request #719 from TomHarte/CleanUps
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Standardises on `read` and `write` for bus accesses.
2020-01-05 13:59:02 -05:00
Thomas Harte
c1bae49a92
Standardises on read and write for bus accesses.
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Logic being: name these things for the bus action they model, not the effect they have.
2020-01-05 13:40:02 -05:00
Thomas Harte
b3f806201b
Merge pull request #718 from TomHarte/BusErrorStack
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Adds a test and fixes for the bus error stack frame.
2020-01-05 00:08:53 -05:00
Thomas Harte
9f2f547932
Adds and satisfies test on the function code word.
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Thanks to ijor's "68000 Address and Bus Error Stack Frame" re: contents.
2020-01-04 23:58:07 -05:00
Thomas Harte
f0d5bbecf2
Introduces a test of stack contents after an address error.
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Fixes: stacked PC, address of fault.
2020-01-04 23:22:07 -05:00
Thomas Harte
3d7ef43293
Merge pull request #717 from TomHarte/JSRA7
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Fixes A7-relative JSRs.
2020-01-04 22:29:04 -05:00
Thomas Harte
4578b65487
Merge pull request #716 from TomHarte/PartialDecoding
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Clarifies IO decoding, adds YM mirrors.
2020-01-04 22:23:22 -05:00
Thomas Harte
a28c52c250
Fixes A7-relative JSRs.
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I completely withdraw my earlier statement re: the test cases.
2020-01-04 22:22:33 -05:00
Thomas Harte
e4349f5e05
Slightly clarifies logic.
2020-01-04 21:32:34 -05:00
Thomas Harte
7b2777ac08
Sorts cases into order; adds copious audio mirrors.
2020-01-04 21:06:21 -05:00
Thomas Harte
0fbcbfc61b
Switches to more idiomatic address listing.
2020-01-04 20:35:47 -05:00
Thomas Harte
3ab4fb8c79
Enables an assumption of partial address decoding at the ACIA and PSG.
2020-01-04 17:27:55 -05:00
Thomas Harte
42a9585321
Merge pull request #715 from TomHarte/TestsRedux
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After rerunning all tests, adds some notes on questionable results.
2020-01-04 16:41:01 -05:00
Thomas Harte
937cba8978
After rerunning all tests, adds some notes on questionable results.
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Also renames a file. But no code changes are currently suggested, at least until I can learn more about DIVU/DIVS.
2020-01-04 16:31:45 -05:00
Thomas Harte
627d3c28ea
Merge pull request #714 from TomHarte/STJoystick
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Adds Joystick key code mode, ensures events aren't posted in interrogation mode.
2020-01-04 10:01:57 -05:00
Thomas Harte
19ddfae6d6
Adds Joystick key code mode, ensures events aren't posted in interrogation mode.
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This should fix Turrican due to the latter change; I'm not aware of software that uses the former.
2020-01-04 09:45:59 -05:00
Thomas Harte
56ebd08af0
Merge pull request #713 from TomHarte/MULUS
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Adds DIV and MUL tests, correcting some DIV flags.
2020-01-04 09:22:03 -05:00
Thomas Harte
7de1181213
Make a new guess at post-overflow DIV flags, based on tests.
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Specifically: for DIVU, stick with the current guess of a fixed set. For DIVS, leave N and Z alone.
2020-01-03 23:44:49 -05:00
Thomas Harte
c7a5b054db
There's no TODO here; overflow is always 0 for a 16x16 multiply.
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... and the original 68000 doesn't support 32x32 multiplies.
2020-01-03 22:44:19 -05:00
Thomas Harte
ca12ba297b
Renames all files that test multiple opcodes; introduces DIV and MUL tests.
2020-01-03 22:43:24 -05:00
Thomas Harte
7abf527084
Merge pull request #712 from TomHarte/MercsTweaks
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Corrects vsync placement and BPP-change pipeline flushing.
2020-01-02 23:50:30 -05:00
Thomas Harte
c0b5bfe726
Ensure no possible return without value.
2020-01-02 23:43:53 -05:00
Thomas Harte
414b0cc234
Reintroduces sync write delay.
2020-01-02 23:36:11 -05:00
Thomas Harte
134e828336
Updates note to self.
2020-01-02 23:33:35 -05:00
Thomas Harte
455e831b87
Corrects bug whereby changing pixel mode mid-line will produce an improper amount of data.
2020-01-02 23:18:21 -05:00
Thomas Harte
617e0bada9
Adds some minor extra testing. Highly duplicative, to be honest.
2020-01-02 23:14:05 -05:00
Thomas Harte
7dea99b1cc
Update comment, for sense.
2020-01-02 23:13:12 -05:00
Thomas Harte
42ccf48966
Judging by Pompey Pirates Menu 88, vsync should occur a line earlier, ending during line 0.
2020-01-02 20:16:28 -05:00
Thomas Harte
2f8078db22
Switches to should_log as a global when I'm hacking about.
2020-01-02 20:15:48 -05:00
Thomas Harte
ea45ae78d1
Merge pull request #711 from TomHarte/MoreTests
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Introduces further comparative tests, prompting a new CHK fix.
2020-01-01 20:12:07 -05:00
Thomas Harte
cb7d6c185c
Further expands test coverage.
2020-01-01 20:00:37 -05:00
Thomas Harte
5be30b1f7b
Introduces further comparative tests, prompting a new CHK fix.
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Specifically: how to set N when both is_under and is_over are true, and to eliminate a failure fully to prefetch in the longer addressing modes.
2020-01-01 19:11:36 -05:00
Thomas Harte
0bf1a87f4c
Merge pull request #710 from TomHarte/STOP
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Ensure that an interrupt from a STOP doesn't return to the STOP.
2020-01-01 15:00:11 -05:00
Thomas Harte
b184426f2b
Ensure that an interrupt from a STOP doesn't return to the STOP.
2020-01-01 14:51:47 -05:00
Thomas Harte
2456fb120d
Merge pull request #709 from TomHarte/MoreMouse
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Adds Atari ST mouse support for absolute positioning and inverted scales.
2020-01-01 13:56:25 -05:00
Thomas Harte
23ed9ad2de
Corrects application of negative relative scale.
2020-01-01 13:22:21 -05:00
Thomas Harte
017681a97c
Now honours permitted mouse range.
2020-01-01 12:48:38 -05:00
Thomas Harte
153f60735d
Banishes redefined macro warning.
2020-01-01 12:38:30 -05:00
Thomas Harte
90b899c00e
Attempts to implement absolute mouse positioning mode.
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Along with mouse direction.
2020-01-01 12:29:33 -05:00
Thomas Harte
5ce8d7c0e5
Merge pull request #708 from TomHarte/KeyboardLogs
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Adds necessary logging for further IKYB work.
2019-12-30 23:41:38 -05:00
Thomas Harte
c11fe25537
Merge branch 'master' into EnchantedWoods
2019-12-30 23:32:45 -05:00
Thomas Harte
c4edd635c5
Merge pull request #707 from TomHarte/STGraphicsAgain
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Further improves the ST graphics subsystem
2019-12-30 23:31:21 -05:00
Thomas Harte
0a12893d63
Shunts vsync back down to top of frame.
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It's guess after guess, basically.
2019-12-30 23:01:31 -05:00
Thomas Harte
8e777c299f
Switches to latching video interrupts until acknowledged.
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Seems to fix Cisco Heat, at least. I have no idea whether I'm latching the correct thing, whether IACK should clear both or only one, etc.
2019-12-30 23:00:55 -05:00
Thomas Harte
09513ec14c
Gets explicit about constexpr expectations here.
2019-12-30 22:58:19 -05:00
Thomas Harte
e23d1a2958
Restores vsync active.
2019-12-29 22:03:36 -05:00
Thomas Harte
6449403f6a
Corrects pending_events_ test for sequence points.
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Simplifies around as possible.
2019-12-29 21:53:45 -05:00
Thomas Harte
c8fe66092b
Attempts to correct insertion logic (and mostly bypasses it).
2019-12-29 21:42:41 -05:00
Thomas Harte
b33218c61e
Fixes reload test, which really needs to sense the CRT-headed vsync output.
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i.e. not the one heading back to the CPU.
2019-12-29 20:55:34 -05:00
Thomas Harte
8ce26e7182
Adds a delay on vsync visibility (i.e. as to generating an interrupt).
2019-12-29 19:03:08 -05:00
Thomas Harte
47068ee081
Ensures visible hsync end generates a sequence point.
2019-12-29 17:51:50 -05:00
Thomas Harte
5361ee2526
Adds specific Union Demo test.
2019-12-29 17:48:43 -05:00
Thomas Harte
214b6a254a
Adds a delay on visibility of the hsync signal, and a test on address reload.
2019-12-29 17:37:09 -05:00
Thomas Harte
93f6964d8a
Introduces some preliminary line length unit tests.
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Thereby fixes one potential issue with load_ toggling.
2019-12-28 22:50:34 -05:00
Thomas Harte
13f11e071a
Simplifies border colour change propagation.
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I'm not sure it was even technically correct as was.
2019-12-28 10:45:10 -05:00
Thomas Harte
f7825dd2a2
Pulls out address reload position as a separate constant.
2019-12-28 10:36:50 -05:00
Thomas Harte
a9d1f5d925
Pulls out address reload as something I can position independently.
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Sadly receding it by 3 did not have the effect I was hoping for, of receding Enchanted Land's first register tweaking.
2019-12-27 23:47:19 -05:00
Thomas Harte
2757e5d600
Removes untrue comment.
2019-12-27 22:51:11 -05:00
Thomas Harte
5026de9653
Rejigs the video stream to ensure shifter really is continuous.
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... and definitively to avoid potential buffer overruns. Or, at least, to have a mechanism in place definitively to avoid them. Which will be tested and debugged as necessary.
Also simplifies the colour burst and border/pixels selection logic.
2019-12-27 22:47:34 -05:00
Thomas Harte
5fa8e046d8
It's inaccurrate to call this _the_ shifter. So don't.
2019-12-27 19:03:10 -05:00
Thomas Harte
ec9357e080
Merge pull request #706 from TomHarte/Vic20Flags
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Permits Vic-20 memory to be specified in banks;
2019-12-26 23:04:56 -05:00
Thomas Harte
f8dd33b645
Adds necessary header for strcmp.
2019-12-26 22:53:09 -05:00
Thomas Harte
de43e86310
Permits Vic-20 memory to be specified in banks; adds recognition of TheC64-style file tags to specify them.
2019-12-26 22:49:48 -05:00
Thomas Harte
314973a5ef
Merge pull request #704 from TomHarte/RTR
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Corrects implementation of RTR
2019-12-25 20:47:21 -05:00
Thomas Harte
d26ce65236
Introduces an RTR test.
2019-12-25 19:50:12 -05:00
Thomas Harte
1de4f179c0
Adds more thorough comment on the bus program used.
2019-12-25 19:49:49 -05:00
Thomas Harte
3cb5684d95
Fixes RTR: the whole top half of the SR should be preserved.
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Specifically, the 68000 Reference Manual says: "The supervisor portion of the status register is unaffected." Clearly when I first read that I misread it as the supervisor _flag_ (rather than _portion_) should be preserved.
2019-12-25 19:49:20 -05:00
Thomas Harte
a9a92de954
Adds a bunch of shout-outs for unimplemented behaviour.
2019-12-25 15:32:33 -05:00
Thomas Harte
daacd6805e
Merge pull request #703 from TomHarte/Sup133
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Fixed: the final track field in an MSA is inclusive, not exclusive.
2019-12-24 23:30:04 -05:00
Thomas Harte
54fe01b532
Fixed: the final track is inclusive, not exclusive.
2019-12-24 23:08:16 -05:00
Thomas Harte
42dd70dbff
Merge pull request #702 from TomHarte/NZStory
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Corrects WD track-zero and write-protect flags.
2019-12-24 22:22:24 -05:00
Thomas Harte
e59de71d79
Disables status logging, at least until next needed.
2019-12-24 21:44:50 -05:00
Thomas Harte
a8ba3607b7
Adds (and disables) a minor additional piece of logging.
2019-12-24 21:43:39 -05:00
Thomas Harte
4205e95883
Switches to capture of the track 0 flag during a type 1 operation.
2019-12-24 21:43:20 -05:00
Thomas Harte
f633cf4c3f
Adds a basic implementation of the non-instantaneous index pulse.
2019-12-24 21:05:17 -05:00
Thomas Harte
dfa6b11737
Adds responsibility for an ongoing index pulse to the drive.
2019-12-24 20:53:37 -05:00
Thomas Harte
42926e72cc
Adjusted: Flag::WriteProtect works in real time for a type-1 status.
2019-12-24 19:57:12 -05:00
Thomas Harte
80cb06eb33
It provisionally seems as though spin_up should be reset by a force interrupt?
2019-12-24 19:37:37 -05:00
Thomas Harte
5068328a15
Fixes debugging output.
2019-12-24 19:15:58 -05:00
Thomas Harte
adc2b77833
Enhances with constexpr.
2019-12-24 18:53:50 -05:00
Thomas Harte
99415217dc
Merge pull request #701 from TomHarte/TestsSyntax
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Corrects syntax errors in test suite.
2019-12-23 22:15:16 -05:00
Thomas Harte
48d519d475
Merge branch 'master' into TestsSyntax
2019-12-23 22:13:55 -05:00
Thomas Harte
ed831e5912
Fixes test syntax errors.
2019-12-23 22:13:25 -05:00
Thomas Harte
1db7c7989b
Merge pull request #700 from TomHarte/NoNew
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Embraces std::make_[unique/shared] in place of .reset(new .
2019-12-23 22:05:57 -05:00
Thomas Harte
b2bed82da6
Switches to standard logging.
2019-12-23 22:00:40 -05:00
Thomas Harte
afae1443b4
Merge branch 'master' into NoNew
2019-12-23 21:32:17 -05:00
Thomas Harte
0dae608da5
Embraces std::make_[unique/shared] in place of .reset(new .
2019-12-23 21:31:46 -05:00
Thomas Harte
8a1fe99fa4
Merge pull request #699 from TomHarte/SpuriousCRCErrors
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Ensure the WD won't confuse sector contents for header content.
2019-12-23 21:15:15 -05:00
Thomas Harte
ac604b30f3
Eliminates dangling static_casts in favour of construction.
2019-12-22 20:59:20 -05:00
Thomas Harte
b035b92f33
Corrects accidental use of sector contents as addresses in multi-sector reads and writes.
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As a secondary defect, this was also causing erroneous CRC error reports.
2019-12-22 19:58:02 -05:00
Thomas Harte
d25b48878c
Cleans up READ_ID macro, inter alia.
2019-12-22 17:58:33 -05:00
Thomas Harte
34a3790e11
Minor static_cast clean-ups.
2019-12-22 17:56:59 -05:00
Thomas Harte
f3378f3e3e
Merge pull request #698 from TomHarte/MoreScreenshots
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Adds many additional screenshots.
2019-12-22 14:43:08 -05:00
Thomas Harte
78accc1db1
Seeks to fix macOS desktop picture.
2019-12-22 14:41:13 -05:00
Thomas Harte
a756985e18
Makes a further attempt at this table.
2019-12-22 14:40:02 -05:00
Thomas Harte
30e0d4aa30
Attempts a table fix.
2019-12-22 14:37:59 -05:00
Thomas Harte
de72c66c64
Adds a full image gallery, trying to hit every supported system.
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... that isn't already pictured, that is.
2019-12-22 14:36:33 -05:00
Thomas Harte
6edd3c9698
Merge pull request #697 from TomHarte/MoreConstexpr
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Further propagates `constexpr`.
2019-12-22 13:53:44 -05:00
Thomas Harte
5456a4a39d
Eliminates static where constexpra aren't class members; adds some if constexprs for clarity.
2019-12-22 13:42:24 -05:00
Thomas Harte
66d9b60b98
Merge pull request #696 from TomHarte/make_shared
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Makes a variety of minor style improvements
2019-12-22 00:27:57 -05:00
Thomas Harte
274867579b
Deploys constexpr as a stricter const.
2019-12-22 00:22:17 -05:00
Thomas Harte
a847654ef2
Corrects various old-fashioned bits of indentation, plus the odd const.
2019-12-22 00:00:23 -05:00
Thomas Harte
05d77d3297
Also deploys make_unique/shared to avoid type repetition.
2019-12-21 23:52:04 -05:00
Thomas Harte
e9318efeb6
Switches to std::make_shared/make_unique in a bunch of applicable places.
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No doubt many more similar improvements are available, these are just the ones that were easy to find.
2019-12-21 23:34:25 -05:00
Thomas Harte
25da5ebdae
Merge pull request #695 from TomHarte/68000ByteAccess
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Corrects 16-bit view of the 68000 bus during 8-bit operations.
2019-12-21 21:08:39 -05:00
Thomas Harte
cf16f41939
Makes value8_high/low and value16 branchless.
2019-12-21 20:58:37 -05:00
Thomas Harte
08f2877382
I think the 68000 actually loads a byte value onto both the upper and lower data lines.
2019-12-21 20:37:03 -05:00
Thomas Harte
6f4444d834
Merge pull request #694 from TomHarte/C++17
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Standardises on -O2, C++17.
2019-12-21 20:32:04 -05:00
Thomas Harte
993dfeae1b
Standardises on -O2, C++17.
2019-12-21 20:25:43 -05:00
Thomas Harte
b4fd506361
Merge pull request #693 from TomHarte/STComposite
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Adds colour composite output to the ST
2019-12-21 00:04:54 -05:00
Thomas Harte
e5440a4146
Hacks in a colour burst.
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With a major flaw: it's implicit. I think I need a minor rethink of various components here.
2019-12-20 23:49:38 -05:00
Thomas Harte
57ce10418f
Switches prescale logic, the better to deal with changes in prescaler.
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According to my assumptions about the behaviour, anyway.
2019-12-20 23:33:14 -05:00
Thomas Harte
47508d50a7
Wires through a composite video option for the ST.
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Which is great and all, except that I've not yet inserted a colour burst. So it's monochrome.
2019-12-20 20:49:14 -05:00
Thomas Harte
56cc191a8b
Merge pull request #692 from TomHarte/11Sectors
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Compacts gaps when necessary to fit more sectors.
2019-12-19 23:33:25 -05:00
Thomas Harte
2a1520c04e
Removes mostly-uninformative piece of logging.
2019-12-19 22:58:28 -05:00
Thomas Harte
3d83f5ab49
Ensures a proper size handoff and implements a ripple feature I happened to find a forum post about.
2019-12-19 22:58:07 -05:00
Thomas Harte
0007dc23b3
Eliminates bit 0 of the DMA address.
2019-12-19 22:44:21 -05:00
Thomas Harte
416d68ab3a
Installs some additional safety guards.
2019-12-19 22:27:50 -05:00
Thomas Harte
ed7f171736
Moves address reload to end of vertical sync.
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I have no information as to when it should be, so this is as valid a guess as any other.
2019-12-19 22:20:43 -05:00
Thomas Harte
0e066f0f70
Removes 'done' TODO.
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For certain values of done.
2019-12-19 22:19:59 -05:00
Thomas Harte
3e6f51f5cf
Merge branch '11Sectors' of github.com:TomHarte/CLK into 11Sectors
2019-12-19 19:36:33 -05:00
Thomas Harte
797abae4b3
Compacts gaps when necessary to fit more sectors.
2019-12-19 19:36:19 -05:00
Thomas Harte
4605b1b264
Compacts gaps when necessary to fit more sectors.
2019-12-19 19:22:48 -05:00
Thomas Harte
45a391d69e
Increases quantity of annotations.
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I'm now at almost 500 lines, and I haven't even really written anything yet.
2019-12-18 22:57:12 -05:00
Thomas Harte
15bc18b64f
Merge branch 'master' into FurtherSCC
2019-12-18 22:17:10 -05:00
Thomas Harte
d802e8aee3
Merge pull request #690 from TomHarte/YMNotAY
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Adds explicit emulation of the YM2149F.
2019-12-18 22:10:16 -05:00
Thomas Harte
206ab380c7
Introduces double-resolution envelopes for the Atari ST.
2019-12-18 22:03:02 -05:00
Thomas Harte
d85ae21b2f
Adds an explicit declaration of chip type to all AY users.
2019-12-18 19:28:41 -05:00
Thomas Harte
470cc572fd
Merge pull request #689 from TomHarte/STScreenshot
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Adds a token Atari ST screenshot.
2019-12-17 23:29:43 -05:00
Thomas Harte
f0d9d8542b
Adds a token Atari ST screenshot.
2019-12-17 23:28:38 -05:00
Thomas Harte
d2390fcb11
Merge pull request #688 from TomHarte/NewAtari
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Adds the Atari ST to File -> New in Cocoa world.
2019-12-17 23:18:13 -05:00
Thomas Harte
5ce612cb38
Adds the Atari ST to File -> New in Cocoa world.
2019-12-17 23:04:12 -05:00
Thomas Harte
fb0343cafb
Merge branch 'FurtherSCC' of github.com:TomHarte/CLK into FurtherSCC
2019-12-17 22:39:49 -05:00
Thomas Harte
7d9bedf7de
Merge branch 'master' into FurtherSCC
2019-12-17 22:39:39 -05:00
Thomas Harte
ec7aa2d355
Merge pull request #687 from TomHarte/68000Tests
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Significantly increases 68000 testing
2019-12-17 22:31:54 -05:00
Thomas Harte
9464658d1e
Adds a count summary.
2019-12-17 22:19:23 -05:00
Thomas Harte
a3e64cae41
Corrects SBCD carry.
2019-12-17 22:16:02 -05:00
Thomas Harte
e969b386f1
Eliminates DIVU/S and MULU/S from this file.
2019-12-17 20:15:11 -05:00
Thomas Harte
af9c0aca97
Added mention of the Atari ST.
2019-12-17 14:36:08 -05:00
Thomas Harte
8a2ac87209
Reverted SBCD/NBCD V behaviour.
2019-12-16 23:08:59 -05:00
Thomas Harte
096b447b4b
Corrects MOVE -(An), SR/CCR, which was not previously decrementing.
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Also adds a safety check against other instances of the same error. There seem to be none.
2019-12-16 22:38:54 -05:00
Thomas Harte
0d23f141d6
Regenerates without accidentally hitting MODE to SR.
2019-12-16 22:37:57 -05:00
Thomas Harte
84167af54f
Corrects CHK N flag.
2019-12-16 20:01:33 -05:00
Thomas Harte
8be26502c4
Fixes NBCD -(An)+, adds some additional comments.
2019-12-16 20:01:19 -05:00
Thomas Harte
ba2436206f
Withdraws test of CHK (exception taken).
2019-12-16 20:00:42 -05:00
Thomas Harte
60a9b260b1
Corrects collection of instruction codes.
2019-12-16 00:01:18 -05:00
Thomas Harte
e603fc6aaa
Simplifies failure output for me.
2019-12-15 21:26:47 -05:00
Thomas Harte
81cc278b98
Introduces a barrage of further tests.
2019-12-15 21:26:35 -05:00
Thomas Harte
4c068e9bb8
Corrects flags on CMPA.w.
2019-12-15 20:39:47 -05:00
Thomas Harte
f23c5ada31
Ensures tests can be built as a release target.
2019-12-14 23:53:12 -05:00
Thomas Harte
dc1abd874e
Corrects indentation typo.
2019-12-14 23:52:53 -05:00
Thomas Harte
1bf4686c59
Adds plentiful additional tests. Though still only a fraction of the anticipated total.
2019-12-14 22:58:51 -05:00
Thomas Harte
a500fbcd73
Expands tests to most of ORI, EORI, ANDI, ADDI and SUBI.
2019-12-14 22:23:40 -05:00
Thomas Harte
d0ef41f11e
Adds a temporary manual escape clause for testing specific features.
2019-12-14 21:40:21 -05:00
Thomas Harte
adf6723bf6
Ensures state is evaluated directly at opcode end.
2019-12-14 15:09:06 -05:00
Thomas Harte
37e26c0c37
Eliminates a class of incorrect sign comparison errors.
2019-12-14 14:50:39 -05:00
Thomas Harte
ac1575be27
Resolves false negatives from checking wrong state.
2019-12-14 14:46:00 -05:00
Thomas Harte
923287bf01
Attempts to introduce a basic means for comparative 68000 testing.
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i.e. mine versus another source.
2019-12-14 14:26:33 -05:00
Thomas Harte
77fe14cdb3
Merge pull request #685 from TomHarte/LoadDelay
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Adds a delay on load following DE
2019-12-13 21:38:10 -05:00
Thomas Harte
c00ae7ce6a
Adds a one-cycle delay on frequency changes.
2019-12-13 19:57:54 -05:00
Thomas Harte
d5b2e6514a
Merge branch 'master' into LoadDelay
2019-12-13 19:41:35 -05:00
Thomas Harte
fc7f46006e
Merge pull request #686 from TomHarte/AptGet
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Adds an apt-get update.
2019-12-13 13:32:18 -05:00
Thomas Harte
41503d7253
Allow releaseinfo changes.
2019-12-13 13:16:24 -05:00
Thomas Harte
f88c942fef
Adds an apt-get update.
2019-12-12 23:26:12 -05:00
Thomas Harte
4bcf217324
Ensures delayed loading isn't interrupted by blank, hsync.
2019-12-12 23:20:28 -05:00
Thomas Harte
f6f2b4b90f
Removes double DE edge test.
2019-12-12 22:50:35 -05:00
Thomas Harte
95b5db4d87
Tweaks timings yet further, adds a FIFO reset.
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The accuracy of this may require further research.
2019-12-11 23:22:20 -05:00
Thomas Harte
de4403e021
Corrects blank timing.
2019-12-10 22:17:57 -05:00
Thomas Harte
0a405d1c06
Introduces a latency between DE and load.
2019-12-10 21:24:15 -05:00
Thomas Harte
768b3709b8
Corrects audio clock rate.
2019-12-10 20:25:27 -05:00
Thomas Harte
7cc5d0b209
Merge pull request #683 from TomHarte/MFPPerformance
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Switch to faster timer implementation; it seems to work.
2019-12-09 19:52:16 -05:00
Thomas Harte
c2646a415f
Switch to faster timer implementation; it seems to work.
2019-12-09 19:23:08 -05:00
Thomas Harte
e1c7a140d0
Merge pull request #682 from TomHarte/AddressError
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ST: Adds some initial bus error logic, plus some optimisations.
2019-12-08 22:53:40 -05:00
Thomas Harte
7cd11ecb7f
Adds necessary #include for assert.
2019-12-08 22:43:39 -05:00
Thomas Harte
4dd235f677
Adds supervisor/user to logged flags in trace mode.
2019-12-08 22:39:10 -05:00
Thomas Harte
a7cfb840ef
Adds but presently disables a diagnostic for border elimination.
2019-12-08 22:34:42 -05:00
Thomas Harte
acfe2c63b8
Adds an assert to verify the interrupt line is clear after a full reset.
2019-12-08 22:34:19 -05:00
Thomas Harte
b192381928
Implements a fuller reset, takes a run at the overran flag.
2019-12-08 21:20:06 -05:00
Thomas Harte
c785797da6
Adds a warning for unhandled reset.
2019-12-08 21:01:30 -05:00
Thomas Harte
0408592ada
Switches to byte buffers and seeks to reduce unnecessary video flushing.
2019-12-08 20:20:13 -05:00
Thomas Harte
407cc78c78
Extends to offer simpler 8-bit access handling.
2019-12-08 20:19:44 -05:00
Thomas Harte
4536c6a224
Resolves printf type errors.
2019-12-08 11:56:05 -05:00
Thomas Harte
0ed87c61bd
Introduces an explicit area of floating bus, starts adding bus errors.
2019-12-08 11:52:43 -05:00
Thomas Harte
332f0d6167
Ensures MSAs are explicitly read-only.
2019-12-08 11:52:15 -05:00
Thomas Harte
08a27bdec7
NTSC frame length is correct; removes TODO.
2019-12-08 11:51:12 -05:00
Thomas Harte
288cabbad1
Merge pull request #680 from TomHarte/EventCountReload
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Implements MFP timer reload when in event counting mode.
2019-11-19 22:54:34 -05:00
Thomas Harte
7ff57f8cdf
Starts to flesh out documentation.
2019-11-19 22:32:07 -05:00
Thomas Harte
06edeea866
Adds reload during event count mode.
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Plus a helpful bit of TODO.
2019-11-19 22:24:32 -05:00
Thomas Harte
3c77d3bda0
Merge pull request #679 from TomHarte/OffByOne
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Corrects off-by-one error in the ST's vertical state machine
2019-11-19 22:02:41 -05:00
Thomas Harte
72cb3a1cf6
Integrates basic unit test for Atari ST video event prediction.
2019-11-19 21:54:13 -05:00
Thomas Harte
e0ceab6642
Pivots towards looking at Timer B as a cause of in-frame inaccuracy.
2019-11-19 21:52:50 -05:00
Thomas Harte
894066984c
Moves beginning and end of vertical sync to what I now believe is its proper place.
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At least one demo now successfully opens the top border.
2019-11-19 20:13:47 -05:00
Thomas Harte
c91495d068
Merge pull request #678 from TomHarte/DEDelay
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Introduces a 28-cycle delay on DE propagation
2019-11-18 23:53:46 -05:00
Thomas Harte
e787c03530
Slightly shortens NTSC frame.
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Either: (i) 263 is incorrect; or (ii) my logic as to frame height is incorrect. Given that the horizontal side of things is really well documented, I'm currently guessing (i). Research to do.
2019-11-18 23:47:27 -05:00
Thomas Harte
b12136691a
Corrects comment.
2019-11-18 23:46:33 -05:00
Thomas Harte
c04d2f6c6e
Restricts DTack delay to RAM and Shifter accesses.
2019-11-18 22:57:13 -05:00
Thomas Harte
6990abc0d3
Tweaks selected output mode when both BPP bits are set.
2019-11-18 22:56:40 -05:00
Thomas Harte
0ce5057fd9
Attempts to factor in event counting direction.
2019-11-18 22:37:20 -05:00
Thomas Harte
ade8df7217
Permits a delay on DE propagation back to the CPU. Plus tests.
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Currently set at 28 cycles, but I don't know.
2019-11-18 22:12:24 -05:00
Thomas Harte
b98703bd5b
Corrects lack of const.
2019-11-18 22:11:52 -05:00
Thomas Harte
82c984afa4
Switches the joysticks around.
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Thereby finally allowing me to control mode games.
2019-11-18 20:02:27 -05:00
Thomas Harte
1202b0a65f
Establishes a pipeline for delayed public state visibility.
2019-11-17 23:28:00 -05:00
Thomas Harte
facc0a1976
Amps up the documentation.
2019-11-17 21:28:51 -05:00
Thomas Harte
25da8b7787
Merge pull request #677 from TomHarte/SyncDisturbance
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Corrects accidental dropping of pixel residue.
2019-11-17 18:47:27 -05:00
Thomas Harte
253dd84109
Corrects accidental dropping of pixel residue.
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Specific issue: the repeated (start_column != end_column) test, which can no longer be correct if start_column has been incremented in the (x_&7) test.
The visible effect was to omit pixels from the output wave, which also affected observed sync timing.
2019-11-17 18:34:13 -05:00
Thomas Harte
9d07765823
Ensures proper precedence of * over %.
2019-11-14 23:19:31 -05:00
Thomas Harte
11de0e198f
Removes dead travis.yml.
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Travis never worked; GitHub actions do; that's CI.
2019-11-14 19:58:24 -05:00
Thomas Harte
f16f0897d5
Merge pull request #676 from TomHarte/BuildWorkflow
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Adds continuous integration via GitHub actions.
2019-11-14 13:59:52 -05:00
Thomas Harte
3d4d45ef62
Remove redundant 'build'
2019-11-14 13:54:24 -05:00
Thomas Harte
04c4f5f321
Removes syntax violating colon.
2019-11-14 13:53:24 -05:00
Thomas Harte
fa900d22e8
Adds a more manageable title.
2019-11-14 13:52:24 -05:00
Thomas Harte
aee2890b25
Switch to title case.
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This seems to fit better with the fixed named steps.
2019-11-14 13:50:03 -05:00
Thomas Harte
40e1ec28fb
Attempt sudo.
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Sorry for the noise; there's no obvious better way to test this stuff.
2019-11-14 13:42:56 -05:00
Thomas Harte
c6e2b1237c
Add build workflow
2019-11-14 13:40:06 -05:00
Thomas Harte
efdd27a435
Merge pull request #675 from TomHarte/STFileFormat
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Adds support for .ST files.
2019-11-12 23:32:47 -05:00
Thomas Harte
2c4f372872
Adds support for the .ST file format.
2019-11-12 23:23:14 -05:00
Thomas Harte
74be876d72
Corrects track count calculation for DSD disks.
2019-11-12 23:22:56 -05:00
Thomas Harte
e8e166eec5
Ensures no out-of-disk-bounds mirroring.
2019-11-12 23:22:25 -05:00
Thomas Harte
4ec8fa0d20
Merge branch 'LessACIAState'
2019-11-12 22:34:02 -05:00
Thomas Harte
b019c6f8dd
Merge pull request #674 from TomHarte/LessACIAState
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Reduces redundant ACIA state.
2019-11-12 22:32:47 -05:00
Thomas Harte
6ec3c47cc0
Ensures same-level interrupts don't double trigger.
2019-11-12 22:18:13 -05:00
Thomas Harte
ccce127f13
Merge branch 'master' into LessACIAState
2019-11-12 19:41:18 -05:00
Thomas Harte
f4cfca0451
Merge branch 'master' of github.com:TomHarte/CLK
2019-11-12 19:38:44 -05:00
Thomas Harte
eb287605f7
Switches to a default of TOS 1.04.
2019-11-12 19:38:30 -05:00
Thomas Harte
2026761a07
Merge pull request #673 from TomHarte/FewerSpans
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Reduces Atari ST output heft
2019-11-12 19:37:53 -05:00
Thomas Harte
6a82c87320
Withdraws border optimisation temporarily; I think I may be onto an output bug here.
2019-11-12 19:33:13 -05:00
Thomas Harte
f0478225f0
Adjusts logic to reduce number of output spans.
2019-11-12 19:30:28 -05:00
Thomas Harte
d6edfa5c6d
Removes the redundant state encased within interrupt_causes_.
2019-11-11 21:49:02 -05:00
Thomas Harte
e7253a8713
Merge pull request #672 from TomHarte/BetterShifter
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Introduces a cleaner, separated shifter.
2019-11-10 21:56:45 -05:00
Thomas Harte
c6f6bc68e1
Undoes non-insertion of media.
2019-11-10 21:52:06 -05:00
Thomas Harte
ab34fad8ca
Introduces a cleaner, separated shifter.
2019-11-10 21:39:40 -05:00
Thomas Harte
e4c77614c1
Merge pull request #671 from TomHarte/STJoystick
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Makes joysticks a little more const correct
2019-11-09 22:11:11 -05:00
Thomas Harte
072b0266af
It seems status reads are not required to clear the interrupt line.
2019-11-09 20:12:09 -05:00
Thomas Harte
7ae0902103
Adds additional joystick commands to the dispatcher.
2019-11-09 20:10:54 -05:00
Thomas Harte
8e9428623e
Adds joystick events to the Atari ST.
2019-11-09 18:39:22 -05:00
Thomas Harte
2c25135d8a
Fixes const correctness for joystick machines; the ST is now one such.
2019-11-09 18:19:05 -05:00
Thomas Harte
3741cba88c
Merge pull request #670 from TomHarte/STKeyboard
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Corrects: KeyPad -> Keypad. Also fleshes out Atari ST keyboard mapping.
2019-11-09 18:05:52 -05:00
Thomas Harte
860837d894
Corrects: KeyPad -> Keypad. Also fleshes out Atari ST keyboard mapping.
2019-11-09 18:02:14 -05:00
Thomas Harte
cef07038c1
Merge pull request #662 from TomHarte/AtariST
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Adds basic and very buggy Atari ST emulation.
2019-11-09 16:18:50 -05:00
Thomas Harte
0bf61c9c99
Updated: there is some ST emulation here now.
2019-11-09 16:18:29 -05:00
Thomas Harte
837dfd1ab8
Corrects StaticAnalyser references.
2019-11-09 16:14:00 -05:00
Thomas Harte
0204003680
Resolves GCC warnings.
2019-11-09 16:12:37 -05:00
Thomas Harte
5fc4e57db7
Eliminates non-portable use of fls.
2019-11-09 16:03:00 -05:00
Thomas Harte
c4fefe1eb3
Updates SConstruct.
2019-11-09 15:42:19 -05:00
Thomas Harte
77ef7dc8fc
Shuffles ST and 2600 into a common parent.
2019-11-09 15:31:41 -05:00
Thomas Harte
e3abbc9966
Renames what didn't end up being a whole SerialPort.
2019-11-09 15:21:51 -05:00
Thomas Harte
70c6010fe0
Expands visible area and adds a few more safety barriers.
2019-11-09 15:00:42 -05:00
Thomas Harte
8c736a639a
Eliminates unexpected bottleneck created by ACIA.
2019-11-09 15:00:12 -05:00
Thomas Harte
cc7ff1ec9e
Corrects typo.
2019-11-09 14:59:35 -05:00
Thomas Harte
9d12ca691f
Makes meaning of 2048 here explicit.
2019-11-09 14:59:16 -05:00
Thomas Harte
db03b03276
Corrects [AND/OR/EOR].bw Dn, -(An) to decrement destination.
...
It was previously doing a predecrement on the internal source address, which is unused. This fixes at least Dan Dare III and Silkworm.
2019-11-09 11:25:23 -05:00
Thomas Harte
45375fb5d0
Makes endian aware.
2019-11-09 09:48:59 -05:00
Thomas Harte
d2324e413d
Clarifies ownership of bpp-has-changed test.
2019-11-09 00:10:59 -05:00
Thomas Harte
e0c15f43bb
Avoids massive over-flushing of pixel buffers.
2019-11-09 00:05:02 -05:00
Thomas Harte
8b0d550b81
Attempts to move vertical sync out to cycle 30.
2019-11-08 22:18:47 -05:00
Thomas Harte
d1259f829e
Moves vertical state decisions back to cycle 502.
2019-11-08 21:42:05 -05:00
Thomas Harte
7caef46c05
Switches back to hsync for interrupts; corrects current address reads.
2019-11-08 21:25:28 -05:00
Thomas Harte
6902251d8b
Fixed: returns video address in bytes, not words.
2019-11-08 20:47:08 -05:00
Thomas Harte
0b683b0360
Adds some sanity checks.
2019-11-08 20:46:24 -05:00
Thomas Harte
5d5dc79f2c
Corrects raster race condition with CPU.
2019-11-07 23:27:05 -05:00
Thomas Harte
68f9084d9e
Fixes timing of wrap.
2019-11-07 23:24:51 -05:00
Thomas Harte
b7c407be10
The palette is meant to be read/write.
2019-11-07 23:11:06 -05:00
Thomas Harte
f45798faf0
Corrects initial safe value of line_length_.
2019-11-07 22:53:26 -05:00
Thomas Harte
7c66d7a13c
Corrects sync and line-length latch timings.
2019-11-07 22:53:04 -05:00
Thomas Harte
f9a35c6636
Corrects potential wrap error for non-single-byte targets.
2019-11-07 22:23:26 -05:00
Thomas Harte
5e1570258d
I think the horizontal interrupt is blank, not sync.
2019-11-07 22:00:50 -05:00
Thomas Harte
fc8021c0b0
Adds a centre crop.
2019-11-07 20:02:45 -05:00
Thomas Harte
c9cd56915e
Corrects typo that was adding an extra line of PAL video.
2019-11-07 19:55:49 -05:00
Thomas Harte
1fd19c5786
Attempts to add proper bus timing.
2019-11-07 19:55:00 -05:00
Thomas Harte
ce66b5fd9c
Corrected member variable names.
2019-11-07 19:44:22 -05:00
Thomas Harte
8aa425c9d8
Fixes medium resolution mode.
2019-11-06 23:25:36 -05:00
Thomas Harte
ec68bc5047
Corrects output glitches: channel de sync and improper border beginnings.
2019-11-06 22:37:05 -05:00
Thomas Harte
0971bbeebe
Merge branch 'master' into AtariST
2019-11-05 23:24:26 -05:00
Thomas Harte
9292f66c2d
Merge pull request #669 from TomHarte/WOZDoc
...
Update explanation of NIB processing.
2019-11-05 23:21:25 -05:00
Thomas Harte
f3e2e88986
Update explanation of NIB processing.
2019-11-05 23:20:20 -05:00
Thomas Harte
6afefa107e
Resolves unused variable warning.
2019-11-05 23:18:25 -05:00
Thomas Harte
0ce807805d
Eliminates most masks, at least for now.
2019-11-05 23:17:59 -05:00
Thomas Harte
41f3c29e30
Attempts to switch to correct video state machine.
...
Some glitches remain to be ironed out.
2019-11-05 23:02:25 -05:00
Thomas Harte
6c75c60149
Merge branch 'master' into AtariST
2019-11-05 22:05:51 -05:00
Thomas Harte
015f2101f8
Merge pull request #668 from TomHarte/OverAllocation
...
Resolves a potential out-of-bounds array access.
2019-11-05 21:52:44 -05:00
Thomas Harte
35f1a7ab10
Resolves a potential out-of-bounds array access.
...
Risk was: allocation exactly joins end of buffer. In which case the next get_data won't wrap the texture y coordinate since it won't spot an x overage.
2019-11-05 21:47:40 -05:00
Thomas Harte
8df1eea955
Goes big on flushing.
2019-11-03 23:03:50 -05:00
Thomas Harte
eeafdf2c03
Slightly expands list of recognised Intelligent Keyboard commands.
2019-11-03 21:58:15 -05:00
Thomas Harte
befe2c2929
Adds floppy drive activity indicators.
2019-11-03 21:57:54 -05:00
Thomas Harte
46ec3510be
Fixed: ST sectors are numbered from 1, not 0.
2019-11-03 21:18:29 -05:00
Thomas Harte
e9965c2738
Obeys stated memory size.
2019-11-03 21:18:17 -05:00
Thomas Harte
48b0d8c329
Adds bus req/ack to the DMA controller; hacks support into the ST.
2019-11-03 21:11:25 -05:00
Thomas Harte
07582cee4a
BusGrant is a further signal I will need.
2019-11-03 21:10:42 -05:00
Thomas Harte
4dbd2a805a
Nudges closer to DMA support.
2019-11-03 17:24:36 -05:00
Thomas Harte
20bf425f98
Drive select lines are active low.
2019-11-02 23:37:56 -04:00
Thomas Harte
0567410bcf
Attempts to start getting the WDC working.
2019-11-02 23:26:42 -04:00
Thomas Harte
6d1e09ba55
Connects up the AY to floppy drive/side selection.
2019-11-02 23:04:08 -04:00
Thomas Harte
f40dbefa67
Implements most of keyboard input.
2019-11-02 22:30:02 -04:00
Thomas Harte
f93cdd21de
Reverses bit order.
...
So, for the first time: a green desktop.
2019-11-02 21:53:04 -04:00
Thomas Harte
e1dc3b1915
Reverses mouse buttons.
...
So I can now navigate the disk-less GEM desktop and click on things.
2019-11-02 21:38:57 -04:00
Thomas Harte
cbf25a16dc
Adds relative mouse motion input.
2019-11-02 21:25:45 -04:00
Thomas Harte
14e790746b
Fixes return value when reading received data.
2019-11-02 21:25:00 -04:00
Thomas Harte
bf7e9cfd62
Pulls the intelligent keyboard into its own file.
2019-11-02 19:47:44 -04:00
Thomas Harte
a67e0014a4
Fixes video base address and mono/colour monitor value.
...
Now I see a GEM desktop. In blue.
2019-11-02 19:36:15 -04:00
Thomas Harte
c070f2100c
Attempts to regularise data bus access.
2019-11-01 23:01:06 -04:00
Thomas Harte
75e34b4215
Reacts to no acknowledgement.
2019-10-31 21:00:05 -04:00
Thomas Harte
a5bbf54a27
Adds the ability for the 68901 to decline an interrupt acknowledgement.
2019-10-31 19:57:36 -04:00
Thomas Harte
5309ac7c30
Annotates JustInTimeActor as force inline.
2019-10-30 23:18:42 -04:00
Thomas Harte
731dc350b4
Adds sometime real-time clocking for DMA.
2019-10-30 22:59:32 -04:00
Thomas Harte
635e18a50d
Ensures the MFP requests and receives real-time clocking when needed.
2019-10-30 22:42:06 -04:00
Thomas Harte
4857ceb3eb
Attempts to get a bit more systematic.
...
Spotted that interrupt_enable_ isn't being used properly while doing so, hopefully that's now correct.
2019-10-29 23:16:08 -04:00
Thomas Harte
1c154131f9
Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate.
2019-10-29 22:36:29 -04:00
Thomas Harte
fd02b6fc18
Corrects in-service test; adds pending clearing upon enabled clearing.
2019-10-28 22:51:00 -04:00
Thomas Harte
553f3b6d8b
Properly conforms to GPIP input/output blending.
2019-10-28 22:37:11 -04:00
Thomas Harte
1135576a3a
Comments in slightly more detail.
2019-10-28 22:12:56 -04:00
Thomas Harte
a5057e6540
Ensures that stop means stop.
2019-10-28 22:12:45 -04:00
Thomas Harte
1d790ec2a9
Adds the option for a clock conversion to JustInTimeActor and slows the MFP's clock rate.
2019-10-28 21:35:10 -04:00
Thomas Harte
0f2d72c436
Ensures receipt of output line changes.
2019-10-28 21:21:53 -04:00
Thomas Harte
aa52652027
Adds a const.
2019-10-28 21:21:35 -04:00
Thomas Harte
4a1fa8fc13
Adds some const qualifiers.
2019-10-28 21:13:42 -04:00
Thomas Harte
95d3b6e79f
Adds a through route for the FDC interrupt line.
2019-10-28 21:13:21 -04:00
Thomas Harte
5f6711b72c
Ensures interrupt changes are notified to the delegate.
2019-10-28 21:13:06 -04:00
Thomas Harte
d44734d105
Attempts a fuller setting of GPIP inputs.
2019-10-27 22:39:21 -04:00
Thomas Harte
1aaa6331a0
Stores and returns video mode.
2019-10-27 22:39:00 -04:00
Thomas Harte
de1bfb4e24
Stores and returns timer configuration.
2019-10-27 22:38:49 -04:00
Thomas Harte
0cb19421e8
Adds prefix to mouse position response.
2019-10-27 21:46:03 -04:00
Thomas Harte
92847037b3
Merge branch 'master' into AtariST
2019-10-27 21:40:51 -04:00
Thomas Harte
f4556ef6b0
Merge pull request #666 from TomHarte/CPCSafety
...
Fixes unit test target
2019-10-27 21:40:06 -04:00
Thomas Harte
4266264449
Switches to the more idiomatic .empty().
2019-10-27 21:31:31 -04:00
Thomas Harte
1aba1db62c
Corrects test.
2019-10-27 21:30:58 -04:00
Thomas Harte
0fc191c87d
Switched a few static_cast to constructor syntax.
2019-10-27 14:21:22 -04:00
Thomas Harte
dc4a0e4e3b
Video only ever reads from RAM, so it can be const *.
...
(it can also be *const, since I set it only once)
2019-10-27 14:09:38 -04:00
Thomas Harte
3794d94b68
Adds a sanity check on alignment.
2019-10-27 14:09:02 -04:00
Thomas Harte
0082dc4411
Improves logging.
2019-10-27 00:02:55 -04:00
Thomas Harte
22754683f8
Ensures timer divisor values don't go out of range, adds timer interrupts.
...
I suspect further timer issues remain.
2019-10-26 23:20:13 -04:00
Thomas Harte
909685d87d
A drive with no disk is now happy to spin its motor.
...
It'll continue to produce index-hole events, which might not be accurate for 5.25" drives. Research to do.
2019-10-26 22:57:05 -04:00
Thomas Harte
55710ea00e
Switches the presumption to requiring NDEBUG to avoid forced inlines.
2019-10-26 22:43:25 -04:00
Thomas Harte
36a9a5288b
Adds drives to the FDC.
2019-10-26 22:39:11 -04:00
Thomas Harte
e89be6249d
Adds a logging prefix.
2019-10-26 22:38:56 -04:00
Thomas Harte
ac39fd0235
Starts work on the DMA controller.
2019-10-26 21:33:57 -04:00
Thomas Harte
ecc0cea5a1
Added a potential branch for the newer TOS memory map.
2019-10-26 16:52:06 -04:00
Thomas Harte
eae11cbf17
Adds a dummy response for mouse interrogation.
2019-10-26 16:14:24 -04:00
Thomas Harte
e96386f572
Takes another stab at MFP interrupt management.
2019-10-26 15:55:19 -04:00
Thomas Harte
a8d481a764
Writes to the pending register appear to be able to clear interrupts too.
2019-10-25 22:46:30 -04:00
Thomas Harte
2207638287
Adds hsync and vsync interrupts.
2019-10-25 22:42:13 -04:00
Thomas Harte
872897029e
Attempts a complete wiring of 68901 interrupts.
2019-10-25 22:36:01 -04:00
Thomas Harte
51b4b5551d
Actually, I think the 6850 is active low for interrupts.
2019-10-24 22:37:53 -04:00
Thomas Harte
7a2de47f58
Corrects interrupt mask generation.
2019-10-24 22:37:32 -04:00
Thomas Harte
f2f98ed60c
Attempts some part of interrupt decision making.
2019-10-24 22:33:42 -04:00
Thomas Harte
77f14fa638
Starts trying to make sense of interrupts.
2019-10-23 23:09:49 -04:00
Thomas Harte
f09a240e6c
Gives myself more trace details.
2019-10-21 23:20:03 -04:00
Thomas Harte
092a61f93e
Does a better job of having just 512kb.
2019-10-21 23:10:30 -04:00
Thomas Harte
e30ba58e0d
Attempts to wire ACIA interrupt signals into the MFP.
2019-10-21 23:02:30 -04:00
Thomas Harte
7cb82fccc0
Attempts properly to maintain interrupt flag; adds delegate.
2019-10-21 22:40:38 -04:00
Thomas Harte
ed9a5b0430
Adds receipt interrupt.
2019-10-21 21:27:57 -04:00
Thomas Harte
8f59a73425
Corrects incoming data capture.
2019-10-21 20:18:52 -04:00
Thomas Harte
91223b9ec8
Sets default level to high.
2019-10-21 20:18:33 -04:00
Thomas Harte
83f5f0e2ad
Begins trying to receive ACIA data.
2019-10-21 20:10:19 -04:00
Thomas Harte
cf37e9f5de
Remove source control markers.
2019-10-20 23:40:51 -04:00
Thomas Harte
e4f7ead894
Merge branch 'AtariST' of github.com:TomHarte/CLK into AtariST
2019-10-20 23:40:01 -04:00
Thomas Harte
4134463094
The ACIA now receives bits.
2019-10-20 23:34:30 -04:00
Thomas Harte
83d73fb088
The keyboard now responds to a reset on its serial line.
2019-10-20 23:13:44 -04:00
Thomas Harte
75c3e2dacd
Adds basic, incomplete dispatcher for the intelligent keyboard.
2019-10-20 23:07:19 -04:00
Thomas Harte
cf07982a9b
Ensures good serial line and ACIA behaviour.
...
Next stop: having the intelligent keyboard react.
2019-10-20 22:10:05 -04:00
Thomas Harte
313aaa8f95
Silences temporarily.
2019-10-20 20:38:56 -04:00
Thomas Harte
2e86dada1d
Ensures updates even when the event queue is empty.
2019-10-20 20:38:56 -04:00
Thomas Harte
696af5c3a6
Starts to transfer serial line decoding logic into the line itself.
2019-10-20 20:38:56 -04:00
Thomas Harte
f08b38d0ae
Silences, temporarily.
2019-10-20 20:38:55 -04:00
Thomas Harte
9a8352282d
Mostly but not quite fixes serial work.
2019-10-20 20:38:55 -04:00
Thomas Harte
3d03cce6b1
Starts working on the GPIP functionality block.
2019-10-20 20:38:55 -04:00
Thomas Harte
34075a7674
Attempts to tie an intelligent keyboard to the other end of its serial line.
2019-10-20 20:38:55 -04:00
Thomas Harte
f79c87659f
Corrects documentation error.
2019-10-20 20:38:55 -04:00
Thomas Harte
c10b64e1c0
Adds a received_data_ register, that presently can never fill.
2019-10-20 20:38:55 -04:00
Thomas Harte
5d5fe52144
Corrects transmission logic — exactly hitting write_data_time_remaining now works properly.
2019-10-20 20:38:55 -04:00
Thomas Harte
d461331fd2
Ensures remaining_delays_ is set properly after [reset/flush]_writing.
2019-10-20 20:38:55 -04:00
Thomas Harte
ff62eb6dce
The ACIA actually has two clocks, though on an ST they're both 500,000 Hz.
2019-10-20 20:38:55 -04:00
Thomas Harte
374439693e
Ensures serial lines know their writer's clock rate.
2019-10-20 20:38:55 -04:00
Thomas Harte
c4ef33b23f
JustInTimeActors can now specify a clock divider.
2019-10-20 20:38:55 -04:00
Thomas Harte
a7ed357569
Attempts to implement transmission interrupts and ClockingHint::Source.
2019-10-20 20:38:55 -04:00
Thomas Harte
4e5b440145
Attempts mostly to implement 6850 output.
2019-10-20 20:38:55 -04:00
Thomas Harte
2bd7be13b5
Decodes the 6850 control register, and starts working on standardised serial ports.
2019-10-20 20:38:55 -04:00
Thomas Harte
4b09d7c41d
Nudges 6850 towards coherence.
2019-10-20 20:38:55 -04:00
Thomas Harte
97d44129cb
Ensures all 16 data lines reach the video.
2019-10-20 20:38:55 -04:00
Thomas Harte
b0f5f7bd37
Attempts to start producing actual video.
2019-10-20 20:38:55 -04:00
Thomas Harte
d1dd6876b5
Adds the option to affix a standard prefix to log messages.
2019-10-20 20:38:55 -04:00
Thomas Harte
a59ec9e818
Provides a token something where DMA should be.
2019-10-20 20:38:55 -04:00
Thomas Harte
4ead905c3c
Adds an empty shell for the ACIA.
2019-10-20 20:38:55 -04:00
Thomas Harte
127bb043e7
Adds enough logic to advance to an ACIA access error.
2019-10-20 20:38:55 -04:00
Thomas Harte
42ebe06474
Makes an attempt at tracking video sequence points.
2019-10-20 20:38:55 -04:00
Thomas Harte
74fe32da23
Takes a shot at other display outputs.
2019-10-20 20:38:55 -04:00
Thomas Harte
780916551f
Corrects sync generation.
2019-10-20 20:38:54 -04:00
Thomas Harte
305b1211ba
Makes a first attempt to box out the ST display area.
2019-10-20 20:38:54 -04:00
Thomas Harte
2cf52fb89c
Makes an unsuccessful first attempt at some timer functionality.
2019-10-20 20:38:54 -04:00
Thomas Harte
6e1b606adf
Adds a target for MFP read/write operations.
...
Completely without any implementation, so far.
2019-10-20 20:38:54 -04:00
Thomas Harte
3bb0bf9e14
Adds some semblance of an AY.
2019-10-20 20:38:54 -04:00
Thomas Harte
87a6d22894
Starts to formalise the ST memory map a little.
2019-10-20 20:38:54 -04:00
Thomas Harte
484a0ceeb8
Starts forming an Atari ST memory map.
2019-10-20 20:38:54 -04:00
Thomas Harte
da1436abd2
Gifts the Atari ST a 68000 and non-functional video.
2019-10-20 20:38:54 -04:00
Thomas Harte
125f781ced
Starts to create an actual shell of a machine.
2019-10-20 20:38:54 -04:00
Thomas Harte
c66c484c54
Removes unused includes.
2019-10-20 20:38:54 -04:00
Thomas Harte
345b32d6e3
Implements read-only MSA support.
2019-10-20 20:38:54 -04:00
Thomas Harte
8b397626bf
Adds a route through the static analyser to the Atari ST.
2019-10-20 20:38:54 -04:00
Thomas Harte
0da1881a07
Adds an Atari ST enumeration and factory method.
2019-10-20 20:38:54 -04:00
Thomas Harte
d4077afd30
Merge pull request #665 from TomHarte/CPCCrash
...
Slightly improves CPC performance
2019-10-20 20:19:29 -04:00
Thomas Harte
95c45b5515
This can be const.
2019-10-20 17:22:56 -04:00
Thomas Harte
684644420a
Increases scan buffer availability.
2019-10-20 17:22:41 -04:00
Thomas Harte
735586f5f8
Corrects tabs; adds potential output_border optimisation.
2019-10-19 21:20:34 -04:00
Thomas Harte
ddae086661
Merge pull request #664 from TomHarte/DataAllocationGuards
...
Adds safety checks around video data allocation
2019-10-19 18:36:05 -04:00
Thomas Harte
9c7aa5f3fc
Attempts also to spot data writes without allocations.
2019-10-19 18:26:56 -04:00
Thomas Harte
418cd07e17
Adds a check against overrunning data.
2019-10-19 18:17:44 -04:00
Thomas Harte
2ae5739b8b
Silences temporarily.
2019-10-17 23:59:51 -04:00
Thomas Harte
e095a622d3
Ensures updates even when the event queue is empty.
2019-10-17 23:59:43 -04:00
Thomas Harte
9ab49065cd
Starts to transfer serial line decoding logic into the line itself.
2019-10-17 23:34:39 -04:00
Thomas Harte
ab50f17d87
Silences, temporarily.
2019-10-16 23:34:49 -04:00
Thomas Harte
f5a2e180f9
Mostly but not quite fixes serial work.
2019-10-16 23:34:37 -04:00
Thomas Harte
f2e1584275
Starts working on the GPIP functionality block.
2019-10-16 23:21:25 -04:00
Thomas Harte
0fd8813ddb
Attempts to tie an intelligent keyboard to the other end of its serial line.
2019-10-16 23:21:14 -04:00
Thomas Harte
b69180ba01
Corrects documentation error.
2019-10-16 23:19:42 -04:00
Thomas Harte
c352d8ae8c
Adds a received_data_ register, that presently can never fill.
2019-10-13 23:04:57 -04:00
Thomas Harte
530e831064
Corrects transmission logic — exactly hitting write_data_time_remaining now works properly.
2019-10-13 21:40:46 -04:00
Thomas Harte
3b165a78f2
Ensures remaining_delays_ is set properly after [reset/flush]_writing.
2019-10-13 21:39:25 -04:00
Thomas Harte
8d87e9eb1c
The ACIA actually has two clocks, though on an ST they're both 500,000 Hz.
2019-10-13 21:32:34 -04:00
Thomas Harte
f86dc082bb
Ensures serial lines know their writer's clock rate.
2019-10-13 20:41:08 -04:00
Thomas Harte
d7982aa84e
JustInTimeActors can now specify a clock divider.
2019-10-13 18:19:39 -04:00
Thomas Harte
516d78f5a8
Attempts to implement transmission interrupts and ClockingHint::Source.
2019-10-12 23:46:57 -04:00
Thomas Harte
8b50a7d6e3
Attempts mostly to implement 6850 output.
2019-10-12 23:14:29 -04:00
Thomas Harte
4bf81d3b90
Decodes the 6850 control register, and starts working on standardised serial ports.
2019-10-12 18:19:55 -04:00
Thomas Harte
cd75978e4e
Nudges 6850 towards coherence.
2019-10-12 00:04:02 -04:00
Thomas Harte
fda99d9c5f
Ensures all 16 data lines reach the video.
2019-10-10 23:29:46 -04:00
Thomas Harte
c5ebf75351
Attempts to start producing actual video.
2019-10-10 22:46:58 -04:00
Thomas Harte
2581b520af
Adds the option to affix a standard prefix to log messages.
2019-10-10 22:45:03 -04:00
Thomas Harte
52e5296544
Provides a token something where DMA should be.
2019-10-10 21:04:41 -04:00
Thomas Harte
d7ce2c26e8
Adds an empty shell for the ACIA.
2019-10-10 20:54:29 -04:00
Thomas Harte
f88e1b1373
Adds enough logic to advance to an ACIA access error.
2019-10-09 23:01:11 -04:00
Thomas Harte
021d4dbaf1
Makes an attempt at tracking video sequence points.
2019-10-08 23:06:50 -04:00
Thomas Harte
dbde8f2ee7
Takes a shot at other display outputs.
2019-10-08 22:29:58 -04:00
Thomas Harte
5d06930df4
Corrects sync generation.
2019-10-08 21:29:17 -04:00
Thomas Harte
7722596a3b
Makes a first attempt to box out the ST display area.
2019-10-08 21:18:08 -04:00
Thomas Harte
1de1818ebb
Makes an unsuccessful first attempt at some timer functionality.
2019-10-07 22:44:35 -04:00
Thomas Harte
885f890df1
Adds a target for MFP read/write operations.
...
Completely without any implementation, so far.
2019-10-06 23:14:05 -04:00
Thomas Harte
e195497ab7
Adds some semblance of an AY.
2019-10-06 22:30:48 -04:00
Thomas Harte
fcd2143697
Starts to formalise the ST memory map a little.
2019-10-06 17:15:29 -04:00
Thomas Harte
3f45cd2380
Starts forming an Atari ST memory map.
2019-10-04 22:38:46 -04:00
Thomas Harte
a8a34497ff
Gifts the Atari ST a 68000 and non-functional video.
2019-10-04 21:34:15 -04:00
Thomas Harte
953423cc02
Starts to create an actual shell of a machine.
2019-10-03 22:47:57 -04:00
Thomas Harte
a2ca887b99
Removes unused includes.
2019-10-03 22:47:41 -04:00
Thomas Harte
3c5ae9cf8e
Implements read-only MSA support.
2019-10-03 22:41:20 -04:00
Thomas Harte
fe621d7e52
Adds a route through the static analyser to the Atari ST.
2019-10-03 22:10:10 -04:00
Thomas Harte
814bb4ec63
Adds an Atari ST enumeration and factory method.
2019-10-03 20:17:26 -04:00
Thomas Harte
6c99048211
Copies in a few more hardware notes.
2019-10-02 19:18:09 -04:00
Thomas Harte
2638a901d9
Improves documentation of existing degree of implementation.
2019-09-30 21:36:37 -04:00
Thomas Harte
e8bc254f3f
Merge pull request #661 from TomHarte/ListMasterSystemOptions
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Adds missing Master System option enumerations.
2019-09-30 21:17:20 -04:00
Thomas Harte
3c146a3fb2
Adds missing Master System enumerations.
2019-09-30 21:10:30 -04:00
Thomas Harte
71083fd0f7
Improves documentation of existing degree of implementation.
2019-09-29 22:08:16 -04:00
Thomas Harte
b609ce6fcb
Merge pull request #658 from TomHarte/Afterburner
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Minor TMS timing correction.
2019-09-28 23:50:28 -04:00
Thomas Harte
929475d31e
Minor correction: round down, not up.
2019-09-28 23:49:32 -04:00
Thomas Harte
f14d98452e
Merge pull request #657 from TomHarte/DiskIIAgain
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Corrects time propagation for Apple II cards
2019-09-28 23:40:07 -04:00
Thomas Harte
9d17d48bca
Ensures cycles_per_revolution_ is populated for fixed-rate drives.
2019-09-28 23:23:15 -04:00
Thomas Harte
4ac3839185
Seeks to ensure that card transitions between real-time and just-in-time don't break timing.
2019-09-28 18:34:04 -04:00
Thomas Harte
c089d1cd09
Improves text; nobody normal knows that this is "a view".
2019-09-24 22:52:08 -04:00
Thomas Harte
cb85ec25cc
Merge pull request #656 from TomHarte/MacMenu
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Adds Macintosh choice to File -> New...
2019-09-24 22:50:43 -04:00
Thomas Harte
fbf95ec2b8
Removes the now empty local namespace.
2019-09-24 22:48:47 -04:00
Thomas Harte
6adca98f34
Adds Macintosh choice to File -> New...
2019-09-24 22:48:34 -04:00
Thomas Harte
48f4d8b875
Merge pull request #655 from TomHarte/EventProtocol
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Rationalises protocol for application-level event theft.
2019-09-24 22:32:22 -04:00
Thomas Harte
7758f9d0a9
Improves nomenclature.
2019-09-24 22:31:36 -04:00
Thomas Harte
7112f0336c
Rationalises protocol for application-level event theft.
2019-09-24 22:31:20 -04:00
Thomas Harte
298694a881
Merge pull request #654 from TomHarte/GoodbyeFastTapeProtocol
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Eliminates fast loading Objective-C/Swift protocol.
2019-09-24 20:22:08 -04:00
Thomas Harte
7ff4594f09
Eliminates fast loading Objective-C/Swift protocol.
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A very long time ago, when each machine had its own Objective-C class, this protocol was used to indicate which machines support that feature. It no longer communicates anything.
2019-09-24 20:13:09 -04:00
Thomas Harte
e8bd538182
Merge pull request #653 from TomHarte/CommandCapture
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Allows machines to declare modifiers as 'essential'.
2019-09-22 14:04:06 -04:00
Thomas Harte
8489e8650f
Attempts another draft of not inundating the user with open file dialogues.
2019-09-22 13:59:31 -04:00
Thomas Harte
114f81941e
Completes the wiring necessary for capture of the command key.
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At least when coupled with mouse capture.
2019-09-22 13:53:38 -04:00
Thomas Harte
077c7d767f
Shifts essential modifiers up to the Keyboard class.
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I had forgotten that mappers are not exposed.
2019-09-22 13:48:50 -04:00
Thomas Harte
8f88addf9f
Establishes an interface for requesting shortcut theft. Not yet implemented.
2019-09-22 13:15:35 -04:00
Thomas Harte
f28c124039
Adds a route to divert key events before they reach Cocoa.
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If you were to use this, it would have the effect of disabling in-app keyboard short-cuts in favour of routing keys to the emulated machine.
2019-09-22 13:15:01 -04:00
Thomas Harte
a416bc0058
Adds an interface allowing keyboard mappers to declare modifiers that are 'essential'.
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i.e. ones that, if not delivered reliably, will cause the related machine to behave unexpectedly.
2019-09-22 13:14:09 -04:00
Thomas Harte
e78b1dcf3c
Merge pull request #652 from TomHarte/Xcode11
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Updates to Xcode11 recommended project settings.
2019-09-22 12:19:39 -04:00
Thomas Harte
8a14f5d814
Updates to Xcode11 recommended project settings.
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The updated compiler also flagged a potential issue with CPU::Z80::Register not being a namespace re: 'Refresh' versus CPU::Z80::PartialMachineCycle. I don't entirely see it, but this fixes the problem.
I also finally figured out what the compiler was trying to tell me about ROMRequester.xib.
2019-09-22 12:13:56 -04:00
Thomas Harte
e5f983fbac
Merge pull request #651 from TomHarte/MacOpenWindow
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Shows the auto-open dialogue only at most once.
2019-09-21 18:01:54 -04:00
Thomas Harte
3e639e96e7
Shows the auto-open dialogue only at most once.
2019-09-21 18:01:16 -04:00
Thomas Harte
61993f0687
Merge pull request #650 from TomHarte/DeadReference
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Removes dead reference to video from VIAPortHandler.
2019-09-21 17:40:22 -04:00
Thomas Harte
5f16fa8c08
Removes dead reference to video from VIAPortHandler.
2019-09-21 17:39:45 -04:00
Thomas Harte
dcea9c9ab2
Merge pull request #649 from TomHarte/BetterTiming
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Implements every-other-cycle-during-pixels RAM timing.
2019-09-21 17:35:28 -04:00
Thomas Harte
e7bf0799b6
Implements every-other-cycle-during-pixels RAM timing.
2019-09-21 17:25:20 -04:00
Thomas Harte
e760421f6f
Merge pull request #648 from TomHarte/QuickBoot
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Adds the option to skip the Mac Plus memory test
2019-09-19 22:47:07 -04:00
Thomas Harte
8ea4c17315
Completes Mac GUI wiring.
2019-09-19 22:37:23 -04:00
Thomas Harte
2e24da4614
Implements quick booting, and edges towards exposing it on the Mac.
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It should already work in kiosk mode.
2019-09-19 22:32:12 -04:00
Thomas Harte
e46601872b
Establishes that the Macintosh offers the quick-boot option.
2019-09-19 21:50:39 -04:00
Thomas Harte
6d0e41b760
Adds "quick boot" as a standard option.
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I assume I'm going to reuse this.
2019-09-19 19:41:43 -04:00
Thomas Harte
5a82df837d
Merge pull request #647 from TomHarte/SCSIActivity
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Adds the SCSI bus as an Activity::Source.
2019-09-19 19:33:06 -04:00
Thomas Harte
776b819a5a
Adds the SCSI bus as an Activity::Source.
2019-09-19 19:31:22 -04:00
Thomas Harte
1783f6c84b
Update README.md
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Corrects alphabetical order.
2019-09-18 22:11:37 -04:00
Thomas Harte
2ef2c73efe
The early Macintoshes are less experimental now.
2019-09-18 22:11:04 -04:00
Thomas Harte
55e003ccc1
Merge pull request #646 from TomHarte/LinuxFixes
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Corrects hasty merge for more standards-compliant targets
2019-09-18 22:07:57 -04:00
Thomas Harte
3d54d55dbb
Adds missing #include for assert.
2019-09-18 22:06:13 -04:00
Thomas Harte
72c0a631f7
Moves includes to correct file.
2019-09-18 22:04:54 -04:00
Thomas Harte
1608a90d5d
Takes another stab at finding ssize_t.
2019-09-18 22:03:51 -04:00
Thomas Harte
4f8a45a6ce
Adds #include for ssize_t.
2019-09-18 22:02:59 -04:00
Thomas Harte
4f0f1dcf18
Corrects accidental use of #import.
2019-09-18 21:53:22 -04:00
Thomas Harte
839e51d92d
Adds newest files to SConstruct.
2019-09-18 21:49:57 -04:00
Thomas Harte
e470cf23d8
Merge pull request #645 from TomHarte/SCSI
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Adds basic SCSI support, along with a Mac Plus to use it.
2019-09-18 21:45:48 -04:00
Thomas Harte
8d4a96683a
Reduces output noise.
2019-09-18 21:41:29 -04:00
Thomas Harte
f53411a319
Removes local NDEBUG.
2019-09-18 21:35:26 -04:00
Thomas Harte
128a1da626
Enables write support.
2019-09-18 20:18:02 -04:00
Thomas Harte
962275c22a
Removes clock for NCR 5380.
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It doesn't have one in real life, and now can live off the time counting that occurs on the SCSI bus.
2019-09-18 20:17:47 -04:00
Thomas Harte
3002ac8a4a
Adds mapping of READ(8) size 0 to size 256.
2019-09-17 21:59:32 -04:00
Thomas Harte
ff43674638
Corrects partition map: string fields are 32 bytes long.
2019-09-17 21:46:14 -04:00
Thomas Harte
2f6c366668
Makes a concerted effort at properly wrapping a hard disk image.
2019-09-17 21:30:04 -04:00
Thomas Harte
2ce1f0a3b1
Implements multi-sector read/write.
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This once again unblocks Apple HD SC Setup. Progress!
2019-09-16 22:20:42 -04:00
Thomas Harte
210129c3a1
Updated as per Inside Macintosh IV.
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Of which I now own a copy.
2019-09-16 21:31:43 -04:00
Thomas Harte
934901447a
Adds a temporary version of block access writing.
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Whatever I'm doing, it's still not correct. The Macintosh ostensibly appears to 0-fill the direct-access device, then reads a sector back and hangs.
2019-09-15 22:06:45 -04:00
Thomas Harte
960b289e70
Edges closer towards proper DMA operation.
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Specifically: differentiates the three kinds of DMA operation. Still doesn't act correctly with regard to DACK though, and leaves the bus instantaneously improperly formed. Which I'm tempted to try to fix on the target side by properly obeying delays.
2019-09-15 15:03:06 -04:00
Thomas Harte
243e40cd79
Adds signalling of DACK.
2019-09-14 13:48:33 -04:00
Thomas Harte
c849188016
Adds format and write to the SCSI target.
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Now I think I need to switch back to the 5380 to ensure proper DMA mode interactions when writing.
2019-09-12 21:58:09 -04:00
Thomas Harte
87e8dade2f
Implements READ BUFFER to do, you know, *something*. Plus READ CAPACITY.
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The HD SC utility now offers up drive 6 for formatting. That's progress.
2019-09-11 21:52:02 -04:00
Thomas Harte
6fc5b4e825
Simplifies INQUIRY for future targets; implements enough of SENSE MODE to advance.
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The HD SC setup utility is now looking to read buffer.
2019-09-08 21:59:56 -04:00
Thomas Harte
00ce7f8ae0
Takes a first shot at INQUIRY.
2019-09-07 22:04:44 -04:00
Thomas Harte
6e0e9afe2f
Fixed: to post a message, I want message in, not message out.
2019-09-07 13:35:38 -04:00
Thomas Harte
cb0d994827
Provides empty data for the unimplemented sectors.
2019-09-07 13:17:53 -04:00
Thomas Harte
bee782234a
Ensures no state transitions while acknowledge is still asserted.
2019-09-07 13:17:34 -04:00
Thomas Harte
64dad35026
Decreases logging, at least temporarily.
2019-09-03 22:40:32 -04:00
Thomas Harte
cbd1a8cf78
Factors out command termination, adds a default implementation of test unit ready.
2019-09-03 22:40:18 -04:00
Thomas Harte
a4ab0afce3
Takes a shot at completing a full SCSI interaction.
2019-09-03 21:15:30 -04:00
Thomas Harte
1c7e0f3c9d
Fixes control line modification by the 5380 and SCSI target command chaining.
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So now I'm back to trying to guess how a SCSI command terminates re: the relative meanings of a message phase and a status phase.
2019-09-02 23:14:37 -04:00
Thomas Harte
318cdb41ea
Adds SCSI bus clocking to the Macintosh, and fixes its internal counting.
2019-09-02 16:03:33 -04:00
Thomas Harte
2f8e31bc8b
Takes a first bash at implementing the new SCSI::Bus timing infrastructure.
2019-09-02 13:00:01 -04:00
Thomas Harte
310c722cc0
Starts a transition to bus-level knowledge of SCSI-specific bus timing thresholds.
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The idea being that bus attachees need not all count time for themselves. They can be very plain finite state machines.
New semantics are not yet implemented within the Bus. The plan is to do that, remove the internal counting of time within the NCR, then adjust the Target to be more explicitly stateful.
2019-08-31 21:44:22 -04:00
Thomas Harte
25956bd90f
Mildly improves temporary logging.
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A deckchair shuffle, at best.
2019-08-26 22:35:11 -04:00
Thomas Harte
1a60ced61b
Starts trying to deal with creating a whole volume from merely a partition.
2019-08-25 23:03:54 -04:00
Thomas Harte
081316c071
Adds some additional commentary as this takes shape.
2019-08-25 17:46:05 -04:00
Thomas Harte
eafbc12cc1
Ensures a clean entry into the command phase.
2019-08-25 17:43:14 -04:00
Thomas Harte
ca08716c52
Introduces real hard disk images to the nascent world of SCSI.
2019-08-25 17:03:41 -04:00
Thomas Harte
30cef1ee22
Adds write support.
2019-08-25 15:16:35 -04:00
Thomas Harte
5598802439
Makes the static analyser aware of mass-storage devices.
2019-08-25 15:10:09 -04:00
Thomas Harte
1c6720b0db
Adds new class to Xcode project.
2019-08-25 15:09:43 -04:00
Thomas Harte
404b088199
Adds a trivial mass-storage device, for Macintosh HFV volumes.
2019-08-25 15:09:27 -04:00
Thomas Harte
7d61df238a
Localises #include.
2019-08-25 15:09:04 -04:00
Thomas Harte
c86db12f1c
Starts implementing DMA support on the 5380.
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The Macintosh doesn't actually use the DMA signals, but uses pseudo-DMA mode so they nevertheless need to be appropriate.
2019-08-24 22:47:11 -04:00
Thomas Harte
ce2e85af8b
Adds missing bus state callouts.
2019-08-22 23:27:00 -04:00
Thomas Harte
2d82855f26
Attempts to provide a data out phase.
2019-08-22 23:16:58 -04:00
Thomas Harte
faec516a2c
Starts pushing towards figuring out a proper infrastructure for mass storage.
2019-08-21 23:22:58 -04:00
Thomas Harte
8e274ec5d0
Merge branch 'master' into SCSI
2019-08-21 22:38:18 -04:00
Thomas Harte
bb1a0a0b76
Sketches out further SCSI infrastructure.
2019-08-21 22:37:39 -04:00
Thomas Harte
252650808d
Starts seeking to unbind SCSI bus logic and command performance.
2019-08-19 22:47:01 -04:00
Thomas Harte
e3d9254555
Implements phase-match bit.
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Seemingly causing the command phase to proceed.
2019-08-18 23:15:54 -04:00
Thomas Harte
90cf99b626
Takes a wild swings at speeding up startup.
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With no success.
2019-08-18 22:40:16 -04:00
Thomas Harte
955e909e61
Attempts to nudge the command phase further towards functioning.
2019-08-18 22:39:27 -04:00
Thomas Harte
8339e2044c
Switches to proper SCSI terminology and better attempts a command phase.
2019-08-18 15:10:07 -04:00
Thomas Harte
0e0c789b02
Starts attempting to introduce a direct access device.
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Without having access to the SCSI-1 standard, a lot of this is guesswork.
2019-08-17 23:43:42 -04:00
Thomas Harte
7e001c1d03
Corrects data line loading.
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Also adds some extra temporary logging. Outstanding question: why is ATN not being signalled? Is SEL enough?
2019-08-17 21:30:59 -04:00
Thomas Harte
9047932b81
Corrected basic error. Arbitration now seems to succeed.
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This is seemingly followed by a pattern of signalling BUSY+SEL followed by just SEL with the various other potential device IDs in turn. To which nothing ever responds as currently implemented.
2019-08-15 23:28:30 -04:00
Thomas Harte
f668e4a54c
Makes an attempt at getting the 5380 past arbitration.
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Not entirely successful. Also gets a bit smarter with `final` on ClockingHint::Sources.
2019-08-15 23:14:40 -04:00
Thomas Harte
ce1c96d68c
Starts thinking out the mechanics of emulating a SCSI-1 bus.
2019-08-13 23:09:11 -04:00
Thomas Harte
0f67e490e8
Adjusts NCR address decoding to produce a more plausible initial interaction.
2019-08-11 22:43:25 -04:00
Thomas Harte
895c315fa5
Increases the Mac Plus too 4mb.
2019-08-11 21:41:12 -04:00
Thomas Harte
a90a74a512
Stubs in just enough of the 5380 to get a Mac Plus too boot.
2019-08-11 20:55:20 -04:00
Thomas Harte
3e1286cbef
Merge pull request #644 from MaddTheSane/patch-1
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Update CSMachine.mm
2019-08-11 19:25:16 -04:00
Thomas Harte
949c1e1668
Adds an empty shell for what will be my 5380 implementation.
2019-08-10 23:53:52 -04:00
Thomas Harte
bbd4e4d3dc
Enhances memory map fidelity to allow for ROM holes on the Mac Plus.
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This is how the ROM detects the difference between the Plus and the 512ke, it seems.
2019-08-10 23:53:34 -04:00
C.W. Betts
4c5f596533
Update CSMachine.mm
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No need to create a temporary NSNumber object to be passed to a variadic method.
2019-08-10 00:43:30 -06:00
Thomas Harte
4859d3781b
Merge pull request #643 from TomHarte/Mac512
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Simplifies just-in-time usage of the IWM, and the disk-speed accumulator
2019-08-07 21:51:07 -04:00
Thomas Harte
bac0461f7f
Switches the drive-speed accumulator to the delegate pattern.
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This allows the Macintosh to ensure that the IWM is kept up just-in-time with drive speed changes.
2019-08-07 21:39:23 -04:00
Thomas Harte
f26a200d78
Switches to a JustInTimeActor to wrap the IWM.
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Also simplifies potential future usage of the IWM template.
2019-08-07 21:28:02 -04:00
Thomas Harte
28ccb7b54e
Merge branch 'master' of github.com:TomHarte/CLK
2019-08-04 21:34:49 -04:00
Thomas Harte
b6e4c8209b
Switches to showing 'File -> Open...' at launch.
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As per the prevailing wind.
2019-08-04 21:34:30 -04:00
Thomas Harte
16548f0765
Merge pull request #642 from TomHarte/InterruptSampling
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Moves timing of interrupt sampling into prefetch queue advancement.
2019-08-04 21:20:22 -04:00
Thomas Harte
6a80832140
Moves timing of interrupt sampling into prefetch queue advancement.
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As per comment, that is definitely the only place it can occur; I don't know whether it always occurs there.
2019-08-04 21:06:34 -04:00
Thomas Harte
c6cf0e914b
Merge pull request #641 from TomHarte/DIVSTiming
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Substantially improves DIVS timing.
2019-08-04 20:46:50 -04:00
Thomas Harte
35b1a55c12
Corrects DIVS negative flag.
2019-08-04 20:36:33 -04:00
Thomas Harte
e3794c0c0e
Takes a second pass at DIVS timing, seeming to correct that side of things.
2019-08-04 20:33:43 -04:00
Thomas Harte
f88dc23c71
Corrects comment.
2019-08-04 20:30:41 -04:00
Thomas Harte
0e293e4983
Relocates RAM delay test in order to scrape out a minor performance win.
2019-08-03 21:46:45 -04:00
Thomas Harte
e334abfe20
Partitions the 68000 arithmetic tests, to allow easier per-instruction execution.
2019-08-03 17:44:47 -04:00
Thomas Harte
fd2fbe0e59
Merge pull request #640 from TomHarte/InterruptSignalling
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Corrects 68000 address lines during interrupt acknowledgement.
2019-08-03 15:42:15 -04:00
Thomas Harte
330b27d085
Merge branch 'master' into InterruptSignalling
2019-08-03 15:39:22 -04:00
Thomas Harte
478f2533b5
Corrects 68000 address bus during interrupt acknowledge.
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All unused bits should be 1, not 0.
2019-08-03 15:38:36 -04:00
Thomas Harte
b96972a4b9
Merge pull request #639 from InvisibleUp/master
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Allow for scons to run on Python 3
2019-08-03 08:51:45 -04:00
InvisibleUp
f2b083f4de
Allow for scons to run on Python 3
2019-08-03 00:33:53 -04:00
Thomas Harte
80f6d665d9
Merge pull request #638 from TomHarte/SimplifiedBus
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Simplifies code around Mac bus decoding.
2019-08-02 22:33:54 -04:00
Thomas Harte
a07488cf1b
Introduces the Mac Plus memory map.
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Albeit with no SCSI support yet.
2019-08-02 22:26:40 -04:00
Thomas Harte
d67c5145c0
Introduces RAM access delays.
2019-08-02 22:12:34 -04:00
Thomas Harte
5e76d593af
Switches to table-based address decoding.
2019-08-02 21:30:04 -04:00
Thomas Harte
83393e8e91
Merge branch 'master' into SimplifiedBus
2019-08-02 21:05:45 -04:00
Thomas Harte
e08a64d455
Fixes erroneous instruction.
2019-08-02 21:04:53 -04:00
Thomas Harte
b93f9b3973
Distinguishes time advancement from bus response.
2019-08-02 19:48:41 -04:00
Thomas Harte
9c517d07d4
Merge pull request #637 from TomHarte/UserInfo
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Improves Macintosh user communications
2019-08-02 17:29:44 -04:00
Thomas Harte
f45de5b87a
Adds how-to-release-the-mouse instructions for Cocoa.
2019-08-02 17:07:51 -04:00
Thomas Harte
011d76175c
Adds mouse release instructions for SDL.
2019-08-02 16:38:05 -04:00
Thomas Harte
96005261c7
Adds activity lights for Macintosh disk activity.
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Prompting a quick fix to drives not spinning down.
2019-08-02 16:26:23 -04:00
Thomas Harte
c8177af45a
Introduces missing implementation file.
2019-08-02 16:26:08 -04:00
Thomas Harte
97eff5b16d
Formally distinguishes Macintosh keys from virtual keys.
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Also: adds mappings for keypad keys, and corrects a couple of
long-standing capitalisation errors in my virtual key set.
2019-08-02 16:15:34 -04:00
Thomas Harte
917520fb1e
Merge pull request #636 from TomHarte/PWM
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Attempts more accurately to match Apple's IWM windowing logic.
2019-08-02 15:15:11 -04:00
Thomas Harte
335dda3d55
Attempts more accurately to match Apple's windowing logic.
2019-08-02 12:49:45 -04:00
Thomas Harte
0c8e313fd5
Merge pull request #635 from TomHarte/Cleanup
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Improves code quality, particularly the NSDocument subclass.
2019-08-01 14:32:49 -04:00
Thomas Harte
f64ec11668
Tidies up and simplifies panel flow.
2019-08-01 14:31:45 -04:00
Thomas Harte
9bbccd89d3
Adds an extended rationale for current implementation.
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Also strips some cruft of prior guesses.
2019-07-31 23:19:46 -04:00
Thomas Harte
1ae3799aee
Merge pull request #634 from TomHarte/OpenCrash
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Resolves a potential crash at launch on the Mac
2019-07-31 14:11:58 -04:00
Thomas Harte
260843e5b1
Starts poking at a pure total-based formula.
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On the assumption that any relevant DC offset will fall out in the wash. This causes one 400kb disk to boot in a Macintosh 128kb, another couple to do reasonably well. So it's better than what was here before.
2019-07-31 12:42:23 -04:00
Thomas Harte
e3f22e5787
This should actually be PWM, I think.
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I'm just unsure of exactly the proper formula, owing to my ignorance on basic electrical engineering. Research ahoy!
2019-07-30 22:02:41 -04:00
Thomas Harte
2aa308efdd
Tweaks magic formulas.
...
The computer now at least seeks outward, until this attempt at drive speed calculation fails.
2019-07-30 16:18:36 -04:00
Thomas Harte
74c18d7861
Attempts a full wiring up of 400kb drive speed.
2019-07-30 15:08:55 -04:00
Thomas Harte
c41cccd9a6
Adds a workaround to display the ROM import banner even from File -> Open... .
2019-07-30 13:07:33 -04:00
Thomas Harte
bba34b28b8
Merge pull request #633 from TomHarte/Deferrer
...
Starts to formalise just-in-time handling
2019-07-30 11:35:13 -04:00
Thomas Harte
d8a41575c8
Picks a better function name.
2019-07-30 10:54:56 -04:00
Thomas Harte
0521de668a
Omits redundant qualifier.
...
This code can't be anything but `inline`.
2019-07-29 23:07:02 -04:00
Thomas Harte
12441bddab
Tries operator overloading as a workaround.
2019-07-29 23:04:02 -04:00
Thomas Harte
bc25c52683
Although duplicative, resolves function redefinition.
2019-07-29 22:49:02 -04:00
Thomas Harte
eb3fb70ea1
Merge branch 'Deferrer' of github.com:TomHarte/CLK into Deferrer
2019-07-29 21:24:21 -04:00
Thomas Harte
2f90ed1f32
Attempts to reformulate into valid C++.
2019-07-29 21:23:37 -04:00
Thomas Harte
f3dd4b028d
Rolls out JustInTime acting to the MSX and ColecoVision.
2019-07-29 21:22:31 -04:00
Thomas Harte
7dcad516bd
Undoes incorrect project change.
2019-07-29 17:21:34 -04:00
Thomas Harte
9859f99513
Adds a route to not bumping time.
2019-07-29 17:21:27 -04:00
Thomas Harte
51b7f2777d
Adds a route to not bumping time.
2019-07-29 17:17:39 -04:00
Thomas Harte
2f2478d2d3
Implements AsyncJustInTimeActor, experimentally.
2019-07-29 16:38:57 -04:00
Thomas Harte
a43ada82b2
Experiments with a JustInTimeActor in the Master System.
2019-07-29 15:38:41 -04:00
Thomas Harte
5149f290d0
Starts trying to formalise just-in-time execution.
...
Which, at least, simplifies Cycle/HalfCycle to Cycle run_for usage via template.
2019-07-28 21:49:54 -04:00
Thomas Harte
0dc6f08deb
Merge pull request #632 from TomHarte/BINSwitch
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Eliminates the crutch of PlusToo BIN files.
2019-07-28 16:08:54 -04:00
Thomas Harte
b1f04ed96d
Eliminates the crutch of PlusToo BIN files.
...
Thereby returning the .bin extension to the various consoles.
2019-07-28 16:07:16 -04:00
Thomas Harte
cd49b3c89b
Merge pull request #631 from TomHarte/MacPageFlipping
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Removes the video and audio base address latches.
2019-07-27 22:25:12 -04:00
Thomas Harte
f894d43111
Removes the video and audio base address latches.
...
It now seems to me that these take effect immediately.
2019-07-27 22:23:40 -04:00
Thomas Harte
4033c0c754
Merge pull request #630 from TomHarte/IWMWrites
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Makes various fixes to `Drive` and `Track`.
2019-07-26 23:41:20 -04:00
Thomas Harte
786b26d23e
Adds an admission of incompleteness.
...
I really need to figure out the 5-and-3 encoding.
2019-07-26 23:23:40 -04:00
Thomas Harte
d08d8ed22c
Adds a further drift safeguard.
2019-07-26 23:23:01 -04:00
Thomas Harte
b7b62aa3f6
Resolves some type conversion warnings.
2019-07-26 23:20:40 -04:00
Thomas Harte
39d7e3c62c
Ensures relative_exponents less than or equal to -32 don't overflow.
2019-07-26 22:19:40 -04:00
Thomas Harte
81b57ecf7c
Adds noexcept.
2019-07-26 22:18:40 -04:00
Thomas Harte
572e8b52e1
At the cost of extra storage, attempts to simplify away potential rounding issues around the index hole.
2019-07-26 17:20:32 -04:00
Thomas Harte
9b634472c6
Gets a little more rigorous on "high resolution".
2019-07-26 15:26:51 -04:00
Thomas Harte
d8bc20b1ab
Ensures quieter Release behaviour.
2019-07-25 22:55:27 -04:00
Thomas Harte
d2bfd59953
Ensures positional continuity across rotation speed changes.
2019-07-25 22:29:54 -04:00
Thomas Harte
3d20ae47ea
Ensures cycles_since_index_hole_ is wrapped to track length.
2019-07-25 21:48:01 -04:00
Thomas Harte
85cf8d89bc
Ensures an initial non-zero value.
2019-07-25 21:47:44 -04:00
Thomas Harte
50e954223a
Merge pull request #629 from TomHarte/MinorSpeedImprovements
...
Attempts to improve 68000 (and Macintosh) emulation speed
2019-07-25 10:39:41 -04:00
Thomas Harte
109d5d16bd
Withdraws optimisation, for further testing in the future.
2019-07-25 10:33:38 -04:00
Thomas Harte
1672dc5946
Reduces frequency of update_video() calls.
2019-07-25 10:14:52 -04:00
Thomas Harte
5769944918
Shrinks MicroOp struct size from 16 bytes to 4.
2019-07-25 10:14:36 -04:00
Thomas Harte
9ef1211d53
Adds missing header file.
2019-07-24 22:13:32 -04:00
Thomas Harte
f2ae04597f
Updates test case.
2019-07-24 22:07:17 -04:00
Thomas Harte
1327de1c82
Slims the Program struct down to 8 bytes total.
2019-07-24 22:02:50 -04:00
Thomas Harte
827c4e172a
Cuts a third from the Program struct.
...
Observation: [source/destination]_address are always one of the address registers. So you can fit both within a single byte.
Net effect: around a 12% reduction in execution costs, given that this reduces the size of the instructions table from 3mb to 2mb.
2019-07-24 18:39:36 -04:00
Thomas Harte
c300bd17fa
Regularises as many source/destination sets as fit the current setter.
2019-07-24 18:22:44 -04:00
Thomas Harte
0187fd8eae
Hides all runtime Program member accesses behind macros.
...
... and fixes unit tests.
2019-07-24 12:01:30 -04:00
Thomas Harte
0469f0240b
Moves interrupt level selection outside the loop.
2019-07-23 23:13:03 -04:00
Thomas Harte
4aca6c5ef8
Adds a note of admission here.
2019-07-23 23:03:15 -04:00
Thomas Harte
d69aee4972
Removes stray \n.
2019-07-23 22:17:46 -04:00
Thomas Harte
3da47318b1
Updates copyright year.
2019-07-23 18:03:37 -04:00
Thomas Harte
ef036df2bc
Merge pull request #628 from TomHarte/XCodeUpdate
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Completes Xcode 10.3 upgrade checks.
2019-07-23 16:27:46 -04:00
Thomas Harte
579f68cf11
Completes Xcode 10.3 upgrade checks.
2019-07-23 16:27:18 -04:00
Thomas Harte
90f6ca4635
Merge pull request #627 from TomHarte/ExtraROMDetails
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Extends system ROM details; provides for manual import on the Mac
2019-07-23 16:24:55 -04:00
Thomas Harte
374cac0107
Adds negative feedback to ROM installation process.
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As an ugly kludge, code wise.
2019-07-23 16:24:23 -04:00
Thomas Harte
4d361b1952
Adds MIME type for Apple-recognised disk images.
2019-07-23 11:36:47 -04:00
Thomas Harte
fcee7779b0
Inserts missing spaces.
2019-07-22 23:11:37 -04:00
Thomas Harte
b4191b6225
Corrects DiskII boot ROM CRCs and improves corresponding declarations.
2019-07-22 23:07:23 -04:00
Thomas Harte
dbee37ab34
Provides extended ROM details for the VIC-20 and Oric.
2019-07-22 22:15:44 -04:00
Thomas Harte
a3ad0ab09b
Completes the successful import path.
2019-07-22 21:46:28 -04:00
Thomas Harte
ed0c4c117b
Ensures that machine name reaches Swift.
2019-07-22 21:18:30 -04:00
Thomas Harte
2432151bf8
Puts machine name into ROMMachine::ROM.
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Also switches to idiomatic exit codes.
2019-07-22 21:14:21 -04:00
Thomas Harte
2129bfc570
Gets as far as testing ROMs against the missing list.
...
Though now it strikes me that I've forgotten to retain the machine name.
2019-07-22 18:02:48 -04:00
Thomas Harte
8de6cd3f44
Ensures that ROM files can be dragged and dropped into Swift.
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Also adjusts the main window background colour, better to bridge the time between selecting a machine and it starting.
2019-07-22 17:18:31 -04:00
Thomas Harte
9b9831f28b
The Mac port will now at least display a list of missing ROMs.
...
It doesn't yet offer the drag-and-drop functionality it promises, however.
2019-07-22 13:00:17 -04:00
Thomas Harte
8a2cac0d0c
Fixes layout constraints.
2019-07-22 11:30:26 -04:00
Thomas Harte
e17b105574
Adds a quick label in exposition.
2019-07-22 11:18:39 -04:00
Thomas Harte
67c5f6b7cb
Ensures the missing ROM list bubbles up to Swift.
2019-07-21 22:05:22 -04:00
Thomas Harte
d452d070a1
Extends the Mac ROM fetcher to return a missing-ROMs list.
2019-07-21 18:41:00 -04:00
Thomas Harte
a846c3245d
Checks the application support directory before the application bundle for ROM images.
2019-07-20 23:04:46 -04:00
Thomas Harte
4ffa3c1b49
Provides an output for some of the extended ROM information.
2019-07-20 22:52:57 -04:00
Thomas Harte
b2a6682798
Adds extended ROM information for the ZX80 and '81.
2019-07-20 22:46:49 -04:00
Thomas Harte
f3aac603f8
Adds extended Introduces extended ROM details for the C1540, Electron, Master System and MSX.
2019-07-20 21:30:37 -04:00
Thomas Harte
712cb473f7
Adds extended ROM information for the CPC and ColecoVision.
2019-07-20 17:07:59 -04:00
Thomas Harte
3c68a5ca65
Enhances the amount of ROM information posted by the Apple machines.
2019-07-20 16:08:40 -04:00
Thomas Harte
20670bab2f
Expands information included in ROM load requests.
2019-07-19 22:35:22 -04:00
Thomas Harte
86d709ae01
Merge pull request #626 from TomHarte/MacScreenshot
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Adds a Macintosh screenshot
2019-07-18 20:43:26 -04:00
Thomas Harte
0aba95cc9d
Recondenses image placement.
2019-07-18 20:40:25 -04:00
Thomas Harte
de3c8373fd
Adds a Macintosh screenshot to the rogue's gallery.
2019-07-18 20:37:14 -04:00
Thomas Harte
75ecd4e72d
Adds mention of the Macintosh.
2019-07-17 16:31:24 -04:00
Thomas Harte
56555a4d99
Merge pull request #621 from TomHarte/Mac128k
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Adds preliminary emulation of the 512ke Macintosh.
2019-07-17 16:29:58 -04:00
Thomas Harte
cfad20bb33
Surfaces missing Macintosh types.
2019-07-17 16:02:25 -04:00
Thomas Harte
fa226bb1b9
Seeks to reduce enquiry costs.
2019-07-17 15:09:26 -04:00
Thomas Harte
77333ff9f7
It appears that file checksums are not reliable.
2019-07-17 14:56:50 -04:00
Thomas Harte
b9a34bee51
Substitutes a more efficient inner loop for audio generation.
2019-07-17 14:54:06 -04:00
Thomas Harte
22ee51c12c
Corrects clocking issues around audio, and cuts down queue costs.
2019-07-17 14:41:36 -04:00
Thomas Harte
ee8d853fcb
Ensures you can't get a phase 2 for free with run_for(0).
2019-07-17 14:20:27 -04:00
Thomas Harte
19198ea665
Improves const usage.
2019-07-16 22:13:47 -04:00
Thomas Harte
bcbda4d855
Adds .image as a synonym of .img.
2019-07-16 21:44:59 -04:00
Thomas Harte
79a624e696
Applies more rigorous logic to deciding when to stop parsing.
2019-07-16 18:06:54 -04:00
Thomas Harte
c123ca1054
Slightly improves syntax.
2019-07-16 18:05:58 -04:00
Thomas Harte
9f0f35033d
Introduces sector interleaving.
2019-07-16 18:05:40 -04:00
Thomas Harte
3633285aaa
Ensures a trailing zero bit isn't dropped.
2019-07-16 16:36:00 -04:00
Thomas Harte
cb16790330
Improves qualifiers.
2019-07-15 22:40:45 -04:00
Thomas Harte
67055d8b56
Reduces CheckingWriteProtect costs, negligibly.
2019-07-15 22:39:55 -04:00
Thomas Harte
ca37fd8f4c
Corrects tag preservation.
2019-07-15 17:15:06 -04:00
Thomas Harte
46b98dab70
Bumps up the amount of reserved storage.
...
To avoid a reallocation when reading Mac data.
2019-07-15 17:12:31 -04:00
Thomas Harte
0568996264
Fixes a couple of data arrangement issues on output.
2019-07-15 17:11:58 -04:00
Thomas Harte
7baad61746
Attempts a full implementation of asynchronous write mode.
2019-07-15 17:11:12 -04:00
Thomas Harte
1d1e0d74f8
Corrects and introduces new parts.
2019-07-12 21:37:33 -04:00
Thomas Harte
d53d1c616f
Continues trying to get to write support.
2019-07-12 21:20:05 -04:00
Thomas Harte
5b05a9bc61
Extends Drive to report is_writing and so that writing works as the first action.
2019-07-12 18:53:41 -04:00
Thomas Harte
2c39229b13
Adds has-new-disk flag, allowing mounting of software from the desktop.
2019-07-12 13:17:24 -04:00
Thomas Harte
59b5dfddec
Added logic to allow a second disk to be inserted, at least.
2019-07-11 23:03:02 -04:00
Thomas Harte
b730ac5d5a
Reintroduces 1-second disable implementation.
2019-07-11 23:02:47 -04:00
Thomas Harte
4860d8a7df
Adds ask as a synonym of img.
2019-07-11 22:56:29 -04:00
Thomas Harte
9f0cde3d69
Improves mouse capture behaviour.
2019-07-11 22:56:08 -04:00
Thomas Harte
c8917e677b
Edging towards implementing IWM write support, but mainly tidied up.
2019-07-11 21:42:34 -04:00
Thomas Harte
6c2cc206a6
Takes a first stab at write support for Macintosh disk images.
...
Albeit that the Macintosh itself can't yet write.
2019-07-11 18:09:37 -04:00
Thomas Harte
5a9f3cfc1e
Completes Mac GCR decoding and its associated test.
2019-07-11 17:37:07 -04:00
Thomas Harte
8f28b33342
Starts work on Macintosh GCR decoding.
2019-07-11 16:28:52 -04:00
Thomas Harte
cac97a9663
Devolves drive responsibility.
2019-07-10 22:39:56 -04:00
Thomas Harte
2ccb564a7b
Throws some extra logging into place, to test the IWM changeover.
2019-07-10 21:39:45 -04:00
Thomas Harte
d1d0430fce
Eliminates the SonyDrive class.
2019-07-10 17:38:05 -04:00
Thomas Harte
be251d6b03
Begins substituting the DoubleDensityDrive for the Sony.
2019-07-10 16:24:48 -04:00
Thomas Harte
6cfaf920ee
Added attribution and commentary on rotation speeds.
2019-07-10 16:22:06 -04:00
Thomas Harte
1657f8768c
Transfers and slightly extends drive logic into the drive.
2019-07-10 16:17:51 -04:00
Thomas Harte
c4ab0bb867
Starts sketching out an interface for IWM drives, eliminating a dangling use of unsigned as it goes.
2019-07-10 16:05:59 -04:00
Thomas Harte
886946cc8c
Rejigs time-until-event tracking.
2019-07-09 23:27:27 -04:00
Thomas Harte
ed4ddcfda8
Reduces call/return overhead on Microcycle methods.
2019-07-09 19:55:30 -04:00
Thomas Harte
7886cd63bd
Flattens the Macintosh's perform_bus_operation, for legibility.
2019-07-09 19:49:06 -04:00
Thomas Harte
69b94719a1
Switches to faster bit count logic.
2019-07-09 18:41:20 -04:00
Thomas Harte
b4a3f66773
Restores just-in-time processing of video.
2019-07-09 18:08:07 -04:00
Thomas Harte
ab14433151
Tweaks optimisation level.
2019-07-09 18:07:43 -04:00
Thomas Harte
5078f6fb5c
Marginally reduces MOVE heft.
2019-07-09 18:07:11 -04:00
Thomas Harte
fc6d62aefb
Removes non-functioning workaround.
2019-07-09 16:41:15 -04:00
Thomas Harte
f73bccfec8
Adds a potential workaround for SDL mouse motion.
2019-07-09 16:38:16 -04:00
Thomas Harte
96be1a3f62
Corrects SDL mouse button up/down capture.
2019-07-09 16:32:38 -04:00
Thomas Harte
52e96e3d2a
Documents and extends the Video interface.
...
With the intention of returning it soon to JIT execution.
2019-07-08 22:28:05 -04:00
Thomas Harte
33e2721eb2
Fully embraces forceinline.
2019-07-08 21:11:31 -04:00
Thomas Harte
4bc44666e5
Adds status notes.
2019-07-08 21:11:12 -04:00
Thomas Harte
3d8e4f96c8
Merge branch 'Mac128k' of github.com:TomHarte/CLK into Mac128k
2019-07-08 18:34:45 -04:00
Thomas Harte
94457d81b6
Eliminates redundant and integer-size-troubling AND on ASL.
2019-07-08 18:33:50 -04:00
Thomas Harte
c212bf27db
Eliminates redundant and integer-size-troubling AND on ASL.
2019-07-08 18:28:36 -04:00
Thomas Harte
59b5ee65d4
Adds the Zilog SCC to SConstruct.
2019-07-08 18:18:49 -04:00
Thomas Harte
60cedca97b
Adds cmath in support of ceilf.
2019-07-08 18:14:03 -04:00
Thomas Harte
1a9aa60bf7
Ensures no compiler will think this can exit without returning.
2019-07-08 18:13:23 -04:00
Thomas Harte
6438a5ca1f
Updated SConstruct as per new Apple grouping.
2019-07-08 18:10:39 -04:00
Thomas Harte
3f303511bd
Adds cstring include, in support of memcpy.
2019-07-08 18:06:58 -04:00
Thomas Harte
fb352a8d40
Ensures assert is completely excluded if NDEBUG.
2019-07-08 18:00:37 -04:00
Thomas Harte
ea7899f47d
Updates the SConstruct in obvious ways.
2019-07-08 17:38:43 -04:00
Thomas Harte
fb6da1de4a
Reduces logging temporarily.
2019-07-08 17:37:15 -04:00
Thomas Harte
2651b15db1
Takes a first stab at mouse input support from SDL.
...
There seems to be something odd going on with mouse buttons though; I'm going to test elsewhere.
2019-07-08 17:36:55 -04:00
Thomas Harte
6e7a733c3c
Adds appropriate files to the Mac kiosk build.
2019-07-08 16:57:13 -04:00
Thomas Harte
245e27c893
Solidifies belief that the shift register bit is cleared on read/write.
2019-07-08 16:45:15 -04:00
Thomas Harte
793c2df7ee
Fixes keypad keys.
2019-07-08 16:38:06 -04:00
Thomas Harte
28de629c08
Fixes the 6522 sufficiently to fix keyboard input.
2019-07-08 15:29:34 -04:00
Thomas Harte
210bcaa56d
Introduces an initial shift unit test, and makes it pass.
2019-07-07 22:13:36 -04:00
Thomas Harte
d7329c1bdd
Experiments with a timeout on keyboard interactions.
2019-07-07 14:13:55 -04:00
Thomas Harte
a5f0761a43
Copies in notes for required test functions.
2019-07-07 14:13:00 -04:00
Thomas Harte
dd963d6161
Eliminates call/return cost on WrappedInts.
2019-07-07 14:12:20 -04:00
Thomas Harte
96c0253ee2
Fixes mouse input when a button is pressed; attempts keyboard input.
...
I think the VIA is somehow sending spurious commands.
2019-07-02 21:14:33 -04:00
Thomas Harte
191a7a9386
Reintroduces an empty second drive.
...
This prevents the uninitialised disk error. Which is a clue.
2019-07-02 16:59:00 -04:00
Thomas Harte
387be4a0a6
Ensures mouse button presses propagate correctly.
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Beyond the one that initiates mouse capture, that is.
2019-07-02 16:57:51 -04:00
Thomas Harte
b9c2c42bc0
Switches drives to using floats for time counting.
...
Hopefully to eliminate a lot of unnecessary `Time` work; inaccuracies should still be within tolerable range.
2019-07-02 15:43:03 -04:00
Thomas Harte
fffe6ed2df
Chops the Macintosh down to a single drive to aid in development.
2019-07-02 13:59:30 -04:00
Thomas Harte
c4cbe9476c
Corrects EA selection logic, fixing MOVEP.
2019-07-02 13:54:21 -04:00
Thomas Harte
0a67cc3dab
Goes nuclear on ROXL and ROXR.
2019-07-01 23:05:48 -04:00
Thomas Harte
726e07ed5b
Corrects ASL overflow flag.
2019-07-01 19:46:58 -04:00
Thomas Harte
ebb6313eef
Corrects missing file.
2019-07-01 18:18:46 -04:00
Thomas Harte
11d8f765b2
Corrects divide-by-zero exception length, enables all other DIVS checks.
2019-07-01 15:46:04 -04:00
Thomas Harte
514e57b3e9
Corrects DIVU timing and flags, improves DIVS.
2019-07-01 14:24:32 -04:00
Thomas Harte
d8fb6fb951
Corrects MULU timing.
2019-06-30 22:40:10 -04:00
Thomas Harte
255f0d4b2a
Corrects MULS timing.
2019-06-30 22:33:54 -04:00
Thomas Harte
d30e7504c2
Factors out MOVE tests, and ensures test machine RAM is zero initialised.
2019-06-30 21:43:30 -04:00
Thomas Harte
8d0cd356fd
Corrects TRAP, TRAPV and CHK timing.
2019-06-29 21:25:22 -04:00
Thomas Harte
aff40bf00a
Imports AND tests.
2019-06-29 20:16:10 -04:00
Thomas Harte
eedf7358b4
Imports first part of AND tests.
2019-06-29 16:29:47 -04:00
Thomas Harte
26aebcc167
Imports ROXL and ROXR tests.
...
Confirming the significant deficiencies I suspected.
2019-06-29 15:26:09 -04:00
Thomas Harte
9d420c727e
Factors out rolls and shifts.
2019-06-29 14:12:52 -04:00
Thomas Harte
60fe84ad16
Imports Bcc tests.
2019-06-29 14:07:21 -04:00
Thomas Harte
6a44c682ad
Factors out control flow tests.
2019-06-29 13:47:05 -04:00
Thomas Harte
60df44f0ca
Imports CMPI tests.
2019-06-29 13:40:02 -04:00
Thomas Harte
ac926f5070
Factors BCD out of general arithmetic.
2019-06-29 13:31:24 -04:00
Thomas Harte
6e9a4a48f7
Imports TAS tests.
2019-06-28 22:56:35 -04:00
Thomas Harte
a8894b308a
Splits out arithmetic tests, as so far implemented.
...
Further subdivision may be advisable.
2019-06-28 22:08:32 -04:00
Thomas Harte
7cc91e1bc5
Factors the bitwise tests out of the main bundle, as that pushes up towards 6,000 lines.
2019-06-28 21:58:38 -04:00
Thomas Harte
9eb51f164c
Imports ANDI, ORI and EORI tests.
2019-06-28 21:42:58 -04:00
Thomas Harte
a1c00e9318
Adds BSR tests.
2019-06-28 21:31:41 -04:00
Thomas Harte
17666bc059
Corrects CHK flags.
2019-06-28 19:48:53 -04:00
Thomas Harte
241d29ff7c
Imports SBCD and NBCD tests, and fixes corresponding operation.
2019-06-28 19:39:08 -04:00
Thomas Harte
c5039a4719
Imports ANDI, ORI and EORI to SR tests.
...
Hence corrects supervisor/user privileges for SR/CCR.
2019-06-28 15:05:46 -04:00
Thomas Harte
fd604048db
Imports SUBX tests.
2019-06-28 14:30:26 -04:00
Thomas Harte
6a77ed1e07
Imports SUBI test.
2019-06-28 13:53:53 -04:00
Thomas Harte
9e38815ec4
Imports SUBQ tests.
2019-06-28 13:48:02 -04:00
Thomas Harte
86c325c4ec
Imports MOVEA tests.
2019-06-28 13:41:37 -04:00
Thomas Harte
bfcc6cf12c
Imports MULU tests.
...
Timing is wrong for now.
2019-06-28 13:33:41 -04:00
Thomas Harte
8ba8cf7c23
Imports TST tests.
2019-06-28 13:17:21 -04:00
Thomas Harte
6c588a1510
Makes some further random swings at tracking the startup procedure.
2019-06-28 13:03:47 -04:00
Thomas Harte
651fd9c4a5
Imports EOR tests.
2019-06-28 13:03:27 -04:00
Thomas Harte
5d0db2198c
Imports BRA, EORI CCR and ORI CCR tests, extends PEA tests.
2019-06-27 23:05:00 -04:00
Thomas Harte
d81053ea38
Invents some additional PEA tests, and further fixes PEA.
2019-06-27 17:59:03 -04:00
Thomas Harte
8d39c3bc98
Takes a shot at fixing PEA for A7-relative addresses.
...
Unit tests required. Tomorrow.
2019-06-26 23:24:54 -04:00
Thomas Harte
da351a3e32
Imports MOVEQ tests.
2019-06-26 22:36:48 -04:00
Thomas Harte
c0591090f5
Imports DIVU tests.
2019-06-26 22:25:48 -04:00
Thomas Harte
538aecb46e
Imports CMP tests, and fixes CMP.l timing.
2019-06-26 22:02:04 -04:00
Thomas Harte
dbdbea85c2
Imports CMPA tests, and fixes CMPA.w.
2019-06-26 21:42:48 -04:00
Thomas Harte
ba2224dd06
Imports NEGX tests and thereby fixes NEGX's zero flag.
2019-06-26 19:39:04 -04:00
Thomas Harte
44e2aa9183
Imports MOVEP tests; code corrections to come.
2019-06-26 19:01:09 -04:00
Thomas Harte
202bff70fe
Imports BCLR and BTST tests.
2019-06-26 17:51:07 -04:00
Thomas Harte
26c0cd7f7c
Imports ADDI tests.
2019-06-26 16:42:23 -04:00
Thomas Harte
cb76301fbe
Imports BCHG tests.
2019-06-26 16:33:23 -04:00
Thomas Harte
8bfa12edf1
Adds lengths to ADD tests, imports ANDI ,CCR and MOVE to CCR.
2019-06-26 16:12:27 -04:00
Thomas Harte
7daa969a5a
Imports SUBA tests.
2019-06-26 15:47:59 -04:00
Thomas Harte
4aeb60100d
Completes import of MOVEM tests.
2019-06-26 15:31:21 -04:00
Thomas Harte
e2c7aaac5a
Imports CLR tests.
2019-06-25 22:47:30 -04:00
Thomas Harte
6ff661c30d
Imports OR tests.
2019-06-25 22:34:04 -04:00
Thomas Harte
79066f8628
Imports NOT tests, fixes NOT overflow and carry flags.
2019-06-25 22:18:11 -04:00
Thomas Harte
2c813a2692
Imports CMPM tests and fixes CMPM.bw source/destination order.
2019-06-25 21:46:01 -04:00
Thomas Harte
d2cb595b83
Proactively attempts to fix CMPM PostInc addressing.
2019-06-25 21:24:03 -04:00
Thomas Harte
cc4abcb00a
Imports ADDQ tests.
2019-06-25 21:19:04 -04:00
Thomas Harte
c1ca85987f
Incorporates MOVE to SR test.
2019-06-25 19:30:51 -04:00
Thomas Harte
ecb5a0b8cc
Incorporates ADDX tests and fixes ADDX PreDec.
2019-06-25 19:18:07 -04:00
Thomas Harte
e12e8fc616
Incorporates ASR tests, and fixes ASR (xxx).w.
...
... which was re-injecting the wrong bit to preserve sign.
2019-06-25 18:44:31 -04:00
Thomas Harte
1fbbf32cd2
Adds ASL tests, and corrects ASL (xxx).w.
...
Overflow is wrong on other ASLs though, I think.
2019-06-25 18:09:01 -04:00
Thomas Harte
31edb15369
Reduces 68000 startup costs a little further.
2019-06-25 17:41:13 -04:00
Thomas Harte
d7883d18d4
Imports CHK tests.
...
Proving that I need to do some research on CHK's flags.
2019-06-25 14:55:03 -04:00
Thomas Harte
40100773d3
Imports LSR tests.
2019-06-25 13:57:42 -04:00
Thomas Harte
4048ed3a33
Imports ROR tests.
2019-06-25 13:16:44 -04:00
Thomas Harte
11f2d3cea7
Imports EXT tests.
2019-06-24 22:12:29 -04:00
Thomas Harte
aa656a39b8
Imports SUB tests.
2019-06-24 22:00:37 -04:00
Thomas Harte
e830d23533
Incorporates TRAPV tests.
2019-06-24 21:21:35 -04:00
Thomas Harte
9a666fb8cc
Imports NEG tests and fixes NEG.l Dn timing.
2019-06-24 19:43:30 -04:00
Thomas Harte
0e208ed432
Fixes cycle counting in the test machine.
2019-06-24 17:55:09 -04:00
Thomas Harte
c8b769de8a
Completes import of LSL tests and fixes various LSL issues.
...
Including LSL (xxx).w actually being LSR, and the carry flag generally being questionable.
2019-06-24 17:45:38 -04:00
Thomas Harte
c447655047
Resolves assumption that shifts greater than the bit count of the relevant int are well-defined in C.
2019-06-24 16:51:43 -04:00
Thomas Harte
3ec9a1d869
Incorporates JMP tests, fixes JSR (xxx).l timing.
2019-06-24 15:36:33 -04:00
Thomas Harte
d326886852
Completes BSET tests.
2019-06-24 14:04:08 -04:00
Thomas Harte
faef917cbd
Improves resizeable microcycle test.
2019-06-24 10:55:22 -04:00
Thomas Harte
d27ba90c07
Attempts to introduce more rigour to variable-length instruction handling.
2019-06-24 10:43:28 -04:00
Thomas Harte
db4ca746e3
Introduces BSET tests, fixes BSET timing.
2019-06-23 22:53:37 -04:00
Thomas Harte
d50fbfb506
Imports EXG and PEA tests, and fixes EXG timing.
2019-06-23 22:21:25 -04:00
Thomas Harte
5d283a9f1f
Imports LEA tests.
2019-06-23 21:48:47 -04:00
Thomas Harte
86fdc75feb
Incorporates RTR test, adding a ProcessorState helper.
2019-06-23 18:37:32 -04:00
Thomas Harte
b63231523a
Completes import of ROL tests.
2019-06-23 17:33:12 -04:00
Thomas Harte
70e296674d
Starts import of ROL tests.
...
Including time tests, this time.
2019-06-22 22:42:57 -04:00
Thomas Harte
5089fcd2f6
Makes a slightly futile attempt to resolve Heisen-failures.
2019-06-22 18:52:06 -04:00
Thomas Harte
df2ce8ca6f
Imports MOVE tests.
2019-06-21 22:03:27 -04:00
Thomas Harte
7e209353bb
Imports UNLINK and NOP tests.
2019-06-21 21:29:02 -04:00
Thomas Harte
c2806a94e2
Imports further MOVEM tests.
2019-06-21 21:20:13 -04:00
Thomas Harte
d428120776
Completes import of LINK tests.
2019-06-21 18:33:44 -04:00
Thomas Harte
8c8493bc9d
Ensures proper loading of the SP at reset.
2019-06-21 18:20:26 -04:00
Thomas Harte
6b996ae57d
Improves test machine and incorporates a first test of LINK.
2019-06-21 18:20:13 -04:00
Thomas Harte
ccfe1b13cb
Imports DIVS, MULS and MOVE from SR tests.
...
Not all passing.
2019-06-21 16:03:11 -04:00
Thomas Harte
0c1c10bc66
Introduces a test that proves that DIVS' attempt to set proper timing isn't working.
2019-06-20 19:29:02 -04:00
Thomas Harte
fafd1801fe
Introduces first DIVS test, and associated fixes.
2019-06-20 19:02:03 -04:00
Thomas Harte
bcf6f665b8
Simplifies and completes DBcc tests.
...
Subject to omitting a few that look to me like duplicates.
2019-06-20 17:19:25 -04:00
Thomas Harte
bd069490b5
Incorporates approximately half of the DBcc tests.
2019-06-20 16:29:32 -04:00
Thomas Harte
79d8d27b4c
Reintroduces use of locations_by_bus_step_ to decrease 68000 construction time.
2019-06-20 15:10:11 -04:00
Thomas Harte
624b0b6372
Adds Scc tests. No implementation fixes required.
2019-06-19 21:42:54 -04:00
Thomas Harte
7976cf5b3c
Adds ADDA tests. All passing without 68000 changes.
2019-06-19 21:31:14 -04:00
Thomas Harte
440f52c943
Incorporates TRAP test.
2019-06-19 21:18:30 -04:00
Thomas Harte
47b1218a68
Adds a couple of the one-shots: SWAP, MOVE USP.
2019-06-19 19:10:36 -04:00
Thomas Harte
91ced056d2
Adds tests for ADD. No failures.
2019-06-19 18:56:21 -04:00
Thomas Harte
8dace34e63
Imports third-party tests for ABCD, and thereby fixes ABCD.
2019-06-19 18:13:06 -04:00
Thomas Harte
8182b0363f
Adds enum to help with status decoding.
2019-06-19 17:01:49 -04:00
Thomas Harte
c5b036fedf
Ensures aborted decodes don't overwrite prior correct ones.
2019-06-19 17:00:44 -04:00
Thomas Harte
e26ddd0ed5
Corrects address fetches for CMPI.l #, (xxx).w.
2019-06-19 13:52:56 -04:00
Thomas Harte
ca83431e54
Fixed: Scc is a byte operation.
...
It was, until now, post-incrementing and pre-decrementing registers other than A7 incorrectly.
2019-06-19 13:15:12 -04:00
Thomas Harte
68a3e5a739
Renamed DiskCopy42 to MacintoshIMG, now that it's not just DiskCopy 4.2 files.
2019-06-18 14:32:58 -04:00
Thomas Harte
b98f10cb45
Substitutes working GCR test.
2019-06-18 14:24:55 -04:00
Thomas Harte
9730800b6a
Adds support for raw sector dumps.
2019-06-18 14:14:25 -04:00
Thomas Harte
506276a2bd
Corrected: use format tag as intended.
2019-06-18 14:04:28 -04:00
Thomas Harte
00c32e4b59
Further miscellaneous changes to debug logging. All temporary.
2019-06-18 10:34:31 -04:00
Thomas Harte
df56e6fe53
Fixed: the sector number also goes into sector bodies.
...
Also the checksum is written in the other order, and the final byte of data isn't output.
2019-06-18 10:34:10 -04:00
Thomas Harte
756641e837
Fixed: tags go first, then data.
2019-06-16 22:00:12 -04:00
Thomas Harte
05c2854dbc
Makes at least some attempt at producing real disk tracks.
2019-06-16 21:17:24 -04:00
Thomas Harte
5c8aacdc17
Fixes the more obvious issues with GCR encoding: byte order, top bit selection.
2019-06-16 17:17:24 -04:00
Thomas Harte
745a5ab749
Introduces failing test of Macintosh GCR data encoding.
2019-06-16 16:53:03 -04:00
Thomas Harte
fe0dc4df88
Starts building out some tests for Apple GCR encoding.
2019-06-15 22:48:24 -04:00
Thomas Harte
33f2664fe9
Makes a first attempt at Macintosh GCR encoding.
2019-06-15 22:29:02 -04:00
Thomas Harte
a17e47fa43
Apple's GCR header varies between the Mac and the Apple II.
2019-06-15 16:32:56 -04:00
Thomas Harte
877b46d2c1
Advances IWM/drive emulation very close to the point of 'Welcome to Macintosh'.
2019-06-15 16:08:54 -04:00
Thomas Harte
cc7226ae9f
Starts trying to get a bit more rigorous about collected meanings.
2019-06-13 22:48:10 -04:00
Thomas Harte
bde975a3b9
Possibly mights the tiniest bit of headway with 'the IWM'.
...
I'm now pretty sure that my 3.5" drive, which for now is implemented in the IWM (yuck) is just responding to queries incorrectly.
2019-06-13 22:38:09 -04:00
Thomas Harte
f6f9024631
Corrects Macintosh aspect ratio (and framing).
2019-06-13 18:41:38 -04:00
Thomas Harte
39aae34323
Avoids multiple calls to -[NSCursor hide] and -unhide.
...
Those are reference counted.
2019-06-13 13:39:35 -04:00
Thomas Harte
5630141ad7
Ensures randomised memory contents at startup.
2019-06-13 13:35:16 -04:00
Thomas Harte
535747e3f2
Restores single-line logging format.
2019-06-13 13:35:03 -04:00
Thomas Harte
59a94943aa
Resolves final set of build warnings.
2019-06-13 10:55:29 -04:00
Thomas Harte
bf4889f238
Reduces warnings to 6.
2019-06-13 10:43:00 -04:00
Thomas Harte
7cc5afd798
Eliminates another couple of implicit type conversion warnings.
2019-06-13 10:30:26 -04:00
Thomas Harte
11ab021672
Further reduces implicit conversion warnings, to 17.
2019-06-13 10:27:49 -04:00
Thomas Harte
feafd4bdae
Eliminates further type conversion warnings.
2019-06-13 10:20:17 -04:00
Thomas Harte
d6150645c0
By hook or by crook, mouse input now works.
2019-06-12 22:19:25 -04:00
Thomas Harte
ccd2cb44a2
Fills in enough of the SCC to allow completion of the Macintosh side of that relationship.
2019-06-12 17:51:50 -04:00
Thomas Harte
ec5701459c
Makes various temporary logging changes.
2019-06-11 19:54:07 -04:00
Thomas Harte
ad8b68c998
Switches to a proper form of zero-upon-read data.
...
Not that it's necessarily correct.
2019-06-11 19:53:51 -04:00
Thomas Harte
c8066b01b6
Restores attempt at proper audio behaviour.
2019-06-11 19:53:22 -04:00
Thomas Harte
ebd59f4dd3
Performs the trivial part of wiring up the Macintosh mouse.
...
SCC still to go.
2019-06-11 19:52:37 -04:00
Thomas Harte
109953ef49
Ensures proper routing of mouse events from Cocoa.
2019-06-11 18:41:41 -04:00
Thomas Harte
124c7bcbb0
Makes the Macintosh a mouse machine, and makes mouse machines detectable.
2019-06-11 18:21:56 -04:00
Thomas Harte
a0321aa6ff
Starts sketching out an emulator interface for mice.
2019-06-11 17:47:24 -04:00
Thomas Harte
567feaac10
Adds a proper shout out for releasing the mouse.
2019-06-11 16:35:04 -04:00
Thomas Harte
15c38e2f15
Adds the option for mouse capture.
2019-06-11 16:30:53 -04:00
Thomas Harte
3c075e9542
Switches drives 0 and 1.
2019-06-10 14:58:39 -04:00
Thomas Harte
9230969f43
Corrects enough of the 6522 and Keyboard to get an initial command seemingly working.
2019-06-10 09:28:27 -04:00
Thomas Harte
0e16c67805
Improves shift register connection, towards having the keyboard function properly.
...
It now seems not to receive a command terminator, but is at least getting a command.
2019-06-08 23:04:55 -04:00
Thomas Harte
697e094a4e
Sketches out the absolute basics of an SCC interface.
2019-06-08 18:47:11 -04:00
Thomas Harte
50d37798a2
Eradicates magic constants.
2019-06-06 21:37:43 -04:00
Thomas Harte
e9d0676e75
Fiddles further with the tachometer.
2019-06-06 21:36:19 -04:00
Thomas Harte
7591906777
Numerous IWM fixes: the machine now seems to be trying to measure the tachometer.
2019-06-06 18:32:11 -04:00
Thomas Harte
08671ed69c
Fixes setting of a Time to a float.
2019-06-05 14:43:34 -04:00
Thomas Harte
511d292e73
Ensures gain noise is forgotten upon assumption of a new track.
2019-06-05 14:43:17 -04:00
Thomas Harte
a413ae11cb
Makes some sort of first attempt at having the IWM read.
2019-06-04 22:13:00 -04:00
Thomas Harte
833258f3d7
Sets things up to allow variable rotation rates, and especially Sony 800kb-style self-selecting rates.
2019-06-04 21:41:54 -04:00
Thomas Harte
b8a1553368
Adds putative support for PlusToo-style BIN files.
...
Albeit a bit of a guess, since it's not intended to be an emulator file format.
2019-06-04 21:41:09 -04:00
Thomas Harte
058fe3e986
Fixes some other low-hanging warning fruit.
2019-06-04 16:47:10 -04:00
Thomas Harte
51ee83a427
Resolves a further 11 conversion errors.
2019-06-04 16:34:45 -04:00
Thomas Harte
5b21da7874
Reduces number of warnings to 70.
2019-06-04 16:27:09 -04:00
Thomas Harte
bd7f00bd9c
Resolves a further handful of implicit type conversion warnings.
2019-06-04 15:43:44 -04:00
Thomas Harte
517cca251f
Corrected: the repository shouldn't default to a Release build.
2019-06-04 15:41:36 -04:00
Thomas Harte
1033abd9fe
Starts making some space for Macintosh-style GCR encoding.
2019-06-04 15:41:15 -04:00
Thomas Harte
113d022741
Merge branch 'master' into Mac128k
2019-06-03 21:58:22 -04:00
Thomas Harte
299a7b99ae
Merge pull request #624 from TomHarte/BookendCrash
...
Permits end_data only after a begin_data.
2019-06-03 21:57:59 -04:00
Thomas Harte
66540ff86f
Permits end_data only after a begin_data.
2019-06-03 21:56:53 -04:00
Thomas Harte
8557558bd8
Mildly improves investigatory reporting.
2019-06-03 21:51:45 -04:00
Thomas Harte
376cf08c71
Merge branch 'master' into Mac128k
2019-06-03 15:59:33 -04:00
Thomas Harte
83e5e650d2
Merge pull request #623 from TomHarte/SharpEdges
...
Disallows smaller buffer use for 'sharp' displays and tightens sampling window.
2019-06-03 15:59:05 -04:00
Thomas Harte
b860ba2ee3
Disallows smaller buffer use for 'sharp' displays and tightens sampling window.
2019-06-03 15:58:14 -04:00
Thomas Harte
661fe1e649
Disables logging, for now.
2019-06-03 15:57:53 -04:00
Thomas Harte
5b8375f0a0
Disallows smaller buffer use for 'sharp' displays and tightens sampling window.
2019-06-03 15:57:31 -04:00
Thomas Harte
abe55fe950
Adds Timer 1 toggling of PB7.
2019-06-03 15:39:20 -04:00
Thomas Harte
4d4ddded6d
Fixes register-relative JMP and JSR.
2019-06-03 15:29:50 -04:00
Thomas Harte
1328708a70
Switches to testing against the Mac Plus ROM.
...
Immediately uncovering an issue with JMP.
2019-06-03 14:54:18 -04:00
Thomas Harte
85298319fa
Expands towards supporting multiple Macintosh models.
...
To provide another variable to help with bug isolation.
2019-06-03 14:50:36 -04:00
Thomas Harte
881feb1bd3
Adds preliminary parsing of the Disk Copy 4.2 format.
2019-06-02 13:39:25 -04:00
Thomas Harte
3e9fa63799
Adds a receiver for drive-motor control bytes.
...
My new belief is that I'm either reading the buffer from the wrong place, or the 68000 isn't filling it for some reason.
2019-06-01 19:31:32 -04:00
Thomas Harte
da2b190288
Stores expected bit length.
2019-06-01 19:08:29 -04:00
Thomas Harte
48d837c636
Attempts to respond more sensibly to various queries.
...
Including adding a 1-second delay on motor off.
2019-06-01 18:43:47 -04:00
Thomas Harte
983407896c
Ensures consistent audio pipeline.
2019-06-01 17:29:57 -04:00
Thomas Harte
5c08bb810e
In theory provides a full implementation of audio.
...
Albeit seemingly ineffective.
2019-06-01 15:44:29 -04:00
Thomas Harte
17635da812
Pushes Mac audio further towards being able to function.
2019-06-01 15:18:27 -04:00
Thomas Harte
6d985866ee
All proper inputs are now provided to the audio generator.
...
Hopefully. The next job is to generate audio. If that sounds correct, then the disk motor speed question can be tackled.
2019-06-01 15:03:15 -04:00
Thomas Harte
723137c0d4
With some time additions to the 6522, starts wiring in Macintosh audio.
...
The audio buffer is also the disk motor buffer, so this is preparatory to further disk work.
2019-06-01 14:39:40 -04:00
Thomas Harte
938928865d
Merge branch 'master' into Mac128k
2019-05-30 22:29:56 -04:00
Thomas Harte
d80b0cbf90
Merge pull request #622 from TomHarte/SConstructUTF
...
Adds recommended fix for 0xc3 in position 12 error.
2019-05-30 22:25:57 -04:00
Thomas Harte
e88ef30ce6
Adds recommended fix for 0xc3 in position 12 error.
2019-05-30 22:20:15 -04:00
Thomas Harte
4197c6f149
Attempts to make some further semantic sense of the various IWM controls.
2019-05-30 22:17:49 -04:00
Thomas Harte
035f07877c
Reduces conversions to vector.
2019-05-30 12:08:35 -04:00
Thomas Harte
4632be4fe5
Wires up the final IWM signal, SEL, preparatory to an implementation.
2019-05-30 12:08:00 -04:00
Thomas Harte
b3d2b4cd37
Fixes the interrupt return address.
2019-05-29 20:27:46 -04:00
Thomas Harte
c86fe9ada9
Ensures replace_write_values works in release builds.
2019-05-29 19:00:53 -04:00
Thomas Harte
ecf93b7822
Eliminates some type conversion warnings.
2019-05-29 14:56:50 -04:00
Thomas Harte
541b75ee6e
Further fixes PEA, and OR/AND/EOR Dn, (An).
2019-05-29 14:37:15 -04:00
Thomas Harte
77b08febdb
Corrects PEA and adds an additional debugging aid.
2019-05-29 12:47:17 -04:00
Thomas Harte
fcda376f33
Removes three further type conversion warnings.
2019-05-28 21:56:49 -04:00
Thomas Harte
0848fc7e03
Ensures the Mac uses auto vectored interrupts.
2019-05-28 16:24:41 -04:00
Thomas Harte
3bb8d6717f
Ensures A7 is correct at end of an UNLINK.
2019-05-28 16:02:42 -04:00
Thomas Harte
5e2496d59c
Simplifies and corrects MOVE logic.
2019-05-28 15:17:03 -04:00
Thomas Harte
c52da9d802
Adds some logging preparatory to a MOVE change.
2019-05-28 15:05:42 -04:00
Thomas Harte
1d3dde32f2
Ensures final byte of data can be accessed.
2019-05-09 07:24:26 -04:00
Thomas Harte
0b999ce0e4
Attempts to fix register-relative JSRs.
2019-05-09 06:43:07 -04:00
Thomas Harte
b04bd7069d
Corrects Scc and DBcc (xxx).l and (xxx).w.
2019-05-09 06:28:55 -04:00
Thomas Harte
249b0fbb32
Corrects PC on stack after an illegal instruction.
...
Also fixed LOG_TRACE functionality.
2019-05-08 22:36:25 -04:00
Thomas Harte
41740fb45e
Implements video position feedback.
...
At a substantial performance cost for now, but I'll worry about that once things are working.
2019-05-08 16:54:19 -04:00
Thomas Harte
0ad88508f7
Removes ROM mirroring above $600000.
2019-05-08 15:07:03 -04:00
Thomas Harte
8293b18278
Adds a TODO on what I think might be an incorrect implementation?
2019-05-08 15:06:40 -04:00
Thomas Harte
2ba0364850
Adds the shift register interrupt.
2019-05-08 15:02:07 -04:00
Thomas Harte
8b72043f33
Ensures no uninitialised variables.
2019-05-08 14:54:54 -04:00
Thomas Harte
2e7bc0b98a
Attempts the shift register.
2019-05-08 14:54:40 -04:00
Thomas Harte
f0f9722ca6
Takes a first crack at the keyboard's serial protocol.
...
Albeit that without a working shift register in the VIA, this shouldn't really work yet.
2019-05-08 14:20:28 -04:00
Thomas Harte
b5ef88902b
Edges further towards a functioning keyboard.
2019-05-08 13:58:52 -04:00
Thomas Harte
8278809383
Attempts to get more rigorous on communicating outward control line changes.
2019-05-08 13:33:22 -04:00
Thomas Harte
4367459cf2
Takes a first go at handshake and pulse modes.
2019-05-08 12:48:29 -04:00
Thomas Harte
254132b83d
Eliminates 6522Base in pursuit of working handshake modes.
...
Specifically: this means that the places from which the BusHandler may be called are more numerous.
2019-05-08 12:35:17 -04:00
Thomas Harte
7b466e6d0a
Begins work on a functioning keyboard.
2019-05-08 12:34:26 -04:00
Thomas Harte
7e6d4f5a3e
Adds emulation of the real-time clock.
2019-05-08 00:12:19 -04:00
Thomas Harte
ce099a297a
Eliminates RAM writes in ROM area.
...
I no longer think that logic is correct.
2019-05-07 17:16:22 -04:00
Thomas Harte
949c848815
Broadens address decoding.
...
To no obvious change in output.
2019-05-06 22:57:29 -04:00
Thomas Harte
9bf9b9ea8c
Ensures unmapped peripherals return a consistent value.
2019-05-06 21:32:10 -04:00
Thomas Harte
d8ed8b66f3
Improves carry/extend for ROXL and ROXR.
2019-05-06 21:14:16 -04:00
Thomas Harte
a131d39451
I now believe only the 6522 is on the synchronous bus.
2019-05-06 14:10:13 -04:00
Thomas Harte
b540f58457
Sets a more appropriate display type.
2019-05-05 23:22:05 -04:00
Thomas Harte
4f5a38b5c5
Adds support for the alternate video buffer.
2019-05-05 23:05:24 -04:00
Thomas Harte
cefc3af08b
Corrects RAM read decoding when the ROM overlay is enabled.
2019-05-05 22:48:40 -04:00
Thomas Harte
e6ed50383c
Corrects PEA and MOVE.l (An)[+], (xxx).L; also adds an extra test that caught the latter.
2019-05-05 22:47:54 -04:00
Thomas Harte
96facc103a
Adds an IWM shim and corrects graphics output.
...
... now that there is some.
2019-05-05 21:55:34 -04:00
Thomas Harte
407bbfb379
Pretending the Disk II is an IWM doesn't seem to achieve much.
2019-05-05 18:12:25 -04:00
Thomas Harte
a99ebda513
Takes a first shot at (inverted) Mac video output.
2019-05-04 22:27:58 -04:00
Thomas Harte
537b604fc9
It looks like writes should always go to RAM.
...
Now I see the screen buffer being filled with `0xffff`s, along with what is probably disk motor control data.
2019-05-04 17:29:30 -04:00
Thomas Harte
98bc570bf7
Adds further boilerplate around VIA and IWM decoding.
2019-05-04 17:12:26 -04:00
Thomas Harte
181b77c490
Adds decoding of IWM accesses and respect for the ROM overlay bit.
2019-05-04 16:38:01 -04:00
Thomas Harte
bc9eb82e6f
Adds in VIA access decoding, and a note to self on video.
...
The Mac now proceeds to try to talk to the IWM.
2019-05-04 14:23:37 -04:00
Thomas Harte
29fc024ecd
Starts negotiating the Macintosh memory map.
2019-05-04 12:33:27 -04:00
Thomas Harte
c1695d0910
Adds various notes to self.
2019-05-03 23:55:28 -04:00
Thomas Harte
6d6a4e79c9
Adds the absolute basics to include a 6522 in the Macintosh.
...
Not yet wired to anything.
2019-05-03 23:40:22 -04:00
Thomas Harte
417a3e1540
Adds missing call to flush.
2019-05-03 23:31:12 -04:00
Thomas Harte
fa8c804d47
Makes explicit a few implicit type conversions.
...
There's plenty more down this well, alas.
2019-05-03 23:26:03 -04:00
Thomas Harte
68392ce6f5
Adds enough of a concept of Mac video to get a properly initialised display.
...
Completely empty at present, naturally. Also this is the very first time I've run my 68000 at live speed. From just one data point, it's not terrible. Phew!
2019-05-03 23:25:42 -04:00
Thomas Harte
6873f62ad8
Ensures that the Mac now retains its ROM properly.
2019-05-03 22:39:09 -04:00
Thomas Harte
5f385e15f6
Adds the bare bones necessary to be able to create a Macintosh from File -> New... .
2019-05-03 22:16:07 -04:00
Thomas Harte
8c5d37b6ee
Refactors the AppleII into a sub-namespace to make room for other Apple machines.
2019-05-03 18:14:10 -04:00
Thomas Harte
9c3c2192dd
Merge pull request #611 from TomHarte/68000
...
Adds an Initial Emulation of the 68000
2019-05-03 15:08:24 -04:00
Thomas Harte
4f9f73ca81
Corrects tests affected by change in run_for_instructions semantics and new program base address.
2019-05-03 15:05:14 -04:00
Thomas Harte
2c9a1f7b16
Restores vector.
2019-05-03 14:50:07 -04:00
Thomas Harte
0ea4c1ac80
Evicts #includes from my namespace.
2019-05-03 14:48:39 -04:00
Thomas Harte
a873ec97eb
Also previously missing: vector.h.
2019-05-03 14:43:31 -04:00
Thomas Harte
cc8a65780e
Adds further missing includes.
2019-05-03 14:42:36 -04:00
Thomas Harte
c117deb43b
Introduces a couple of missing #includes.
2019-05-03 14:37:05 -04:00
Thomas Harte
ae31d45c88
Introduces the 68000 to SConstruct.
2019-05-03 14:31:09 -04:00
Thomas Harte
a0eb20ff1f
Tweaks divide-by-zero timing.
2019-05-03 14:29:36 -04:00
Thomas Harte
34fe9981e4
Added necessary mea culpas.
2019-05-03 14:25:25 -04:00
Thomas Harte
291e91375f
Takes a shot at the synchronous bus.
2019-05-03 14:20:59 -04:00
Thomas Harte
857f74b320
Fixed: the accepted interrupt level now appears on the bus.
2019-05-02 15:47:12 -04:00
Thomas Harte
1d9608efc7
Alters the order of interrupt bus activity, to bring it into line with a real 68000.
2019-05-02 15:25:43 -04:00
Thomas Harte
93616a4903
Completes test of a vectored interrupt.
...
Correcting issues uncovered.
2019-05-02 00:00:09 -04:00
Thomas Harte
bb07206c55
Corrects internet response to work as currently implemented.
...
Also makes corrections to the bus error and address error exceptions.
2019-05-01 21:59:06 -04:00
Thomas Harte
2e5c0811e7
Makes some effort at getting into interrupt processing.
2019-05-01 15:26:36 -04:00
Thomas Harte
f6ac407e4d
Takes further steps towards supporting interrupts.
...
Specifically:
* introduces the necessary bus signalling; and
* adds corresponding functional steps.
Still to figure out: getting into and out of an interrupt cycle.
2019-05-01 15:19:24 -04:00
Thomas Harte
078c3135df
The 5/3 split of microcycles appears not accurately to model when lines are tested.
...
Therefore I've reverted to a more normative 4:4 form.
2019-04-30 22:09:13 -04:00
Thomas Harte
92568c90c8
Adds support for HALT as an input, and puts some effort into how to calculate E.
2019-04-30 22:07:48 -04:00
Thomas Harte
f1879c5fbc
Corrects interrupt level test within STOP.
2019-04-30 19:32:35 -04:00
Thomas Harte
31bb770fdd
Implement STOPpages, waits for DTack, and bus and address error exceptions.
2019-04-30 19:24:22 -04:00
Thomas Harte
e430f2658f
Adds a test and by that means fixes divide-by-zero exception return addresses.
2019-04-29 23:09:50 -04:00
Thomas Harte
3060175ff5
Eliminates constructions of std::tuple for performance reasons.
...
Specifically: reduces 68000 construction time from 10+ seconds to more like 2.8.
2019-04-29 22:43:15 -04:00
Thomas Harte
eb4233e2fd
Joins some commonalities, shaving about 150 lines of code.
2019-04-29 22:37:23 -04:00
Thomas Harte
6b4c656849
Reverses order of instruction instantiation, reducing total bus step heft by about 11%.
...
... since that means inserting more complicated instructions before simpler ones in general, making subset finds more likely.
2019-04-29 22:20:18 -04:00
Thomas Harte
1b8fada6aa
Restores accidentally-cropped functionality.
2019-04-29 22:10:00 -04:00
Thomas Harte
7332c64964
Improves testing of function as distinct from timing.
2019-04-29 22:08:37 -04:00
Thomas Harte
977f9ee831
Takes a run at divide-by-zero exceptions and starts looking towards ways to improve startup time.
2019-04-29 22:08:16 -04:00
Thomas Harte
16fb3b49a5
It leads to a TODO, but implemented decoding and initial setup of STOPpages.
2019-04-29 19:30:00 -04:00
Thomas Harte
3da1b3bf9b
Introduces storage for various bus inputs.
2019-04-29 19:22:05 -04:00
Thomas Harte
bc00856c05
Removed TODO; it appears this is just the standard stack frame.
2019-04-29 19:09:20 -04:00
Thomas Harte
52e3dece81
Improves exposition.
2019-04-29 19:07:14 -04:00
Thomas Harte
2c1d8fa18a
Adds a check for instruction privilege violation, albeit that I think I need different bus steps.
2019-04-29 19:06:10 -04:00
Thomas Harte
3e34ae67f6
Implements support for the trace flag.
2019-04-29 19:02:59 -04:00
Thomas Harte
d6e16d0042
Adds a test of TOS 1.00, as far as it goes without meaningful hardware.
2019-04-29 18:04:57 -04:00
Thomas Harte
8e02d29ae6
Trims test to length of trace capture.
2019-04-29 17:56:49 -04:00
Thomas Harte
ceebecec8d
Corrects zero and negative flags for EXT.w.
2019-04-29 17:54:33 -04:00
Thomas Harte
05d1eda422
Fixes crossed-over decoding of EORI and ORI.
2019-04-29 17:45:52 -04:00
Thomas Harte
31f318ad43
Fixes MOVE.bw #, (xxx).w.
2019-04-29 17:41:46 -04:00
Thomas Harte
270f46e147
Normalises CMPl.
2019-04-29 17:27:56 -04:00
Thomas Harte
c0e9c37cc7
Improves memory map model, as far as it goes.
2019-04-29 17:27:44 -04:00
Thomas Harte
8564945713
Corrects vector nomination for unrecognised opcodes.
2019-04-29 17:10:33 -04:00
Thomas Harte
7bd7f3fb73
Sign-extends (xxx).w addresses.
2019-04-29 16:55:43 -04:00
Thomas Harte
5b5bfc8445
Applies trace testing to EmuTOS.
2019-04-29 16:55:21 -04:00
Thomas Harte
c466b6f9e7
Factors out the [unit testing] stuff of being a trace-checking 68000 bus handler.
2019-04-29 16:11:01 -04:00
Thomas Harte
407643c575
Tweaks test length slightly to ensure this doesn't run beyond the final line's end.
2019-04-29 15:40:17 -04:00
Thomas Harte
d9071ee9f1
Starts sketching out the asynchronous bus.
2019-04-29 13:45:53 -04:00
Thomas Harte
97e118abfa
Corrects accidental exclusion of MOVE.bw (xxx).w, [(xxx).w/(xxx).l].
2019-04-28 23:25:46 -04:00
Thomas Harte
412f091d76
Implements a missing form of BTST.
2019-04-28 23:20:50 -04:00
Thomas Harte
d9278e9827
Attempts to complete the list of things I can't disassemble.
...
Mysteries to be solved here, definitely. But: 13 missing opcodes remaining.
2019-04-28 23:11:49 -04:00
Thomas Harte
ca1f669e64
Implements MOVEP.
...
371 is now the alleged number of missing opcodes. But I'd dare imagine it's more like three or four.
2019-04-28 22:52:54 -04:00
Thomas Harte
0298b1b3b7
Implements LINK and UNLINK.
...
Also starts excluding opcodes that I can't determine the mapping of from the list of those tested against.
Due to those two things together, the latter incomplete: 627 opcodes outstanding. But only STOP and MOVEP remain on my list of things to implement prior to exceptions.
2019-04-28 17:12:31 -04:00
Thomas Harte
4b1324de77
Takes a run at TRAPV.
...
... to leave 1466 as the unimplemented count.
2019-04-28 15:52:58 -04:00
Thomas Harte
8e8dce9bec
Attempts an implementation of CHK.
...
1467 is now the official count of things to implement, though I'm starting to get suspicious.
2019-04-28 15:47:21 -04:00
Thomas Harte
f4350522bf
Implements NBCD.
...
Now outstanding: 1891.
2019-04-27 21:29:50 -04:00
Thomas Harte
e2abb66a11
Adds missing addressing modes for ADDA and SUBA.
...
... reducing missing opcodes to 1941.
2019-04-27 17:22:26 -04:00
Thomas Harte
ab5fcab9bf
Attempts an implementation of ADDX and SUBX.
...
Leaving 2005 non-[A/F]-line instructions.
2019-04-27 16:57:47 -04:00
Thomas Harte
cf547ef569
Improves semantic communications and temporarily omits A- and F-line instructions.
...
So it looks like 2773 instructions left to go.
2019-04-27 15:15:03 -04:00
Thomas Harte
e75b386f7d
Attempts DIVU and DIVS.
...
Reportedly leaving 10965 operations now unimplemented.
2019-04-26 22:22:35 -04:00
Thomas Harte
796203859f
Implements PEA.
...
This decreases the unimplemented count by 28 from 11841 to 11813.
2019-04-26 13:49:59 -04:00
Thomas Harte
40f68b70c1
Adds quantification of reports.
...
Depressingly; 11,841 opcodes are still missing. Better get on with it!
2019-04-26 13:25:34 -04:00
Thomas Harte
40b2fe7339
Merge branch 'master' into 68000
2019-04-26 00:02:35 -04:00
Thomas Harte
a3b6d2d16e
Corrects test and resolves all instances of opcodes that are valid but shouldn't be.
...
The converse case will require implementation of the remaining instructions.
2019-04-25 22:54:58 -04:00
Thomas Harte
3983f8303f
Introduces failing test of 68000 opcode coverage.
2019-04-25 22:06:05 -04:00
Thomas Harte
7cbd5e0ef6
Imports additional files used as test cases.
2019-04-25 21:43:47 -04:00
Thomas Harte
dab9bb6575
Implements EXT.
2019-04-25 18:22:19 -04:00
Thomas Harte
7df85ea695
Cleans up and formally introduces a comparative source for QL startup.
2019-04-25 15:42:41 -04:00
Thomas Harte
c132bda01c
Implements MOVE from SR.
2019-04-25 14:39:32 -04:00
Thomas Harte
4e25bcfcdc
Corrects decoding of AND/OR x, Dn.
2019-04-25 14:19:13 -04:00
Thomas Harte
ea463549c7
Corrects overflow flag for LSL and LSR.
2019-04-25 13:59:10 -04:00
Thomas Harte
723acb31b3
Corrects various flag issues with ADD, SUB and NEG.
2019-04-25 13:53:23 -04:00
Thomas Harte
5725db9234
Corrects calculated-address TAS.
2019-04-25 12:42:05 -04:00
Thomas Harte
8557e563bc
Takes a run at TAS, clarifying bus cycles.
2019-04-25 12:19:40 -04:00
Thomas Harte
d2491633ce
Ensures MOVEM to M .w correctly updates A7.
2019-04-24 23:21:15 -04:00
Thomas Harte
002796e5f5
Takes a run at BSET and BCHG.
2019-04-24 23:01:32 -04:00
Thomas Harte
fa0accf251
Attempts to correct flags for ASL, ASR, LSL, LSR.
2019-04-24 21:04:47 -04:00
Thomas Harte
dcb8176d90
Corrects potential failure properly to set stack pointer state.
2019-04-24 17:58:27 -04:00
Thomas Harte
be32b1a198
Fixes JSR (An) return address [again].
2019-04-24 17:50:38 -04:00
Thomas Harte
582e4acc11
Implements ANDI/ORI/EOR to SR/CCR.
2019-04-24 17:38:59 -04:00
Thomas Harte
10f75acf71
Causes EXG to function.
2019-04-24 16:32:16 -04:00
Thomas Harte
b9933f512f
Fixed: the word/long-word bit works the other way around.
2019-04-24 16:30:15 -04:00
Thomas Harte
75a7f7ab22
Inserts missing program fetch for CMPI.bw #, (d8/16...).
2019-04-24 14:45:24 -04:00
Thomas Harte
757be2906e
Merge pull request #620 from rzumer/fix_typos
...
Correct typos in Z80.hpp
2019-04-24 13:25:06 -04:00
Thomas Harte
e214584c76
SWAP should clear overflow and carry.
2019-04-24 13:19:56 -04:00
Thomas Harte
0bb6b498ce
Simplifies and fixes post-inc MOVE behaviour.
2019-04-24 13:14:25 -04:00
Thomas Harte
958d44a20d
Causes SWAP actually to perform.
2019-04-24 13:06:12 -04:00
Thomas Harte
bb9424d944
Corrects byte increment/decrement actions for A7.
2019-04-24 13:01:08 -04:00
Thomas Harte
11bf706aa2
Attempts to fix LT and LTE conditions.
2019-04-24 10:07:17 -04:00
Thomas Harte
033b8e6b36
ADD/SUBQ #, An shouldn't set flags.
...
Also, temporarily at least, adds a new means for observing CPU behaviour.
2019-04-24 09:59:54 -04:00
Thomas Harte
7c3ea7b2ea
Resolves additional byte accesses being signalled as word.
2019-04-23 21:23:20 -04:00
Thomas Harte
a08043ae88
Ensures that MOVE.b #, (xxx).l writes only a byte.
...
Also rearranges some of the temporary logging functionality.
2019-04-23 19:01:58 -04:00
Thomas Harte
7c132a3ed5
Ensures 16-bit values of Xn for (d8, An, Xn) are sign extended.
2019-04-22 22:13:02 -04:00
Thomas Harte
20e774be1e
Corrects return address of JSR (An).
2019-04-22 21:11:49 -04:00
Thomas Harte
6d6046757d
Fixes predecrementing MOVEM to leave the proper address in the relevant register.
2019-04-22 15:41:09 -04:00
Thomas Harte
55073b0a52
Corrects a bunch of MOVEs to (d8/16, PC/An, [Xn]).
2019-04-21 22:55:23 -04:00
Thomas Harte
44eb4e51ed
Ensures DBcc properly signals program fetches.
2019-04-21 22:54:20 -04:00
Thomas Harte
3cb042a49d
Corrects the carry and extend flags for various long-word operations.
2019-04-21 22:08:18 -04:00
Thomas Harte
b78ea7d24c
Further simplifies CMPA.
2019-04-20 21:23:36 -04:00
Thomas Harte
c66728dce2
Corrects decoding of CMPA.
2019-04-20 21:21:33 -04:00
Thomas Harte
0be9a0cb88
Corrects Scc (and other conditionals) for complex addressing modes.
2019-04-20 18:35:19 -04:00
Thomas Harte
a90f12dab7
Corrects return address for TRAP.
2019-04-20 15:49:32 -04:00
Thomas Harte
ef33b004f9
Corrects word access order of MOVEM.l.
2019-04-20 15:13:12 -04:00
Thomas Harte
2cac4b0d74
Corrects EA usage for ADDA and SUBA.
2019-04-19 23:02:41 -04:00
Thomas Harte
a49f516265
Corrects direction of MOVE [to/from] USP.
2019-04-19 22:41:06 -04:00
Raphaël Zumer
71ac26944d
Correct typos in Z80.hpp
2019-04-19 17:44:52 -04:00
Thomas Harte
2d97fc1f59
Beefs up documentation and developer support.
2019-04-19 13:29:35 -04:00
Thomas Harte
9ef7743205
Attempts to unify type decoding a little further.
2019-04-19 13:29:20 -04:00
Thomas Harte
ee7ae11e90
Implements EXG and SWAP.
2019-04-19 11:27:43 -04:00
Thomas Harte
f67d7f1db5
Adds the final (!) set of missing MOVEs.
2019-04-19 11:11:38 -04:00
Thomas Harte
99981751a2
Adds the official NOP.
...
Which is a freebie.
2019-04-18 23:46:01 -04:00
Thomas Harte
ffdf02c5df
Adds MOVE XXX.lw, -(An)
2019-04-18 23:40:54 -04:00
Thomas Harte
27c7d00a05
Commutes final missing MOVEs to TODOs.
2019-04-18 23:35:32 -04:00
Thomas Harte
64c4137e5b
Begins a cleanup procedure on MOVE.
2019-04-18 23:25:19 -04:00
Thomas Harte
8c26d0c6e6
Makes an attempt at RTE and RTR.
2019-04-18 20:50:58 -04:00
Thomas Harte
81dcfd9f85
Implements AND, OR and EOR.
...
As well as introducing a little more nuance to the double-decoding test.
2019-04-18 16:34:48 -04:00
Thomas Harte
9334557fbf
Added important TODO.
2019-04-17 23:12:32 -04:00
Thomas Harte
b09de8efce
Attempts to fill in the rest of MOVE x, -(An).
2019-04-17 23:05:16 -04:00
Thomas Harte
5a50eb56dd
Marginally increases coverage of MOVE x, -(An).
2019-04-17 22:30:07 -04:00
Thomas Harte
e49b257e94
Takes a run at TRAP.
2019-04-17 22:21:56 -04:00
Thomas Harte
b8a0f4e831
Implements MOVE to/from USP.
2019-04-17 16:58:59 -04:00
Thomas Harte
c265ea9847
Corrects byte writes in both test machines.
2019-04-17 16:39:10 -04:00
Thomas Harte
29f8dcfb40
Fixes a bunch of (d16, An)-type MOVEs and implements MOVE (XXX).wl, (d16,An)/etc.
2019-04-17 16:13:35 -04:00
Thomas Harte
0c05983617
Shortens impact of MULU on the instruction stream to correct parsing.
...
I need to look into this.
2019-04-17 15:15:48 -04:00
Thomas Harte
0bd653708c
Corrects MOVE.bw Dn, (An)[+].
2019-04-17 14:31:20 -04:00
Thomas Harte
41d800cb63
Fixes ADD/SUB Dn,x to use the proper destination value.
2019-04-17 10:23:47 -04:00
Thomas Harte
cadc0bd509
Mental delusion lifted: JSR doesn't look enough like BSR.
2019-04-17 10:02:14 -04:00
Thomas Harte
b64da2710a
Corrects a few MOVE #s.
2019-04-17 10:00:14 -04:00
Thomas Harte
82b08d0e3a
Corrects addressing behaviour of nRd[+-].
2019-04-17 08:53:34 -04:00
Thomas Harte
8f77d1831b
Implements MULU and MULS.
2019-04-16 22:16:43 -04:00
Thomas Harte
be722143e1
Completes addressing modes for ADDI/etc/etc.
2019-04-16 21:34:16 -04:00
Thomas Harte
d8d974e2d7
Consolidates JSR and BSR preparation.
2019-04-16 21:29:37 -04:00
Thomas Harte
9b7ca6f271
Implements the basics of EORI, ORI, ANDI, SUBI and ADDI.
...
Also corrects the BSR return address.
2019-04-16 19:50:10 -04:00
Thomas Harte
8ce018dbab
Adds the necessary runtime support for AND, EOR and OR.
2019-04-16 15:17:40 -04:00
Thomas Harte
180062c58c
Finishes fleshing out [ADD/SUB]Q.
2019-04-16 14:28:31 -04:00
Thomas Harte
6076b8df69
Merge branch 'master' into 68000
2019-04-16 14:07:23 -04:00
Thomas Harte
5e65ee79b1
Merge pull request #617 from TomHarte/MSXDisk
...
Removes hard-coded assumption about disk ROM list placement.
2019-04-16 11:22:52 -04:00
Thomas Harte
c0861c7362
Removes hard-coded assumption about disk ROM list placement.
2019-04-16 11:22:03 -04:00
Thomas Harte
37656f14d8
Adds basic addressing modes for [ADD/SUB]Q.
2019-04-16 11:19:45 -04:00
Thomas Harte
dec5535e54
Implements (arguably: fixes) BSR.
2019-04-15 23:20:36 -04:00
Thomas Harte
1f0e3b157a
Corrects a couple of JSR and JMP addressing modes.
2019-04-15 22:37:11 -04:00
Thomas Harte
d802e83f49
Fills in further MOVEs.
2019-04-15 22:25:22 -04:00
Thomas Harte
ebcae25762
Adjusts JSR behaviour and further extends MOVE.
2019-04-15 22:02:52 -04:00
Thomas Harte
5330267d16
Implements BCLR.
2019-04-15 18:11:02 -04:00
Thomas Harte
892476973b
Attempts RO{X}[L/R].
2019-04-15 17:31:58 -04:00
Thomas Harte
84f4a25bc9
Completes TST.
2019-04-15 16:28:20 -04:00
Thomas Harte
1460a88bb3
Takes a run at JSR and RTS.
2019-04-15 15:14:38 -04:00
Thomas Harte
62e4c23961
Corrects memory map, causing the RAM test no longer to fail.
2019-04-15 13:03:32 -04:00
Thomas Harte
d25ab35d58
Finally gets setw usage correct.
2019-04-15 12:41:56 -04:00
Thomas Harte
a223cd90a1
Adds predecrement TSTs, increases QL running time, reduces logging.
2019-04-15 12:36:08 -04:00
Thomas Harte
aef92ba29c
Corrects immediate shift count.
2019-04-15 12:25:45 -04:00
Thomas Harte
328d297490
Implements the first few addressing modes for TST.
2019-04-15 10:03:52 -04:00
Thomas Harte
3d240f3f18
Corrects decoding of DBcc.
2019-04-15 09:49:23 -04:00
Thomas Harte
45f35236a7
Corrects decoding of ADDA and SUBA.
2019-04-15 09:44:06 -04:00
Thomas Harte
fba210f7ce
Corrects MOVE.l Dn, (An)[+].
2019-04-15 09:30:49 -04:00
Thomas Harte
8a09e5fc16
Implements Scc.
2019-04-14 22:39:13 -04:00
Thomas Harte
52e33e861c
Starts to introduce the QL as a second source for 68000 testing.
...
It's advantageous over the ST in that a commented disassembly of the ROM is available.
2019-04-14 22:15:09 -04:00
Thomas Harte
75d8824e6b
Eliminates implicit type conversion.
2019-04-14 21:02:28 -04:00
Thomas Harte
325af677d3
Implements MOVEM to M with an implicit type conversion.
2019-04-14 20:53:27 -04:00
Thomas Harte
1003e70b5e
Implements MOVEM to R.
2019-04-14 20:02:18 -04:00
Thomas Harte
d70229201d
Advances right up to the lack of MOVEM actions being the final piece.
2019-04-14 14:45:29 -04:00
Thomas Harte
823f91605b
Still slow pedalling slightly, adds further MOVEM storage.
2019-04-14 14:31:13 -04:00
Thomas Harte
53f75034fc
Commits at least to decoding MOVEM.
2019-04-14 14:09:28 -04:00
Thomas Harte
78649a5b54
Fleshes out MOVE, (XXX) a little further.
2019-04-12 17:16:03 -04:00
Thomas Harte
f48db625a0
Corrects write-back and zero flag for ADD/SUB.l.
2019-04-12 16:41:00 -04:00
Thomas Harte
2ba66c4457
Corrects MOVEA, adds extra test safeguards.
2019-04-12 16:10:17 -04:00
Thomas Harte
2c78ea1a4e
Completes conversion away from magic constants.
2019-04-12 15:48:29 -04:00
Thomas Harte
73f50ac44e
Commits further to elimination of magic constants.
2019-04-12 13:45:28 -04:00
Thomas Harte
9ce48953c1
Improves debugging printout.
2019-04-12 13:45:03 -04:00
Thomas Harte
1098cd0c6b
Begins rooting out magic constants.
2019-04-11 22:31:17 -04:00
Thomas Harte
652ebd143c
Corrects addressing mode support for LEA.
2019-04-11 11:58:34 -04:00
Thomas Harte
8e9d7c0f40
Corrects register-relative address calculation.
2019-04-10 23:09:03 -04:00
Thomas Harte
a64948a2ba
Permits zero-bus-op non-terminals.
2019-04-10 22:42:43 -04:00
Thomas Harte
43f619a081
Implements ASL, ASR, LSL and LSR.
2019-04-10 22:31:04 -04:00
Thomas Harte
a07de97df4
Implements the fixed part of register shifts.
2019-04-09 22:12:37 -04:00
Thomas Harte
85d25068a8
Attempts a full implementation of memory shifts.
2019-04-09 22:04:25 -04:00
Thomas Harte
7a0319cfe5
Kicks the work of dealing with ASL/etc into the runtime.
2019-04-09 21:48:08 -04:00
Thomas Harte
f750671f33
Stepping gingerly onwards, adds a double-decoding test.
...
As a result of that, collapses BRA into Bcc. Which provisionally looks correct.
2019-04-09 16:54:41 -04:00
Thomas Harte
7886fe677a
Cleans up commenting.
2019-04-08 22:51:18 -04:00
Thomas Harte
73c027f8e3
Implements CMPA and CMPM. [Provisionally] completing the CMPs.
2019-04-08 22:40:38 -04:00
Thomas Harte
eda88cc462
Implements MOVE to CCR.
2019-04-07 22:24:17 -04:00
Thomas Harte
652f4ebfed
Implements CLR, NEG, NEGX and NOT.
2019-04-07 22:07:39 -04:00
Thomas Harte
06a2f59bd0
Implements DBcc.
2019-04-06 23:21:01 -04:00
Thomas Harte
0af57806da
Adds a hard-coded value sufficient to advance in TOS startup.
2019-04-06 20:00:34 -04:00
Thomas Harte
03f365e696
Corrects source/destination order of CMP setup.
2019-04-06 20:00:15 -04:00
Thomas Harte
49a22674ba
Corrects MOVE destinations.
2019-04-06 18:33:53 -04:00
Thomas Harte
ec494511ec
Implements CMP.
2019-04-06 10:41:19 -04:00
Thomas Harte
af02ce9c6e
Attempts to correct various instances of PC-relative addressing.
2019-04-05 23:49:13 -04:00
Thomas Harte
56e42859ab
Ensures the supervisor flag is updated properly on MOVE to SR.
2019-04-05 23:21:50 -04:00
Thomas Harte
2d153359f8
Adds BTST.
2019-04-04 21:43:22 -04:00
Thomas Harte
068ce23716
Adds a few more MOVEs.
2019-04-04 19:49:19 -04:00
Thomas Harte
03be2e3652
Adds decoding of ADDA and SUBA.
2019-04-03 22:39:01 -04:00
Thomas Harte
4ef2c0bed8
Completes ADD and SUB.
2019-04-03 21:41:59 -04:00
Thomas Harte
bfd405613c
Reuse of addresses is also no longer implicit.
2019-04-03 21:27:11 -04:00
Thomas Harte
73e1c8c780
Corrects now-unimplemented ADD/SUB.
2019-04-03 19:43:54 -04:00
Thomas Harte
689ba1d4a2
Effective address adjustments now have to be explicit.
2019-04-03 19:13:10 -04:00
Thomas Harte
39b9d00550
Moves some way towards mapping out ADD and SUB, fixing a bug with address register modification.
2019-04-02 21:50:58 -04:00
Thomas Harte
64f99d83a4
Takes a stab at offering ADD, ADDA, SUB and SUBA operations.
...
Not yet decoded.
2019-04-01 21:21:26 -04:00
Thomas Harte
8f1faefa1c
Implements further MOVEs and fixes a potential error in program formation.
2019-03-31 22:34:28 -04:00
Thomas Harte
2c5ff9ada0
Switches to running the real TOS, at least temporarily, and enables better testing.
2019-03-31 22:27:57 -04:00
Thomas Harte
a9ceef5c37
Improves communication slightly.
2019-03-31 22:27:33 -04:00
Thomas Harte
c6f977ed4b
Corrects CMPI and documentation; implements JMP.
2019-03-31 21:13:26 -04:00
Thomas Harte
cb240cd32a
Switches to a more explicit tokeniser, to allow for greater flexibility momentarily.
2019-03-30 23:11:39 -04:00
Thomas Harte
bc6349f823
Adds RESET, fixes branches and attempts to fix CMPI.
2019-03-29 23:40:54 -04:00
Thomas Harte
a93a1ae40f
Completes MOVE.blw <ea>, Dn/An/(An)/(An)+, implements MOVEq.
2019-03-29 23:13:41 -04:00
Thomas Harte
25254255fe
Implements a few additional MOVEs.
2019-03-27 21:26:04 -04:00
Thomas Harte
b0b2798f39
Updates to track Swift.
2019-03-27 21:25:51 -04:00
Thomas Harte
7f5c637aeb
Updates to Swift 5.
2019-03-26 22:15:38 -04:00
Thomas Harte
42634b500c
Implements LEA.
2019-03-26 22:07:28 -04:00
Thomas Harte
6f0eb5eccd
Merge branch 'master' into 68000
2019-03-26 21:03:57 -04:00
Thomas Harte
3d83891eb0
Merge pull request #613 from TomHarte/Swift5
...
Performs basic migration to Xcode 10.2.
2019-03-26 21:03:30 -04:00
Thomas Harte
69a2a133d5
Performs basic migration to Xcode 10.2 — project settings, the one new warning, etc.
2019-03-26 19:47:41 -04:00
Thomas Harte
be4b38c76a
Adds BRA and Bcc.
2019-03-25 22:54:49 -04:00
Thomas Harte
7163b1132c
Takes a run at CMPI.
...
Also factors out a couple of mode things, clarifies on where things from the
prefetch are assembled to, and switches to ordering implemented instructions
alphabetically.
2019-03-24 23:05:57 -04:00
Thomas Harte
3ccec1c996
Implements MOVE to SR, fleshing out the final bits of storage for the status word.
2019-03-24 18:20:54 -04:00
Thomas Harte
47359dc8f1
Adds tests for MOVE.l (An), Dn, and thereby correct their implementation.
2019-03-23 21:41:47 -04:00
Thomas Harte
43532c8455
Starts to make incursions into MOVE[A].l.
2019-03-23 21:03:52 -04:00
Thomas Harte
d7c3d4ce52
Adds test for MOVEA.w (0x1000), A1 and fixes implementation thereof.
2019-03-22 23:27:48 -04:00
Thomas Harte
ed7060a105
Made an initial stab at completing MOVEA.w.
...
I think I'm probably peeking into the prefetch queue incorrectly.
2019-03-22 21:43:51 -04:00
Thomas Harte
db0da4b741
Improves get/set state.
2019-03-22 19:34:17 -04:00
Thomas Harte
c9c16968bb
Implements MOVEA as distinct from MOVE.
...
At least as far as MOVE is implemented, that is.
2019-03-22 19:25:53 -04:00
Thomas Harte
87420881c8
Extends to a failing test.
2019-03-21 23:32:03 -04:00
Thomas Harte
fdc598f2e1
Starts MOVE tests; in pursuit of which talks the 68000 into obeying run lengths.
2019-03-21 22:30:41 -04:00
Thomas Harte
f679145bd1
Makes a further push into the MOVEs.
...
With some quick notation shortening.
2019-03-20 23:21:02 -04:00
Thomas Harte
eeb161ec51
Converts the prefetch queue into a 32-bit quantity.
2019-03-19 21:33:52 -04:00
Thomas Harte
21cb7307d0
Adds MOVE #, Dn and MOVEA An, An.
...
As well as the scheduling for `(d16,PC), Dd` and `MOVE (d8,As,Xn), Dd` other than the .ls.
2019-03-19 11:53:37 -04:00
Thomas Harte
412a1eb7ee
Takes an initial run at (An)+, -(An), (d16,An) and (d8,An,Xn) addressing modes.
...
With only MOVEs from those to a data register implemented so far.
2019-03-18 22:51:32 -04:00
Thomas Harte
1d801acf72
Switched to a better ABCD fix.
2019-03-17 22:04:32 -04:00
Thomas Harte
0d7bbdad54
Begins a basic get/set state API, allowing some actual unit tests, implying an ABCD fix.
2019-03-17 21:57:00 -04:00
Thomas Harte
53b3d9cf9d
Implements a few more MOVE variants, plus MOVEA.
2019-03-17 14:34:16 -04:00
Thomas Harte
c3ebbfb10e
Implements all MOVE Dn, Dn.
2019-03-16 23:14:18 -04:00
Thomas Harte
58f035e31a
Makes error more communicative.
2019-03-16 23:05:12 -04:00
Thomas Harte
a8f1d98d40
Small further adjustments; seems likely to be correct now.
2019-03-16 23:01:56 -04:00
Thomas Harte
cf6fa98433
Corrects detection of terminal micro-ops.
2019-03-16 22:50:44 -04:00
Thomas Harte
937b3ca81d
Attempts properly to honour the bus-op and microcycle contract.
2019-03-16 22:36:09 -04:00
Thomas Harte
d0c5cf0d2d
Starts attempting to kill the need to prepare all bus step sequences in advance.
2019-03-16 21:47:46 -04:00
Thomas Harte
4cbf2bef82
By way of a friend, clears a bunch of transient stuff out of 68000Storage.hpp.
...
As, even if not in the programmer's eye, this does affect recompilation times.
2019-03-16 19:41:07 -04:00
Thomas Harte
388d808536
Switches to providing UDS and LDS implicitly via address.
...
Also makes sure that the difference between a non-data cycle that starts without the address strobe active and one that starts with it active can be discerned.
2019-03-16 17:54:58 -04:00
Thomas Harte
720aba3f2d
Adds an implementation of SBCD and slightly neatens syntax for building programs.
2019-03-14 21:22:02 -04:00
Thomas Harte
f9101de956
This might very well be the 68000's first real gasp: performing an ABCD.
2019-03-14 19:32:15 -04:00
Thomas Harte
bb04981280
I'm still dithering on address management, but this seeks fully to implement ABCD and SUBD bus programs.
2019-03-13 21:08:13 -04:00
Thomas Harte
57898ed6dd
This is where my thinking now resides. Two levels of indirection, and consolidated collections.
2019-03-12 22:46:31 -04:00
Thomas Harte
33b53e7605
Settles upon disassembly as the route in, and begins work in that direction.
2019-03-11 22:47:58 -04:00
Thomas Harte
9e8928aad9
Implements as much as I currently care about of the Atari ST memory map.
2019-03-11 22:47:37 -04:00
Thomas Harte
89c71f9119
Introduces EmuTOS, and starts constructing test cases around it.
2019-03-10 18:40:12 -04:00
Thomas Harte
a4f6db6719
Removes ArrayBuilderTests as the ArrayBuilder is long gone. Disables TIA tests for now.
2019-03-10 18:07:23 -04:00
Thomas Harte
2d8e65ea32
Merge branch 'master' into 68000
2019-03-10 17:56:58 -04:00
Thomas Harte
48d1d27067
Merge pull request #612 from TomHarte/HighPrecisionTimer
...
Sketches a high-precision timer class.
2019-03-10 17:47:20 -04:00
Thomas Harte
98aa597510
A theoretical 68000 could now perform its /RESET. That's all though.
2019-03-10 17:42:13 -04:00
Thomas Harte
de56d48b2f
Embraces a more communicative 68000 bus.
2019-03-10 17:27:34 -04:00
Thomas Harte
4aeb9a7c56
Genericises RegisterPair.
2019-03-09 21:16:11 -05:00
Thomas Harte
b9b52b7c8b
Begins some very early sketching out of a 68000.
2019-03-09 00:00:23 -05:00
Thomas Harte
dc464a0b7b
Introduces a wrapper class for high-precision timers.
2019-03-07 22:04:29 -05:00
Thomas Harte
13b6079826
Merge pull request #609 from TomHarte/ReducedScanTargetContention
...
Reduces draw/update contention.
2019-03-07 19:31:35 -05:00
Thomas Harte
6f7dd10d95
Reduces draw/update contention.
...
This won't yet have any effect on either port owing to the way they handle contexts, but here it is.
2019-03-07 19:28:32 -05:00
Thomas Harte
24fb95291a
Reverts to support a full RGBA colour buffer.
2019-03-07 19:22:40 -05:00
Thomas Harte
48430bee60
Merge pull request #606 from TomHarte/MouseHiding
...
Causes the Mac mouse pointer to hide after 3 seconds.
2019-03-06 22:52:40 -05:00
Thomas Harte
42997dcb80
Switches brace style, to bring this into line with other source files.
2019-03-06 21:54:21 -05:00
Thomas Harte
0ace189e38
Takes a basic stab at mouse cursor hiding.
2019-03-06 21:49:50 -05:00
Thomas Harte
d03a7911b5
Merge pull request #605 from TomHarte/DisplayMetrics
...
UNREADY! Introduces dynamic output quality selection.
2019-03-06 19:20:35 -05:00
Thomas Harte
84422676cb
Switches to more coherent logic about buffer sizing.
2019-03-06 19:19:30 -05:00
Thomas Harte
7441e3f4c5
Corrects aspect ratio when changing accumulation texture size.
2019-03-05 22:10:32 -05:00
Thomas Harte
f18132d674
Makes effort to round out draft 1 of Outputs::Display::Metrics.
2019-03-05 22:01:58 -05:00
Thomas Harte
5660007221
Experimentally introduces adaptive quality intermediate buffers.
2019-03-05 21:41:20 -05:00
Thomas Harte
cfebf1dc4a
Merge branch 'master' into DisplayMetrics
2019-03-05 20:21:44 -05:00
Thomas Harte
5b0111b4c8
Merge pull request #604 from TomHarte/AYInputOutput
...
Implements proper AY IO output behaviour.
2019-03-05 20:21:21 -05:00
Thomas Harte
62a1d69cee
Implements proper AY IO output behaviour.
2019-03-05 20:20:26 -05:00
Thomas Harte
86a6b04d4a
Begins attempts to keep track of display metrics.
...
i.e. a system that can both make smart decisions about when to use a lower resolution, and hopefully allow some sort of flywheel-esque horizontal retrace synchronisation. And possibly some raster beam chasing?
2019-03-04 21:54:50 -05:00
Thomas Harte
8915950c7d
Merge pull request #601 from TomHarte/8ppStencil
...
Switches to an 8bpp stencil, for Nvidia compatibility.
2019-03-03 20:39:50 -05:00
Thomas Harte
641e349f33
Switches to an 8bpp stencil, for Nvidia compatibility.
2019-03-03 20:38:24 -05:00