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3340 Commits

Author SHA1 Message Date
Thomas Harte
1f7f9884f5 Experiment with a fullscreen toggle. 2022-07-06 08:21:51 -04:00
Thomas Harte
2bee9b3d56 This is a struct, not a class. 2022-07-06 08:21:26 -04:00
Thomas Harte
18735ee571 Merge pull request #1060 from TomHarte/QtErrors
Resolve invalid use of `constexpr` in IPF.cpp.
2022-07-05 17:09:05 -04:00
Thomas Harte
1ce07e2ee8 This reads the file, so it can't be constexpr. 2022-07-05 17:01:38 -04:00
Thomas Harte
7cbee172b2 Merge pull request #1041 from TomHarte/InST
Switch the Atari ST to the newer 68000.
2022-06-30 17:15:04 -04:00
Thomas Harte
fca974723f Merge pull request #1045 from TomHarte/InAmiga
Switch the Amiga to the newer 68000.
2022-06-30 17:14:54 -04:00
Thomas Harte
6a2d4ae11d Merge branch 'master' into InAmiga 2022-06-30 10:12:32 -04:00
Thomas Harte
6da634b79f Merge branch 'master' into InST 2022-06-30 10:12:23 -04:00
Thomas Harte
c85ca09236 Merge pull request #1058 from TomHarte/ContinuousLabels
Further compact list of potential switch targets.
2022-06-30 10:12:12 -04:00
Thomas Harte
a5b7ef5498 Further compact list of potential switch targets. 2022-06-30 08:31:51 -04:00
Thomas Harte
970087eefb Merge pull request #1057 from TomHarte/ContinuousLabels
68000: Eliminate large gap in `case` values.
2022-06-29 21:48:44 -04:00
Thomas Harte
11305c2e6b Eliminate large gap in case values. 2022-06-29 21:40:48 -04:00
Thomas Harte
5da16023d8 Merge pull request #1056 from TomHarte/Warnings
Switch to an alternative form of avoiding unused goto warnings.
2022-06-29 21:19:34 -04:00
Thomas Harte
b1d8a45339 Just disable the diagnostic. 2022-06-29 21:13:00 -04:00
Thomas Harte
c133f80c73 Try a compiler-specific attribute. 2022-06-29 19:20:44 -04:00
Thomas Harte
58b04cdfa4 Switch to an alternative form of avoiding unused goto warnings. 2022-06-29 19:08:41 -04:00
Thomas Harte
1e149d0add Merge pull request #1055 from TomHarte/IIgsMemoryMap
Introduce further IIgs memory map tests.
2022-06-29 15:19:31 -04:00
Thomas Harte
f7e75da4bd Disable [temporarily?] outdated shadowing tests. 2022-06-29 15:14:51 -04:00
Thomas Harte
c2938a4f63 Avoid potential classic macro error with address. 2022-06-29 15:09:52 -04:00
Thomas Harte
825136b168 Fix installation of LCW test value; thereby permit all tests. 2022-06-29 15:04:21 -04:00
Thomas Harte
5a9eb58d33 Fix test generator: IO state can be cleared. 2022-06-29 14:57:14 -04:00
Thomas Harte
beb4993548 Remove card pages from the equation. 2022-06-29 14:51:50 -04:00
Thomas Harte
48e8bfbb0e Introduce failing is-IO test. 2022-06-29 14:44:17 -04:00
Thomas Harte
5dfbc58959 Fix test generator's concept of hires2 shadowing. 2022-06-29 14:41:56 -04:00
Thomas Harte
924de35cf3 Go all in on support for physical shadowing. 2022-06-29 14:39:56 -04:00
Thomas Harte
7cf9e08948 Map shadowing by logical address, not physical.
Disclaimer: although this better matches the tests, I've yet to verify.
2022-06-29 06:10:15 -04:00
Thomas Harte
60d3519993 Clarify, attempt to implement as internally documented. 2022-06-28 22:32:31 -04:00
Thomas Harte
c6b4570424 Fix Markdown code marking. 2022-06-28 17:12:38 -04:00
Thomas Harte
f5d56cc473 Add first pass at testing shadowing. 2022-06-28 17:12:25 -04:00
Thomas Harte
4e52572b03 Omit language card write tests. 2022-06-28 16:57:09 -04:00
Thomas Harte
6abc317986 Avoid permitting writes in the Cx00 region after uninhibiting the language card. 2022-06-28 16:35:47 -04:00
Thomas Harte
22c0b588c4 Tidy up slightly, without fixing failure. 2022-06-28 16:32:35 -04:00
Thomas Harte
6c9fc0ac75 Introduce [failing] write area tests. 2022-06-28 16:28:00 -04:00
Thomas Harte
ef322dc705 Reformulate to allow addition of write tests, momentarily. 2022-06-28 16:22:41 -04:00
Thomas Harte
94fcc90886 Use auxiliary switches to control language card area when card is inhibited. 2022-06-28 12:46:31 -04:00
Thomas Harte
d0df156b05 Merge branch 'IIgsMemoryMap' of github.com:TomHarte/CLK into IIgsMemoryMap 2022-06-28 11:26:13 -04:00
Thomas Harte
7aeaa4a485 Tweak paging semantics, to allow simple multiple dependencies. 2022-06-27 21:38:45 -04:00
Thomas Harte
823c7765f8 Avoid manual index counting. 2022-06-27 11:16:05 -04:00
Thomas Harte
5cb0aebdf4 For the sake of poor Xcode, stop after a single failure. 2022-06-27 11:10:51 -04:00
Thomas Harte
ef40a81be2 Remove temporary hack. 2022-06-27 08:00:29 -04:00
Thomas Harte
21842052cf Alternative zero page should affect bank 0's language card area when the card is disabled. 2022-06-27 07:56:45 -04:00
Thomas Harte
686dccb48d Correct comparison. 2022-06-26 21:49:58 -04:00
Thomas Harte
1f7700edac Ensure proper register hits. 2022-06-26 21:20:57 -04:00
Thomas Harte
5adc656066 Make some attempt to use the JSON tests. 2022-06-25 21:41:37 -04:00
Thomas Harte
e0ec3c986d Ensure appropriate data bus size. 2022-06-25 21:07:29 -04:00
Thomas Harte
827b137c86 Merge pull request #1054 from TomHarte/JeekTest
Add an automatic bus size selector.
2022-06-25 16:47:15 -04:00
Thomas Harte
9cf64ea643 Import generated tests. 2022-06-25 16:46:57 -04:00
Thomas Harte
fc1952bf42 Add an automatic bus size selector.
This fixes the Jeek test.
2022-06-25 16:28:06 -04:00
Thomas Harte
9888f079fa Merge pull request #1053 from TomHarte/65816Tests
Add 65816 test generator; correct disagreements with other emulations.
2022-06-24 21:28:24 -04:00
Thomas Harte
f2c2027a8c Disable test generation for commit. 2022-06-24 16:50:23 -04:00
Thomas Harte
4467eb1c41 Ensure relevant throwaway stack reads use the previous stack address.
TODO: can CycleFetchPreviousThrowaway be used more widely?
2022-06-24 14:00:03 -04:00
Thomas Harte
ef5ac1442f Don't invent an address for STP and WAI. 2022-06-24 13:05:32 -04:00
Thomas Harte
1c1ce625a7 Vector reads signal VDA. 2022-06-24 10:37:39 -04:00
Thomas Harte
a442077eac Allow repetition for MVN and MVP only. 2022-06-24 10:34:43 -04:00
Thomas Harte
6c638712f3 Attempt to capture MVP and MVN in their entirety. 2022-06-24 07:39:58 -04:00
Thomas Harte
069a057a94 Resolve assumption of arithmetic shifts. 2022-06-24 07:26:07 -04:00
Thomas Harte
4ed3b21bf3 Decimal SBC tweak: negative partial results don't cause carry. 2022-06-23 21:58:09 -04:00
Thomas Harte
2e7afb13c7 Exit gracefully upon a STP or WAI. 2022-06-23 21:03:40 -04:00
Thomas Harte
a23b0f5122 Map STA (d), y to correct calculator. 2022-06-23 20:57:47 -04:00
Thomas Harte
da552abf75 Fix BIT overflow flag. 2022-06-23 15:24:51 -04:00
Thomas Harte
380b5141fb Be overt about conversion wanted here. 2022-06-23 13:03:26 -04:00
Thomas Harte
66775b2c4e Always consume a second cycle in 16-bit mode. 2022-06-23 12:46:51 -04:00
Thomas Harte
2c12a7d968 Make absolutely sure there's no address bit 24. 2022-06-23 12:12:02 -04:00
Thomas Harte
5a97c09238 Flip internal presumption on the BRK flag. 2022-06-23 11:23:00 -04:00
Thomas Harte
3112376943 Don't include DBR in direct indexed indirect. 2022-06-23 11:03:37 -04:00
Thomas Harte
65140b341d Simplify slightly, per new S reporting rule. 2022-06-22 16:43:00 -04:00
Thomas Harte
ecfd17a259 Report a 1 in the stack pointer high byte when in emulation mode.
It has one internally, it just wasn't previously exposed via this method.
2022-06-22 15:55:34 -04:00
Thomas Harte
a72dd96dc6 Page boundary crossing is free outside of emulation mode. 2022-06-22 15:31:30 -04:00
Thomas Harte
944e5ebbfa Take another run at IO addresses. 2022-06-22 15:28:11 -04:00
Thomas Harte
76767110b7 Fix overflow for 8-bit calculations; essentially a revert for ADC. 2022-06-22 15:18:47 -04:00
Thomas Harte
2f684ee66d Use null for values that were never loaded. 2022-06-21 21:47:18 -04:00
Thomas Harte
7dcfa9eb65 65816: improve decimal calculations, posted IO addresses, read/write during redundant read-modify-write cycle. 2022-06-21 14:33:06 -04:00
Thomas Harte
ec98736bd7 Ensure IO cycles don't produce an address of (PC+1). 2022-06-21 11:41:05 -04:00
Thomas Harte
ab0c290489 Use 'x' instead of 'i'. 2022-06-19 06:58:23 -04:00
Thomas Harte
15ac2c3e5a Output to files, at volume, with extended bus flags. 2022-06-18 22:00:50 -04:00
Thomas Harte
0c24a27ba6 Completely prints tests. 2022-06-18 21:32:50 -04:00
Thomas Harte
eb82e06fab Add randomised initial state, fix PC. 2022-06-18 19:21:56 -04:00
Thomas Harte
f8e6954739 Ensure complete runs of each tested opcode. 2022-06-18 16:26:40 -04:00
Thomas Harte
586ef4810b Add restart_operation_fetch, to aid with testing. 2022-06-18 16:25:57 -04:00
Thomas Harte
b62f484d93 Start scaffolding a 65816 test generator. 2022-06-18 13:28:15 -04:00
Thomas Harte
07b600ccaf Merge branch 'master' into InST 2022-06-17 12:10:47 -04:00
Thomas Harte
907dc75e5b Merge branch 'master' into InAmiga 2022-06-17 12:10:40 -04:00
Thomas Harte
ea0d2971eb Merge pull request #1052 from TomHarte/StraightforwardMicrocycle
Clean up Microcycle helpers.
2022-06-17 12:10:22 -04:00
Thomas Harte
a0bc332fe6 Taking a second parse, prefer non-lookup-table solutions. 2022-06-17 11:55:38 -04:00
Thomas Harte
b0ab5b7b62 Simplify Microcycle helpers. 2022-06-16 21:34:24 -04:00
Thomas Harte
a3fc8dbf42 Merge branch 'master' into InAmiga 2022-06-16 16:37:49 -04:00
Thomas Harte
37516e6f6b Merge pull request #1051 from TomHarte/STOPReturn
Fix return address following a STOP.
2022-06-16 15:15:50 -04:00
Thomas Harte
9fde7c0f89 Merge branch 'STOPReturn' into InST 2022-06-16 15:11:06 -04:00
Thomas Harte
dc8103ea82 Fix return address following a STOP. 2022-06-16 15:10:35 -04:00
Thomas Harte
e248092014 Fix return address following a STOP. 2022-06-16 15:10:19 -04:00
Thomas Harte
f343635cab Merge branch 'master' into InAmiga 2022-06-16 13:37:37 -04:00
Thomas Harte
60daf9678f Merge pull request #1050 from TomHarte/ByteLengthWarning
Resolve release-build byte length warning
2022-06-16 11:16:37 -04:00
Thomas Harte
5d5bd6791b Merge branch 'master' into InMacintosh 2022-06-16 11:01:18 -04:00
Thomas Harte
fe748507f0 Merge branch 'master' into InAmiga 2022-06-15 21:23:30 -04:00
Thomas Harte
cb7230e7b7 Merge branch 'master' into InST 2022-06-15 21:23:18 -04:00
Thomas Harte
cb162b6755 Merge pull request #1049 from TomHarte/68000Mk2Bus
Correct 68000 mark 2 Microcycle helper methods.
2022-06-15 21:22:49 -04:00
Thomas Harte
7d00b50e13 Fix upper/lower_data_select; simplify value8_low. 2022-06-15 21:11:31 -04:00
Thomas Harte
12b058867e Correct very minor typo. 2022-06-15 19:34:54 -04:00
Thomas Harte
8ff09a1923 Fix value8_high. 2022-06-15 19:34:49 -04:00
Thomas Harte
62fa0991ed Disallow copying, add some basic asserts. 2022-06-15 19:34:43 -04:00
Thomas Harte
52a8566e7f Correct very minor typo. 2022-06-15 17:06:56 -04:00
Thomas Harte
3bfcf252a8 Fix value8_high. 2022-06-15 17:06:40 -04:00
Thomas Harte
f4ae58b1e5 Disallow copying, add some basic asserts. 2022-06-15 12:59:03 -04:00
Thomas Harte
12277d9305 Merge branch 'master' into InST 2022-06-15 11:07:43 -04:00
Thomas Harte
c9d3f4492d Merge branch 'master' into InAmiga 2022-06-15 11:07:31 -04:00
Thomas Harte
f23c5cc6df Merge pull request #1048 from TomHarte/STOPMk2
68000mk2: apply STOP status.
2022-06-15 11:07:14 -04:00
Thomas Harte
24823233ff Add spurious interrupt support. 2022-06-15 11:00:27 -04:00
Thomas Harte
bd056973ba Don't allow STOP state to block execution. 2022-06-15 10:56:45 -04:00
Thomas Harte
5420fd5aa3 Fix: new status word is still in prefetch. 2022-06-15 10:54:34 -04:00
Thomas Harte
44cdb4726e Fix: new status word is still in prefetch. 2022-06-15 10:54:14 -04:00
Thomas Harte
698cc182ae Merge branch 'STOPMk2' into InAmiga 2022-06-15 10:50:19 -04:00
Thomas Harte
93615f6647 Apply new status before entering STOP loop. 2022-06-15 10:50:03 -04:00
Thomas Harte
fba709f46d Merge branch 'InST' of github.com:TomHarte/CLK into InST 2022-06-15 08:12:45 -04:00
Thomas Harte
bb34aaa0c7 Merge branch 'master' into InST 2022-06-15 08:12:35 -04:00
Thomas Harte
5661c3317a Merge branch 'master' into InAmiga 2022-06-15 08:12:19 -04:00
Thomas Harte
733ffc0eee Merge pull request #1047 from TomHarte/OldVsNew
Introduce randomised old vs new 68000 tests.
2022-06-15 08:11:54 -04:00
Thomas Harte
6cc41d6dda Restore 1000 test count. 2022-06-14 22:02:53 -04:00
Thomas Harte
d91f8a264e Flip presumption, reenabling most tests. 2022-06-14 21:57:14 -04:00
Thomas Harte
0ace9634ce Fix MOVEA. 2022-06-14 21:56:48 -04:00
Thomas Harte
48d51759cd At huge copy-and-paste cost, fix MOVE.l. 2022-06-14 21:22:28 -04:00
Thomas Harte
bfd0b683bf Extend MOVE.b fix to cover MOVE.w. 2022-06-14 17:04:11 -04:00
Thomas Harte
61e0f60e94 Add specialised MOVE.b to correct bus sequencing.
This is a bit of a trial balloon; .w and .l to come.
2022-06-13 21:49:00 -04:00
Thomas Harte
7fa715e37a Provide more thorough documentation. 2022-06-13 15:27:23 -04:00
Thomas Harte
e066546c13 Resolve PEA timing errors. 2022-06-13 14:08:42 -04:00
Thomas Harte
7dc66128c2 Fix strobe output. 2022-06-13 10:49:47 -04:00
Thomas Harte
e484e4c9d7 Expand test to make sure that correct data strobes are active. 2022-06-13 10:39:06 -04:00
Thomas Harte
4a75691005 Avoid double conditional for CalcEffectiveAddressIdleFor8bitDisplacementAndPreDec. 2022-06-13 10:27:22 -04:00
Thomas Harte
8ada73b283 Use the outer switch for addressing mode dispatch, saving a lot of syntax. 2022-06-13 08:57:49 -04:00
Thomas Harte
f316cbcf94 The old implementation was correct. 2022-06-11 21:15:08 -04:00
Thomas Harte
2a9a05785c Bus and address error don't affect interrupt level. 2022-06-11 21:10:24 -04:00
Thomas Harte
0a6b2b7d32 Verify newer CMPA.l, RTE, TRAP[V] and CHK. 2022-06-11 11:17:18 -04:00
Thomas Harte
c3345dd839 Fix MOVEM timing. 2022-06-10 21:52:07 -04:00
Thomas Harte
917b7fbf80 Notarise won't fix status of CLR, NEGX, NEG, NOT. 2022-06-10 16:50:38 -04:00
Thomas Harte
97715e7ccc Expand test set to include those with timing discrepancies. 2022-06-10 16:34:05 -04:00
Thomas Harte
43c0dea1bd With the difference in RESET times now factored out, test timing too. 2022-06-10 16:12:54 -04:00
Thomas Harte
2e4652209b Remove entire RESET sequence, move to testing PEA. 2022-06-10 15:57:54 -04:00
Thomas Harte
aec4bf9d45 Correct TAS timing. 2022-06-10 15:57:35 -04:00
Thomas Harte
e2d811a7a0 Notarise digressions that appear to be correct, remove now-working RTE/RTR. 2022-06-09 21:48:15 -04:00
Thomas Harte
f8643a62e6 Change RTE and RTR read order. 2022-06-09 21:47:28 -04:00
Thomas Harte
dd5c903fd6 DIVS also appears sometimes to differ. 2022-06-09 20:19:39 -04:00
Thomas Harte
2e1675066d Reinstate address error non-testing. 2022-06-09 16:59:06 -04:00
Thomas Harte
be84ce657b Add an optional testing whitelist. 2022-06-09 16:18:04 -04:00
Thomas Harte
64053d697f Take improved guess at address error stacking order. 2022-06-09 16:17:09 -04:00
Thomas Harte
a59ad06438 Print out summary of failure. 2022-06-09 13:13:33 -04:00
Thomas Harte
5af03d74ec Add note to self about first diagnosis. 2022-06-09 12:21:39 -04:00
Thomas Harte
ba2803c807 Include all bus activity after the split. 2022-06-09 11:30:22 -04:00
Thomas Harte
fdcbf617d8 Avoid STOP. 2022-06-09 08:42:31 -04:00
Thomas Harte
cc7a4f7f91 Fix test build. 2022-06-08 21:15:11 -04:00
Thomas Harte
2e42bda0a3 Permit instructions that end in an address error to differ in transactions. 2022-06-08 16:15:33 -04:00
Thomas Harte
da8e6737c6 Fix standard exception stack write order. 2022-06-08 16:15:11 -04:00
Thomas Harte
670201fcc2 Reset time debt upon 'reset'. 2022-06-08 16:03:16 -04:00
Thomas Harte
168dc12e27 Avoid spurious mismatches. 2022-06-08 16:03:02 -04:00
Thomas Harte
fd1955e15b Attempt to randomise and test register contents. 2022-06-08 15:12:47 -04:00
Thomas Harte
ab35016aae Clear any time debt upon phoney reset. 2022-06-08 15:12:32 -04:00
Thomas Harte
f4f93f4836 Test a single, whole instruction; record read/write. 2022-06-08 14:53:04 -04:00
Thomas Harte
6efb9b24e0 Ensure that a phoney reset gets the proper vector. 2022-06-08 14:44:15 -04:00
Thomas Harte
dd0a7533ab Randomise all parts of memory other than the opcode. 2022-06-08 14:43:51 -04:00
Thomas Harte
079c3fd263 Abort address error-causing exceptions before they begin. 2022-06-08 14:43:31 -04:00
Thomas Harte
8cbf929671 Don't duplicate work that the RESET program already does. 2022-06-08 11:42:56 -04:00
Thomas Harte
50130b7004 Minor layout tweak. 2022-06-08 11:42:42 -04:00
Thomas Harte
ab52c5cef2 Pass first all-zeroes test, establishing that processors aren't being fully reset. 2022-06-08 10:56:54 -04:00
Thomas Harte
c7fa93a5bc Attempt human-legible explanation of differences encountered. 2022-06-08 10:51:05 -04:00
Thomas Harte
400b73b5a2 Allow capture to be limited; retain timestamps. 2022-06-08 09:49:27 -04:00
Thomas Harte
788b026cf5 Log and attempt to compare some activity. Sort of. 2022-06-07 16:56:05 -04:00
Thomas Harte
9009645cea Add 'reset' functions. 2022-06-07 16:55:39 -04:00
Thomas Harte
c4ae5d4c8d Establishes at least that both 68000s can run. 2022-06-06 21:47:10 -04:00
Thomas Harte
ca8dd61045 Start sketching out an old vs new 68000 test. 2022-06-06 21:19:57 -04:00
Thomas Harte
ac037bcffd Merge branch 'master' into InAmiga 2022-06-06 16:17:40 -04:00
Thomas Harte
d429dec2e5 Merge branch 'master' into InST 2022-06-06 16:17:33 -04:00
Thomas Harte
d779bc3784 Merge pull request #1046 from TomHarte/StatusChanges
Ensure RTE triggers a stack pointer change if needed.
2022-06-06 16:16:52 -04:00
Thomas Harte
a4baa33e2f Ensure RTE triggers a stack pointer change if needed. 2022-06-06 16:08:50 -04:00
Thomas Harte
56aa182fb6 Fix debug builds. 2022-06-06 15:26:15 -04:00
Thomas Harte
9818c7e78c Switch the Amiga to the newer 68000. 2022-06-06 11:10:56 -04:00
Thomas Harte
6aa599a17c Future-proof perform_bus_operation. 2022-06-06 08:20:16 -04:00
Thomas Harte
57858b2fa5 Merge branch 'master' into InST 2022-06-05 20:59:48 -04:00
Thomas Harte
d4c1e92b1c Merge pull request #1044 from TomHarte/MacintoshAudio
Add missing `flush`.
2022-06-05 09:20:08 -04:00
Thomas Harte
403eda7024 Add missing flush. 2022-06-05 09:08:36 -04:00
Thomas Harte
1671827d24 Add flush. 2022-06-05 09:07:43 -04:00
Thomas Harte
578c3e21a5 Merge branch 'master' into InST 2022-06-04 21:32:10 -04:00
Thomas Harte
87ef0d9ab3 Merge pull request #1042 from TomHarte/68000Interrupt
Fix interrupt acknowledge cycle: signals and data size.
2022-06-04 21:31:03 -04:00
Thomas Harte
cfafbfd141 Fix interrupt acknowledge cycle: signals and data size. 2022-06-04 21:23:57 -04:00
Thomas Harte
9289a6c1bb Fix interrupt acknowledge cycle: signals and data size. 2022-06-04 15:20:38 -04:00
Thomas Harte
4a740fbd14 Switch Atari ST to using the new 68000. 2022-06-04 08:43:43 -04:00
Thomas Harte
7eb00c131f Merge pull request #1036 from TomHarte/InMacintosh
Switch the Macintosh to the newer 68000.
2022-06-03 20:22:27 -04:00
Thomas Harte
5ae461eb0b Avoid warning during optimised builds. 2022-06-03 15:43:27 -04:00
Thomas Harte
542126194a Capture interrupt input at the end of an access cycle, not the beginning.
All still a guess.
2022-06-03 15:39:53 -04:00
Thomas Harte
a61f7e38b6 Very minor: avoid division and modulus when unnecessary. 2022-06-03 15:39:29 -04:00
Thomas Harte
3d059cb751 Make use of Microcycle helpers where relevant.
None of these existed when the Macintosh was first added to this emulator.
2022-06-03 15:33:31 -04:00
Thomas Harte
74e96b881c Merge branch 'master' into InMacintosh 2022-06-03 11:20:46 -04:00
Thomas Harte
9848fa9a4d Merge pull request #1040 from TomHarte/68000RESET
Fix decoding of 68000 RESET.
2022-06-03 11:20:27 -04:00
Thomas Harte
c24a7a8b58 Merge branch '68000RESET' into InMacintosh 2022-06-03 11:17:06 -04:00
Thomas Harte
71e38a6781 Fix decoding of RESET. 2022-06-03 11:15:50 -04:00
Thomas Harte
7b3cf6e747 Add missing instruction: RESET. 2022-06-03 11:15:39 -04:00
Thomas Harte
676e4a6112 Merge branch 'master' into InMacintosh 2022-06-03 10:31:07 -04:00
Thomas Harte
fd66a9b396 Merge pull request #1033 from TomHarte/68000Mk2
Implement a bus binding for the discrete 68000 decoder and performer.
2022-06-03 10:30:44 -04:00
Thomas Harte
640b04e59e Test only well-defined flags.
Albeit that timing is still off.
2022-06-03 10:18:46 -04:00
Thomas Harte
1625796cfe Test only well-defined flags.
Albeit that timing is still off.
2022-06-03 10:17:55 -04:00
Thomas Harte
93749cd650 Merge branch '68000Mk2' into InMacintosh 2022-06-03 08:38:58 -04:00
Thomas Harte
02b6ea6c46 Factor out would-accept-interrupt test, per uncertainty re: level 7. 2022-06-03 08:31:56 -04:00
Thomas Harte
6fcaf3571e Fix bus/address error exception frame: order and contents. 2022-06-03 08:27:49 -04:00
Thomas Harte
10b9b13673 Disable divide-by-zero PC test in lieu of better documentation. 2022-06-03 08:27:20 -04:00
Thomas Harte
6cb559f65e Merge branch '68000Mk2' of github.com:TomHarte/CLK into 68000Mk2 2022-06-02 21:43:28 -04:00
Thomas Harte
c3b436fe96 Use int64_t as an intermediary to avoid x86 exception on INT_MIN/-1. 2022-06-02 21:39:52 -04:00
Thomas Harte
aaac777651 Merge branch 'master' into 68000Mk2 2022-06-02 17:08:41 -04:00
Thomas Harte
103de74063 Merge pull request #1039 from TomHarte/UniqueAsync
Switch DeferringAsyncTaskQueue to `unique_ptr`.
2022-06-02 17:06:59 -04:00
Thomas Harte
7f33a5ca0c Simplify: (i) repetitive type for TaskList; (ii) unnecessary unique_ptr. 2022-06-02 17:02:36 -04:00
Thomas Harte
e389dcb912 Further simplify syntax. 2022-06-02 16:52:03 -04:00
Thomas Harte
9d278d80f1 Remove redundant reset. 2022-06-02 16:50:59 -04:00
Thomas Harte
e994910ff6 Switch to unique_ptr. 2022-06-02 16:46:41 -04:00
Thomas Harte
e7b3705060 Merge pull request #1007 from TomHarte/IPFFileFormat
Adds partial support for the IPF file format.
2022-06-02 12:58:47 -04:00
Thomas Harte
f17502fe81 Merge branch 'master' into 68000Mk2 2022-06-02 12:57:34 -04:00
Thomas Harte
8e7df5c1b1 Merge branch 'master' into InMacintosh 2022-06-02 12:57:24 -04:00
Thomas Harte
8ba1b4e0cf Merge pull request #1037 from TomHarte/SaferShutdown
Reduce potential surprise in DeferringAsyncTaskQueue::flush.
2022-06-02 12:56:51 -04:00
Thomas Harte
93679f8d48 Reduce potential surprise in DeferringAsyncTaskQueue::flush. 2022-06-02 12:50:45 -04:00
Thomas Harte
a292483344 Merge branch '68000Mk2' into InMacintosh 2022-06-02 12:30:54 -04:00
Thomas Harte
90d720ca28 Don't test undocumented flags. 2022-06-02 12:30:39 -04:00
Thomas Harte
f8e933438e Add missing tail cost. 2022-06-02 12:26:25 -04:00
Thomas Harte
6dd89eb0d7 Adjust my expectation as to length. 2022-06-02 12:11:54 -04:00
Thomas Harte
2bd20446bb Merge branch '68000Mk2' of github.com:TomHarte/CLK into 68000Mk2 2022-06-02 05:39:32 -04:00
Thomas Harte
659e4f6987 Include fixed cost of rolls. Which includes providing slightly more information to did_shift. 2022-06-01 20:30:51 -04:00
Thomas Harte
cd5f3c90c2 Ensure proper resumption after a forced exit in will_perform. 2022-06-01 15:27:09 -04:00
Thomas Harte
91a6911a51 Correct ADDA/SUBA timing. 2022-06-01 15:03:03 -04:00
Thomas Harte
0857dd0ae5 Include fixed base cost in MULU and MULS. 2022-06-01 14:05:23 -04:00
Thomas Harte
8c242fa2dd Merge branch '68000Mk2' into InMacintosh 2022-06-01 10:48:38 -04:00
Thomas Harte
5a4f117a12 Merge branch '68000Mk2' of github.com:TomHarte/CLK into 68000Mk2 2022-06-01 10:48:14 -04:00
Thomas Harte
62ed1ca2fd Fix MOVE CCR permissions. 2022-06-01 09:22:47 -04:00
Thomas Harte
d1298c8863 Correct MOVE timing without breaking PEA, LEA, etc. 2022-06-01 09:06:08 -04:00
Thomas Harte
75e85b80aa Factor out the common stuff of exception state. 2022-06-01 08:20:33 -04:00
Thomas Harte
73815ba1dd No need for this hoop jumping here. 2022-06-01 08:20:06 -04:00
Thomas Harte
e1abf431cb Don't test undefined flags. 2022-05-30 16:23:51 -04:00
Thomas Harte
8e0fa3bb5f DIV # with a divide by zero should be 44 cycles. 2022-05-29 21:22:45 -04:00
Thomas Harte
8ffaf1a8e4 Ensure did_divu/s are performed even upon divide by zero. 2022-05-29 21:18:19 -04:00
Thomas Harte
7788a109b0 Tweak more overtly to avoid divide by zero. 2022-05-29 20:51:50 -04:00
Thomas Harte
9eea471e72 Resolve infinite recursion. 2022-05-29 20:39:22 -04:00
Thomas Harte
3ef53315a2 Don't try to append operands to 'None'. 2022-05-29 15:28:16 -04:00
Thomas Harte
2a40e419fc Fix CHK tests: timing and expected flags. 2022-05-29 15:26:56 -04:00
Thomas Harte
d6f72d9862 Avoid runtime checking of instruction supervisor requirements. 2022-05-29 14:56:44 -04:00
Thomas Harte
3da720c789 Make requires_supervisor explicitly compile-time usable. 2022-05-29 14:55:24 -04:00
Thomas Harte
dbf7909b85 Fix timing of CMPM. 2022-05-29 14:49:42 -04:00
Thomas Harte
57aa8d2f17 Correct timing of ADDQ. 2022-05-29 14:34:06 -04:00
Thomas Harte
a318a49c72 Merge branch '68000Mk2' into InMacintosh 2022-05-28 15:01:58 -04:00
Thomas Harte
35e73b77f4 Fix interrupt stack frame. 2022-05-27 21:55:17 -04:00
Thomas Harte
698d1a7111 Fix interrupt stack frame. 2022-05-27 21:54:23 -04:00
Thomas Harte
1365fca161 Avoid phoney write modifies. 2022-05-27 21:42:55 -04:00
Thomas Harte
d17d77714f Remove outdated TODO. 2022-05-27 15:40:06 -04:00
Thomas Harte
e8dd8215ba Tweak per empirical results. 2022-05-27 15:39:02 -04:00
Thomas Harte
e11990e453 Make an attempt at DIVS timing. 2022-05-27 15:38:54 -04:00
Thomas Harte
165ebe8ae3 Add time calculation for MULU and MULS. 2022-05-27 15:38:14 -04:00
Thomas Harte
e746637bee Fill in dynamic cost of shifts. 2022-05-27 15:38:08 -04:00
Thomas Harte
0e6370d467 Tweak per empirical results. 2022-05-27 15:37:40 -04:00
Thomas Harte
512cd333e5 Make an attempt at DIVS timing. 2022-05-27 14:56:04 -04:00
Thomas Harte
f599a78cad Add time calculation for MULU and MULS. 2022-05-27 14:41:42 -04:00
Thomas Harte
7601dab464 Fill in timing calculation for DIVU. 2022-05-27 14:30:03 -04:00
Thomas Harte
a8623eab4a Fill in dynamic cost of shifts. 2022-05-27 11:12:10 -04:00
Thomas Harte
c367ddff1b Merge branch '68000Mk2' into InMacintosh 2022-05-27 10:34:11 -04:00
Thomas Harte
67b340fa5e Fix interrupt request address. 2022-05-27 10:33:36 -04:00
Thomas Harte
c97245e626 Fix CalcEA timing; make MOVEfromSR a read-modify-write. 2022-05-27 10:32:28 -04:00
Thomas Harte
79e2c17f93 Fix interrupt request address. 2022-05-26 20:20:28 -04:00
Thomas Harte
5937737bb7 Merge branch '68000Mk2' into InMacintosh 2022-05-26 19:37:44 -04:00
Thomas Harte
5f030edea4 Simplify transaction. 2022-05-26 19:37:30 -04:00
Thomas Harte
88e33353a1 Fix instruction and time counting, and initial state. 2022-05-26 09:17:37 -04:00
Thomas Harte
f3c0c62c79 Switch register-setting interface. 2022-05-26 07:52:14 -04:00
Thomas Harte
866787c5d3 Make an effort to withdraw from the high-circuitous stuff of working around the reset sequence. 2022-05-25 20:22:38 -04:00
Thomas Harte
367ad8079a Add a call to set register state with population of the prefetch. 2022-05-25 20:22:05 -04:00
Thomas Harte
64491525b4 Work further to guess at caller's intention for set_state.
Probably I should just eliminate the initial reset, somehow.
2022-05-25 17:01:18 -04:00
Thomas Harte
68b184885f Reapply only the status. 2022-05-25 16:54:25 -04:00
Thomas Harte
06f3c716f5 Make better effort to establish initial state. 2022-05-25 16:47:41 -04:00
Thomas Harte
22714b8c7f Capture state at instruction end, for potential inspection. 2022-05-25 16:32:26 -04:00
Thomas Harte
80c1bedffb Eliminate false prefetch for BSR. 2022-05-25 16:32:02 -04:00
Thomas Harte
56ad6d24ee Fix ANDI/ORI/EORI to CCR/SR timing. 2022-05-25 16:20:26 -04:00
Thomas Harte
4ad0e04c23 Fix macro for n being an expression. 2022-05-25 16:05:45 -04:00
Thomas Harte
f9d1c554b7 Fix for the actual number of cycles in a standard reset. 2022-05-25 16:05:28 -04:00
Thomas Harte
ee58301a46 Add RaiseException macro. 2022-05-25 15:45:09 -04:00
Thomas Harte
f2a7660390 Merge branch 'master' into 68000Mk2 2022-05-25 15:40:10 -04:00
Thomas Harte
d4c7ce2d6f Merge pull request #1035 from TomHarte/68000TestIssues
Add details on gaps in coverage.
2022-05-25 15:39:42 -04:00
Thomas Harte
4961e39fb6 Mention DIVU/DIVS flags. 2022-05-25 15:39:00 -04:00
Thomas Harte
0bedf608c0 Add details on gaps in coverage. 2022-05-25 15:36:27 -04:00
Thomas Harte
1ab831f571 Add the option to log a list of all untested instructions. 2022-05-25 13:17:01 -04:00
Thomas Harte
b90f1a48ce Merge branch '68000Mk2' into InMacintosh 2022-05-25 13:02:44 -04:00
Thomas Harte
72425fc2e1 Fix bus data size of MOVE.b xx, -(An). 2022-05-25 13:00:36 -04:00
Thomas Harte
a5f2dfbc0c Initialise registers to 0 for better testability.
TODO: is this the real initial state?
2022-05-25 11:47:42 -04:00
Thomas Harte
5db6a937cb Have TRAP and TRAPV push the next instruction address to the stack. 2022-05-25 11:47:21 -04:00
Thomas Harte
9709b9b1b1 Standard exceptions don't raise the interrupt level. 2022-05-25 11:37:39 -04:00
Thomas Harte
2c6b9b4c9d Switch comparative trace tests to 68000 Mk2. 2022-05-25 11:32:00 -04:00
Thomas Harte
463fbb07f9 Adapt remaining 68000 tests to use Mk2. 2022-05-25 10:55:17 -04:00
Thomas Harte
b6e473a515 Adapt remaining 68000 tests to use Mk2. 2022-05-25 10:55:03 -04:00
Thomas Harte
24f7b5806c Merge branch '68000Mk2' into InMacintosh 2022-05-25 08:15:41 -04:00
Thomas Harte
5872e0ea4a Resolve MOVE.l xx, -(An) write target. 2022-05-25 08:15:18 -04:00
Thomas Harte
04d2d6012a Merge branch '68000Mk2' into InMacintosh 2022-05-24 16:08:56 -04:00
Thomas Harte
f43d27541b Avoid attempt to establish operand flags for undefined opcodes. 2022-05-24 15:53:12 -04:00
Thomas Harte
c8d3d980ba Avoid attempt to establish operand flags for undefined opcodes. 2022-05-24 15:52:53 -04:00
Thomas Harte
f93bf06b99 Merge branch '68000Mk2' into InMacintosh 2022-05-24 15:51:22 -04:00
Thomas Harte
0f7cb2fa5a Attempt to honour the trace flag. 2022-05-24 15:47:47 -04:00
Thomas Harte
01e93ba916 Make an attempt at bus/address error. 2022-05-24 15:42:50 -04:00
Thomas Harte
780954f27b Add TRAP, TRAPV. 2022-05-24 15:14:46 -04:00
Thomas Harte
19d69bdbb5 Add TRAP, TRAPV. 2022-05-24 15:14:20 -04:00
Thomas Harte
27fac7af86 Merge branch '68000Mk2' into InMacintosh 2022-05-24 12:48:54 -04:00
Thomas Harte
6f048de973 Pull unrecognised instruction handling into the usual switch table. 2022-05-24 12:42:34 -04:00
Thomas Harte
a611a745e7 Switch the Macintosh to 68000 mk2. 2022-05-24 12:35:36 -04:00
Thomas Harte
0dfaa7d9cf Interrupt fixes: supply proper address, raise level, fetch from vector. 2022-05-24 12:16:06 -04:00
Thomas Harte
eab720f6ea Ensure proper transition from unrecognised instructions. 2022-05-24 12:16:00 -04:00
Thomas Harte
8ad1d6b813 Interrupt fixes: supply proper address, raise level, fetch from vector. 2022-05-24 12:15:35 -04:00
Thomas Harte
be684d66fd Ensure proper transition from unrecognised instructions. 2022-05-24 11:36:11 -04:00
Thomas Harte
a7e8aef9d3 Add MOVEA, be slightly more careful about next_operand_. 2022-05-24 11:30:09 -04:00
Thomas Harte
4b07c41df9 Ensure alignment of storage. 2022-05-24 11:29:28 -04:00
Thomas Harte
df54f1f1b7 Update TODO. 2022-05-24 11:06:05 -04:00
Thomas Harte
9e3c2b68d7 Eliminate potential future implicit conversion warnings. 2022-05-24 11:05:24 -04:00
Thomas Harte
3349bcaaed Attempt interrupt support. 2022-05-24 10:53:59 -04:00
Thomas Harte
3a4fb81242 Add a dummy STOP state. 2022-05-24 10:25:40 -04:00
Thomas Harte
1df3ad0671 Ensure TAS responds to VPA, BERR. 2022-05-24 09:17:58 -04:00
Thomas Harte
523cdd859b Add bus and address error, and VPA checks. 2022-05-24 09:08:31 -04:00
Thomas Harte
b037c76da6 Add public interface for everything except HALT and BUS REQ/etc.
... neither of which are used by machines I currently implement.
2022-05-23 20:55:01 -04:00
Thomas Harte
9cac4ca317 Add MOVE to/from USP. 2022-05-23 20:42:41 -04:00
Thomas Harte
34e5f39571 Ensure that running exactly up to a boundary gives the bus handler the next microcycle to contemplate. 2022-05-23 15:11:33 -04:00
Thomas Harte
e0a279344c Codify the existence of special cases, implement NOP and RESET. 2022-05-23 15:09:46 -04:00
Thomas Harte
e2f4db3e45 Shuffle more of the flow controller methods into their proper place. 2022-05-23 12:06:14 -04:00
Thomas Harte
cdb9eae1ee Merge branch 'master' into 68000Mk2 2022-05-23 11:02:57 -04:00
Thomas Harte
c1837af84a Add notes to self on work remaining. 2022-05-23 11:02:31 -04:00
Thomas Harte
a87f6a28c9 Fix LINK A7. 2022-05-23 10:43:17 -04:00
Thomas Harte
98325325b1 Fix UNLINK A7. 2022-05-23 10:27:44 -04:00
Thomas Harte
26bf66e3f8 Fix shifts and rolls. 2022-05-23 10:09:46 -04:00
Thomas Harte
363cd97154 Resolve double definition of did_shift. 2022-05-23 10:07:24 -04:00
Thomas Harte
5eb19da91f Merge pull request #1034 from fedex81/patch-1
Update nbcd_pea.json
2022-05-23 10:06:01 -04:00
Thomas Harte
c6b3281274 Attempt the shifts and rolls. 2022-05-23 09:29:19 -04:00
Thomas Harte
1e8adc2bd9 Fix MOVEP to R. 2022-05-23 09:00:37 -04:00
Thomas Harte
c73021cf3c Implement MOVE. 2022-05-23 08:46:06 -04:00
Thomas Harte
1b3acf9cd8 Eliminate assumption. 2022-05-23 08:18:37 -04:00
Federico Berti
1a26d4e409 Update nbcd_pea.json
Add missing bracket
2022-05-23 12:14:00 +01:00
Thomas Harte
c8ede400eb Fix RTE. 2022-05-22 21:17:28 -04:00
Thomas Harte
269263eecf Implement RTE, RTS, RTR. 2022-05-22 21:16:38 -04:00
Thomas Harte
4e21cdfc63 Enable NEGX/CLR tests. 2022-05-22 20:55:21 -04:00
Thomas Harte
faef5633f8 Ensure MOVE from SR has an effective address to write to. 2022-05-22 20:52:00 -04:00
Thomas Harte
7d1f1a3175 Implement MOVE [to/from] [CCR/SR]. 2022-05-22 19:45:22 -04:00
Thomas Harte
4e34727195 Fully implement TAS. 2022-05-22 16:14:03 -04:00
Thomas Harte
1dd6ed6ae3 Implement TAS Dn, with detour for other TASes. 2022-05-22 16:08:30 -04:00
Thomas Harte
cb4d6710df Switch to a more direct indication of progress. 2022-05-22 11:27:58 -04:00
Thomas Harte
3b68b9a83b Implement PEA. 2022-05-22 11:27:38 -04:00
Thomas Harte
4279ce87ea Implement LEA. 2022-05-22 08:29:12 -04:00
Thomas Harte
3c1c4f89e9 Add MULU/S functionality, though not timing. 2022-05-22 08:02:32 -04:00
Thomas Harte
4a6512f5d5 Reduce dispatch boilerplate. 2022-05-22 07:39:16 -04:00
Thomas Harte
284f23c6ea Implement JMP. 2022-05-22 07:16:38 -04:00
Thomas Harte
11a9a5c126 Use common macros for the two forms of Perform. 2022-05-22 07:08:14 -04:00
Thomas Harte
4993801741 Add missing prefetch to BSET, BCHG, BCLR. 2022-05-21 21:05:05 -04:00
Thomas Harte
4b35899a12 Bcc: properly establish offset. 2022-05-21 20:59:34 -04:00
Thomas Harte
1304e930eb DBcc is two-operand. 2022-05-21 20:06:03 -04:00
Thomas Harte
94288d5a94 Excludes DBcc from standard operand fetch. 2022-05-21 19:53:28 -04:00
Thomas Harte
3811ab1b82 Fix the two 8bit-with-displacement effective address Calc steps. 2022-05-21 16:20:01 -04:00
Thomas Harte
c869eb1eec Correct omission: wasn't testing the final PC.
Plenty of new errors incoming.
2022-05-21 15:56:27 -04:00
Thomas Harte
f97d2a0eb9 Add DIVU/DIVS, at least as far as getting the correct numeric result. 2022-05-21 15:56:09 -04:00
Thomas Harte
176c8355cb The tests in chk.json now pass. 2022-05-21 14:32:58 -04:00
Thomas Harte
2258434326 Ensure proper return addresses are calculated for JSR. 2022-05-21 14:28:44 -04:00
Thomas Harte
e46a3c4046 Implement JSR. 2022-05-21 10:29:36 -04:00
Thomas Harte
0e4cfde657 Fix MOVEM predec. 2022-05-21 08:17:39 -04:00
Thomas Harte
4bd9c36922 Fix postincrement mode. 2022-05-20 21:01:23 -04:00
Thomas Harte
256da43fe5 Fix MOVEM other than postinc and predec. 2022-05-20 20:47:54 -04:00
Thomas Harte
6a442e0136 MOVEM has an immediate first operand. 2022-05-20 20:34:51 -04:00
Thomas Harte
a818650027 Add a faulty attempt at MOVEM. 2022-05-20 18:48:19 -04:00
Thomas Harte
9d79e64f5c Add a mere calculate effective address pathway.
Plus a lot of waffle to try to justify the further code duplication.
2022-05-20 16:23:52 -04:00
Thomas Harte
c7c12f9638 After a quick check, eori_andi_ori also now passes. 2022-05-20 14:47:11 -04:00
Thomas Harte
ee942c5c17 Fix PC-relative fetches. 2022-05-20 14:42:51 -04:00
Thomas Harte
d157819c49 Implement the various to-[SR/CCR] actions, which do a 'repeat' prefetch.
(which isn't exactly a repeat, at least in the SR cases, because the function code might have changed)
2022-05-20 14:29:14 -04:00
Thomas Harte
2d91fb5441 Implement MOVEP. 2022-05-20 14:22:32 -04:00
Thomas Harte
81431a5453 Attempt BTST, BCHG, BCLR and BSET. 2022-05-20 12:58:45 -04:00
Thomas Harte
6d7ec07216 Uncover another three already-working test files. 2022-05-20 12:44:57 -04:00
Thomas Harte
b4978d1452 Implement BSR, adding one more test file to the working set. 2022-05-20 12:40:35 -04:00
Thomas Harte
cb77519af8 Make BSR operate like the other offsets: the flow controller gets whatever was in the opcode. 2022-05-20 12:40:09 -04:00
Thomas Harte
45e9648b8c Implement Bcc. 2022-05-20 12:04:43 -04:00
Thomas Harte
ce32957d9d Shuffle two more into the working column. 2022-05-20 11:53:12 -04:00
Thomas Harte
ba8592ceae At least on the 68000, Scc is read-modify-write. 2022-05-20 11:43:26 -04:00
Thomas Harte
4327af3760 DBcc: add write-back. 2022-05-20 11:37:18 -04:00
Thomas Harte
860cc63e21 Attempt DBcc. 2022-05-20 11:32:06 -04:00
Thomas Harte
452dd3ccfd Add a performer call-out for Scc; use it to implement proper timing in the mk2 68000. 2022-05-20 11:20:23 -04:00
Thomas Harte
e5c1621382 Add missing fallthrough, patterns for all ADDs and SUBs. 2022-05-20 07:02:02 -04:00
Thomas Harte
af3518dc1f Implement various ADD, SUB patterns. 2022-05-19 20:50:37 -04:00
Thomas Harte
6cfc0e80d9 Don't test the unrecognised instruction exception. 2022-05-19 19:45:38 -04:00
Thomas Harte
1ee9c585ca Fix segue into second operand. 2022-05-19 19:38:42 -04:00
Thomas Harte
efe5a5ac26 Signal will_perform even for invalid instructions. 2022-05-19 18:50:43 -04:00
Thomas Harte
334e3ec529 Add privilege and instruction error exceptions; permit two operands to be stored. 2022-05-19 16:55:16 -04:00
Thomas Harte
84c165459f ext.json now passes. 2022-05-19 16:32:40 -04:00
Thomas Harte
282c4121d6 CLR also follows the NEGX/NEG/NOT pattern. 2022-05-19 16:30:08 -04:00
Thomas Harte
6c2eee0e44 Implement CHK, and therefore the standard exception pattern. 2022-05-19 16:27:39 -04:00
Thomas Harte
eeb6a088b8 Add a tag to avoid duplication. 2022-05-19 15:49:42 -04:00
Thomas Harte
22b63fe1f8 Add EXT, and notes to self. 2022-05-19 15:41:02 -04:00
Thomas Harte
7ef526e2d3 Fix destination decrement. 2022-05-19 15:22:59 -04:00
Thomas Harte
ce7f94559b Add EXG, ABCD, SBCD. 2022-05-19 15:19:00 -04:00
Thomas Harte
0471decfc8 Implement the complete set of fetch addressing modes.
Subject to observations: (1) MOVE uses slightly custom versions of many of these for its stores; and (2) PEA and LEA need to do the calculation but not the read, so some of this will be duplicated further. It's either that or include greater conditionality on the path.
2022-05-19 15:03:22 -04:00
Thomas Harte
e4c0a89889 Just use the four-bit register number directly. 2022-05-19 15:01:09 -04:00
Thomas Harte
084d6ca11d Simplify address handling; add perform patterns for CMP, AND, OR, EOR. 2022-05-19 12:18:47 -04:00
Thomas Harte
274902c3c1 Add to-memory write-back. Am going to reconsider usage of temporary_address_ as noted. 2022-05-19 11:23:26 -04:00
Thomas Harte
f46e7c65c5 Add AddressRegisterIndirect fetches. 2022-05-19 10:47:57 -04:00
Thomas Harte
c6c6213460 Bifurcate the fetch-operand flow.
Address calculation will be the same, but the fetch will differ. I don't think there's a neat costless way to factor out the address calculations, alas, but I'll see whether macros can save the day.
2022-05-19 10:27:51 -04:00
Thomas Harte
29f6b02c04 Factor out register setup/testing, generalising the DIVU/DIVS flag check. 2022-05-18 21:13:34 -04:00
Thomas Harte
1bf7c0ae5f Attempt better to avoid entering a second instruction. 2022-05-18 21:00:34 -04:00
Thomas Harte
1b87626b82 Move some way towards MOVE. 2022-05-18 21:00:10 -04:00
Thomas Harte
44ae084794 Avoid the repeated .fill; reduces debug-build executor test time to 1.5s.
i.e. eliminates about 95% of costs.
2022-05-18 17:10:23 -04:00
Thomas Harte
13a1809101 Avoid memset. 2022-05-18 17:00:35 -04:00
Thomas Harte
c35200fbd0 Shuffle mildly, primarily to avoid repeated 16mb allocations. 2022-05-18 16:59:37 -04:00
Thomas Harte
da9fb216b1 Remove setup_operation in favour of doing the equivalent inline.
... as it'll probably allow me a route to `goto` straight out of there, too. At least, if I can find a sufficiently neat macro formulation.
2022-05-18 16:45:40 -04:00
Thomas Harte
bef12f3d65 Move ExecutionState into Implementation.hpp; use goto to avoid some double switches.
Re: the latter, yuck. Yuck yuck yuck. But it does mean I can stop going back and forth on how to structure conditionality on effective address generation segueing into fetches without doubling up on tests.
2022-05-18 15:35:38 -04:00
Thomas Harte
aa9e7eb7a2 Codify MOVE's status somewhat, avoid reading write-only operands. 2022-05-17 16:57:33 -04:00
Thomas Harte
f3d3e588fd Add enough of state to [sort-of] pass the first test.
i.e. until the processor overruns, as it is permitted to do, and can't handle the second instruction.
2022-05-17 16:51:26 -04:00
Thomas Harte
4a40581deb Completes performance of NBCD D0. 2022-05-17 16:10:20 -04:00
Thomas Harte
eed2672db5 Add documentation, honour signal_will_perform. 2022-05-17 15:05:11 -04:00
Thomas Harte
84071ac6d0 Implement reset logic, advance as far as actually performing an NBCD on D0 (but not writing it back). 2022-05-17 14:51:49 -04:00
Thomas Harte
1a27eea46c Establish general pattern for selecting a performance phase and obtaining operands. 2022-05-17 14:08:50 -04:00
Thomas Harte
d0b6451f02 Step gingerly on to fetching operands. 2022-05-17 08:26:35 -04:00
Thomas Harte
2147c5a5f2 Fill in missing #undefs. 2022-05-16 21:02:25 -04:00
Thomas Harte
c7aa4d8b6d Fix state transitions.
Confirmed that the 68000 mk 2 now appears correctly to perform a reset.
2022-05-16 21:00:25 -04:00
Thomas Harte
e94efe887c Switch to use of __COUNTER__. 2022-05-16 20:38:17 -04:00
Thomas Harte
3db2de7478 Works 68000 mk2 into the comparative tests.
... revealing that I've leant a little too hard on __LINE__.
2022-05-16 20:04:13 -04:00
Thomas Harte
345f7c3c62 Fill in just enough to attempt the reset exception, assuming DTACK rather than VPA or BERR. 2022-05-16 16:57:40 -04:00
Thomas Harte
13848ddbbc Add half-and-half access for SlicedInt32. 2022-05-16 16:56:54 -04:00
Thomas Harte
6f6e466c08 Make a first sketch of the coroutine-esque structure I'm going to experiment with here. 2022-05-16 11:59:03 -04:00
Thomas Harte
b0518040b5 Plants the seek of a 68000 mark 2. 2022-05-16 11:44:16 -04:00
Thomas Harte
29c872d867 Merge pull request #1032 from TomHarte/68000DIVUDIVS
Generalises the 68000's DIVU and DIVS.
2022-05-15 20:33:22 -04:00
Thomas Harte
acb63a1307 Pull generalised DIVU/DIVS into a macro. 2022-05-15 20:01:51 -04:00
Thomas Harte
341bf2e480 Repattern DIVS after DIVU. 2022-05-15 16:54:58 -04:00
Thomas Harte
20a191f144 Switch to same tests, run through a more modern emulator. 2022-05-15 16:33:08 -04:00
Thomas Harte
81f4581f41 Merge pull request #1031 from TomHarte/BCDTests
Correct 68000 BCD test results.
2022-05-15 07:24:30 -04:00
Thomas Harte
dfaf8ce64e Merge pull request #1028 from TomHarte/68000Perform
Add free function implementation of 68000 operations, and an instruction-set interpreter.
2022-05-15 07:21:03 -04:00
Thomas Harte
f60f1932f2 Restrict DIVU and DIVS tests to those which are well-defined. 2022-05-14 20:28:54 -04:00
Thomas Harte
ff8e4754d7 Ensure STOP exits the run loop. 2022-05-14 19:17:32 -04:00
Thomas Harte
27c4d19455 Support STOP. 2022-05-14 11:35:35 -04:00
Thomas Harte
7f704fdae1 Improve README. 2022-05-13 16:28:56 -04:00
Thomas Harte
dd63a6b61e Correct all [A/S/N]BCD tests. 2022-05-13 16:18:58 -04:00
Thomas Harte
1935d968c5 Add ability to suggest solutions. 2022-05-13 15:27:11 -04:00
Thomas Harte
f83954f5b7 Switch to common bit-selection logic. 2022-05-13 15:08:15 -04:00
Thomas Harte
77b56c50e6 Ensure you can't trace into divide-by-zero, etc. 2022-05-13 14:02:56 -04:00
Thomas Harte
002a8c061f Trim the public interface of Executor. 2022-05-13 13:55:37 -04:00
Thomas Harte
4299334e24 Clean up some TODOs, eliminate one further conditional. 2022-05-13 11:17:57 -04:00
Thomas Harte
4d03c73222 Ensure that the first instruction of privilege/line1010/etc exceptions isn't traced. 2022-05-13 11:08:22 -04:00
Thomas Harte
84cfbaa0a4 Remove manual test count, now that all are being performed. 2022-05-13 11:00:26 -04:00
Thomas Harte
7a2fd93d08 Document BusHandler interface. 2022-05-13 10:59:36 -04:00
Thomas Harte
0d81992f6a Move object creation. 2022-05-13 10:50:16 -04:00
Thomas Harte
5b67c9bf4a MOVE to SR requires supervisor privileges. 2022-05-13 09:01:03 -04:00
Thomas Harte
6594b38567 Tidy up, and reduce for now to a summary report. 2022-05-13 08:02:20 -04:00
Thomas Harte
6c854e8ecc Simplify is_supervisor semantics. 2022-05-13 07:53:40 -04:00
Thomas Harte
2e796f31d4 Support interrupts; documentation to come. 2022-05-12 20:52:24 -04:00
Thomas Harte
3d8f5d4302 Improve failure logging.
This confirms that it's only the *BCDs and DIVU/DIVS in which I do not match the tests.
2022-05-12 20:23:32 -04:00
Thomas Harte
2fa6b2301b Move string logic into Preinstruction. 2022-05-12 19:46:08 -04:00
Thomas Harte
4ba20132b9 Avoid repeated allocations on the new path, reducing total runtime by almost two thirds. 2022-05-12 16:35:41 -04:00
Thomas Harte
a6e4d23c29 Tidy up primarily as per PatickvL's comments.
... though pulling the flag values out of an enum and into a namespace is entirely my own contribution, to keep them in their own namespace but having them overtly be ints.
2022-05-12 16:23:07 -04:00
Thomas Harte
6d43576db7 Remove errant semicolon. 2022-05-12 16:21:36 -04:00
Thomas Harte
b7d1bff0c7 Eliminate branches from ABCD. 2022-05-12 15:25:01 -04:00
Thomas Harte
79c5af755f Eliminate branches from SBCD. 2022-05-12 15:18:03 -04:00
Thomas Harte
c6d84e7e60 Use Status::FlagT pervasively. 2022-05-12 11:42:33 -04:00
Thomas Harte
192513656a After much guesswork, fix SBCD and thereby pass flamewing tests. 2022-05-12 11:39:01 -04:00
Thomas Harte
41dc728c9b Merge branch '68000Perform' of github.com:TomHarte/CLK into 68000Perform 2022-05-12 11:27:59 -04:00
Thomas Harte
f3c1b1f052 Name flags, remove closing underscores on exposed data fields. 2022-05-12 08:19:41 -04:00
Thomas Harte
bd61c72007 Mutate SBCD to correct values, though not yet statuses. 2022-05-12 07:22:26 -04:00
Thomas Harte
0efeea1294 Slightly improve SBCD. Not there yet though. 2022-05-12 07:07:21 -04:00
Thomas Harte
56ce1ec6e8 No need to subclass. 2022-05-11 21:25:38 -04:00
Thomas Harte
de168956e4 Fix tested operand order. 2022-05-11 16:44:39 -04:00
Thomas Harte
5b80844d81 Add a sanity test count, temporarily. 2022-05-11 16:34:28 -04:00
Thomas Harte
a9902fc817 Fix ABCD when the result has an invalid lower digit. 2022-05-11 16:31:27 -04:00
Thomas Harte
ed75688251 Fix capture of the initial zero flag. 2022-05-11 15:40:17 -04:00
Thomas Harte
17add4b585 Introduce and overwhelmingly fail the flamewing BCD tests. 2022-05-11 15:19:39 -04:00
Thomas Harte
d492156453 Add noreturn attribute as a warning. 2022-05-11 10:51:48 -04:00
Thomas Harte
96af3d5ec5 Fix infinite inner/outer loop. 2022-05-11 10:26:12 -04:00
Thomas Harte
69ba14e34e Support the trace flag. 2022-05-11 09:39:15 -04:00
Thomas Harte
943c924382 Add missing: MOVE to/from USP, RESET. 2022-05-11 07:52:23 -04:00
Thomas Harte
4b97427937 Remove further magic constants. 2022-05-11 07:00:35 -04:00
Thomas Harte
ab8e1fdcbf Take a swing at access faults and address errors. 2022-05-10 16:20:30 -04:00
Thomas Harte
477979c275 Fully formulate and document the flow controller. 2022-05-10 10:34:07 -04:00
Thomas Harte
c635720a09 Tidy up; provide a notification for bit-change operations. 2022-05-10 08:23:25 -04:00
Thomas Harte
f2a6a12f79 Remove further vestiges of timing. 2022-05-09 20:58:51 -04:00
Thomas Harte
7445c617bc Start removing 68000-specific timing calculations. 2022-05-09 20:32:02 -04:00
Thomas Harte
8e7340860e Minor thematic rearrangement. 2022-05-09 16:35:17 -04:00
Thomas Harte
2ca1eb4cf8 Move set_pc into the operation-specific group. 2022-05-09 16:20:15 -04:00
Thomas Harte
0af8660181 Remove add_pc and decline_branch in favour of operation-specific signals. 2022-05-09 16:19:25 -04:00
Thomas Harte
330ec1b848 TODO is done. 2022-05-09 11:52:33 -04:00
Thomas Harte
2f7cff84d9 Enable missing rotates and shifts. 2022-05-09 11:26:01 -04:00
Thomas Harte
8e5650fde9 Clean up Instruction.hpp. 2022-05-09 10:13:42 -04:00
Thomas Harte
539932dc56 Provide function codes. TODO: optionally. 2022-05-09 09:18:02 -04:00
Thomas Harte
5ab5e1270e Fix test for new MOVEM semantics. 2022-05-09 09:17:48 -04:00
Thomas Harte
e35de357fa Route reads and writes through a common path. 2022-05-08 17:17:46 -04:00
Thomas Harte
0818fd7828 Ensure no status updates fall through the cracks. 2022-05-07 21:29:12 -04:00
Thomas Harte
98cb9cc1eb Fix CHK operand size. 2022-05-07 21:16:44 -04:00
Thomas Harte
bf8c97abbb Permit TRAP, TRAPV and CHK to push the next PC rather than the current. 2022-05-07 20:32:39 -04:00
Thomas Harte
ad6cf5e401 Pull out magic constant, simplify sp and TAS. 2022-05-07 20:20:24 -04:00
Thomas Harte
2b3900fd14 Fix LINK A7. 2022-05-07 08:15:26 -04:00
Thomas Harte
1defeca1ad Implement RTS, RTR, RTE. 2022-05-06 12:30:49 -04:00
Thomas Harte
ac6a9ab631 Fix TAS Dn. 2022-05-06 12:23:04 -04:00
Thomas Harte
8176bb6f79 Expose issues with TST and TAS. 2022-05-06 12:18:56 -04:00
Thomas Harte
9c266d4316 Proceed to unimplemented TST. 2022-05-06 11:33:57 -04:00
Thomas Harte
d478a1b448 Proceed to next failure: PEA. 2022-05-06 10:04:20 -04:00
Thomas Harte
190a351a29 Fix address writeback. 2022-05-06 09:56:01 -04:00
Thomas Harte
607ddd2f78 Preserve MOVEM order in Operation. 2022-05-06 09:45:06 -04:00
Thomas Harte
fed79a116f Be overt about the size being described here. 2022-05-06 09:22:38 -04:00
Thomas Harte
5db0ea0236 Add note for my tomorrow self. 2022-05-05 21:11:02 -04:00
Thomas Harte
06fe320cc0 Correct source counting, but this leaves the operands still being the wrong way around. 2022-05-05 21:06:53 -04:00
Thomas Harte
f7991e18de Makes a failed attempt to implement MOVEM to registers. 2022-05-05 20:32:21 -04:00
Thomas Harte
d7d0a5c15e Implement MOVEM to memory. 2022-05-05 18:51:29 -04:00
Thomas Harte
47f4bbeec6 Switch to a contiguous block of 16 registers. 2022-05-05 15:31:59 -04:00
Thomas Harte
9ab70b340c Route MOVEM appropriately. 2022-05-05 12:42:57 -04:00
Thomas Harte
70cdc2ca9f Fix MOVEP to register.
Advance to lack of MOVEM.
2022-05-05 12:37:47 -04:00
Thomas Harte
f63a872387 BTST does not write back. 2022-05-05 12:32:15 -04:00
Thomas Harte
67462c2f92 Rewire MOVEP. 2022-05-05 12:27:36 -04:00
Thomas Harte
4a4e786060 Hit a realisation: write-back isn't going to work with MOVEP as formulated. 2022-05-05 09:26:26 -04:00
Thomas Harte
665f2d4c00 Attempts MOVEP. 2022-05-05 09:00:33 -04:00
Thomas Harte
64586ca7ba Implement BTST/etc. 2022-05-04 20:57:22 -04:00
Thomas Harte
46686b4b9c Start testing move. 2022-05-04 20:38:56 -04:00
Thomas Harte
15c90e546f Fix rotates and shifts to memory. 2022-05-04 19:44:59 -04:00
Thomas Harte
5aabe01b6d Mostly fix LINK and UNLK. 2022-05-04 08:41:55 -04:00
Thomas Harte
5d1d94848c Take a bash at LINK and UNLK. 2022-05-04 08:26:11 -04:00
Thomas Harte
7d10976e08 Add LINK and UNLINK to operand_flags. 2022-05-03 20:51:02 -04:00
Thomas Harte
d3b55a74a5 Fix LEA, proceed to non-functional LINK and UNLK. 2022-05-03 20:45:36 -04:00
Thomas Harte
de58ec71fd Fix EXT, SWAP. 2022-05-03 20:17:36 -04:00
Thomas Harte
052ba80fd7 Add enough wiring to complete but fail EXT and JMP/JSR. 2022-05-03 15:49:55 -04:00
Thomas Harte
39f0ec7536 Get far enough through CHK to realise that MOVEM probably needs to be divided by direction. 2022-05-03 15:40:04 -04:00
Thomas Harte
af973138df Correct decoding of Bcc.b, satisfying Bcc and BSR tests. 2022-05-03 15:32:54 -04:00
Thomas Harte
5a87506f3d Fix Bcc, making decision that add_pc is relative to start of instruction. 2022-05-03 15:21:42 -04:00
Thomas Harte
90f0005cf2 Proceed to failing Bcc and flagging up my lack of an implementation for BSR. 2022-05-03 14:45:49 -04:00
Thomas Harte
d8b3748d24 Fix Scc size, DBcc behaviour. 2022-05-03 14:40:51 -04:00
Thomas Harte
1b224c961e Fix Scc, add operand flags for DBcc. 2022-05-03 14:23:57 -04:00
Thomas Harte
b6ffff5bbd Distinguish [ADD/SUB]QA from [ADD/SUB]Q. 2022-05-03 14:17:26 -04:00
Thomas Harte
5ebae85a16 Start recording successes. 2022-05-03 11:28:50 -04:00
Thomas Harte
b3cf13775b Consume operand_flags into Instruction.hpp. 2022-05-03 11:09:57 -04:00
Thomas Harte
c61809f0c4 Add CMPAl. 2022-05-03 09:20:02 -04:00
Thomas Harte
2f2d6bc08b Correct CMPw. 2022-05-03 09:05:34 -04:00
Thomas Harte
1bb809098c Switch — messily — to a more compact way of indicating sequence. 2022-05-03 09:04:54 -04:00
Thomas Harte
17a2ce0464 Fix missung #undefs. 2022-05-02 21:29:46 -04:00
Thomas Harte
011506f00d Add basic exceptions. 2022-05-02 21:27:58 -04:00
Thomas Harte
25ab478461 Fix immediate byte and word fetches. 2022-05-02 20:17:44 -04:00
Thomas Harte
fc9a35dd04 Test add/sub, add an exception for invalid Sequences. 2022-05-02 20:09:38 -04:00
Thomas Harte
7efe30f34c Fix (d8, _, Xn) calculation. 2022-05-02 15:09:59 -04:00
Thomas Harte
ef28d5512b Annotate further. 2022-05-02 12:58:04 -04:00
Thomas Harte
3827ecd6d3 Proceed to complete test running. 2022-05-02 12:57:45 -04:00
Thomas Harte
fa49737538 Correct processor name. 2022-05-02 08:40:47 -04:00
Thomas Harte
14532867a4 Sneaks towards testing EXT. 2022-05-02 08:00:56 -04:00
Thomas Harte
73f340586d Proceed to building, but failing tests. 2022-05-02 07:45:07 -04:00
Thomas Harte
56fe00c5fb Correct errors preparatory to Executor's lack of flow controller actions. 2022-05-01 20:40:57 -04:00
Thomas Harte
3c26177239 Provide both compile- and run-time operation selection options. 2022-05-01 17:39:56 -04:00
Thomas Harte
fe8f0d960d Equivocate.
(Specifically: addresses cannot generally be obtained in advance, as they are often the product of registers, but things like displacements, immediate values and absolute addresses can)
2022-05-01 15:30:03 -04:00
Thomas Harte
c72caef4fd Correct further size specifiers. 2022-05-01 15:21:58 -04:00
Thomas Harte
0720a391e8 Correct address register mutations. 2022-05-01 15:18:06 -04:00
Thomas Harte
d16ac70a50 Correct include path. 2022-05-01 15:14:12 -04:00
Thomas Harte
fc8e020436 Improve field name. 2022-05-01 15:12:13 -04:00
Thomas Harte
6b073c6067 Attempt to round out addressing modes, shift to a header, as per templating on BusHandler. 2022-05-01 15:10:54 -04:00
Thomas Harte
0b19bbff8d Marginally refactor, to avoid repetition of read/write branch. 2022-05-01 13:09:28 -04:00
Thomas Harte
42927c1e32 Establish more of the 680x0 executor loop. 2022-05-01 13:00:20 -04:00
Thomas Harte
df999978f1 Figure out what the call to perform should look like.
Albeit that this class doesn't currently offer any of the proper flow control actions.
2022-04-30 20:34:44 -04:00
Thomas Harte
43cd740a7b Shuffle Step to give meaning to the LSB. 2022-04-30 20:33:35 -04:00
Thomas Harte
52f355db24 Decision: operation is not a template parameter. Hence can use condition as fully typed. 2022-04-30 14:08:51 -04:00
Thomas Harte
a86c5ccdc9 Merge branch '68000Perform' of github.com:TomHarte/CLK into 68000Perform 2022-04-30 14:02:23 -04:00
Thomas Harte
e532562108 Merge branch 'master' into 68000Perform 2022-04-30 14:02:17 -04:00
Thomas Harte
4293ab2acb Merge pull request #1030 from TomHarte/68000cc
Include decoded condition in Preinstruction.
2022-04-30 13:56:49 -04:00
Thomas Harte
8d24c00df2 Include decoded condition in Preinstruction. 2022-04-30 09:00:47 -04:00
Thomas Harte
f4074e0bba Add basic status. 2022-04-30 08:38:28 -04:00
Thomas Harte
e4426dc952 Introduce calculate EA steps. 2022-04-29 20:30:48 -04:00
Thomas Harte
9359f6477b Start drafting an Executor. 2022-04-29 17:12:06 -04:00
Thomas Harte
a103f30d51 Attempt to game out LEA, PEA. Add various special MOVEs. 2022-04-29 14:43:58 -04:00
Thomas Harte
78b60dbd1a Evict MOVEM and MOVEP, enable TRAP and TRAPV, complete CHK. 2022-04-29 14:43:30 -04:00
Thomas Harte
cde75a1c00 Make steps more visible. 2022-04-29 11:26:39 -04:00
Thomas Harte
b9d243552c MOVEs don't read from operand 2. 2022-04-29 11:22:06 -04:00
Thomas Harte
85242ba896 Add to Xcode project, template on Model as per CLR being odd. Fill in some obvious answers. 2022-04-29 11:10:14 -04:00
Thomas Harte
d16dab6f62 Starts introducing a sequencer, to resolve responsibility of perform. 2022-04-29 10:40:19 -04:00
Thomas Harte
8066b19f93 Correct typos. 2022-04-29 07:57:02 -04:00
Thomas Harte
abd2a831a3 Added a further ambiguity. 2022-04-29 05:08:44 -04:00
Thomas Harte
824d3ae3f7 Conclusion: a union does produce better code.
(But needn't be so verbose)
2022-04-29 04:51:02 -04:00
Thomas Harte
727a14c6f9 Add notes for myself on decisions yet to make. 2022-04-29 03:53:17 -04:00
Thomas Harte
13d20137d3 Tackle two lingering references to exception_handler. 2022-04-29 03:38:23 -04:00
Thomas Harte
9680566595 Include in automated build, temporarily. 2022-04-28 20:42:44 -04:00
Thomas Harte
33c9ea2cf7 A flow controller feels more natural than an exception handler. 2022-04-28 20:42:04 -04:00
Thomas Harte
1d8d2b373b Port all simple instruction bodies. 2022-04-28 16:55:47 -04:00
Thomas Harte
611b472b12 Add evaluate_condition, to check standard 68000 condition codes. 2022-04-28 16:54:57 -04:00
Thomas Harte
bb73eb0db3 Start working on an isolation of 68000 instruction execution. 2022-04-28 15:35:40 -04:00
Thomas Harte
8a18685902 Relocated RegisterSizes to Numeric. 2022-04-28 15:10:08 -04:00
Thomas Harte
872b941b20 Merge pull request #1027 from TomHarte/GCCWarnings
Resolve GCC compilation warnings.
2022-04-27 20:00:38 -04:00
Thomas Harte
39261436c8 Remove unused type alias. 2022-04-27 19:53:32 -04:00
Thomas Harte
5e355383df Correct SIB test. 2022-04-27 19:53:15 -04:00
Thomas Harte
90bfec8c04 Merge pull request #1026 from TomHarte/FarewellOfft
Eliminate `off_t`.
2022-04-27 19:29:10 -04:00
Thomas Harte
866b6c6129 Eliminate off_t. 2022-04-27 19:16:37 -04:00
Thomas Harte
649fe7a1ec Merge pull request #1021 from TomHarte/68kDecoder
Establishes a formal 68k [pre-]decoder.
2022-04-27 08:14:24 -04:00
Thomas Harte
9cbbb6e508 Adjust path to match namespace; add to Qt project. 2022-04-27 08:05:36 -04:00
Thomas Harte
9908769bb3 Normalise test name. 2022-04-26 20:32:39 -04:00
Thomas Harte
8902bb1af0 Include size and supervisor flag in Preinstruction. 2022-04-26 19:44:02 -04:00
Thomas Harte
baf1bd354d Avoid packing/unpacking of operands. 2022-04-26 19:37:07 -04:00
Thomas Harte
539c2985aa Fill in size table, define quick to return a uint32_t. 2022-04-26 12:30:14 -04:00
Thomas Harte
5c356e15b5 Completes requires_supervisor. 2022-04-25 20:05:45 -04:00
Thomas Harte
8ff0b71b29 Subsume MOVEQ into MOVE.l; add missing invalid_operands. 2022-04-25 19:58:19 -04:00
Thomas Harte
4e5a6c89b9 Merge pull request #1025 from TomHarte/AndValidate
Switch to validation via a simple AND mask.
2022-04-25 16:29:23 -04:00
Thomas Harte
8f8f201186 Complete transition to simple AND-based verification. 2022-04-25 16:23:16 -04:00
Thomas Harte
0c688757b0 Adapt the last of the MOVEs, TAS, NOT, SUB and TST. 2022-04-25 16:05:44 -04:00
Thomas Harte
5778e92e70 Adapt MOVE, DIV, MUL, OR. 2022-04-25 15:43:25 -04:00
Thomas Harte
3268ea42ff Translate SUB, PEA. 2022-04-25 12:41:41 -04:00
Thomas Harte
1538500903 Add enough to make AND masks the default case. 2022-04-25 12:30:44 -04:00
Thomas Harte
6ca30a16ca Update JMP, JSR. 2022-04-25 12:05:07 -04:00
Thomas Harte
e6dc2e0d31 Add EXG, EXT. 2022-04-25 11:49:14 -04:00
Thomas Harte
9bbd1390c1 Add new-style validation of EORI to CCR, move EXG decoding into page navigation. 2022-04-25 11:43:30 -04:00
Thomas Harte
27f8db6e8b Update DBcc, DIVU/DIVS, EOR. 2022-04-25 09:49:18 -04:00
Thomas Harte
dda0c0e097 Update CMPM, CMPI. 2022-04-25 09:39:22 -04:00
Thomas Harte
f5ea5c26a3 Translate CHK, CLR, CMP, CMPA. 2022-04-24 21:05:00 -04:00
Thomas Harte
d01fa96177 Port BSR, BTST. 2022-04-24 20:49:41 -04:00
Thomas Harte
03caa53863 Translate BSET. 2022-04-24 19:58:10 -04:00
Thomas Harte
4f4a2e6d92 Translate ASL, ASR, Bcc, BCHG, BCLR. 2022-04-24 19:53:54 -04:00
Thomas Harte
87178ed725 Port AND. 2022-04-24 15:12:18 -04:00
Thomas Harte
94e5436f6e Attempt a more compact retelling. 2022-04-24 14:47:14 -04:00
Thomas Harte
b965f2053a Start experimenting with a simple AND for operand validation. 2022-04-24 10:43:06 -04:00
Thomas Harte
959db77b88 Eliminate concept of skips. 2022-04-22 20:59:25 -04:00
Thomas Harte
edee078f0a Eliminate last set of failures. 2022-04-22 20:57:45 -04:00
Thomas Harte
d4b766bf3f Introduce directional ADD/SUB/AND/OR.
Just 512 failures to go.
2022-04-22 20:37:09 -04:00
Thomas Harte
72772c9a83 Remove branch from combined_mode.
On x86 it was probably only a conditional move, but this is fine.
2022-04-22 15:11:41 -04:00
Thomas Harte
4c806d7c51 Tidy up slightly, ahead of a final push to getting complete test success.
After which I can start undoing style errors.
2022-04-22 14:51:25 -04:00
Thomas Harte
c16a60c5ea Import correct STOP, LINK, EXT. 2022-04-22 14:36:29 -04:00
Thomas Harte
96afcb7a43 Introduce remainder of tests. 2022-04-22 14:33:43 -04:00
Thomas Harte
e5a8d8b9ad Import corrected TRAPs and RTE/RTR. 2022-04-22 14:26:44 -04:00
Thomas Harte
efeee5160e Add tests for RTE, RTR, TRAP, TRAPV, CHK. 2022-04-22 10:06:39 -04:00
Thomas Harte
06fb502047 Add MUL/DIV tests and exclusions. 2022-04-22 09:47:16 -04:00
Thomas Harte
977192f480 Resolve D-page decoding errors.
In particular: that I'd overlooked CMPM, and was treating NOT as two-operand.
2022-04-22 09:24:16 -04:00
Thomas Harte
cf66d9d38d Add failing tests for EOR, NOT, OR; disambiguate EOR vs CMP. 2022-04-21 20:36:04 -04:00
Thomas Harte
25eeff8fc5 Correct CMP decoding, correct AND as far as asymmetry of Dn, Dn. 2022-04-21 20:14:52 -04:00
Thomas Harte
d342cdad2b Import corrected MOVEPs. 2022-04-21 19:04:14 -04:00
Thomas Harte
c899ee0d55 Enable MOVEP tests. 2022-04-21 18:57:47 -04:00
Thomas Harte
220408fcaa Introduce MOVEM tests.
12662 opcodes to go.
2022-04-21 16:39:17 -04:00
Thomas Harte
f4e99be7e1 Import BSRs, corrected MOVEMs. 2022-04-21 16:35:24 -04:00
Thomas Harte
bf9fc0ae96 Correct decoding of BSR. 2022-04-21 16:24:34 -04:00
Thomas Harte
9697e666b7 With a shift to MOVE.q, all tests now pass again.
12802 opcodes now untested.
2022-04-21 16:16:34 -04:00
Thomas Harte
a8a1a74b79 Correct BSRb quick value. 2022-04-21 16:13:06 -04:00
Thomas Harte
216ca7cbc9 Import BCC/BSR/BRA quick values. 2022-04-21 16:11:29 -04:00
Thomas Harte
549e440f7c Add 'quick' decoding and testing. 2022-04-21 16:05:00 -04:00
Thomas Harte
45c02c31f8 Add MOVEM exclusions. 2022-04-21 15:47:34 -04:00
Thomas Harte
b6b092d124 Add tests, exclusions for rest of shift/roll group. 2022-04-21 11:26:56 -04:00
Thomas Harte
d346d4a9b6 Import updated quick values. 2022-04-21 09:59:04 -04:00
Thomas Harte
c84e98774a Import corrected register ASL/etcs. 2022-04-21 09:51:21 -04:00
Thomas Harte
e1f4187430 Introduce failing ASL test. 2022-04-20 20:22:56 -04:00
Thomas Harte
3af93ada6f Test and correct Bcc, BSR, CLR, NEGX, NEG. 2022-04-20 20:19:56 -04:00
Thomas Harte
fa4dee8cfd Import two-operand DBccs. 2022-04-20 20:07:20 -04:00
Thomas Harte
3888492f0d Import corrected DBccs and JSRs. 2022-04-20 19:57:54 -04:00
Thomas Harte
dc16928f74 Add appropriate exclusions for JSR, JMP, Scc. 2022-04-20 16:56:26 -04:00
Thomas Harte
a4e440527b Import corrected CMPA references. 2022-04-20 16:46:05 -04:00
Thomas Harte
80ff146620 Add CMP, CMPA and TST tests and exclusions. 2022-04-20 16:29:45 -04:00
Thomas Harte
d4fe9d8166 Complete BTST/etc exclusions. 2022-04-20 16:16:24 -04:00
Thomas Harte
85a0af03c1 Import more standard JSON; start validating. 2022-04-20 09:17:00 -04:00
Thomas Harte
dc43f5605b Give MOVEPs precedence. 2022-04-20 08:40:56 -04:00
Thomas Harte
e0d2baae58 Test ANDI/ORI/EORI SR/CCR, and fail BTST/BCLR/BCHG/BSET. 2022-04-20 08:39:43 -04:00
Thomas Harte
437de19ecb Correct MOVE USP entries. 2022-04-20 08:34:10 -04:00
Thomas Harte
fab064641f Add Move[to/from][SR/CCR/USP] tests, correct decodings. 2022-04-20 07:59:13 -04:00
Thomas Harte
cc69d01bdc Strip dead code. 2022-04-19 20:41:39 -04:00
Thomas Harte
461a95d7ff Introduce missing register numbers for PEA, and elsewhere. 2022-04-19 20:39:01 -04:00
Thomas Harte
316e9681cc Weed out false PEAs. 2022-04-19 20:34:08 -04:00
Thomas Harte
4181313cc6 Correct decoding of SWAP. 2022-04-19 20:28:00 -04:00
Thomas Harte
aa1665acce Fix LEA transcription problems. 2022-04-19 20:24:03 -04:00
Thomas Harte
6aabc5e7b0 Test LEA, PEA, add name for MOVEq. 2022-04-19 19:45:51 -04:00
Thomas Harte
343a8e0192 Resolve wrong-headed mapping of LEA to MOVEAl. 2022-04-19 19:36:21 -04:00
Thomas Harte
2707887a65 Indicate MOVEAs. 2022-04-19 17:17:19 -04:00
Thomas Harte
ef87d09cfa Clear up MOVEs, fail on MOVEAs. 2022-04-19 17:13:23 -04:00
Thomas Harte
d21c67f237 Don't permit byte move from address register. 2022-04-19 16:49:26 -04:00
Thomas Harte
de0432b317 Include register numbers in MOVEs. 2022-04-19 16:34:22 -04:00
Thomas Harte
de40fed248 Test MOVEs and add operand validation. 2022-04-19 16:31:03 -04:00
Thomas Harte
76d7e0e1f8 Test and correct SUBs. 2022-04-19 16:27:20 -04:00
Thomas Harte
bfa551ec08 Correct ADDX and SUBX listings. 2022-04-19 16:21:40 -04:00
Thomas Harte
740e564bc7 Improve validation, add all ADDs.
It now looks like probably the ADDXs in the JSON are incorrect.
2022-04-19 14:45:15 -04:00
Thomas Harte
1f585d67b6 ADDA: correct decoding, add validation. 2022-04-19 14:43:01 -04:00
Thomas Harte
5b22e94a4b Map invalid reg+mode combinations to AddressingMode::None; add validation of ADDs and decoding of ADDX. 2022-04-19 14:36:36 -04:00
Thomas Harte
7749aef6b6 Improve const correctness. 2022-04-19 14:35:40 -04:00
Thomas Harte
5de8fb0d08 Disallow four illegal NBCD addressing modes. 2022-04-19 09:59:02 -04:00
Thomas Harte
19f7335926 Add post validation step. 2022-04-19 09:44:02 -04:00
Thomas Harte
9b61830a55 Add ADD.b as a note to self that .q decoding is also required. 2022-04-19 08:44:44 -04:00
Thomas Harte
99f4cd867d Decode the two EXTs. 2022-04-19 08:42:17 -04:00
Thomas Harte
f29fec33a2 Eliminate mismatches due to unsupported addressing modes. 2022-04-19 08:37:53 -04:00
Thomas Harte
93fe3459fd The quick value won't always fit in reg; turf the problem elsewhere. 2022-04-19 08:37:35 -04:00
Thomas Harte
1abd3bd7f3 Decode SWAP. 2022-04-19 08:37:13 -04:00
Thomas Harte
5509f20025 Fix MOVEfrom/toSR and NBCD listings. 2022-04-19 08:07:34 -04:00
Thomas Harte
fc4fd41be4 Reorder from most specific to least. 2022-04-19 08:00:52 -04:00
Thomas Harte
3ffca20001 Uncover various discrepancies with NBCD. 2022-04-19 07:15:54 -04:00
Thomas Harte
7c29305788 Test all ABCDs. 2022-04-18 20:00:39 -04:00
Thomas Harte
41fb18e573 Add 68k decoder to SDL build.
... and therefore to automated compilation testing.
2022-04-18 14:43:41 -04:00
Thomas Harte
e4c6251ef5 Express the BSR/Bcc.l test properly. 2022-04-18 14:42:31 -04:00
Thomas Harte
7aa250eaf7 Advances to hitting the same absent/present mapping as the old decoder. 2022-04-18 14:41:26 -04:00
Thomas Harte
ff380b686a Decode MOVEq. 2022-04-18 09:12:45 -04:00
Thomas Harte
d2452f4b68 Fix SUBQ ExtendedOperation mappings. 2022-04-18 09:08:49 -04:00
Thomas Harte
deb9c32a38 Add missing Sccs. 2022-04-18 09:04:17 -04:00
Thomas Harte
440f45b996 Attempt decoding and disambiguation of Scc, DBcc, Bcc and BSR. 2022-04-18 08:55:46 -04:00
Thomas Harte
7d64c4ec66 Add STOP. 2022-04-18 08:29:10 -04:00
Thomas Harte
7fe0d530c1 Add a decoder for TRAP. 2022-04-18 08:05:33 -04:00
Thomas Harte
c944767554 Better document decoding patterns, add LEA and CHK. 2022-04-18 08:00:43 -04:00
Thomas Harte
fde5a1c507 Ensure ADDI, SUBI, etc, provide an operation. 2022-04-18 07:42:30 -04:00
Thomas Harte
0fbfb41fa8 Expand on none-matching text. 2022-04-18 07:42:14 -04:00
Thomas Harte
1991ed0804 Introduce failing [partial-]test of new 68000 decoder. 2022-04-18 07:23:25 -04:00
Thomas Harte
e782b92a80 Add exposition. 2022-04-17 19:56:39 -04:00
Thomas Harte
07635ea2be Add register names, Q values. 2022-04-17 19:46:21 -04:00
Thomas Harte
fb3de9ce9d Merge pull request #1023 from TomHarte/AppleIIAutostart
Undo bad guess at initial switch state.
2022-04-17 17:07:56 -04:00
Thomas Harte
efff91ea3d Undo bad guess at initial switch state. 2022-04-17 17:03:05 -04:00
Thomas Harte
1916bd3bd0 Import a first effort at listing all 68000 instruction specs. 2022-04-17 07:57:59 -04:00
Thomas Harte
4eb752b000 Even out tabs. 2022-04-15 20:41:39 -04:00
Thomas Harte
bfb29a58f3 Take another crack at neatness; make LEA overt. 2022-04-15 20:33:59 -04:00
Thomas Harte
f86e455a87 Advance permissively through the 4xxx page to LEA. 2022-04-15 16:01:33 -04:00
Thomas Harte
faa35fe9fc Decode MOVE and the fixed 0x4xxx set. 2022-04-15 15:40:31 -04:00
Thomas Harte
89b8b59658 Ostensibly completes the 0 line. 2022-04-15 15:33:54 -04:00
Thomas Harte
de55a1adc4 Require a model for decoding; shift a bunch of immediates into ExtendedOperation. 2022-04-15 09:40:37 -04:00
Thomas Harte
d1613025ee For now, assume the .q actions can be handled inside Preinstruction. 2022-04-13 09:29:12 -04:00
Thomas Harte
cc4431c409 Expand decode to accept a wider array of operations, and then funnel them down. 2022-04-12 16:17:30 -04:00
Thomas Harte
3d5986c55d Some minor style changes, plus I think I've talked myself into an expanded Operation-tracking enum. Probably. 2022-04-12 14:54:11 -04:00
Thomas Harte
9aeb6ee532 Formally prepare for one- and two-operand instructions. 2022-04-12 09:14:46 -04:00
Thomas Harte
e7f6cc598d Make first attempt to complete broad phase of decoding. 2022-04-12 09:08:46 -04:00
Thomas Harte
cd465dd121 Decode page E. 2022-04-12 09:04:40 -04:00
Thomas Harte
174b48a14a Populate lines 9 and D. 2022-04-12 08:57:40 -04:00
Thomas Harte
bca18e7aba Fill in line decoders for 5, 6 and 7.
This leaves 9, D and E to go.
2022-04-12 08:44:32 -04:00
Thomas Harte
17e761d6c6 Add enough code to pages 0–3 to shift problem to decode(). 2022-04-12 08:36:44 -04:00
Thomas Harte
c50556dde4 Create empty line decoders. 2022-04-12 08:16:29 -04:00
Thomas Harte
dd5bdd67d7 Add B page and a large chunk of 4. 2022-04-12 07:49:08 -04:00
Thomas Harte
21ac9363e9 Add page 8. 2022-04-11 16:32:57 -04:00
Thomas Harte
8e3cccf4d6 Begins a formalised 68k decoder. 2022-04-11 15:00:55 -04:00
Thomas Harte
945e935312 Merge pull request #1020 from TomHarte/RotateMask
Improve PowerPC rotate mask generation.
2022-04-10 15:24:17 -04:00
Thomas Harte
bb5cf570e5 Remove conditional, make generic enough for both 32- and 64-bit operation. 2022-04-10 15:18:23 -04:00
Thomas Harte
a5ed288db2 Merge pull request #1018 from TomHarte/PowerPCTests
Import Dingusdev PowerPC tests
2022-04-10 09:45:39 -04:00
Thomas Harte
7002d6d306 Improve accuracy of comment. 2022-04-10 09:37:18 -04:00
Thomas Harte
1b8d8f3a04 Default to 32-bit versions. 2022-04-10 09:35:58 -04:00
Thomas Harte
284440336d Correct rotate_mask(). 2022-04-10 09:31:39 -04:00
Thomas Harte
140ae7a513 Clarify template parameters. 2022-04-10 08:57:09 -04:00
Thomas Harte
21328d9e37 Normalise macros, remove unused AssertEqualOperationNameO. 2022-04-09 21:25:00 -04:00
Thomas Harte
5177fe1db7 Update tests. 2022-04-09 21:11:58 -04:00
Thomas Harte
7de50b5e2e Provide 64-bit me, mb and sh. Add direct getter for rotate masks. 2022-04-09 21:08:01 -04:00
Thomas Harte
4652a84b43 Add exposition. 2022-04-09 19:20:13 -04:00
Thomas Harte
9e0755bc86 Introduce overlooked: ld, ldu, rldclx, rldcrx, rldicx, rldiclx, rldicrx, rldimix. 2022-04-09 18:28:51 -04:00
Thomas Harte
da0f7d7907 Rearrange into alphabetical order. 2022-04-09 10:20:03 -04:00
Thomas Harte
88d72bf31d Fill in more mnemonics. 2022-04-08 10:01:52 -04:00
Thomas Harte
aac2f7dd73 Add missing validations. 2022-04-08 09:47:04 -04:00
Thomas Harte
1f44ad1723 Completes test cases. 2022-04-06 21:09:58 -04:00
Thomas Harte
4ab1857a11 Complete MPC601 commentary. 2022-04-06 20:53:44 -04:00
Thomas Harte
d23c714ec7 Build in an optional post hoc validation.
TODO: validate.
2022-04-05 11:23:54 -04:00
Thomas Harte
ac524532e7 Handle the synonym test cases. 2022-04-04 08:09:59 -04:00
Thomas Harte
59a1fde2a1 Fix is_zero_mask. 2022-04-03 20:37:09 -04:00
Thomas Harte
31276de5c3 Complete 'misc instructions' tests. 2022-04-03 20:33:32 -04:00
Thomas Harte
c581aef11d Test as far as mffs. 2022-04-03 18:29:40 -04:00
Thomas Harte
7f6a955a71 Complete the cmp set. 2022-04-03 15:50:03 -04:00
Thomas Harte
125d97cc41 Complete floating point tests. 2022-04-03 08:55:28 -04:00
Thomas Harte
de7d9ba471 Add further floating point tests. 2022-04-03 08:06:59 -04:00
Thomas Harte
ad54b44235 Begin documentation and testing of the floating point instructions. 2022-04-02 19:58:21 -04:00
Thomas Harte
42532ec0f5 Test floating point loads and stores. 2022-04-02 15:40:17 -04:00
Thomas Harte
b84fa619da Test integer loads and stores. 2022-04-02 15:27:12 -04:00
Thomas Harte
8a1409184f Add decoding of lwa. 2022-04-02 10:31:55 -04:00
Thomas Harte
8a3c16a5bc Add lwa. 2022-04-02 10:26:47 -04:00
Thomas Harte
6343c65ce2 Document further; mftb is optional. 2022-04-02 10:09:58 -04:00
Thomas Harte
20b4736a1f Test tw, twi. 2022-04-02 10:09:35 -04:00
Thomas Harte
d5967f7834 Correct decoding of stwcx. and stdcx. 2022-04-01 20:37:36 -04:00
Thomas Harte
d5f7650ac1 Test synchronising loads and stores, further expand documentation. 2022-04-01 18:30:48 -04:00
Thomas Harte
6330caffde Test logical immediates. 2022-04-01 17:52:38 -04:00
Thomas Harte
8f580c256c Remove explanations; saying nothing is better than giving incomplete advice. 2022-04-01 17:49:34 -04:00
Thomas Harte
4671b8db5c Add tests for non-immediate logicals. 2022-04-01 17:35:47 -04:00
Thomas Harte
7c8f044380 Complete shift tests. 2022-04-01 17:22:32 -04:00
Thomas Harte
8efd506471 Transcribe up to the end of 'e', use extswx and remove extsw. 2022-04-01 17:11:57 -04:00
Thomas Harte
e83267751e Start shuffling parameters into conventional order; expand on cmp–cmpli, dcbf–dcbz. 2022-03-30 20:36:46 -04:00
Thomas Harte
a3b110aee5 Clean up. Shifts next. 2022-03-30 17:04:41 -04:00
Thomas Harte
84f0b0a84c Test rotates. 2022-03-30 16:43:09 -04:00
Thomas Harte
c9c5adc650 Test crand ... crxor. 2022-03-30 12:40:57 -04:00
Thomas Harte
52e7226655 Merge branch 'PowerPCTests' of github.com:TomHarte/CLK into PowerPCTests 2022-03-29 20:50:40 -04:00
Thomas Harte
b89c8decd4 Test addx–divwx and mtcrf; document fields for crand, etc. 2022-03-29 20:48:43 -04:00
Thomas Harte
d783975597 Start offering a list of relevant fields per Operation. 2022-03-29 19:59:21 -04:00
Thomas Harte
5ec291df5c Merge branch 'PowerPCTests' of github.com:TomHarte/CLK into PowerPCTests 2022-03-29 14:38:28 -04:00
Thomas Harte
0a45355055 Add a few more field comments. 2022-03-29 14:37:21 -04:00
Thomas Harte
e696624da0 Now passes negx, subfex, subfzex, subfmex, dozx, absx, nabsx. 2022-03-28 20:47:32 -04:00
Thomas Harte
99ad40f3e0 Test subfcx, subfx; correct decoding of oe(). 2022-03-28 20:39:52 -04:00
Thomas Harte
b9c8016aca Merge branch 'PowerPCTests' of github.com:TomHarte/CLK into PowerPCTests 2022-03-28 20:20:59 -04:00
Thomas Harte
8ad1f2d4f5 Add bad attempt to catch subfc. 2022-03-28 20:18:41 -04:00
Thomas Harte
dc30581be0 Fix typo; . -> , 2022-03-28 16:39:55 -04:00
Thomas Harte
2e56b606fa Improve file division, document some further operations. 2022-03-27 18:44:56 -04:00
Thomas Harte
d84c72afe5 Test loads and stores, and immediate arithmetic. 2022-03-27 08:47:01 -04:00
Thomas Harte
2d69896f64 Merge branch 'master' into PowerPCTests 2022-03-26 10:12:15 -04:00
Thomas Harte
b3dd2db815 Merge pull request #1017 from TomHarte/CPC128k
CPC: ensure 64/128k RAM is properly selected.
2022-03-26 09:08:40 -04:00
Thomas Harte
290dd3993b CPC: ensure 64/128k RAM is properly selected. 2022-03-26 08:54:07 -04:00
Thomas Harte
4f6a9917c6 Test lbzx, lbzux. 2022-03-26 08:45:07 -04:00
Thomas Harte
3d48183753 Test lwzux. 2022-03-25 20:31:47 -04:00
Thomas Harte
33c31eb798 Test lwzx. 2022-03-25 20:23:21 -04:00
Thomas Harte
73ae7ad82f Resolve final branch test: aa() applies. 2022-03-25 20:10:08 -04:00
Thomas Harte
ee6470708b Merge pull request #1016 from TomHarte/unistd
Eliminate usages of unistd.h.
2022-03-25 17:04:29 -04:00
Thomas Harte
61f25926b5 Eliminate usages of unistd.h. 2022-03-25 16:58:06 -04:00
Thomas Harte
1a5d3bb69c Match majority of branch tests. 2022-03-25 08:41:57 -04:00
Thomas Harte
7d4fe55d63 Handle bclrx set and clear. 2022-03-25 06:25:06 -04:00
Thomas Harte
089e03afe8 Navigates bcctrx tests, adding simplified bo() helpers and bi() helpers. 2022-03-24 20:44:03 -04:00
Thomas Harte
8e019f01ab Document dozx and dozi. 2022-03-21 10:49:01 -04:00
Thomas Harte
77bdaf3c78 These are likely to be useful outside of the decoder. 2022-03-21 10:41:17 -04:00
Thomas Harte
0b6828c895 Decision: these enums will be at namespace scope. 2022-03-21 10:19:30 -04:00
Thomas Harte
d4704c656f Merge branch 'PowerPCTests' of github.com:TomHarte/CLK into PowerPCTests 2022-03-21 10:18:36 -04:00
Thomas Harte
c01192c784 Add exposition for absx to divsx. 2022-03-21 10:17:55 -04:00
Thomas Harte
8adb611edf Attempt to clarify with an enum. 2022-03-19 12:27:28 -04:00
Thomas Harte
e5af5b57ad Add documentation for bx, bcx, bcctrx.
Catch bcx tests.
2022-03-18 19:55:26 -04:00
Thomas Harte
f05d3e6af3 Introduce dingusdev tests, do just enough to check bx. 2022-03-18 17:24:12 -04:00
Thomas Harte
5963d038ef Merge pull request #1014 from TomHarte/DDFSTRTSTOP
Improve application of DDFSTRT and DDFSTOP.
2022-03-18 15:48:06 -04:00
Thomas Harte
bfd28a04ba Remove noise. 2022-03-18 10:41:20 -04:00
Thomas Harte
359ec257c0 Add a further state, seemingly to fix high-res mode. 2022-03-18 08:27:46 -04:00
Thomas Harte
88767e402c Switch DDFSTART/STOP state machine. 2022-03-17 20:03:36 -04:00
Thomas Harte
88c7a6d053 Merge pull request #1013 from TomHarte/CroppedBottom
Switches all Copper WAITs to 12 cycles
2022-03-13 13:38:32 -04:00
Thomas Harte
e698cbf092 Silence debugging information. 2022-03-13 12:48:05 -04:00
Thomas Harte
f2ce646d8d Undo 8-cycle-if-met WAIT. 2022-03-13 12:47:48 -04:00
Thomas Harte
cbf9b345ff Merge pull request #1010 from TomHarte/80386
Expands x86 decoder to recognise 80386 opcodes.
2022-03-12 12:46:15 -05:00
Thomas Harte
1725894fe9 Eliminate redundant CMPSD, CDQ, CWDE.
Also removes IBTS for now, as I'm unclear where it should sit in the opcode map.
2022-03-12 12:24:44 -05:00
Thomas Harte
fd4f85eb19 Add SMSW. 2022-03-12 12:23:48 -05:00
Thomas Harte
f1c4864016 Eliminate INSD. 2022-03-12 11:37:21 -05:00
Thomas Harte
e6bd265729 Explain which BOUNDs operand is which. 2022-03-11 20:34:28 -05:00
Thomas Harte
c22e8112e7 Expand exposition. 2022-03-11 20:30:56 -05:00
Thomas Harte
44252984c2 Eliminate INT3 special case. 2022-03-11 14:03:46 -05:00
Thomas Harte
4b4f92780e Shuffle extension word order.
The primary objective here is simplifying index calculation, but as per the note it does also potentially open up options with regard to packing in the future.
2022-03-11 13:24:45 -05:00
Thomas Harte
f694620087 Resolve TODO. 2022-03-11 13:10:44 -05:00
Thomas Harte
dc1d1f132e Add one more address size modifier test. 2022-03-11 13:01:02 -05:00
Thomas Harte
9b4048ec6e The address size modifier doesn't seem to affect far address sizes.
It's meant to affect only instructions with operands that reside in memory, I think. So probably only ::DirectAddress in my nomenclature. More research to do.
2022-03-11 12:46:07 -05:00
Thomas Harte
727342134c Add 8086 length limit test. 2022-03-11 11:55:41 -05:00
Thomas Harte
c744a97e3c Ensure no extensions for default constructed Instruction. 2022-03-11 11:55:26 -05:00
Thomas Harte
40cafb95ed Add 286 and 386 instruction length tests. 2022-03-11 09:48:51 -05:00
Thomas Harte
91d75d7704 Switch strategy on 8086 instruction lengths. 2022-03-11 09:48:26 -05:00
Thomas Harte
dc8cff364f Switch to common test. 2022-03-11 09:48:02 -05:00
Thomas Harte
572dc40e6b Allow assignments. 2022-03-11 09:47:23 -05:00
Thomas Harte
f92ffddb82 Add instruction length limits. 2022-03-10 20:47:56 -05:00
Thomas Harte
641e0c1afc Resolve default segment question. 2022-03-10 20:27:35 -05:00
Thomas Harte
bf7faa80c1 Add TODO. 2022-03-10 16:47:54 -05:00
Thomas Harte
a2ae3771eb Add test for switch to Source::IndirectNoBase. 2022-03-10 15:45:56 -05:00
Thomas Harte
673ffc50da Switch to intended compact version of Instruction. 2022-03-10 15:14:50 -05:00
Thomas Harte
6dc9973754 Incorporate length into Instruction. 2022-03-10 07:12:12 -05:00
Thomas Harte
cf6a910630 Handle no-base case directly in existing switch. 2022-03-09 20:20:32 -05:00
Thomas Harte
520baa6ec8 Formalise IndirectNoBase and permit a knowledgable caller to avoid conditionals. 2022-03-09 20:19:40 -05:00
Thomas Harte
c1cc4f96df Switch to const auto. 2022-03-09 16:56:32 -05:00
Thomas Harte
bbf925a27e Clarify, unify and correct decoding and encoding of [CALL/RET/JMP][near/far/relative/absolute]. 2022-03-09 16:48:06 -05:00
Thomas Harte
381fd5dbe4 E8 is a relative call. 2022-03-09 16:37:07 -05:00
Thomas Harte
ead8b7437e Remove done TODO. 2022-03-09 15:26:20 -05:00
Thomas Harte
9f2d18b7ba Improve comment formatting. 2022-03-09 15:25:46 -05:00
Thomas Harte
acd9df6745 Fix segment/offset sizes for far calls. 2022-03-09 15:23:43 -05:00
Thomas Harte
f96c051932 Record PUSH immediate operation size. 2022-03-09 14:24:57 -05:00
Thomas Harte
67b2e40fae Fixed: INs and OUTs remain single byte. 2022-03-09 10:51:16 -05:00
Thomas Harte
081a2acd61 Fix shift group operand size. 2022-03-09 09:33:25 -05:00
Thomas Harte
de79acc790 Fix RegAddr/AddrRegs and group 2 decoding. 2022-03-09 08:38:34 -05:00
Thomas Harte
a125bc7242 Fill in more of test32bitSequence. 2022-03-08 20:16:19 -05:00
Thomas Harte
ebed4cd728 Introduce failing 32-bit parsing test. 2022-03-08 19:57:10 -05:00
Thomas Harte
21d4838322 Fix current implementation of data_segment.
As far as it goes.
2022-03-08 17:08:21 -05:00
Thomas Harte
926a373591 Extend SIB test, correct decoder. 2022-03-08 15:03:37 -05:00
Thomas Harte
0cbb481fa4 Add a formal SIB test. 2022-03-08 14:56:27 -05:00
Thomas Harte
a954f23642 Attempt 32-bit modregrm + SIB parsing. 2022-03-08 14:39:49 -05:00
Thomas Harte
41a104cc10 Adds special test/control/debug MOVs.
This'll do; it's not ideal but avoids bloating up the `Source` enum.
2022-03-07 17:04:05 -05:00
Thomas Harte
f0b4971c7b Correct SHLD format. 2022-03-07 16:39:02 -05:00
Thomas Harte
8e669a32a3 Take a stab at group 8. 2022-03-07 16:34:56 -05:00
Thomas Harte
0e16e7935e Correct double reference to Group 6. 2022-03-07 16:26:17 -05:00
Thomas Harte
7ea84d9a4e Add MOVZX, MOVSX. 2022-03-07 16:25:44 -05:00
Thomas Harte
7313c89dec Add BT, BTS, BTR, BTC, BSF, BSR. 2022-03-07 16:23:25 -05:00
Thomas Harte
35a66c03c2 Add the SETs. 2022-03-07 10:32:34 -05:00
Thomas Harte
bbb3168bae Adds the missing shift group segues at c0 and c1. 2022-03-07 09:18:59 -05:00
Thomas Harte
1ea9d3faf8 Introduce additional forms of IMUL. 2022-03-07 09:05:22 -05:00
Thomas Harte
4479be4fd0 Add the two immediate PUSHes. 2022-03-06 14:28:41 -05:00
Thomas Harte
e7aaf4dd2e Add LDS, LES, LSS test. 2022-03-06 12:10:25 -05:00
Thomas Harte
91a6bf671d Also 'easy': LSS, LFS, LGS.
Though perhaps I'm off on LES and LDS?
2022-03-06 09:28:43 -05:00
Thomas Harte
49b5889d9e 0x8c is available on the 8086. 2022-03-06 09:24:59 -05:00
Thomas Harte
ede61ae130 Flag up TODOs, for easier in-editor navigation. 2022-03-05 17:48:01 -05:00
Thomas Harte
7a79111767 Add the easiest 80386 extensions: PUSH/POP FS/GS and longer conditional jumps. 2022-03-05 17:32:21 -05:00
Thomas Harte
6432521b9d Correct two references to JP that should be JL. 2022-03-05 17:16:32 -05:00
Thomas Harte
65f578fe61 Add notes on all missing opcodes. 2022-03-05 17:16:13 -05:00
Thomas Harte
3a8eb4a4f0 Add 80386 segment overrides. 2022-03-05 17:03:46 -05:00
Thomas Harte
eb180656bb Fix $8e data size, add $8c. 2022-03-05 17:00:48 -05:00
Thomas Harte
1afcbba218 Clarify sign extension availability. 2022-03-05 16:44:26 -05:00
Thomas Harte
8a0902a83b Adapts existing opcodes for 32-bit parsing. 2022-03-05 13:52:07 -05:00
Thomas Harte
dfb312fee6 Make column and row meanings overt. 2022-03-05 11:56:08 -05:00
Thomas Harte
11bb594fa2 Sets up [ignored] memory and data size prefixes. 2022-03-02 20:23:35 -05:00
Thomas Harte
8e3ae2c78f Add opcode map as documentation. 2022-03-02 20:00:21 -05:00
Thomas Harte
8080d1d961 Extend test case slightly. 2022-03-01 20:22:43 -05:00
Thomas Harte
4b4135e35a Correct #undef. 2022-03-01 18:23:24 -05:00
Thomas Harte
d1148c4cab Switch to constexpr function, for guaranteed semantics. 2022-03-01 17:30:41 -05:00
Thomas Harte
8ee62b4789 Simplify address size semantics.
Since it'll no longer be a mode-dependant toggle, but a fully-retained value.
2022-03-01 17:29:26 -05:00
Thomas Harte
5e7a142ff1 Fix is_write errors, update comment, add additional source for asserts. 2022-03-01 16:51:54 -05:00
Thomas Harte
2c816db45e Refactor: (i) to expose effective address calculation; and (ii) to include address size in Instruction. 2022-03-01 09:36:37 -05:00
Thomas Harte
b920507f34 Double down on AddressT, add an assert on memory_mask. 2022-02-28 10:03:58 -05:00
Thomas Harte
d8601ef01f Add missing hex specifier. Test now passes. 2022-02-28 09:54:29 -05:00
Thomas Harte
afbc57cc0c Incorporate displacement, switch macro flag. 2022-02-28 09:53:23 -05:00
Thomas Harte
9f12c009d6 Correct data size when accessing address registers. 2022-02-27 19:45:03 -05:00
Thomas Harte
84ac68a58b Fix indirect memory read/write 2022-02-27 18:43:00 -05:00
Thomas Harte
27d1df4699 Introduce enough of a DataPointerResolver test to build but fail. 2022-02-27 18:27:58 -05:00
Thomas Harte
0d7a7dc7c9 Introduce DataPointerResolver, to codify the meaning of DataPointer and validate that enough information is present. 2022-02-27 11:25:02 -05:00
Thomas Harte
b8bff0e7f5 Double up eSP, eBP, eSI, eDI and AH, CH, DH, BH enums, as per Intel's encoding. 2022-02-24 05:16:15 -05:00
Thomas Harte
60bf1ef7ea Rename SourceSIB to DataPointer, extend to allow for an absent base. 2022-02-23 08:28:20 -05:00
Thomas Harte
dc37b692cf Switch to templated test function. 2022-02-23 04:33:28 -05:00
Thomas Harte
95976d8b58 Add missing #include. 2022-02-21 16:33:58 -05:00
Thomas Harte
ecb20cc29b Improve tabbing. 2022-02-21 16:09:03 -05:00
Thomas Harte
b6183e86eb Clarifies model tests by macro; adds the address size toggle. 2022-02-21 16:06:02 -05:00
Thomas Harte
229af0380c This is normatively called the address size. 2022-02-21 15:52:16 -05:00
Thomas Harte
b968a662d3 Dump notes on intended Instruction layout, add memory size flag. 2022-02-21 15:48:58 -05:00
Thomas Harte
159e869fe6 Justifies the templatisation. 2022-02-21 15:33:08 -05:00
Thomas Harte
76814588b8 Template Instruction on its content size. 2022-02-21 12:36:03 -05:00
Thomas Harte
1934c7faa2 Switch Decoder into a template. 2022-02-21 12:21:57 -05:00
Thomas Harte
9e9e160c43 Eliminate Ind[BXPlusSI/etc] in favour of specifying everything via a ScaleIndexBase. 2022-02-21 11:45:46 -05:00
Thomas Harte
546b4edbf1 Ensure ScaleIndexBase can be used constexpr; add note-to-self on indexing table. 2022-02-20 19:22:28 -05:00
Thomas Harte
63d8a88e2f Switch to holding the SIB as a typed ScaleIndexBase.
(and permit copy assignment)
2022-02-20 17:54:53 -05:00
Thomas Harte
75d2d64e7c Albeit that it requires nuanced shift/roll semantics, eliminates CL constant.
Shifts and rolls are already slightly semantically special for being undefined for values greater than 8/16/32 — i.e. in some implementations they don't even use the entirety of CL, just the low five bits. Which makes me feel a little better.

The upside of no ambiguity between eCX size 1 and CL justifies the trade.
2022-02-20 17:52:19 -05:00
Thomas Harte
a5113998e2 Accept that IN and OUT are going to have special semantics, thereby kill ::AX and ::DX. 2022-02-20 17:15:01 -05:00
Thomas Harte
4d2e8cd71d Adds a presently-unreachable step for SIB consumption. 2022-02-19 18:00:27 -05:00
Thomas Harte
30b355fd6f Chips away further at the legacy register names. 2022-02-18 18:37:47 -05:00
Thomas Harte
c257b91552 Update tests to preference away from [A/B/C/D]L. 2022-02-18 16:32:28 -05:00
Thomas Harte
12df7112da Starts adjusting the concept of a Source. 2022-02-17 11:32:09 -05:00
Thomas Harte
cd5ca3f65b Attempts a full decoding of the 80286 instruction set. 2022-02-10 17:13:50 -05:00
Thomas Harte
0bd63cf00f Introduces the easy F page instructions. 2022-02-10 09:35:05 -05:00
Thomas Harte
7ceb3369eb Attempts decoding of the 80186 set. 2022-02-09 17:51:48 -05:00
Thomas Harte
ae21726287 Splits 80186 additions from 80286; fills in a touch more. 2022-02-01 20:38:10 -05:00
Thomas Harte
a4da1b6eb0 Begins enumerating the 80286 and 80386 instructions. 2022-01-31 09:11:06 -05:00
Thomas Harte
85bfd2eba3 Remove further errant 'Awaiting's. 2022-01-31 08:22:07 -05:00
Thomas Harte
2d543590dc Make a noun, for better consistency. 2022-01-31 08:14:33 -05:00
Thomas Harte
18b6f17e86 With some refactoring makes some minor steps towards supporting gaps. 2022-01-06 17:24:31 -05:00
Thomas Harte
f37179d9f2 Gaps appear to contain pre-MFM data (?) 2022-01-02 15:39:26 -05:00
Thomas Harte
3e0b7d71d4 Properly handle partial bytes. 2022-01-01 19:09:19 -05:00
Thomas Harte
58d10943ed Add asserts to validate my reserve sizes. 2022-01-01 19:08:44 -05:00
Thomas Harte
dc920a04f6 Add missing #include. 2022-01-01 19:03:07 -05:00
Thomas Harte
d031381e70 Gaps provide content, and data chunk lengths seem to be in terms of unencoded bytes. 2022-01-01 18:47:07 -05:00
Thomas Harte
ed1b0b90f7 Makes a first attempt at encoding data. 2022-01-01 18:36:44 -05:00
Thomas Harte
38dd3c5c60 On second thoughts, no need to use a vector here. 2022-01-01 17:15:12 -05:00
Thomas Harte
d3189acaa6 Add a constexpr route that explicitly calculates the simplest possible form. 2022-01-01 17:14:52 -05:00
Thomas Harte
350c98ab4d Add those densities I've yet discovered the rules for. 2021-12-29 18:15:37 -05:00
Thomas Harte
4f3c754771 Adds exposition. 2021-12-27 19:15:46 -05:00
Thomas Harte
dc994f001d Mention units. 2021-12-27 18:55:11 -05:00
Thomas Harte
9b6ccbcc95 Parses data and gap stream elements. 2021-12-27 18:12:44 -05:00
Thomas Harte
9d3cf9c73c Collate descriptions of all tracks. 2021-12-26 14:49:51 -05:00
Thomas Harte
28572d4392 Enforce string-length requirement. 2021-12-26 09:12:44 -05:00
Thomas Harte
0433db0370 Eliminate macro. 2021-12-25 19:36:54 -05:00
Thomas Harte
a6b326da48 Parse the INFO record. 2021-12-25 18:17:13 -05:00
Thomas Harte
e457ce66ea Adds sanity checks around CAPS block. 2021-12-25 17:32:29 -05:00
Thomas Harte
c118dd8afe Adds just enough to list all the blocks in an IPF. 2021-12-25 17:27:50 -05:00
Thomas Harte
dba3a3d942 Add through route to an IPF container. 2021-12-25 17:06:47 -05:00
Thomas Harte
6c606b5506 Fix through route to TargetPlatform::TypeDistinguisher. 2021-12-25 17:06:12 -05:00
Thomas Harte
55dbeefeb2 Merge pull request #1005 from TomHarte/SerialPort
Adds empty callouts for all serial port registers.
2021-12-25 16:39:27 -05:00
Thomas Harte
4d9589af7c Merge pull request #1006 from TomHarte/Shared68000Tables
Minor 68000 style improvements.
2021-12-25 14:11:25 -05:00
Thomas Harte
ee625cb8a8 Minor style improvements; especially: don't assume value of NoBusProgram. 2021-12-25 14:05:38 -05:00
Thomas Harte
f20940a37b Give Program full ownership of the sentinel value.
In case I want to reduce the size of this field later.
2021-12-23 16:32:21 -05:00
Thomas Harte
32e0a66610 Trust the compiler with this bit field. 2021-12-23 16:28:55 -05:00
Thomas Harte
d9598b35c2 Add some additional metrics. 2021-12-23 16:27:54 -05:00
Thomas Harte
acba357df6 Adds empty callouts for all serial port registers. 2021-12-23 15:22:20 -05:00
Thomas Harte
7ce335d9da Merge pull request #1004 from TomHarte/FastRAM
Adds fast RAM to the Amiga, along with size selection for both fast & chip.
2021-12-23 11:43:42 -05:00
Thomas Harte
3caf9ca914 Remove a bunch of unused names. 2021-12-23 11:39:00 -05:00
Thomas Harte
fd569201ef Add Qt GUI for Amiga memory selection. 2021-12-23 11:28:44 -05:00
Thomas Harte
f094aa946a Add Mac GUI for Amiga memory selection. 2021-12-22 18:20:55 -05:00
Thomas Harte
a17c192a9e Allow chip RAM size selection, while I'm here. 2021-12-22 15:30:19 -05:00
Thomas Harte
1916a9b99c Remove stdout noise. 2021-12-22 15:22:28 -05:00
Thomas Harte
9796b308dc Add basic implementation of fast RAM. 2021-12-22 15:17:11 -05:00
Thomas Harte
bdf0a1941c Merge pull request #1002 from TomHarte/FastBlitterFills
Switch to a table-based implementation of fill mode.
2021-12-19 17:35:27 -05:00
Thomas Harte
d0e3024bec Switch to nibble-oriented lookup tables for fill mode. 2021-12-19 17:16:46 -05:00
Thomas Harte
d2ad149e56 Fill mode always runs right to left. 2021-12-19 16:43:18 -05:00
Thomas Harte
ad602a4722 Merge pull request #1001 from TomHarte/AmigaReadWrite
Ensures Chipset reads can map to writes and vice versa.
2021-12-19 16:35:43 -05:00
Thomas Harte
348840a2aa It's probably a net detriment to use a template in this scenario. 2021-12-19 16:31:44 -05:00
Thomas Harte
3a719633eb Consolidate interface; correct LOGs. 2021-12-18 19:39:41 -05:00
Thomas Harte
bd69948d37 The Copper can now skip Chipset::perform. 2021-12-18 17:53:11 -05:00
Thomas Harte
54aa211f56 Avoid infinite loops for completely undefined addresses. 2021-12-18 17:48:45 -05:00
Thomas Harte
f118891970 Breaks Chipset::perform into read and write.
This allows each to call the other when a read occurs of a write-only address, and vice versa.
2021-12-18 17:43:53 -05:00
Thomas Harte
c4055fde97 Merge pull request #1000 from TomHarte/CopperTests
Amiga: regularises timing; improves Copper sleep/wait costs
2021-12-18 16:46:53 -05:00
Thomas Harte
dbae3fc9a5 Propagate to bitplanes immediately; fix odd/even confusion. 2021-12-18 16:37:40 -05:00
Thomas Harte
7c73ed7ed5 Bump Xcode version number. 2021-12-18 14:55:27 -05:00
Thomas Harte
c834960bfb Withdraw separate x-and-y guess, make MOVE lose a cycle if a sleep/wake occurs. 2021-12-12 19:18:18 -05:00
Thomas Harte
600abc55b5 Compare x and y separately, wake immediately from a sleep, log more. 2021-12-12 17:26:33 -05:00
Thomas Harte
f3ec7d54bb Clarifies wait-for-CPU-slot semantics.
Big bonus: this guarantees `advance_dma`s will be called at most once per output cycle, even if they return `false`.
2021-12-09 19:17:44 -05:00
Thomas Harte
090760e526 Merge pull request #998 from TomHarte/QtAmiga
Add the Amiga to the Qt UI.
2021-12-08 13:45:34 -05:00
Thomas Harte
cccde7dc89 Correct given memory size. 2021-12-08 11:41:50 -05:00
Thomas Harte
849e48f519 Add the Amiga to Qt's UI. 2021-12-08 11:41:38 -05:00
Thomas Harte
1c3935eb40 Add README.md
As a warning.
2021-12-07 18:19:51 -05:00
Thomas Harte
466bed3163 Merge pull request #994 from TomHarte/AmigaREADME
Fess up to the Amiga.
2021-12-07 04:32:43 -05:00
Thomas Harte
641a9c72e9 Fess up to the Amiga. 2021-12-07 04:30:54 -05:00
Thomas Harte
5138216ba1 Merge pull request #978 from TomHarte/Amiga
Introduces nascent Amiga emulation
2021-12-07 04:18:53 -05:00
Thomas Harte
de1f5686a8 Reenable hardened runtime. 2021-12-07 04:05:10 -05:00
Thomas Harte
c983678fcd Reenable app sandbox. 2021-12-07 03:57:58 -05:00
Thomas Harte
2b0415d552 Attempt to avoid off-by-one buffer reads, add modulation. 2021-12-06 19:28:40 -05:00
Thomas Harte
066e4421e8 Attempt volcntrld. 2021-12-06 06:35:08 -05:00
Thomas Harte
f02a241249 Inserts an additional reload. 2021-12-05 17:47:12 -05:00
Thomas Harte
a5fe1e4259 Largely debugs audio state machine.
I think I'm still missing an address reload somewhere though, and attachment doesn't actually push.
2021-12-05 15:27:35 -05:00
Thomas Harte
9b80563443 Exposes targets for modulation. 2021-12-05 06:38:55 -05:00
Thomas Harte
91b5da06e3 Perform reload on Disabled -> WaitingForDummyDMA. 2021-12-04 19:17:40 -05:00
Thomas Harte
7320f96ae7 Capture attachment flags. 2021-12-04 18:02:43 -05:00
Thomas Harte
fdf2b9cd7b Add local data pointers. 2021-12-04 17:58:41 -05:00
Thomas Harte
bfc70a1b60 Ensure interrupt request bits always propagate. 2021-12-04 16:50:42 -05:00
Thomas Harte
aff7a93106 Move DMAFlags to Flags.hpp. 2021-12-04 08:26:28 -05:00
Thomas Harte
3b027c4593 Switch and -> or for testing transitions from ::PlayingLow. 2021-12-04 08:24:41 -05:00
Thomas Harte
42d3bdd373 Adds a begin_state template. 2021-12-04 07:20:17 -05:00
Thomas Harte
57789092c1 Keep audio fetches in bounds. 2021-12-03 07:16:21 -05:00
Thomas Harte
6bc5268cbd Reload period counter on low -> high transition. 2021-12-02 18:43:02 -05:00
Thomas Harte
887ab705d1 Add missing <cassert>. 2021-12-02 13:00:25 -05:00
Thomas Harte
ff6ddaed2e Full scale is 65536. 2021-12-02 12:55:11 -05:00
Thomas Harte
e6fe36f45c Add buffer-length assert; add <tuple> where std::tuple_size is used. 2021-12-02 12:53:20 -05:00
Thomas Harte
3a26f6b8bf Ensure full buffer provision. 2021-12-02 12:52:43 -05:00
Thomas Harte
06b6f85d55 Correct stereo. 2021-12-02 11:15:29 -05:00
Thomas Harte
d6f1ea50a6 Switch to slightly more straightforward presumption of no data wanted. 2021-12-02 09:41:16 -05:00
Thomas Harte
9554869886 Simplify DMA logic. 2021-12-02 09:33:02 -05:00
Thomas Harte
364059551c Add extra notes per errata, plus bonus state code repetitions. 2021-12-02 09:30:52 -05:00
Thomas Harte
06340b1ad7 Advance DMA pointer, treat audio as signed, request data on low -> high transition.
There's now some audio, sometimes when there should be. But it's not correct.
2021-12-01 18:34:54 -05:00
Thomas Harte
d23511860d Attempts audio output. 2021-12-01 06:01:58 -05:00
Thomas Harte
a8dd4660b2 Adds a pipeline for audio output. 2021-12-01 05:37:58 -05:00
Thomas Harte
eb3a0eb3c7 Attempt full implementation of collisions. 2021-11-29 18:39:33 -05:00
Thomas Harte
cd0148e0bc Switch to a default 1mb of Chip RAM. 2021-11-29 16:55:45 -05:00
Thomas Harte
8584ee609f Support a fetch window start on line 0. 2021-11-28 05:37:49 -05:00
Thomas Harte
373847e2b7 Avoid posting redundant key events. 2021-11-28 05:31:00 -05:00
Thomas Harte
84f7d8dfc2 Factors out pixel generation, adds HAM. 2021-11-28 05:06:30 -05:00
Thomas Harte
e057a7d0dd Attempts to implement sprite/playfield priorities. 2021-11-27 15:03:46 -05:00
Thomas Harte
7bab15bf99 Minor copy improvements. 2021-11-27 11:38:41 -05:00
Thomas Harte
dac40630fd Adds support for the Blitter-busy flag to WAIT and SKIP. 2021-11-27 11:36:15 -05:00
Thomas Harte
33bfa1b81c Move BitplaneShifter adjacent to expand_bitplane_byte. 2021-11-26 18:29:09 -05:00
Thomas Harte
8fc27dc292 Moves bitplane collection and shifter out of Chipset.[h/c]pp. 2021-11-26 18:16:24 -05:00
Thomas Harte
f8e8f18be5 Switch to std::clamp. 2021-11-26 18:10:29 -05:00
Thomas Harte
8b38c567d2 Add missing #include for std::clamp. 2021-11-26 18:08:39 -05:00
Thomas Harte
cd53e42d79 Resolve operator precedence. 2021-11-26 18:08:10 -05:00
Thomas Harte
bea6cf2038 Move mouse and joystick into a separate file, give a common parent. 2021-11-26 17:50:47 -05:00
Thomas Harte
eca80f1425 Sprites: avoid magic constants, ensure proper DMA resumption. 2021-11-26 16:02:18 -05:00
Thomas Harte
1c0962e53c Move sprites into their own source file. 2021-11-26 15:30:31 -05:00
Thomas Harte
4b21549ff4 Add a couple of static asserts. 2021-11-26 15:23:54 -05:00
Thomas Harte
30d7b0129b Correct sprite ordering within pairs. 2021-11-26 11:58:50 -05:00
Thomas Harte
ce6877d6e4 Sprites: infer part of DMA state from slot, no access during blank.
Also sets the proper vertical blank length.
2021-11-26 09:37:52 -05:00
Thomas Harte
0ab5177637 Allow DMAState::FetchStopAndControl on y == v_stop_. 2021-11-25 14:29:12 -05:00
Thomas Harte
276cbfa505 Simplify sprite state machine.
This now better matches the explanation given on Page 133 of the Amiga System Programmer's Guide.
2021-11-25 14:08:55 -05:00
Thomas Harte
610c85a354 Correct test logic.
All tests now pass.
2021-11-25 04:11:20 -05:00
Thomas Harte
012084b37b Fix exclusive fill, sizing, eliminate ECS call-ins.
The clock test now proceeds further, but still doesn't seem to pass.
2021-11-24 17:25:32 -05:00
Thomas Harte
55af6681af Avoid unnecessary get_port_input calls. 2021-11-24 17:15:48 -05:00
Thomas Harte
2a7a42ff8f Add header for assert. 2021-11-24 16:28:18 -05:00
Thomas Harte
7af5737ec5 Switch to LOG. 2021-11-24 16:15:40 -05:00
Thomas Harte
0ad1529f3f Retain delegate bit length for non-self-clocked data. 2021-11-24 16:15:27 -05:00
Thomas Harte
0df8173536 Merge branch 'master' into Amiga 2021-11-24 08:58:03 -05:00
Thomas Harte
b517811e2f Merge pull request #988 from TomHarte/HeaderOnly6502
Moves the 6502 towards being a header-only dependency.
2021-11-24 08:57:45 -05:00
Thomas Harte
83d3a9c6dd Merge branch 'master' into HeaderOnly6502 2021-11-24 08:48:36 -05:00
Thomas Harte
d0402261e6 Merge pull request #993 from TomHarte/PushAudio
Adds a push route for lowpass-filtered audio.
2021-11-24 08:47:10 -05:00
Thomas Harte
6f6e09d200 Correct: load -> store. 2021-11-22 15:18:12 -05:00
Thomas Harte
24e2fd4184 Avoid implicit conversion. 2021-11-22 11:28:02 -05:00
Thomas Harte
1aada996dc Correct consting. 2021-11-22 11:18:17 -05:00
Thomas Harte
f5d3d6bcea Splits the lowpass filter into push and pull variants. 2021-11-21 15:37:29 -05:00
Thomas Harte
a8a99f647f Further improves framing. 2021-11-21 08:13:55 -05:00
Thomas Harte
ff68b26c44 Push HSYNC 11 slots over, to its proper position, and add a frame crop. 2021-11-20 12:39:50 -05:00
Thomas Harte
a94b4f62fd Takes a stab at attached sprites. 2021-11-19 14:19:47 -05:00
Thomas Harte
bcc959d938 Sprites: deconflate vertical and modification flags; disarm on CTL not POS. 2021-11-19 08:03:10 -05:00
Thomas Harte
cf25d8a378 Increase logging (but leave it disabled). 2021-11-19 08:01:23 -05:00
Thomas Harte
c750bdafd5 Switch to a saturating conversion. 2021-11-18 18:01:30 -05:00
Thomas Harte
693d46f8ea Mask by index, not colour. 2021-11-18 05:36:38 -05:00
Thomas Harte
3496ebd1d7 Constrain sprite fetches to Chip RAM. 2021-11-17 17:49:42 -05:00
Thomas Harte
be763cf7fe Expose joystick to the world. 2021-11-17 15:33:46 -05:00
Thomas Harte
c3b4bee210 Adds a joystick class. 2021-11-17 14:26:51 -05:00
Thomas Harte
6df0227ab1 Hacks in a basic effort at dual playfields. 2021-11-16 18:26:27 -05:00
Thomas Harte
2a3a7fa8a0 Reset will_request_interrupt. 2021-11-15 16:00:35 -05:00
Thomas Harte
50a6496399 Avoids over-greedy DMA. 2021-11-15 12:31:15 -05:00
Thomas Harte
c99dee86dd Adds missing low -> high actions, implements more transitions. 2021-11-15 12:29:32 -05:00
Thomas Harte
0c5bb9626b Separates state transitions and tests. 2021-11-15 05:29:28 -05:00
Thomas Harte
a9971917f5 Attempts a translation of Commodore's documentation. 2021-11-14 14:54:33 -05:00
Thomas Harte
4c62611da3 Adds enough state machine to get into the near-incomprehensible stuff on the right. 2021-11-14 10:48:50 -05:00
Thomas Harte
47f36f08fb Switches to a synchronous audio state machine; renames advance -> advance_dma.
I can worry about how to just-in-time things once I better understand the hardware in general.
2021-11-13 15:53:41 -05:00
Thomas Harte
f906bab1a5 Provides feedback on interrupt flags, starts on state machine. 2021-11-13 11:05:39 -05:00
Thomas Harte
fffc03c4e4 Propagates time to the audio subsystem. 2021-11-12 15:30:52 -05:00
Thomas Harte
0f6934a131 This uses Cycles and HalfCycles, so should include ClockReceiver. 2021-11-11 09:24:32 -05:00
Thomas Harte
0a94184d6b Provides a greater wealth of audio data. 2021-11-11 09:24:15 -05:00
Thomas Harte
7be3578497 Adds a target for audio writes. 2021-11-09 07:11:23 -05:00
Thomas Harte
eeaccb8ac0 Implements clear_all_keys. 2021-11-08 17:49:09 -05:00
Thomas Harte
8ef9a932aa Adds inclusive fill test; fixes inclusive fills. 2021-11-07 14:26:13 -08:00
Thomas Harte
31e22e4cfb Provides full serial input. 2021-11-07 05:19:16 -08:00
Thomas Harte
4fc25fb798 Adds basic shift input. 2021-11-07 05:18:54 -08:00
Thomas Harte
941d9a46a2 Makes a better effort at exposition; better implements clocked line. 2021-11-07 05:18:40 -08:00
Thomas Harte
ecfe68d70f Introduce the principle that a Serial::Line can be two-wire — clock + data. 2021-11-06 16:54:20 -07:00
Thomas Harte
c0c2b5e3a9 Post key actions to the nominated serial line.
Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.
2021-11-06 12:03:09 -07:00
Thomas Harte
f102d8a4b4 Extend to allow full-[byte/word/dword] writes, in LSB or MSB order. 2021-11-06 12:01:32 -07:00
Thomas Harte
471e13efbc Transcribes keycodes. 2021-11-04 18:54:42 -07:00
Thomas Harte
6d34432988 Starts to build in a serial line for input. 2021-11-04 18:54:28 -07:00
Thomas Harte
d3f0d15732 Merge branch 'master' into Amiga 2021-11-03 19:27:06 -07:00
Thomas Harte
b827b9e33e Add necessary shift storage. 2021-11-03 19:26:45 -07:00
Thomas Harte
29e5ecc282 Add TODOs rather than complete stop on shift register acccesses. 2021-11-02 18:19:31 -07:00
Thomas Harte
c9bf2dda16 Attempt implementation of disk sync. 2021-11-02 18:18:59 -07:00
Thomas Harte
3ceb378b9b Relocate disk logic into a separate compilation unit. 2021-11-02 17:35:23 -07:00
Thomas Harte
1cf1c90511 Adds support for interlaced output. 2021-11-02 14:34:03 -07:00
Thomas Harte
491b9f83f2 Merge pull request #990 from mariuszkurek/master
Make SDL and Qt binary names consistent
2021-11-02 13:15:27 -07:00
Thomas Harte
d989825216 Add bonus notes on VPOSR. 2021-11-02 03:47:39 -07:00
Thomas Harte
3976420b88 Retains a little more of output controls. 2021-11-01 17:15:36 -07:00
Thomas Harte
2f1ce5fe43 Switch to using the swizzled palette for playfield output. 2021-11-01 14:44:30 -07:00
Thomas Harte
42145a5b8a Delay bitplane installation until end of slot. 2021-11-01 14:18:58 -07:00
mariuszkurek
04f4536cb2 Make SDL and Qt binary names consistent 2021-11-01 09:13:06 +01:00
Thomas Harte
4e66017205 Enable sprite reuse and toggle to inactive when visible region is over. 2021-10-31 16:52:48 -07:00
Thomas Harte
2c1f2edcf2 Introduce failing 'clock' test case.
i.e. a few seconds of the Workbench 1.0 clock application.
2021-10-31 16:12:51 -07:00
Thomas Harte
299d517449 Performs a first implementation of fill mode. 2021-10-31 14:36:31 -07:00
Thomas Harte
561e73dbd7 Merge branch 'Amiga' of github.com:TomHarte/CLK into Amiga 2021-10-31 14:12:40 -07:00
Thomas Harte
9e6ffaad7d Introduce test case for fill mode. 2021-10-31 14:12:26 -07:00
Thomas Harte
9cded1e92c Introduce test case for fill mode. 2021-10-31 14:08:37 -07:00
Thomas Harte
4c1ab6ff25 Rethinks bitplane stops. 2021-10-31 09:01:38 -07:00
Thomas Harte
16f31cab6a Avoid duplication of CIA select test. 2021-10-30 12:05:18 -07:00
Thomas Harte
02c88e6826 VHPOSR's fields are the other way around. 2021-10-30 12:04:46 -07:00
Thomas Harte
9ecd43238f Correct 8520 TOD setting and getting. 2021-10-30 12:02:43 -07:00
Thomas Harte
5ffe71346c Eliminate interrupt magic constants. 2021-10-29 19:04:06 -07:00
Thomas Harte
d25804f4a2 Throws in official register names. 2021-10-29 14:05:11 -07:00
Thomas Harte
edb75e69cb Implement bitplane modulos. 2021-10-29 11:29:22 -07:00
Thomas Harte
f3e895f17c Tag intended unused parameters. 2021-10-29 06:21:02 -07:00
Thomas Harte
b952d73e83 Disallow programmatic setting of blitter status. 2021-10-29 06:19:57 -07:00
Thomas Harte
07facc0636 Takes a stab at BZERO. 2021-10-28 18:12:46 -07:00
Thomas Harte
da1a69be27 Caps mouse speed.
Also takes another guess at CIA interrupt bits. To no avail.
2021-10-27 18:38:02 -07:00
Thomas Harte
7e31658932 Remove accidental commit. 2021-10-26 21:49:32 -07:00
Thomas Harte
5ebc59dd1f Introduce additional test cases. 2021-10-26 20:58:38 -07:00
Thomas Harte
b10f5ab110 Apply A mask when loading into barrel shifter. 2021-10-26 20:02:28 -07:00
Thomas Harte
b4286bb42b Modulos are subtracted in descending mode. 2021-10-26 07:21:51 -07:00
Thomas Harte
4d7ce3792f Use additional test cases. 2021-10-25 21:48:43 -07:00
Thomas Harte
76767da300 Undo accidental change. 2021-10-25 21:48:19 -07:00
Thomas Harte
dc8701a929 Introduce some additional Blitter test cases. 2021-10-25 21:40:20 -07:00
Thomas Harte
139d35c6f9 Switches to basic use of sprite shifters. 2021-10-25 20:58:48 -07:00
Thomas Harte
cb24457b4a Starts on a two-at-a-time sprite shifter. 2021-10-25 16:30:30 -07:00
Thomas Harte
9f3efb7f05 Limits graphical output to [all but one bit] of the display window. 2021-10-25 14:12:23 -07:00
Thomas Harte
e6001e0f22 Shifts bitplanes irrespective of output window. 2021-10-25 13:59:39 -07:00
Thomas Harte
c6535bf035 Switches bitplane shifter to returning four high-res pixels at a time. 2021-10-25 13:34:36 -07:00
Thomas Harte
7118a515e0 Reduce logging in trustworthy areas. 2021-10-23 20:36:41 -07:00
Thomas Harte
952451c9b8 Add mouse input. 2021-10-23 20:17:13 -07:00
Thomas Harte
610327a04e Fix sprite H start bit order. 2021-10-22 23:20:20 -07:00
Thomas Harte
2121e32409 Fix sprite bit ordering. 2021-10-22 21:10:01 -07:00
Thomas Harte
7ec21edc2f Attempts to hack in some form of sprite display. 2021-10-22 19:51:10 -07:00
Thomas Harte
003162f710 Limit to specific purpose. 2021-10-22 16:16:19 -07:00
Thomas Harte
040ac93042 Takes a shot at the vertical stuff of sprite DMA. 2021-10-22 14:32:59 -07:00
Thomas Harte
b489ba3d0d Adds sprite DMA windows. 2021-10-22 13:07:20 -07:00
Thomas Harte
c5e8b547af Captures the attach flag and observes activation rule. 2021-10-22 11:21:58 -07:00
Thomas Harte
e67de90ad0 Starts to bring sprites inside DMADevice orthodoxy. 2021-10-21 21:57:46 -07:00
Thomas Harte
c3c84c88a1 Switch to ahead-of-time planar to chunky conversion. 2021-10-21 20:48:57 -07:00
Thomas Harte
0dc9c4cee1 Undo hard-coding of fetch window. 2021-10-19 15:18:39 -07:00
Thomas Harte
544c137cb0 Add updated intel. 2021-10-16 13:30:56 -07:00
Thomas Harte
b312a61a81 Add two dummy reads. 2021-10-16 13:30:45 -07:00
Thomas Harte
4917556a99 The shift goes the other way in descending mode. 2021-10-16 11:09:40 -07:00
Thomas Harte
15ed4a0d09 Introduce failing test case for sector decoding. 2021-10-16 10:48:32 -07:00
Thomas Harte
aa6b0f07b7 Correct filename. 2021-10-16 05:37:46 -07:00
Thomas Harte
d9d20d9d30 Walk back slightly. 2021-10-14 18:02:58 -07:00
Thomas Harte
689bfbbdb3 Be overt in initialiser list. 2021-10-14 16:57:26 -07:00
Thomas Harte
e27a10bde4 Simplify control flow. 2021-10-14 16:47:18 -07:00
Thomas Harte
253a199f27 Fire sync-match interrupt upon any match. 2021-10-14 16:36:17 -07:00
Thomas Harte
61e5702520 Remove dead TODO. 2021-10-14 16:09:11 -07:00
Thomas Harte
b12c640807 Makes drives non-copyable.
To avoid error in the future.
2021-10-14 12:37:55 -07:00
Thomas Harte
9be23ecc34 Add end-of-Blit interrupt.
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
2021-10-13 15:09:19 -07:00
Thomas Harte
8960f471a0 Use unspread_bits for FM and MFM decoding. 2021-10-12 15:18:50 -07:00
Thomas Harte
955cb6411c Factor out bit spreading.
(And do a better job of it)
2021-10-12 14:49:01 -07:00
Thomas Harte
fc4ca4f8e3 I don't think there are sync words at the start of the track. 2021-10-12 10:38:15 -07:00
Thomas Harte
eec068914e Slightly improve logging. 2021-10-11 18:05:57 -07:00
Thomas Harte
a1f02d0cd8 Add track padding. 2021-10-11 18:05:37 -07:00
Thomas Harte
39b8285ba5 Trust the HRM on step bit, but catch rising edge. 2021-10-11 07:42:42 -07:00
Thomas Harte
7733fef3bd DSKLEN has to be written twice. 2021-10-11 06:16:01 -07:00
Thomas Harte
6acddfdb98 Add the sync match interrupt.
Albeit that it doesn't yet unblock disk DMA.
2021-10-11 03:37:56 -07:00
Thomas Harte
ec3d5c0b32 Increase maximum number of activity LEDs to eight. 2021-10-10 18:37:33 -07:00
Thomas Harte
99492c2ec2 Further tweak logging. 2021-10-10 18:19:50 -07:00
Thomas Harte
addf9f9af4 Moves block byte writes into Storage::Encodings::MFM::Encoder. 2021-10-10 16:06:51 -07:00
Thomas Harte
846b505d27 Reduce logging; disk data probably isn't the immediate obstacle. 2021-10-10 13:04:10 -07:00
Thomas Harte
c4cfcfab8e Checksums appear to be calculated as 32-bit quantities. 2021-10-10 12:58:10 -07:00
Thomas Harte
5e083426c5 Takes another run at checksums.
It turns out I'd read entirely the wrong section of the ADF FAQ. Am now trying to piece things together from various EAB threads.
2021-10-10 11:47:48 -07:00
Thomas Harte
8d43b4a98d Expands Disk DMA access window. 2021-10-10 11:47:02 -07:00
Thomas Harte
aeaea073c6 Switch both: (i) which bits are odd/even; and (ii) nibble ordering. 2021-10-09 13:45:19 -07:00
Thomas Harte
6b0dd19442 Name file appropriately: the logo comes from Kickstart. 2021-10-09 08:02:15 -07:00
Thomas Harte
9336ffe216 Take a stab at index-hole sync. 2021-10-09 08:01:02 -07:00
Thomas Harte
eb157f15f3 Adds index hole interrupt. 2021-10-09 04:08:59 -07:00
Thomas Harte
d6e2a3f425 Make a first attempt to spool into RAM. 2021-10-08 18:11:47 -07:00
Thomas Harte
b47ca13ed3 Push disk data onwards. 2021-10-08 17:18:11 -07:00
Thomas Harte
67546c4d6e Per the HRM, the index hole is connected to CIA B, potentially to raise an interrupt. 2021-10-08 17:12:37 -07:00
Thomas Harte
f72deb0a5c Correct RDY position. 2021-10-08 04:32:13 -07:00
Thomas Harte
616ccbb878 Correct ID bit placement, multiplex with motor state.
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
2021-10-08 04:05:57 -07:00
Thomas Harte
5899af0038 Starts accumulating disk data. 2021-10-07 05:11:32 -07:00
Thomas Harte
ed303310bb Spell out slightly more; this makes debugging a touch easier. 2021-10-06 13:40:48 -07:00
Thomas Harte
33ff4f3b5c Eliminate drive copies. 2021-10-06 13:40:28 -07:00
Thomas Harte
20bad38d42 Add drive activity lights. 2021-10-06 04:54:40 -07:00
Thomas Harte
92a07398cd I think CHNG works the other way around. 2021-10-06 04:47:52 -07:00
Thomas Harte
ce8f782577 Corrects meaning of IBM-style RDY. 2021-10-06 04:42:44 -07:00
Thomas Harte
e961d0b4a3 Switch RDY type. 2021-10-06 04:41:09 -07:00
Thomas Harte
2253ff656a Adds route for inserting disks. 2021-10-05 16:12:30 -07:00
Thomas Harte
18631399ad Attempts to clock the disk controller. 2021-10-05 15:38:56 -07:00
Thomas Harte
ad4afcdcd5 Switch stepping direction.
Empirically, based on the actions of Kickstart, and assuming my confusion is because the relevant signal is active low.
2021-10-05 15:23:48 -07:00
Thomas Harte
2cf5bcc5db Clarify logic somewhat. 2021-10-05 15:20:05 -07:00
Thomas Harte
1180ad7662 Disables a couple of now-trustworthy LOGs. 2021-10-05 06:51:47 -07:00
Thomas Harte
5463cd1ae3 Attempts to support stepping and head selection. 2021-10-05 06:36:17 -07:00
Thomas Harte
647ec770ce Implements motor latching, drive ID shift registers. 2021-10-05 05:12:01 -07:00
Thomas Harte
e47bec2e65 Switch CIA B ports over. 2021-10-05 03:38:11 -07:00
Thomas Harte
6566936be9 Be overt about the intended interface. 2021-10-04 16:45:33 -07:00
Thomas Harte
674941abdf Starts to add a disk controller. 2021-10-04 16:45:05 -07:00
Thomas Harte
b3f0ca39ed Adds some unused drives. 2021-10-04 08:12:13 -07:00
Thomas Harte
5ccb512883 Moves the CIAs into the Chipset class.
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
2021-10-04 06:44:54 -07:00
Thomas Harte
da286d5ae8 Switch spaces to tabs. 2021-10-04 05:27:25 -07:00
Thomas Harte
73e45511dc Add missing #include. 2021-10-04 05:26:38 -07:00
Thomas Harte
a282a51673 Remove last of the direct printf'ing. 2021-09-30 02:42:59 -04:00
Thomas Harte
b7b13e20d1 Single column blits should use both masks. 2021-09-29 22:49:35 -04:00
Thomas Harte
ad90c6b6ce Now that this is getting close, don't stop at the first error. 2021-09-29 22:19:34 -04:00
Thomas Harte
402fa41bc0 Corrects initial error value. 2021-09-29 22:19:17 -04:00
Thomas Harte
0b9ebafc0f Flip bit deserialisation order. 2021-09-28 22:12:13 -04:00
Thomas Harte
140e24ef15 Grab further copy flags. 2021-09-28 22:11:58 -04:00
Thomas Harte
0c998d60cb Correct test logic for line draws that repeatedly write to the same address. 2021-09-28 21:45:55 -04:00
Thomas Harte
ffcd2ea10c Attempts more properly to implement line mode. 2021-09-28 21:39:09 -04:00
Thomas Harte
cb460de94d Makes bad first attempt at a Bresenham inner loop. 2021-09-27 22:06:00 -04:00
Thomas Harte
f6624bf776 Edges mildly closer to line output. 2021-09-26 19:18:12 -04:00
Thomas Harte
b4b6c4d86f Attempts to support left and right masks. 2021-09-26 18:42:08 -04:00
Thomas Harte
759689ff31 Fix line mode flag, add busy status. 2021-09-26 18:16:00 -04:00
Thomas Harte
1dfc36f311 Flip loop, add modulo mappings. 2021-09-26 18:15:32 -04:00
Thomas Harte
1c03ff1d37 Fix bltdptl to bltbptl misstatement; remove pre-DMA writes. 2021-09-26 18:14:50 -04:00
Thomas Harte
19dd2f92bd Implements test case. Failing at present, naturally. 2021-09-25 21:52:41 -04:00
Thomas Harte
acfaa016a0 Adds a capture of traffic leading up to the Workbench boot logo.
Around which to construct a test case.
2021-09-25 18:10:07 -04:00
Thomas Harte
732761433a Merge branch 'master' into HeaderOnly6502 2021-09-23 23:00:11 -04:00
Thomas Harte
9012a7f5e1 Merge branch 'master' into Amiga 2021-09-23 23:00:03 -04:00
Thomas Harte
e957b471b2 Merge pull request #989 from TomHarte/Xcode13
Resolves Clang 13 implicit conversion warnings.
2021-09-23 22:59:42 -04:00
Thomas Harte
e5a5faa417 Resolves Clang 13 implicit conversion warnings. 2021-09-23 22:53:41 -04:00
Thomas Harte
313dbe05e0 Switch to more consistent inlining. 2021-09-23 22:36:15 -04:00
Thomas Harte
adf7124e2c Eliminate 6502Base.cpp. 2021-09-23 22:33:33 -04:00
Thomas Harte
c4ab2bbeed Hard-code fetch window width. For now. 2021-09-23 22:06:13 -04:00
Thomas Harte
42ef459e20 Resolve resting values. 2021-09-23 22:05:59 -04:00
Thomas Harte
cad1a9e0f1 Correct bit test. 2021-09-23 20:42:31 -04:00
Thomas Harte
f1d514470d Add note to future self. 2021-09-23 20:29:39 -04:00
Thomas Harte
9a7a54f22f Take alternative guess as to meaning of 'use' bits. 2021-09-23 18:42:12 -04:00
Thomas Harte
137d1c61bd Allow for channel enables and blitting direction. 2021-09-23 18:38:37 -04:00
Thomas Harte
adc071ed7a Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0. 2021-09-23 18:30:35 -04:00
Thomas Harte
e06f470044 Ensure no implicit conversion from int to IntT. 2021-09-23 18:30:04 -04:00
Thomas Harte
ab69fe56c9 Take a first shot at magical instant blitting. 2021-09-23 18:13:51 -04:00
Thomas Harte
60bad22a91 Correct fetch window. 2021-09-23 18:13:24 -04:00
Thomas Harte
7092429f7c Added some notes to self on line mode. 2021-09-20 23:08:26 -04:00
Thomas Harte
fa800bb809 Introduces code for minterm application. 2021-09-20 19:13:23 -04:00
Thomas Harte
e15f1103a0 Takes a shot at low resolution shifting. 2021-09-20 19:00:52 -04:00
Thomas Harte
a4263b5a8c Ties bitplane collection to line position.
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
2021-09-19 21:55:45 -04:00
Thomas Harte
3d85f820f4 Add missing file to kiosk project. 2021-09-16 21:29:11 -04:00
Thomas Harte
245b7baa61 Moves the Copper into its own file. 2021-09-16 21:17:23 -04:00
Thomas Harte
0eeaaa150a Correct Copper start address. 2021-09-16 21:01:37 -04:00
Thomas Harte
692d87f446 Attempts to restrict blitter slot allocation. 2021-09-16 19:56:28 -04:00
Thomas Harte
6572efe2a7 Clarifies word addressing. 2021-09-16 08:24:52 -04:00
Thomas Harte
8aac2bd029 Stubs in serial port status. 2021-09-14 21:53:07 -04:00
Thomas Harte
add11db369 Factors out DMADevice, which is now a parent of Blitter. 2021-09-14 20:51:32 -04:00
Thomas Harte
e47eab1d40 Merge branch 'master' into Amiga 2021-09-14 20:27:59 -04:00
Thomas Harte
2f86dfdf2b Merge pull request #987 from TomHarte/IIgsImprovements
Further iterates the IIgs towards full functionality.
2021-09-14 20:27:25 -04:00
Thomas Harte
fa71ae3174 Add apology. 2021-09-14 20:23:36 -04:00
Thomas Harte
dfcd1508c9 Establishes valid initial BRAM. 2021-09-10 19:56:20 -04:00
Thomas Harte
0ca4631279 Switch to zero-initialised state; be more careful about resetting data. 2021-09-09 23:08:13 -04:00
Thomas Harte
7e5fc4444a Default to ROM01. 2021-09-09 22:09:09 -04:00
Thomas Harte
a6221ca322 Reload data only if an output is found. 2021-09-09 22:07:03 -04:00
Thomas Harte
d8e42c4379 Tweak guess at initial state. 2021-09-09 22:06:36 -04:00
Thomas Harte
3bf109ae0b Merge pull request #986 from TomHarte/IIgsSync
Stabilises Apple IIgs display.
2021-09-09 20:14:40 -04:00
Thomas Harte
dd37fa49a0 Stabilises Apple IIgs display. 2021-09-09 20:08:15 -04:00
Thomas Harte
3227ec72a2 Merge branch 'master' into Amiga 2021-09-08 21:08:47 -04:00
Thomas Harte
ee324c3d89 Merge pull request #985 from TomHarte/68000Improvements
68000: fix E alignment, expand Microcycle::apply.
2021-09-08 21:08:33 -04:00
Thomas Harte
863971f944 68000: fix E alignment, expand Microcycle::apply. 2021-09-08 21:03:37 -04:00
Thomas Harte
fd70f7ad43 Attempts to make pixel content observeable. 2021-09-08 20:57:26 -04:00
Thomas Harte
6e034c9b7f At least manages to place a pixel region on screen.
Albeit that I've suddenly realised that I've failed properly to think about high-res versus low-res.
2021-08-11 20:31:37 -04:00
Thomas Harte
52e375a985 Move towards playfield decoding. 2021-08-11 18:47:35 -04:00
Thomas Harte
635c1eacd5 Merge branch 'master' into Amiga 2021-08-11 17:31:17 -04:00
Thomas Harte
f49ba18627 Merge pull request #983 from TomHarte/MachinePickerLayout
macOS: cleans up layout of machine picker.
2021-08-11 17:30:58 -04:00
Thomas Harte
6dbce96781 Switch to non-breaking space, to avoid orphan word. 2021-08-11 17:28:37 -04:00
Thomas Harte
9ec42f0f8f Cleans up bottom constraints. 2021-08-11 17:12:01 -04:00
Thomas Harte
10a5e7313f Makes a buggy first attempt at bitplane data collection. 2021-08-10 21:28:48 -04:00
Thomas Harte
ec9cb21fae Starts towards bitplane collection. 2021-08-10 19:01:41 -04:00
Thomas Harte
fdd02ad6a6 Neaten, slightly. 2021-08-10 09:20:34 -04:00
Thomas Harte
76e9fcc94a Obey blitter DMA-enable mask. 2021-08-10 09:19:15 -04:00
Thomas Harte
e412927415 Logs a bit more from the Blitter, gives it access to slots. 2021-08-10 07:17:01 -04:00
Thomas Harte
dda154c7c6 Adds nonsense disk reads, which seems to lead to bitplane and blitter requests.
Progress, at last!
2021-08-09 20:31:14 -04:00
Thomas Harte
9215535bee Adds a container for the disk controller.
Thereby appears to prove that my Amiga is getting as far as attempting to load from floppy.
2021-08-09 17:35:09 -04:00
Thomas Harte
27726fd2d1 Merge branch 'master' into Amiga 2021-08-09 17:24:06 -04:00
Thomas Harte
77befb7f8e Correct Atari ST text placement; add missing Enteprise constraint. 2021-08-09 17:14:37 -04:00
Thomas Harte
86c6248b48 Merge branch 'master' into Amiga 2021-08-09 17:09:04 -04:00
Thomas Harte
f2af8ff25d Merge pull request #981 from TomHarte/ColourPrecision
Increase precision of phase interpolation.
2021-08-09 17:08:17 -04:00
Thomas Harte
7d8894415c Increase precision of phase interpolation. 2021-08-09 15:48:27 -04:00
Thomas Harte
f8380d2d4c Add 8250 feature of 'count, regardless'. 2021-08-08 22:32:41 -04:00
Thomas Harte
5cc25d0846 Adds a further sanity assert. 2021-08-08 21:52:52 -04:00
Thomas Harte
1502c4530e Takes a further step towards real timing. 2021-08-08 21:52:28 -04:00
Thomas Harte
c1df4d1c0b Mirroring is correct. 2021-08-08 20:20:12 -04:00
Thomas Harte
1f9e41e9cb Ensure TOD isn't firing from power-on. 2021-08-08 18:51:58 -04:00
Thomas Harte
e402e690b0 Assume and test that divide-by-zero posts the PC of the offending instruction. 2021-08-07 17:51:00 -04:00
Thomas Harte
6a15bb15ca Adds a simpler way of deferring single values. 2021-08-07 17:29:21 -04:00
Thomas Harte
3255fc91fa Merge branch 'Amiga' of github.com:TomHarte/CLK into Amiga 2021-08-07 17:00:54 -04:00
Thomas Harte
7f2610c4fc Disambiguates serial control logs. 2021-08-07 16:57:30 -04:00
Thomas Harte
79bd3eb6ae Merge branch 'Amiga' of github.com:TomHarte/CLK into Amiga 2021-08-07 16:56:40 -04:00
Thomas Harte
b11dd6950c Adds an entry for DiagROM. 2021-08-07 16:56:18 -04:00
Thomas Harte
98bd6fc240 Adds a further logging hint. 2021-08-06 23:16:06 -04:00
Thomas Harte
8be053fd35 Fixes top constraint for Atari ST. 2021-08-06 22:57:45 -04:00
Thomas Harte
99fee22a9f Adjusts defaults. 2021-08-06 22:13:21 -04:00
Thomas Harte
084d002353 Adds the Amiga to macOS File -> New... 2021-08-06 21:58:31 -04:00
Thomas Harte
dcbc9847a3 Attempts to get E synchronisation correct. 2021-08-05 20:08:34 -04:00
Thomas Harte
db3c158215 Further increases logging. 2021-08-05 20:07:14 -04:00
Thomas Harte
25e2bd307a Sets VPA for CIA accesses; logs a little more. 2021-08-05 20:06:48 -04:00
Thomas Harte
b9f78f5d33 Fix final timer B test. 2021-08-03 22:27:23 -04:00
Thomas Harte
b4ec9d70da Adds the CNT input. 2021-08-03 22:19:41 -04:00
Thomas Harte
738999a8b7 Further expands list of applied tests. 2021-08-03 22:08:50 -04:00
Thomas Harte
dd91d793d9 Correct typo. 2021-08-03 21:45:44 -04:00
Thomas Harte
1f0bf1b32d Merge pull request #980 from adamsmasher/improve-apple-ii-kb
Improve raw keyboard handling for original Apple ][
2021-08-03 21:14:06 -04:00
Thomas Harte
8e51e8eb77 Does just a touch of 6526 TOD work. 2021-08-03 21:13:08 -04:00
Thomas Harte
6210605bc7 Transfers full TOD responsibility onto the chip-specific templates. 2021-08-03 19:10:09 -04:00
Thomas Harte
0245b040b0 Splits TOD storage by model.
TOD storage will probably end up being a full-on class.
2021-08-03 18:50:58 -04:00
Thomas Harte
34c1cc5693 Adds entry points for all remaining tests.
Failing now: the TB123s, which are TOD related, both CIA2 tests, and CIA1TAB (which I think needs me to implement Port B output toggling).
2021-08-03 17:19:35 -04:00
Thomas Harte
8795719c18 This counts reloads, most accurately. 2021-08-03 17:12:08 -04:00
Thomas Harte
6bbbf43341 At least attempts to chain correctly. 2021-08-03 17:03:58 -04:00
Thomas Harte
f0ef45f0ca Introduces two further tests. 2021-08-03 16:58:51 -04:00
Thomas Harte
ee6039bfa5 Writes to a timer _during reload_ now have effect.
Net: one CIA test passed.
2021-08-03 16:57:05 -04:00
Thomas Harte
ef58ce6277 Gets a bit more rigorous about the clocking stage.
Albeit without advancing relative to the test.
2021-08-02 21:04:00 -04:00
Thomas Harte
15de5e98c4 Adds [partial] test for whether counters are linked. 2021-08-02 20:17:37 -04:00
Thomas Harte
38848ca2db Rationalises reload logic and cuts storage.
Failure point is now chaining, I think.
2021-08-02 20:14:01 -04:00
Thomas Harte
77c627e822 Ensure that reading the interrupt flags really clears the master bit.
Also makes some guesses on one-shot and reload timing. Alas the test isn't in itself specific enough to be more systematic here.
2021-08-02 07:47:08 -04:00
Thomas Harte
c640132699 Reinstates clocking. 2021-08-01 21:35:08 -04:00
Thomas Harte
60b09d9bb0 Increases compile-time logging options. 2021-08-01 21:22:33 -04:00
Thomas Harte
57dd38aef2 Reintroduces reload-on-off, adds interrupt delay. 2021-08-01 21:09:02 -04:00
Thomas Harte
460a6cb6fe Attempts a more literal implementation. 2021-08-01 18:14:10 -04:00
Adam Smith
fdb676da4e . 2021-08-01 00:26:14 -07:00
Thomas Harte
26aaddaa33 Adds further documentation. 2021-07-30 21:34:22 -04:00
Thomas Harte
e51151e558 Adds readme related to C64 ROMs.
Necessary for the Lorenz 6526 tests. I've no current plans to work on the C64.
2021-07-30 21:23:12 -04:00
Thomas Harte
f576baf214 I'm not yet sure this is the best approach, but starts trying to make use of Lorenz's 6526 tests. 2021-07-30 21:21:16 -04:00
Thomas Harte
5c1ac05170 Add documentation. 2021-07-30 21:20:45 -04:00
Thomas Harte
1bae4973bc Post the serial control write onwards. 2021-07-30 18:24:27 -04:00
Thomas Harte
3d9f86c584 Begins keyboard sketches and notes. 2021-07-30 18:23:15 -04:00
Thomas Harte
3514e537ca Minor logging tweaks. 2021-07-30 18:22:59 -04:00
Thomas Harte
3d160ce85f Add another potential warning. 2021-07-30 18:21:38 -04:00
Thomas Harte
b78090ec76 Fixes IOPortsAndTimers classification. 2021-07-28 19:39:42 -04:00
Thomas Harte
759007ffc1 Attempts to route CIA interrupts. 2021-07-28 19:36:30 -04:00
Thomas Harte
37a55c3a77 Corrects 6526 interrupt control write.
This seems to imply that the 6526 should be interrupting too.
2021-07-28 19:26:02 -04:00
Thomas Harte
69ae9d72c8 Remove dead non-access. 2021-07-27 22:27:20 -04:00
Thomas Harte
604232acd9 Establish appropriate word-size mask. 2021-07-27 22:23:38 -04:00
Thomas Harte
82205d71cc Breaks up loop for arithmetic simplicity. 2021-07-27 21:59:27 -04:00
Thomas Harte
402eab10f8 Breaks video output while attempting to pull it into the main loop. 2021-07-27 21:33:07 -04:00
Thomas Harte
b6bf4d73ad Blitter-finished bit aside, attempts to complete the Copper. 2021-07-27 21:10:14 -04:00
Thomas Harte
5425b5c423 Adds some form of WAITing to the Copper. 2021-07-27 19:32:55 -04:00
Thomas Harte
29cd8504ca Implements enough Copper to get a first store. 2021-07-27 19:06:16 -04:00
Thomas Harte
3544746934 Modifies interface, starts on scheduler.
Probably corrects the pixel clock, which I think was scaled up by a factor of 4.
2021-07-27 16:41:18 -04:00
Thomas Harte
d8f814f1c4 If I'm going to push only a single colour, might as well make it fast. 2021-07-26 21:19:43 -04:00
Thomas Harte
a43175125a Assuming I'm going to keep this synchronous, extends function signature. 2021-07-26 20:13:06 -04:00
Thomas Harte
1d03bc560a Stores the colour palette, uses entry 0 as my new always output. 2021-07-26 18:59:11 -04:00
Thomas Harte
3832acf6e3 Produces a static white box, at least. 2021-07-26 18:51:01 -04:00
Thomas Harte
7894b50321 Starts towards an actual pixel output loop. 2021-07-26 18:44:20 -04:00
Thomas Harte
ffded619e6 Returns track 0 found, as a guess. 2021-07-26 18:44:01 -04:00
Thomas Harte
bcb7bb5cce Improves logging further.
To investigate the new perpetual loop.
2021-07-26 17:02:30 -04:00
Thomas Harte
87dcd82f69 Makes a first attempt at some sort of interrupt functionality. 2021-07-26 16:40:42 -04:00
Thomas Harte
e671cc6056 Add stubs for joystick/mouse querying. 2021-07-26 16:21:51 -04:00
Thomas Harte
5da89b88a6 Add missing space. 2021-07-25 22:17:55 -04:00
Thomas Harte
5d60c1f20b Stubs in Paula. 2021-07-25 22:16:31 -04:00
Thomas Harte
7fd00165c9 Switch to [hard-coded] PAL, for now.
In the hope that I get to see some graphics soon, this should better conform to my expectations.
2021-07-25 20:41:51 -04:00
Thomas Harte
34d4420e8c Correct reading of top byte of counter 2. 2021-07-25 20:41:15 -04:00
Thomas Harte
20da194fab Log slightly more accurately. 2021-07-25 19:59:24 -04:00
Thomas Harte
8d2d4c850f Revoke temporary debugging. 2021-07-25 19:59:10 -04:00
Thomas Harte
b7bed027d7 Ensures the value initially loaded to A7 is aligned.
This is a bit of a guess; it's likely to be true though per the rule that A7 is always kept aligned.
2021-07-25 19:55:23 -04:00
Thomas Harte
fcd6b7b0ea Takes further aim at the conters.
I think test cases are needed, probably.
2021-07-24 16:06:49 -04:00
Thomas Harte
ceca32ceb3 Takes a guess at one-shot mode. 2021-07-24 15:53:18 -04:00
Thomas Harte
e3bb9fc1d7 Increase logging. 2021-07-23 23:10:00 -04:00
Thomas Harte
77a8ddb95c Edges towards working counters. 2021-07-23 22:43:47 -04:00
Thomas Harte
c733a4dbf8 Beefs up interrupt awareness. 2021-07-23 21:58:52 -04:00
Thomas Harte
d898a43dff Implements time-of-day counters, provisionally.
Interrupts to do.
2021-07-23 21:24:07 -04:00
Thomas Harte
6216d53b1a Adds a faster flushing HalfCycles -> Cycles conversion. 2021-07-23 20:07:57 -04:00
Thomas Harte
86c30769d9 Add a divide-by-ten for the CIAs. 2021-07-23 19:25:53 -04:00
Thomas Harte
956a6dbd64 Improve commentary. 2021-07-23 19:23:54 -04:00
Thomas Harte
68fe19818e Expose more information about the E clock state. 2021-07-23 19:22:00 -04:00
Thomas Harte
de208ead4e Stubs in enough to get back into a persistent loop. 2021-07-22 22:00:53 -04:00
Thomas Harte
69d62560b4 Adds comment to avoid potential future error. 2021-07-22 22:00:33 -04:00
Thomas Harte
87d2fc1491 Adds enough raster position to return something. 2021-07-22 21:45:51 -04:00
Thomas Harte
2bc9af09e1 Factors out the chipset. 2021-07-22 21:16:23 -04:00
Thomas Harte
26f4758523 Makes a further accommodation for PermitRead/Write. 2021-07-22 21:11:25 -04:00
Thomas Harte
6123349b79 Stubs in control registers and disables exit-on-miss.
I think I may be running up against the limits of stubbing now. Probably time to implement some stuff.
2021-07-22 19:28:01 -04:00
Thomas Harte
d1ac54fe92 Stubs in sprite containers. 2021-07-22 19:00:26 -04:00
Thomas Harte
9468adf737 Stubs in Copper addresses. 2021-07-22 18:51:23 -04:00
Thomas Harte
e85db40b0f Sketches out a blitter class. 2021-07-22 18:43:07 -04:00
Thomas Harte
b3d55cc16d Adds non-committal reads for some write-only registers.
The hardware now proceeds to trying to talk to the Blitter. So that's next.
2021-07-22 16:10:30 -04:00
Thomas Harte
56b62a5e49 Adds a dummy interrupt control register. 2021-07-22 16:09:32 -04:00
Thomas Harte
3ee1fc544f Fix: (1) memory base adjustment; (2) out-of-bounds writes. 2021-07-21 21:49:20 -04:00
Thomas Harte
5401744dc0 Add additional asserts. 2021-07-21 21:47:44 -04:00
Thomas Harte
fe10a10ac2 Correct address on stack upon priviliege exception. 2021-07-21 21:46:55 -04:00
Thomas Harte
ba2e5a97a9 Provisionally adds a status LED. 2021-07-19 22:31:36 -04:00
Thomas Harte
4515d1220c Switches CIA A/B byte connections; applies reset to memory map. 2021-07-19 22:17:40 -04:00
Thomas Harte
486959bce8 With minor additional logging, it appears the Amiga just keeps resetting itself. 2021-07-19 21:50:35 -04:00
Thomas Harte
e1a410bf3d Further mildly increases logging. 2021-07-19 20:54:32 -04:00
Thomas Harte
3767cc7c0b Increase logging; fix set/clear of interrupt enable mask. 2021-07-19 19:03:37 -04:00
Thomas Harte
96b0ce9ef2 Merge branch 'master' into Amiga 2021-07-18 22:16:05 -04:00
Thomas Harte
038ed0551e Merge pull request #979 from TomHarte/Warnings
Resolve all dangling GCC warnings.
2021-07-18 22:15:45 -04:00
Thomas Harte
cfaf4a8a65 Add advised brackets; clarify type punning. 2021-07-18 22:11:11 -04:00
Thomas Harte
22dd8a8847 Stubs onward to a second endless loop. 2021-07-18 20:55:33 -04:00
Thomas Harte
b2ae8e7a4a Adds a type for the operation bitfield. 2021-07-18 20:54:54 -04:00
Thomas Harte
3e2bac8129 Stubs in enough to get to a permanent loop. 2021-07-18 20:25:43 -04:00
Thomas Harte
50b9d0e86d Logically, I think this should be unsigned. 2021-07-18 20:25:22 -04:00
Thomas Harte
a030d9935e Adds port input. 2021-07-18 20:25:04 -04:00
Thomas Harte
c425dec4d5 Makes some attempt to get as far as the overlay being disabled. 2021-07-18 17:17:41 -04:00
Thomas Harte
67d53601d5 Latch and return data direction.
Albeit with no port-handling effect yet.
2021-07-18 12:23:47 -04:00
Thomas Harte
622cca0acf Adds sufficient address decoding to print a more helpful exit message. 2021-07-18 12:13:56 -04:00
Thomas Harte
48999c03a5 Adds concept of time, captured port handler. 2021-07-18 11:49:10 -04:00
Thomas Harte
377cc7bdcd Start to introduce a 6526/8250. 2021-07-18 11:36:13 -04:00
Thomas Harte
a5d0976c2d Eliminate unused #includes. 2021-07-18 11:35:57 -04:00
Thomas Harte
ae05010255 Improve indentation. 2021-07-18 11:29:26 -04:00
Thomas Harte
66cacbd0e0 Be overt about the type being supplied. 2021-07-18 11:28:18 -04:00
Thomas Harte
b1616be4b8 Gets to what is probably a CIA access? 2021-07-17 21:36:20 -04:00
Thomas Harte
a0a9a72d8f Begins sketching out a memory mapper. 2021-07-17 21:10:06 -04:00
Thomas Harte
0cfc7f732c Extends to support read/write permissions in apply. 2021-07-17 21:09:52 -04:00
Thomas Harte
f7de6f790c Meanders vaguely towards a memory map. 2021-07-16 21:42:17 -04:00
Thomas Harte
d1f3b5ed80 Obtains a Kickstart ROM, adds a 68000. 2021-07-16 21:07:12 -04:00
Thomas Harte
7925dcc5a2 Advances far enough for the Amiga to be autonomous. 2021-07-16 20:49:12 -04:00
Thomas Harte
6ade36bf09 Adds an empty shell of a machine. 2021-07-16 20:30:48 -04:00
Thomas Harte
c52945aab5 Adds passthrough for Amiga media. 2021-07-16 20:15:36 -04:00
Thomas Harte
2b0a4055f7 Makes an attempt at Amiga ADF encoding. 2021-07-16 20:07:17 -04:00
Thomas Harte
7cb16a3fc5 Introduces a shell for Amiga ADF decoding. 2021-07-16 18:11:07 -04:00
Thomas Harte
0b80c1988b Add Amiga enums. 2021-07-16 17:59:08 -04:00
Thomas Harte
eab9bc1503 Make implicit conversion explicit. 2021-07-16 17:45:14 -04:00
Thomas Harte
5bfedff8d1 Mutate dangling printf to a LOG. 2021-07-16 17:32:05 -04:00
Thomas Harte
c8638c0ffb Merge pull request #977 from TomHarte/MouseFade
Slightly adjusts macOS mouse hiding semantics.
2021-07-16 17:25:59 -04:00
Thomas Harte
8a95b91e2a Merge pull request #976 from TomHarte/DiskIIClocking
Correct Disk II sleeping test to allow for spin-down.
2021-07-16 17:22:04 -04:00
Thomas Harte
c226be612f Slightly adjusts mouse hiding semantics.
This allows the Macintosh and ST to fade out volume and settings even without having captured the mouse.
2021-07-16 17:21:25 -04:00
Thomas Harte
c8699d9770 Correct Disk II sleeping test to allow for spin-down. 2021-07-16 17:12:57 -04:00
Thomas Harte
a0799e14cc Merge pull request #975 from TomHarte/LEDStyles
Classify some LEDs as 'persistent'
2021-07-15 22:05:14 -04:00
Thomas Harte
dea6048849 Add documentation. 2021-07-15 22:00:10 -04:00
Thomas Harte
813e252539 Ignore hidden files. 2021-07-15 21:57:25 -04:00
Thomas Harte
b41e29a83b Slows CPC typer to avoid dropped characters. 2021-07-15 21:54:02 -04:00
Thomas Harte
d35c7ad127 Take advantage of persistence flag for more intelligent LED presentation. 2021-07-15 21:49:11 -04:00
Thomas Harte
ea63415d0e Exposes persistent LED flag to Swift. 2021-07-15 21:34:14 -04:00
Thomas Harte
52ea3b741c Introduces a presentation flag for LEDs.
All existing receivers ignore it.
2021-07-15 21:26:02 -04:00
Thomas Harte
2731ca8c92 Merge pull request #974 from TomHarte/KickstartROMs
Introduces Amiga ROMs to the catalogue.
2021-07-15 21:14:50 -04:00
Thomas Harte
af1ade9433 Introduces Amiga ROMs to the catalogue. 2021-07-15 21:09:20 -04:00
Thomas Harte
fc248951cc Merge pull request #973 from TomHarte/TransientActivity
Converts activity indicators to transient in-window presentation.
2021-07-15 20:15:33 -04:00
Thomas Harte
84547ee1c1 Reduce spurious in-window appearances. 2021-07-15 19:53:40 -04:00
Thomas Harte
a42848c62f Add windowed LED reappearance upon blink.
Also fix crash-at-startup for fullscreen.
2021-07-15 19:51:23 -04:00
Thomas Harte
c7b5d69431 Add extra usage hint. 2021-07-15 19:50:43 -04:00
Thomas Harte
81374b70b5 Switch to transient LED presentation in windowed mode. 2021-07-15 19:22:23 -04:00
Thomas Harte
47a530fd5c Fixes LED ordering.
Still work to do on capturing the proper window title.
2021-07-14 22:01:42 -04:00
Thomas Harte
58451d7c0c Attempts to incorporate LEDs into the window title when in windowed mode. 2021-07-14 21:43:58 -04:00
Thomas Harte
5c8f8c76fe Thus ends the View menu. 2021-07-14 21:02:58 -04:00
Thomas Harte
ae1d1bdb5b Wires up controller for QuickLoadOptions. 2021-07-14 21:02:04 -04:00
Thomas Harte
33cc1154a2 Simplify ViewFader and avoid second-guessing when to hard-set opacity. 2021-07-14 20:50:41 -04:00
Thomas Harte
4bc0b75c30 Ensure Macintosh controller is effective. 2021-07-14 20:50:12 -04:00
Thomas Harte
eb8ec1efb1 Makes ViewFader the full master of fading. 2021-07-14 19:03:44 -04:00
Thomas Harte
616f8efc47 Improves optional hysteresis. 2021-07-13 23:40:15 -04:00
Thomas Harte
29e4369420 Attempts to switch activity indicators to smart in-window presentation. 2021-07-13 23:32:00 -04:00
Thomas Harte
bd7f7bc8d7 Remove dead 'show options'. 2021-07-13 22:28:03 -04:00
Thomas Harte
e689ca92c4 Minor rearrangements, for cleanliness. 2021-07-13 22:26:50 -04:00
Thomas Harte
4ef3005072 Merge pull request #972 from TomHarte/InWindowOptions
macOS: moves machine options into the emulation window
2021-07-13 22:06:08 -04:00
Thomas Harte
174c837767 Switches to a logarithmic volume dial. 2021-07-13 21:45:07 -04:00
Thomas Harte
486bb911a9 Adapts ZX80/81 options. 2021-07-13 21:26:20 -04:00
Thomas Harte
754221d697 Adapts QuickLoadOptions.
Not that it currently seems to be used.
2021-07-13 21:21:02 -04:00
Thomas Harte
3c36c90729 Adapts QuickLoadCompositeOptions. 2021-07-13 21:17:52 -04:00
Thomas Harte
3d1d15a25b Updates the Oric options. 2021-07-13 19:32:23 -04:00
Thomas Harte
000d99f26c Adapts the Macintosh options. 2021-07-13 19:26:29 -04:00
Thomas Harte
524e2abc8c Adapts composite options. 2021-07-13 19:19:47 -04:00
Thomas Harte
00bab98e09 Converts the Apple II options into an in-window view. 2021-07-13 19:14:54 -04:00
Thomas Harte
6d98349be1 Fully invests in options controllers, distinct from the views.
Per MVC, I should have been doing something closer to this from day one.
2021-07-13 19:04:24 -04:00
Thomas Harte
d24d153c08 Use modern constraint specification, add layers to XIBs. 2021-07-12 22:55:53 -04:00
Thomas Harte
b01561712c Tightens spacing slightly. 2021-07-12 22:49:42 -04:00
Thomas Harte
324edcb391 Starts towards using an in-window options panel.
With the same fade in/out behaviour as the volume control.
2021-07-12 22:38:08 -04:00
Thomas Harte
6e62e4e296 Merge branch 'master' of github.com:TomHarte/CLK 2021-07-12 22:01:25 -04:00
Thomas Harte
f81ecbf4a0 Force icons back to white. 2021-07-12 22:01:19 -04:00
Thomas Harte
4370456323 Switch to an NSVisualEffectView for volume controls.
It provides a background that better contrasts with arbitrary content.
2021-07-12 21:28:04 -04:00
Thomas Harte
a424ed7c00 Makes for slightly more straightforward constraints. 2021-07-12 19:25:06 -04:00
Thomas Harte
a2065f59a1 Adds a 0.1 second pause before exit-related menu fadeout.
This is because the system may post a quick succession of exits and enters if the view hierarchy changes.
2021-07-12 19:12:04 -04:00
Thomas Harte
c1bd7f5c67 Pull release links up closer to the lede. 2021-07-12 10:03:03 -04:00
Thomas Harte
5810a1a98e Merge pull request #971 from TomHarte/ChaseHQ
Flip meaning of INT1 input read.
2021-07-09 22:48:01 -04:00
Thomas Harte
a4c011e3c0 Flip meaning of INT1 input read. 2021-07-09 22:39:51 -04:00
Thomas Harte
337fd15dc0 Merge pull request #970 from TomHarte/SwiftUniformity
Swift: be consisted on `.selectedTag()`.
2021-07-08 22:43:57 -04:00
Thomas Harte
9bc94f4536 Be consisted on .selectedTag(). 2021-07-08 22:38:54 -04:00
Thomas Harte
3f4cf35384 Merge pull request #969 from TomHarte/SixMHz
Adds the option of running an Enterprise at 6MHz.
2021-07-08 22:36:22 -04:00
Thomas Harte
4dd7f2cc09 Add 6Mhz option to Qt UI. 2021-07-08 22:30:35 -04:00
Thomas Harte
1b29cc34c4 Correct input list. 2021-07-08 22:22:48 -04:00
Thomas Harte
53c3c1f5ab Allows macOS users to select the 6MHz Enterprise. 2021-07-08 18:50:37 -04:00
Thomas Harte
6225abd751 Adds 6MHz Enterprise option. 2021-07-07 20:57:04 -04:00
Thomas Harte
c6fcd9a1eb Merge pull request #968 from TomHarte/DaveAudio
Dave: apply ring modulation during sync, too.
2021-07-06 23:41:37 -04:00
Thomas Harte
30fbb6ea53 Ensure run command is issued. 2021-07-06 23:16:16 -04:00
Thomas Harte
0e49258546 Remove caveman debugging. 2021-07-06 23:15:53 -04:00
Thomas Harte
264b8dfb28 Dave: apply ring modulation even in sync mode. 2021-07-06 23:11:30 -04:00
Thomas Harte
6a15b8f695 Merge pull request #967 from TomHarte/EnterpriseTiming
Correct Enterprise timing error.
2021-07-06 22:48:58 -04:00
Thomas Harte
5167d256cc Remove detritus. 2021-07-06 22:43:17 -04:00
Thomas Harte
16bd826491 Reduce nesting. 2021-07-06 22:32:59 -04:00
Thomas Harte
55af8fa5d9 Avoid erroneous Nick delays. 2021-07-06 22:28:44 -04:00
Thomas Harte
1ec8ff20af Ensure data bus is 0xff during interrupts. 2021-07-06 21:58:17 -04:00
Thomas Harte
99a65d3297 Merge pull request #966 from TomHarte/DaveUnifiedTimer
Switches to a unified counter for 1/50/1000Hz Dave interrupts.
2021-07-06 21:50:32 -04:00
Thomas Harte
94907b51aa Remove redundant parameter. 2021-07-06 20:47:49 -04:00
Thomas Harte
0085265d13 Test for a longer period; fix expected tone 1 count. 2021-07-06 20:46:22 -04:00
Thomas Harte
8e0893bd42 Clarifies control flow. 2021-07-06 20:28:32 -04:00
Thomas Harte
704dc9bdcb Improves test, to assert that state toggles happen at interrupts. 2021-07-06 20:25:32 -04:00
Thomas Harte
7a673a2448 Avoid confusing temporary storage. 2021-07-06 20:23:09 -04:00
Thomas Harte
33e2a4b21c Minor cleanups. 2021-07-06 20:20:13 -04:00
Thomas Harte
3e6b804896 Switches to linked 1/50/1000 Hz timers, and per-interrupt state toggling. 2021-07-06 20:12:44 -04:00
Thomas Harte
e98165a657 Merge pull request #965 from TomHarte/DaveDivider
Ensure two-cycle pauses in 12MHz mode.
2021-07-04 21:13:05 -04:00
Thomas Harte
2a7727d12b Merge branch 'master' into DaveDivider 2021-07-04 21:02:09 -04:00
Thomas Harte
c20e8f4062 Honours 8/12Mhz selection in non-video delays. 2021-07-03 23:05:09 -04:00
Thomas Harte
4ca9db7d49 Merge pull request #963 from TomHarte/DaveDivider
Obey Dave's 8/12MHz programmable divider.
2021-07-03 23:00:11 -04:00
Thomas Harte
4add48cffb Obey Dave's 8/12MHz programmable divider. 2021-07-03 22:43:20 -04:00
Thomas Harte
adbfb009f8 Merge pull request #960 from TomHarte/QtLEDs
Ensure LEDs are cleared between machines in Qt.
2021-07-03 19:17:51 -04:00
Thomas Harte
43ceca8711 Use type alias. 2021-07-03 19:10:39 -04:00
Thomas Harte
3ef28a4f03 Remove unused instance variable. 2021-07-03 19:10:29 -04:00
Thomas Harte
adcd580d5b Ensure LEDs are cleared upon a new machine. 2021-07-03 19:06:15 -04:00
Thomas Harte
5715c9183f The target is now definitely used. 2021-07-03 15:20:37 -04:00
Thomas Harte
ceb62ac7f9 Reenable the hardened runtime for macOS. 2021-07-03 13:41:32 -04:00
Thomas Harte
bda0756620 Merge pull request #959 from TomHarte/WriteCrash
Corrects buffer placement of decoded sectors.
2021-07-03 13:41:00 -04:00
Thomas Harte
6b47fb38c6 Corrects buffer placement of decoded sectors. 2021-07-03 13:36:01 -04:00
Thomas Harte
38bf8a06a7 Merge pull request #958 from TomHarte/EnterpriseFloatingBus
Makes a guess re: the Enterprise floating bus
2021-07-03 13:26:19 -04:00
Thomas Harte
196651d9aa Consolidates TODO. 2021-07-03 13:08:53 -04:00
Thomas Harte
6b46212a4e Deal with dangling TODO. 2021-07-03 13:07:41 -04:00
Thomas Harte
2a6fff2008 Takes a stab at what might happen if you read from Nick. 2021-07-03 13:06:07 -04:00
Thomas Harte
c5944efe50 Adds various method definitions. 2021-07-03 12:56:56 -04:00
Thomas Harte
f384370b18 Switch what's left of Enterprise logging to actual LOGs. 2021-07-03 12:50:46 -04:00
Thomas Harte
0c09275a9f Merge pull request #957 from TomHarte/EnterpriseTimingWindow
Correct various Enterprise timing discrepancies.
2021-07-03 12:47:29 -04:00
Thomas Harte
278671cdb9 Correct Nick interrupt prediction. 2021-07-03 00:05:13 -04:00
Thomas Harte
964d2d4fa4 Be consistent in expression of logic. 2021-07-03 00:00:00 -04:00
Thomas Harte
f371221dba Add a quick test of tone generator 1. 2021-07-02 23:57:11 -04:00
Thomas Harte
27b0579ec6 Avoid stack-error test case.
Also test that the interrupt is generated on the downward stroke.
2021-07-02 23:55:43 -04:00
Thomas Harte
283092cfbc With a unit test in aid, corrects some lingering TimedInterruptSource issues. 2021-07-02 23:41:19 -04:00
Thomas Harte
614953a222 Allows the low-pass filter to react to high-pass effects. 2021-07-02 22:36:35 -04:00
Thomas Harte
4fffb3cf19 Allow that final Z80 cycle to start anywhere in the first three of Nick's window of six. 2021-07-02 22:29:35 -04:00
Thomas Harte
850aa2b23a Merge pull request #956 from TomHarte/EnterpriseComposite
Adds Enterprise composite video option.
2021-07-02 22:22:09 -04:00
Thomas Harte
d715e5fd1d Expose composite/RGB option in Qt. 2021-07-02 21:51:48 -04:00
Thomas Harte
7826a26c7b Adds Enterprise composite video option.
While enabling more pixels on the left for RGB mode.
2021-07-02 21:42:09 -04:00
Thomas Harte
dc0a82cf9a Merge pull request #955 from TomHarte/FAT12
Adds a FAT12 parser.
2021-07-02 21:33:54 -04:00
Thomas Harte
2e60c81bd6 Enter :dir as a complete command. 2021-07-02 21:15:48 -04:00
Thomas Harte
763b9ba0ec Ensure the splash screen is skipped for self-booting disks. 2021-07-02 21:11:54 -04:00
Thomas Harte
bae8bb0c00 Gives the FAT parser responsibility for right trims. 2021-07-02 19:50:27 -04:00
Thomas Harte
bcf483fb7e Adds some basic loading command assistance. 2021-07-02 19:42:43 -04:00
Thomas Harte
a5b7d819a7 Correct FAT parser. 2021-07-02 19:28:13 -04:00
Thomas Harte
fe07a0b1d8 Starts to add a FAT[12] parser. 2021-07-02 18:56:43 -04:00
Thomas Harte
d9231e5d4a Merge pull request #954 from TomHarte/stddefRedux
The FIRFilter interface depends upon size_t.
2021-07-02 17:26:37 -04:00
Thomas Harte
b7aa1a1c84 The FIRFilter interface depends upon size_t. 2021-07-02 17:21:53 -04:00
Thomas Harte
32e144115d Add missing article, plus other minor corrections. 2021-07-02 11:03:14 -04:00
Thomas Harte
177cc96f49 Merge pull request #953 from TomHarte/stddef
Add missing stddef header where size_t is used.
2021-07-01 23:29:56 -04:00
Thomas Harte
51d98ef9ab Add missing stddef header where size_t is used. 2021-07-01 23:15:32 -04:00
Thomas Harte
2327c48cc4 Merge pull request #952 from TomHarte/EnterpriseTyper
Add typer support for the Enterprise.
2021-07-01 22:59:04 -04:00
Thomas Harte
742d44a532 Switch to an activity-based typing trigger; add a target loading command. 2021-07-01 22:53:23 -04:00
Thomas Harte
52b96db2b9 Correct syntax, mapping and inter-key timing. 2021-07-01 21:18:15 -04:00
Thomas Harte
0b9de78c38 Add typer support for the Enterprise. 2021-07-01 21:05:03 -04:00
Thomas Harte
2c28cb8c57 Merge pull request #951 from TomHarte/EnterpriseMention
Add Enterprise screenshots
2021-06-30 22:24:43 -04:00
Thomas Harte
483fe82e9d Add a second image, to even things out. 2021-06-30 22:23:26 -04:00
Thomas Harte
29492d6138 Add an Enterprise screenshot. 2021-06-30 22:18:29 -04:00
Thomas Harte
19310e32c4 Adds the Enterprise 64/128 as a bullet-pointed item.
No relevant screenshots yet.
2021-06-30 08:06:20 -04:00
Thomas Harte
c04a395499 Merge pull request #950 from TomHarte/Enterprise
Adds emulation of the Enterprise
2021-06-29 21:37:38 -04:00
Thomas Harte
1c424833a9 Correct EXDOS ROM name. 2021-06-29 21:04:53 -04:00
Thomas Harte
a46ff5590d Adds Enterprise new machine dialogue for Qt. 2021-06-29 21:04:17 -04:00
Thomas Harte
ab059b63fd Add Enterprise to Qt project file. 2021-06-29 20:36:28 -04:00
Thomas Harte
3d8fc9952d Remove dead TODO, correct for overflow position. 2021-06-29 15:44:02 -04:00
Thomas Harte
8ce8fbd977 Provide correct input when one of the tone generators is the interrupt source. 2021-06-29 15:41:08 -04:00
Thomas Harte
7f08218b28 The Nick interrupt input also seems to be a live poll, not a retrieval of the mask.
This corrects the two pieces of software I knew not to be working.
2021-06-28 22:10:11 -04:00
Thomas Harte
2c139ad931 Adds some notes to self.
I think I'm starting to find enough information to handle tapes.
2021-06-28 22:03:06 -04:00
Thomas Harte
1119779c8b Ensure EXDOS card is completely disabled if no FDC is present. 2021-06-28 21:47:53 -04:00
Thomas Harte
5351ac560f Ensure the motor goes off for unselected drives. 2021-06-28 21:40:12 -04:00
Thomas Harte
49f0ab0f15 Add note to self.
Although I still think there may be some issue lurking.
2021-06-28 21:31:55 -04:00
Thomas Harte
a5c57e777e VRES appears to work negatively in attribute mode too. 2021-06-28 21:24:13 -04:00
Thomas Harte
3c59042388 Fixes initial state for 1kHz. 2021-06-28 21:08:41 -04:00
Thomas Harte
919e211bc4 Reduces number of interrupt-related sequence points. 2021-06-28 19:30:12 -04:00
Thomas Harte
daa0737ce4 Ensure addresses tick upwards even during sync/burst; correct 2/4/8bpp character sizing. 2021-06-28 19:00:51 -04:00
Thomas Harte
36805cb120 Correct tone channel interrupts, remove dead warning. 2021-06-27 23:21:00 -04:00
Thomas Harte
7de69e9874 Makes an attempt to round out the timed interrupts. 2021-06-27 23:09:11 -04:00
Thomas Harte
b93575bbcc Spots that b0 and b2 of 0xb4 are 'dividers', not enables. 2021-06-27 22:33:20 -04:00
Thomas Harte
116e0f0105 Interupts 1kHz and 50Hz interrupts, while edging towards tone generator interrupts. 2021-06-27 22:08:38 -04:00
Thomas Harte
e4a650aaff Implements the 1Hz interrupt. 2021-06-27 21:47:21 -04:00
Thomas Harte
b5312b9ba0 get_interrupt_line can be const. 2021-06-27 21:37:11 -04:00
Thomas Harte
6afee7bb9b Captures appropriate fields.
No action yet.
2021-06-27 21:36:55 -04:00
Thomas Harte
5729e6e13a Corrects potential JustInTimeActor overflow. 2021-06-27 21:36:41 -04:00
Thomas Harte
2f53b105bb The Enterprise is now an Activity::Source; also sketches out the owner of Dave's timed interrupt logic. 2021-06-27 21:02:04 -04:00
Thomas Harte
b698056f78 Correct divisor. 2021-06-27 17:39:13 -04:00
Thomas Harte
95c906f03d Takes a serious shot at back_map. 2021-06-27 17:36:25 -04:00
Thomas Harte
be19fa9dde This mapping needs to know where it will occur. 2021-06-27 17:30:09 -04:00
Thomas Harte
81e9ba5608 This is correct from the Enterprise's side of things, I think.
I just need to complete the missing part of JustInTimeActor. After I do some empirical testing of this.
2021-06-27 17:24:21 -04:00
Thomas Harte
f2d7b9f6a9 Apply a crop, allow time until Z80 slot to be a future-based query. 2021-06-27 17:13:07 -04:00
Thomas Harte
1ea034310a Edge up very close to video waits.
I just need to implement back conversions that include marginal phase over in the JustInTimeActor.
2021-06-27 16:28:01 -04:00
Thomas Harte
bdcab447f9 Add a further accessor. 2021-06-27 16:27:26 -04:00
Thomas Harte
10bf6744aa Correct typo. 2021-06-27 16:26:55 -04:00
Thomas Harte
895d98e266 Implements out-of-video-area pauses. 2021-06-27 16:11:22 -04:00
Thomas Harte
903e343895 Attempts to complete Dave's audio duties. 2021-06-27 14:06:49 -04:00
Thomas Harte
f8b7c59616 Corrects tone frequency. 2021-06-26 23:51:43 -04:00
Thomas Harte
fcd267a3f9 Starts implementing noise. 2021-06-26 23:48:53 -04:00
Thomas Harte
f8bb66d2a0 Attempts an essentially-complete implementation of tone channels. 2021-06-26 23:39:59 -04:00
Thomas Harte
90782d3c27 Corrects for IntType != int. 2021-06-26 23:39:37 -04:00
Thomas Harte
f2336d2efc I think reloads occur after overflow, not before. 2021-06-26 23:16:00 -04:00
Thomas Harte
c2d093fa3c Respect user volume input.
Basic tones are now present. Neato!
2021-06-24 22:27:02 -04:00
Thomas Harte
1a97cc8a91 Start making some effort towards audio generation. 2021-06-24 22:21:01 -04:00
Thomas Harte
c34a548fa0 Ensure character pixel reads can't go out of bounds. 2021-06-24 22:19:50 -04:00
Thomas Harte
d1b89392a2 Improve exposiiton. 2021-06-24 22:18:31 -04:00
Thomas Harte
ed734754e5 Adds a through route for IMG files. 2021-06-24 21:04:21 -04:00
Thomas Harte
520c3c9218 Corrects colour deserialisation.
Long story short: the documentation I'm reading inexplicably lists the bits in reverse order. Luckily, a lot of the other documentation doesn't.
2021-06-24 20:59:04 -04:00
Thomas Harte
9230cf1726 Corrects bug when left_ or right_margin_ = 0. 2021-06-24 20:28:50 -04:00
Thomas Harte
6e616972a5 Better binds margin tests to window movements; simplifies line parameter addressing. 2021-06-24 18:55:15 -04:00
Thomas Harte
f98888824d Switches to an overt active/inactive state machine. 2021-06-24 18:34:21 -04:00
Thomas Harte
6c8b23e708 Alters 4bpp mapping; adds character mode 4bpp and 8bpp. 2021-06-23 19:35:47 -04:00
Thomas Harte
2c2bb3765f Withdraws the EPDOS option.
At least for now; it's something to worry about later.
2021-06-23 19:32:34 -04:00
Thomas Harte
0d165740ea Honours memory size request. 2021-06-22 21:48:55 -04:00
Thomas Harte
88f0f2b623 Adds to the macOS UI and wires through all Enterprise options. 2021-06-22 21:39:07 -04:00
Thomas Harte
0afa143375 Add missing include. 2021-06-22 21:31:46 -04:00
Thomas Harte
8319aca351 Correct syntax errors. 2021-06-22 20:50:03 -04:00
Thomas Harte
a66734883a Starts sketching out Dave. 2021-06-22 19:33:41 -04:00
Thomas Harte
d2ab0dd839 Adds a quick way to get the compiler to pick an integral type. 2021-06-22 19:33:29 -04:00
Thomas Harte
2574407afb Relocates MinIntTypeValue to Numeric. 2021-06-22 19:33:02 -04:00
Thomas Harte
83a54fd6d2 Use the FAT12 boot sector to determine geometry. 2021-06-22 06:54:17 -04:00
Thomas Harte
e062780968 Extends back to 128kb and stops halting on unrecognised ports. 2021-06-22 06:15:42 -04:00
Thomas Harte
3acd0be1f7 Copy and paste 2bpp character support. 2021-06-21 23:27:13 -04:00
Thomas Harte
69c0734975 WD1770: switch motor on even if spin-up is disabled. 2021-06-21 23:26:55 -04:00
Thomas Harte
c1678d7be7 Corrects exposition and transmission of drive selection.
What a klutz I've been.
2021-06-21 22:56:25 -04:00
Thomas Harte
117f9a9794 Adds notes on intended meaning of status register. 2021-06-21 07:31:58 -04:00
Thomas Harte
b49cc407c6 Adds some guesses as to the EXDos expansion.
... with plenty left to do.
2021-06-20 22:30:27 -04:00
Thomas Harte
954386f1cc Creates a shell for the disk-drive add-on card. 2021-06-20 20:50:23 -04:00
Thomas Harte
d7ff6bd04d Adds necessary declarations to install a DOS ROM. 2021-06-20 20:30:54 -04:00
Thomas Harte
6025516f9f Ensure addresses increment even when there's no target for pixels. 2021-06-20 14:31:02 -04:00
Thomas Harte
d8b9cdf7a2 Correct multiplier. 2021-06-20 14:25:37 -04:00
Thomas Harte
09dbff39f2 Also map keypad to F keys.
This is a pragmatic and arguably Apple-centric decision. But also it's fairly arbitrary, as the Enterprise doesn't have a number pad.
2021-06-20 14:25:28 -04:00
Thomas Harte
2fe15a6168 Switch to idealised Nick clock rate. 2021-06-20 14:21:56 -04:00
Thomas Harte
07dc26f8fa Adds TODO to resolve screen jumping. 2021-06-19 23:41:29 -04:00
Thomas Harte
a08d65b1ff Adds IMG -> Enterprise connection.
Albeit still without an Enterprise static analyser.
2021-06-19 23:16:33 -04:00
Thomas Harte
199621db08 Observes that the actual guess here is MS-DOS-style. 2021-06-19 23:11:51 -04:00
Thomas Harte
0e1e8c7faa Attempts to support the panoply of EXOS and BASIC versions. 2021-06-19 22:59:09 -04:00
Thomas Harte
42a98e1676 Fix composition with empty nodes. 2021-06-19 22:13:17 -04:00
Thomas Harte
23e26e0333 Attempts to complete handling of VRES. 2021-06-19 22:00:19 -04:00
Thomas Harte
fadb04f3f3 Attempts to implement LSBALT and MSBALT. 2021-06-19 21:57:26 -04:00
Thomas Harte
4968ccf46d Corrects attributed mode. 2021-06-19 13:08:14 -04:00
Thomas Harte
1dcac304d3 Implements the ALTIND bits and attempts ATTR mode. 2021-06-19 13:04:18 -04:00
Thomas Harte
1651efe4fc Ensures all keys are initially unpressed. 2021-06-19 13:03:31 -04:00
Thomas Harte
8f24aed43e Slightly reduces logging. 2021-06-18 23:17:44 -04:00
Thomas Harte
a381374e31 Drops back down to 64kb. 2021-06-18 23:14:44 -04:00
Thomas Harte
9411c37d23 Fleshes out the keyboard map. 2021-06-18 23:14:35 -04:00
Thomas Harte
6af6f21868 Attempts to implement interrupt latches and clears. 2021-06-18 22:59:41 -04:00
Thomas Harte
9a0022cfcb Removes temporary work. 2021-06-18 18:44:07 -04:00
Thomas Harte
266310d9c2 Fixes automatic flushing for non-1/1-clocked actors. 2021-06-18 18:43:08 -04:00
Thomas Harte
fbf1adef05 Introduces unit test and thereby seemingly fixes get_next_sequence_point.
There's still improper output in the actual machine though, so maybe something else is afoot?
2021-06-18 17:44:17 -04:00
Thomas Harte
311ddfb05a Add note to self for tomorrow. 2021-06-17 22:34:52 -04:00
Thomas Harte
2fd8a8aa66 Begins addition of interrupt feedback from Nick.
Also fixes clock rate. Though clearly get_next_sequence_point isn't quite right yet.
2021-06-17 22:30:24 -04:00
Thomas Harte
0c3e9dca28 Adds some basic keyboard inputs.
I think the next thing required is interrupts though.
2021-06-17 20:47:56 -04:00
Thomas Harte
c331d15429 Makes space to allow for 64kb EXOS ROMs.
I think some of the later ROMs have a more thorough memory test, which might provide better detail on whatever's going on here.
2021-06-16 22:25:00 -04:00
Thomas Harte
4414e96710 Adds enough text mode for now.
Discovered: a memory fault is being reported at startup.
2021-06-16 21:42:20 -04:00
Thomas Harte
7161783a4f Adds lpixel output. 2021-06-16 21:16:26 -04:00
Thomas Harte
cbac48da86 Attempts full run at pixel mode. 2021-06-16 20:43:22 -04:00
Thomas Harte
d9142d5427 Adjusts declared scale, accurately to communicate pixel clock. 2021-06-15 22:39:44 -04:00
Thomas Harte
e5e988b28f Adds an incorrect assumed-pixel-mode serialiser.
This actually shows something a bit like the Enterprise boot logo.
2021-06-15 22:31:50 -04:00
Thomas Harte
e94e051c87 Adds an allocator for pixels. 2021-06-15 22:03:41 -04:00
Thomas Harte
5fc91effb5 Corrects top border. 2021-06-15 21:48:11 -04:00
Thomas Harte
6c9dacbe89 Stabilises display, albeit that top border mode now appears to be off. 2021-06-15 21:31:07 -04:00
Thomas Harte
6a7eb832cc Introduces almost-stable block-level frame generation. 2021-06-15 20:55:58 -04:00
Thomas Harte
60cf8486bb Makes a genuine attempt at real line counting.
No output yet though.
2021-06-15 18:57:14 -04:00
Thomas Harte
90b8163d54 Add exposition. 2021-06-15 17:44:39 -04:00
Thomas Harte
a1e4389f63 Give Nick some RAM to inspect and just enough sense to know when it should reload its line parameter table. 2021-06-15 17:43:13 -04:00
Thomas Harte
440b11708b Adds an unused CRT. 2021-06-14 23:11:48 -04:00
Thomas Harte
f90dce5c54 Take a guess at Nick timing. 2021-06-14 22:56:26 -04:00
Thomas Harte
606c7709cf Shims in enough to get the Z80 to run perpetually.
Notably I don't actually currently know how the interrupt registers work, but getting some sort of display running might be the first order of business.
2021-06-14 22:28:31 -04:00
Thomas Harte
1d1e6d1820 Adds a shell of a Nick. 2021-06-14 22:19:25 -04:00
Thomas Harte
3eb4dd74a2 Exposes memory control.
Machine now runs as far as trying to interact with Nick.
2021-06-14 21:45:12 -04:00
Thomas Harte
853914480c Revised guess; there's a jump to C02E almost immediately. 2021-06-14 21:40:19 -04:00
Thomas Harte
fe04410681 Merge branch 'master' into Enterprise 2021-06-14 21:30:49 -04:00
Thomas Harte
1f686c4e6b Add missing AppleIIOptionsPanel class. 2021-06-14 21:30:30 -04:00
Thomas Harte
2a2ac1227b Makes first attempt at giving the Z80 something to do. 2021-06-14 21:29:56 -04:00
Thomas Harte
b5340c8f74 Correct syntax. 2021-06-14 21:17:35 -04:00
Thomas Harte
196c4dcdd9 Adds an appropriate ROM request. 2021-06-14 21:17:09 -04:00
Thomas Harte
c5a86f0ef7 Add Enterprise parts of the static analyser. 2021-06-14 21:11:06 -04:00
Thomas Harte
88f2a2940b Add Enterprise source paths. 2021-06-14 21:07:35 -04:00
Thomas Harte
26b019a4d4 Removes assumption that all machines produce audio. 2021-06-14 21:02:55 -04:00
Thomas Harte
5f7b3ae313 Adds bare minimum to get a non-functional machine. 2021-06-14 21:02:40 -04:00
Thomas Harte
61c127ed2e Adds Enterprise as a File -> New... machine.
And, similarly, exposes it for the route used by SDL.
2021-06-14 20:55:39 -04:00
Thomas Harte
333981e2a7 Merge branch 'master' into Enterprise 2021-06-13 22:22:44 -04:00
Thomas Harte
423fbc9ac7 Merge pull request #949 from TomHarte/QtSnapshotDragAndDrop
Adds drag-and-drop snapshot support for Qt.
2021-06-13 21:48:42 -04:00
Thomas Harte
1c1719e561 Adds drag-and-drop snapshot support for Qt. 2021-06-13 21:41:20 -04:00
Thomas Harte
56c30e1651 Merge pull request #948 from TomHarte/QtAspectRatio
Ensures Apple II square pixels work correctly under OpenGL
2021-06-13 21:23:28 -04:00
Thomas Harte
1ea4130035 Avoid OpenGL restretching bug. 2021-06-13 19:46:47 -04:00
Thomas Harte
57713d63fa Avoids regression of selected tab upon app restart. 2021-06-13 19:38:56 -04:00
Thomas Harte
d18a537509 Fiddles with the preprocessor to make kiosk mode match other OSes even on macOS. 2021-06-13 19:28:05 -04:00
Thomas Harte
8e0a6df03b Merge branch 'master' into Enterprise 2021-06-10 21:41:57 -04:00
Thomas Harte
95a52a9f62 Merge pull request #947 from TomHarte/AppleIISquarePixels
Adds optional square pixel output for the Apple II
2021-06-08 18:04:08 -04:00
Thomas Harte
ae2993625c Add missing header. 2021-06-08 17:54:30 -04:00
Thomas Harte
0982141442 Corrects many minor errors. 2021-06-08 17:52:39 -04:00
Thomas Harte
85fab2abc4 Takes a swing at adding a square pixels toggle for Qt. 2021-06-08 17:37:46 -04:00
Thomas Harte
de3b37799c Switches to a static_cast. No need for reflection here. 2021-06-08 17:37:28 -04:00
Thomas Harte
70851f3b2d Resolve misplacement. 2021-06-07 21:43:26 -04:00
Thomas Harte
462bbf2e40 Exposes square pixels option on macOS. 2021-06-07 21:21:45 -04:00
Thomas Harte
778b9ef683 Ensures set_square_pixels is exposed, works around OpenGL aspect ratio bug. 2021-06-07 20:41:02 -04:00
Thomas Harte
96e7eb1bed Adds a use-square-pixels option for the Apple II. 2021-06-07 20:16:01 -04:00
Thomas Harte
05671f3553 Merge pull request #946 from TomHarte/OptionalOricColourROM
Introduces a new grammar for ROM requests.
2021-06-06 22:47:46 -04:00
Thomas Harte
6e4832f999 Ensures Oric honours absence of the colour ROM. 2021-06-06 22:43:53 -04:00
Thomas Harte
54e3332673 Ensure optionals appear at the end of any ROM request list. 2021-06-06 22:36:26 -04:00
Thomas Harte
6c559d7556 Fix lead-in text. 2021-06-06 22:02:11 -04:00
Thomas Harte
9165a85484 Correct wstring conversion. 2021-06-06 21:58:38 -04:00
Thomas Harte
98ada2588a Resolve name confusion. 2021-06-06 21:51:51 -04:00
Thomas Harte
43f686c22d Correct return type and map insertion. 2021-06-06 21:44:37 -04:00
Thomas Harte
4a2673d757 Make a prima facie attempt to adapt the Qt build. 2021-06-06 20:47:25 -04:00
Thomas Harte
f27e331462 Updates autotests to new RomFetcher world. 2021-06-06 20:34:55 -04:00
Thomas Harte
dd64aef910 Improves request construction and improves descriptions. 2021-06-06 20:25:26 -04:00
Thomas Harte
95971f39f1 Reintroduces full messaging to macOS. 2021-06-06 20:02:13 -04:00
Thomas Harte
83beb3c0e6 Introduces slightly-less manual ROM::Request::visit. 2021-06-06 18:28:02 -04:00
Thomas Harte
76335e5cf2 Factors out and slightly generalises textual descriptions of ROM::Descriptions. 2021-06-06 18:15:00 -04:00
Thomas Harte
4494320238 Corrects the macOS Swift side of things. 2021-06-06 14:56:43 -04:00
Thomas Harte
5acd97c860 Puts enough in place for a GUI-led installation process.
... and provides a lot of the Objective-C wiring necessary to expose that to Swift.
2021-06-06 14:24:38 -04:00
Thomas Harte
b0f551c307 Ensures only _missing_ ROMs are reported. 2021-06-05 21:09:35 -04:00
Thomas Harte
b6b3d845a3 Correct Apple IIe and Enhanced IIe startup. 2021-06-04 22:48:08 -04:00
Thomas Harte
505d84f336 Corrects Amstrad 664 and 6128 ROM collection. 2021-06-04 22:43:26 -04:00
Thomas Harte
1d5144b912 Correct no-interrupt signal. 2021-06-04 22:38:07 -04:00
Thomas Harte
deff91e460 Correct Electron name mapping. 2021-06-04 22:25:11 -04:00
Thomas Harte
afd8dc0915 Nudge just far enough to be able to launch again under macOS. 2021-06-04 22:24:31 -04:00
Thomas Harte
fbee74e1fe Avoids storing or printing a CRC if none is known. 2021-06-04 22:03:08 -04:00
Thomas Harte
ccd82591aa Reinstates SDL error message; adds expansion of ~. 2021-06-04 21:53:56 -04:00
Thomas Harte
64931e476d Completes transcription of ROM details with the Oric and MSX. 2021-06-04 19:50:49 -04:00
Thomas Harte
604a715a49 Transcribes the Spectrum, Electron, Master System and Vic-20 ROMs. 2021-06-04 19:45:47 -04:00
Thomas Harte
24757ef20c Transcribes the Macintosh, Atari ST, ColecoVision and ZX80/81 ROMs. 2021-06-04 19:24:57 -04:00
Thomas Harte
e36cc9e777 Transcribes the Apple II ROM descriptions. 2021-06-04 19:19:55 -04:00
Thomas Harte
2e999889bd Attempts to implement tree construction. 2021-06-04 19:03:07 -04:00
Thomas Harte
f4db4c3a73 Implements ROM::Request::validate.
It now also validates ROM sizes, so can no longer take a const Map.
2021-06-04 18:54:50 -04:00
Thomas Harte
d923fe72c0 Resolves various ROM selection warnings. 2021-06-03 22:46:47 -04:00
Thomas Harte
f05cdd5e34 With large swathes of implementation missing, compiles. 2021-06-03 22:39:18 -04:00
Thomas Harte
f9954619d4 Add missing header file. 2021-06-03 22:28:30 -04:00
Thomas Harte
0aa8c3c40d For SDL at least, advances to failed linking.
... and with error reporting currently AWOL.
2021-06-03 22:22:56 -04:00
Thomas Harte
a30eeaab6a Starts to introduce a new grammar for ROM requests.
They can be optional, and chained together in AND or OR combinations. A central catalogue knows the definitions of all ROMs.
2021-06-03 21:55:59 -04:00
Thomas Harte
3858e79579 Merge pull request #944 from TomHarte/SDLErrorReporting
Improve SDL failed-ROM reporting.
2021-05-30 19:50:53 -04:00
Thomas Harte
b4a5fa33b0 Improve SDL failed-ROM reporting.
Specifically to include all paths tried, and not use the plural for 'crc32' when only one is present.
2021-05-30 19:40:29 -04:00
Thomas Harte
2a6e9c5e8a Add readme for Enterprise ROM names. 2021-05-30 19:28:26 -04:00
Thomas Harte
488c2aed51 Merge pull request #939 from TomHarte/DragAndDropState
Accept insertion of state snapshots into existing windows
2021-05-16 20:47:36 -04:00
Thomas Harte
5483f979dc Merge branch 'master' into DragAndDropState 2021-05-16 20:42:44 -04:00
Thomas Harte
ea11f3826a Merge pull request #941 from TomHarte/LargeDSK
Adds support for Macintosh SCSI drive images.
2021-05-13 19:17:18 -04:00
Thomas Harte
ceae81a332 Add missing header. 2021-05-13 19:11:19 -04:00
Thomas Harte
50ea56e908 Adds support for Macintosh SCSI device images.
This is now in addition to the single-partition images previously supported.
2021-05-13 19:06:00 -04:00
Thomas Harte
bfb2f79cff That's two learning curves. 2021-05-10 21:33:40 -04:00
Thomas Harte
8268e8ee4c Ensures music survives a machine switch. 2021-05-08 20:46:17 -04:00
Thomas Harte
cb31e22f59 Merge branch 'master' into DragAndDropState 2021-05-08 20:41:44 -04:00
Thomas Harte
6752f4fd73 Merge pull request #940 from TomHarte/TighterTapeStop
Tightens automatic tape control timing.
2021-05-08 18:21:14 -04:00
Thomas Harte
22c31e4f55 Tightens automatic tape control timing. 2021-05-08 17:34:59 -04:00
Thomas Harte
c2ff64c1e0 Removes dangling OpenGL reference, attempts to ensure audio handover upon a machine change. 2021-05-08 14:42:43 -04:00
Thomas Harte
4db792591a macOS: ensure activity and options panels change upon a drag-and-drop state. 2021-05-08 14:35:57 -04:00
Thomas Harte
1290a8e32b SDL: Ensures joysticks, mouse, LEDs, etc, all update to a dragged state snapshot. 2021-05-08 13:30:07 -04:00
Thomas Harte
8ae38991b0 Factor out machine wiring. 2021-05-08 13:15:18 -04:00
Thomas Harte
6d40549c0c Merge branch 'master' into DragAndDropState 2021-05-07 21:56:36 -04:00
Thomas Harte
93d5c9a3c7 Tighten wording further. 2021-05-07 18:55:15 -04:00
Thomas Harte
9af6c0b37a Improves comment. 2021-05-06 12:57:32 -04:00
Thomas Harte
7e3528c692 Shunt the tech/URL stuff below the headline feature list. 2021-05-06 09:44:40 -04:00
Thomas Harte
41f2fc51be Clarify second sentence.
As per discussion at https://www.retrogameboards.com/t/clock-signal-a-multi-platform-emulator-that-focuses-on-a-better-user-experience/2375 — the previous could be read as "no emulator | or per-emulated-machine learning curve". But there is an emulator.
2021-05-06 09:43:19 -04:00
Thomas Harte
11228dc265 Merge pull request #937 from TomHarte/XKeySyms
Eliminate magic constants in Qt/X11 keyboard code.
2021-05-05 22:21:31 -04:00
Thomas Harte
ef50967793 Limit X11 linkage to Linux. 2021-05-05 22:17:24 -04:00
Thomas Harte
5f6c08b7e0 Avoid partial struct instantiation. 2021-05-05 22:00:50 -04:00
Thomas Harte
6cb23ec5be Tidy up and comment. 2021-05-05 21:58:54 -04:00
Thomas Harte
1bae70bcf8 Correct capitalisation. 2021-05-05 21:49:01 -04:00
Thomas Harte
9820591ba4 Corrects enum references. 2021-05-05 21:46:34 -04:00
Thomas Harte
77071b3c69 Adds KeySym -> key lookup. 2021-05-05 21:41:59 -04:00
Thomas Harte
335e839b31 Wrangles a single working call to XKeysymToKeycode. 2021-05-05 21:35:08 -04:00
Thomas Harte
6fe947b8b9 Fix class name, add constructor. 2021-05-05 19:17:23 -04:00
Thomas Harte
22b29e77a7 Add keyboard.cpp/h to the Qt project. 2021-05-05 19:06:25 -04:00
Thomas Harte
4858cfce6b Starts to factor out the keyboard mapper.
The more easily to clarify as to #includes, etc, and to allow for a relevant constructor.
2021-05-05 18:56:10 -04:00
Thomas Harte
8da3e91f5e Merge branch 'master' into XKeySyms 2021-05-03 22:23:55 -04:00
Thomas Harte
012235bfeb Merge pull request #936 from TomHarte/Style
Correct minor style errors.
2021-05-03 22:23:27 -04:00
Thomas Harte
052e284c33 Add overt fallthrough. 2021-05-03 22:17:43 -04:00
Thomas Harte
32e3dd71b1 Be overt in empty std::string construction. 2021-05-03 22:17:32 -04:00
Thomas Harte
95f4272919 Make sure size_t is visible. 2021-05-03 22:17:25 -04:00
Thomas Harte
00679b6135 t may be unused, per the if constexpr. 2021-05-03 22:17:19 -04:00
Thomas Harte
2c18bb4508 Make it overt that this can't return without a value. 2021-05-03 22:17:12 -04:00
Thomas Harte
0cf1c9040a Add missing fallthrough declaration. 2021-05-03 22:17:06 -04:00
Thomas Harte
9196341482 Retrenches: it seems nativeVirtualKey does what I want.
Hooray!
2021-05-03 21:45:53 -04:00
Thomas Harte
685140a4c2 Correct Qt -> QT. 2021-05-03 21:18:14 -04:00
Thomas Harte
1465b0ee4d Shunt X11 code to bottom of file, to avoid #include interference. 2021-05-03 21:15:20 -04:00
Thomas Harte
0bf6b765d3 Further namespace/name corrections. 2021-05-03 21:11:47 -04:00
Thomas Harte
4774676e2a Correct keypad symbols, push X11 into a namespace. 2021-05-03 21:09:01 -04:00
Thomas Harte
9c29655da2 Add x11extras as per use of <QX11Info>. 2021-05-03 20:43:22 -04:00
Thomas Harte
c8ab18f2b6 Add overt fallthrough. 2021-05-03 20:38:50 -04:00
Thomas Harte
8ebce466db Be overt in empty std::string construction. 2021-05-03 20:35:23 -04:00
Thomas Harte
1b39b17125 Make sure size_t is visible. 2021-05-03 20:33:25 -04:00
Thomas Harte
5a46853075 t may be unused, per the if constexpr. 2021-05-03 20:32:16 -04:00
Thomas Harte
48ad4d4c4c Make it overt that this can't return without a value. 2021-05-03 20:31:39 -04:00
Thomas Harte
056a036712 Add missing fallthrough declaration. 2021-05-03 20:31:13 -04:00
Thomas Harte
70eaa79108 Makes an attempt to use X11 KeySyms.
Rather than hard-coding a mapping.
2021-05-03 18:51:58 -04:00
Thomas Harte
20c814a4dd Factors out boilerplate around full-device sector images. 2021-05-01 21:10:46 -04:00
Thomas Harte
6a052e1900 Starts working on SDL drag-and-drop support for snapshots. 2021-04-30 22:56:13 -04:00
Thomas Harte
cecdf8584a Ensures proper propagation of will_change_owner. 2021-04-30 22:51:26 -04:00
Thomas Harte
4758bc8615 Attempts to support insertion of states into existing windows. 2021-04-30 21:37:41 -04:00
Thomas Harte
c906dc3c0a Merge pull request #935 from TomHarte/OricJoystick
Adds Altai-style joystick support for the Oric.
2021-04-29 20:15:42 -04:00
Thomas Harte
d1dcb41b6f Adds Altai-style joystick support. 2021-04-29 18:29:29 -04:00
Thomas Harte
96ac86a757 Merge pull request #934 from TomHarte/OricTapes
Relaxes Oric .tap signature check.
2021-04-29 18:14:36 -04:00
Thomas Harte
4919786825 Relaxes Oric .tap signature check. 2021-04-29 18:00:02 -04:00
Thomas Harte
24b4185714 Merge pull request #933 from TomHarte/SpectrumJoystick
Adds ZX Spectrum joystick support.
2021-04-28 21:08:36 -04:00
Thomas Harte
ad10d0037a Inverts the Game Controller Framework value of the y axis. 2021-04-28 20:31:35 -04:00
Thomas Harte
b6554c8255 Adds joystick support. 2021-04-28 20:19:01 -04:00
Thomas Harte
01dc83d0d6 Merge pull request #932 from MaddTheSane/xcodemaintenance
Xcode maintenance.
2021-04-27 19:53:51 -04:00
C.W. Betts
2fd08789ab Xcode maintenance. 2021-04-27 12:50:26 -06:00
Thomas Harte
bc9e529995 Merge pull request #931 from TomHarte/FieldName
This field is counted in half-cycles.
2021-04-26 21:33:38 -04:00
Thomas Harte
708c24cc57 This field is counted in half-cycles. 2021-04-26 21:20:32 -04:00
Thomas Harte
7fb3048257 Update AllDisk and AllTape. 2021-04-26 21:04:25 -04:00
Thomas Harte
9319f0525a Merge pull request #930 from TomHarte/SZX
Adds SZX support.
2021-04-26 20:57:06 -04:00
Thomas Harte
b7a62e0121 Adds SZX support.
Tweaking exposed Spectrum state object as relevant.
2021-04-26 20:47:28 -04:00
Thomas Harte
bd5dd9b9a3 Merge pull request #929 from TomHarte/SpectrumSnapshots
Adds loading of state snapshots for the ZX Spectrum
2021-04-26 17:44:02 -04:00
Thomas Harte
3348167c46 Ensures AY registers are conveyed. 2021-04-26 17:39:11 -04:00
Thomas Harte
700c505974 Ensures the ZX Spectrum properly reports its display type. 2021-04-25 21:16:22 -04:00
Thomas Harte
d403036d86 Reduce bounce at Spectrum startup. 2021-04-25 20:56:57 -04:00
Thomas Harte
5e08d7db39 Carries through paging state; avoids file rereads. 2021-04-25 20:46:49 -04:00
Thomas Harte
c34cb310a8 Switches to more straightforward handler for .z80-style compression. 2021-04-25 18:07:36 -04:00
Thomas Harte
8d86aa69bc Adds an assert to check handling of compressed data. 2021-04-25 18:02:31 -04:00
Thomas Harte
cc41ccc5f1 Adds RAM deserialisation. 2021-04-25 17:55:52 -04:00
Thomas Harte
e6252fe0ed Sneaks up towards loading RAM. 2021-04-25 17:34:43 -04:00
Thomas Harte
03577de675 Adds an empty vessel for .z80 support. 2021-04-25 16:54:34 -04:00
Thomas Harte
205518ba75 Switch to more efficient copy. 2021-04-25 16:51:07 -04:00
Thomas Harte
2510064218 Completes state object.
Subject to not yet dealing with last_fetches_ and last_contended_access_ correctly. Thought required.
2021-04-25 14:20:40 -04:00
Thomas Harte
0ef2806970 Adds just enough to ensure that border state gets through. 2021-04-25 14:16:35 -04:00
Thomas Harte
d80f03e369 Corrects longstanding deviation from naming convention. 2021-04-25 14:11:36 -04:00
Thomas Harte
fd271d920b Adds capture and forwarding of border colour. 2021-04-25 14:00:12 -04:00
Thomas Harte
2bbf8bc9fa Ensures 16/48kb snapshots are properly copied into place. 2021-04-25 13:27:11 -04:00
Thomas Harte
9b65d56ed0 Resolves potential flaw in POPping here. 2021-04-25 13:26:53 -04:00
Thomas Harte
a5098a60ec Attempts to get in-SNA software to start. 2021-04-25 13:18:26 -04:00
Thomas Harte
0ebd900e40 Baby steps: apply Z80 state.
As far as it currently is. Since SNA is leaving the PC at the default of 0x0000, this currently has no visible effect.
2021-04-25 13:03:24 -04:00
Thomas Harte
7aeb17ac92 Corrects HeaderDoc/etc directive. 2021-04-25 13:01:23 -04:00
Thomas Harte
cc78bfb229 Forwards most of the Z80 state. 2021-04-25 13:00:43 -04:00
Thomas Harte
485c2a866c Without yet a struct for Spectrum states, at least checks general wiring. 2021-04-24 23:38:00 -04:00
Thomas Harte
5b419ca5bf Add State folder to Scons and Qt projects. 2021-04-24 23:25:08 -04:00
Thomas Harte
14ae579fca Add further note to future self. 2021-04-24 23:19:41 -04:00
Thomas Harte
1c2ea0d7fe unique_ptr makes more sense here. 2021-04-24 23:19:30 -04:00
Thomas Harte
e7a9ae18a1 Introduce further default state. 2021-04-24 23:18:00 -04:00
Thomas Harte
d61f478a39 Basic sketch for state snapshots: an extra field on Target.
I think it doesn't make sense for states to own a target as that complicates the concept of Media. Plus they're distinct because it makes sense to have only one per Target. Let's see how this pans out.
2021-04-24 23:17:47 -04:00
Thomas Harte
9cc747b3e2 Resolves potential source of errors: specifying incorrect table size.
(Having made exactly this mistake with the ZX Spectrum)
2021-04-24 12:10:28 -04:00
Thomas Harte
2f223f7db2 Spectrum emulation is no longer +2a/+3 specific. 2021-04-23 22:55:54 -04:00
Thomas Harte
17f11a3be3 Merge pull request #928 from TomHarte/ContentionTests
Add timing tests, fix +3 discrepancy.
2021-04-23 22:54:34 -04:00
Thomas Harte
37dcf61130 Add timing tests, fix +3 discrepancy. 2021-04-23 22:29:57 -04:00
Thomas Harte
856ebfacca Merge pull request #927 from TomHarte/SimplifiedTiming
Moves horizontal sync on the 48kb.
2021-04-21 19:50:40 -04:00
Thomas Harte
9731fdd33b Moves horizontal sync on the 48kb. 2021-04-21 19:46:44 -04:00
Thomas Harte
5ea605ccf7 Merge pull request #926 from TomHarte/SimplifiedTiming
Attempts more cleanly to express ZX Spectrum timing.
2021-04-21 19:46:23 -04:00
Thomas Harte
d0c789ff9a Locks declarative form of contention closer to regular expressions. 2021-04-21 19:37:36 -04:00
Thomas Harte
9baa861742 Simplifies timing calculation expression. 2021-04-21 19:18:07 -04:00
Thomas Harte
30a1a53c97 Merge pull request #925 from TomHarte/ZXROMSpeed
Corrects timing error in Spectrum 48kb and 128kb ROM accesses.
2021-04-21 18:54:16 -04:00
Thomas Harte
bdb1b7e77c Reinstate the +2 as the default Spectrum. 2021-04-21 18:49:39 -04:00
Thomas Harte
9293bcbc88 Exclude the ROM from contention on 48kb and 128kb models. 2021-04-21 18:49:18 -04:00
Thomas Harte
c481f475e7 Merge pull request #923 from TomHarte/STStartup
Resolves failure of ST to startup
2021-04-20 22:43:55 -04:00
Thomas Harte
ef01471e17 Ensures the DMA controller remains clocked. 2021-04-20 22:34:13 -04:00
Thomas Harte
73c8157197 Retain 6850 time tracking at all times. 2021-04-20 22:26:43 -04:00
Thomas Harte
af1dc2d3b2 Switches to correct non-value sentinel. 2021-04-20 21:56:58 -04:00
Thomas Harte
8f6b3feee1 Merge pull request #921 from TomHarte/Plus2aDefault
Switches default machine back to +2a.
2021-04-19 22:15:48 -04:00
Thomas Harte
a20f5528b7 Switches default machine back to +2a. 2021-04-19 22:04:49 -04:00
Thomas Harte
f48876d80e Merge pull request #920 from TomHarte/AppleIIVirtual
Disambiguates `reset_all_keys`.
2021-04-19 22:03:01 -04:00
Thomas Harte
db52f13c32 Disambiguates reset_all_keys. 2021-04-19 21:49:06 -04:00
Thomas Harte
2590769d3f Merge pull request #919 from TomHarte/XcodeProjectTweaks
Increases warnings, cleans up a touch.
2021-04-19 21:33:04 -04:00
Thomas Harte
5667dcac36 Increases warnings, cleans up a touch. 2021-04-19 21:28:12 -04:00
Thomas Harte
bec71ead39 Merge pull request #918 from TomHarte/macOS13
Reintroduces macOS 10.13 support.
2021-04-19 21:12:57 -04:00
Thomas Harte
e4d9022d37 Returns deployment target to 10.13. 2021-04-19 20:57:56 -04:00
Thomas Harte
572be48f38 Attempts to add an early exit for non-Metal Macs.
This will be necessary only prior to 10.14.
2021-04-19 20:55:25 -04:00
Thomas Harte
6f4ccebfa1 Merge pull request #917 from TomHarte/InterruptAddress
Put the program counter on the bus during interrupt acknowledge.
2021-04-19 20:08:22 -04:00
Thomas Harte
77fcf52d27 Purely style: remove some redundant nullptrs. 2021-04-19 18:53:00 -04:00
Thomas Harte
79c2bc1fd7 Put the program counter on the bus during interrupt acknowledge. 2021-04-19 18:43:50 -04:00
Thomas Harte
76370d9418 Merge pull request #916 from TomHarte/OffByOne
Corrects off-by-one timing errors in the ZX Spectrum.
2021-04-18 20:25:13 -04:00
Thomas Harte
7bac18bd65 Address bus load time is not + 1/2. 2021-04-18 18:41:24 -04:00
Thomas Harte
704737144a Corrects all interrupt timing for sign and off-by-one errors. 2021-04-18 18:40:44 -04:00
Thomas Harte
2a9c73a1d3 Merge pull request #915 from TomHarte/SpectrumSDLOptions
Adds display of Spectrum command-line options.
2021-04-18 12:08:02 -04:00
Thomas Harte
e87e851401 Add a redundant but idiomatic initial value. 2021-04-18 11:56:22 -04:00
Thomas Harte
80d4846a27 Respond with 0xff during an interrupt acknowledge. 2021-04-18 11:56:00 -04:00
Thomas Harte
9fd53c9c91 Adds the ZX Spectrum to ::AllMachines. 2021-04-17 23:06:37 -04:00
Thomas Harte
53eae873d8 Merge pull request #913 from TomHarte/LowerModelTiming
Brings timings into line with WoS specs.
2021-04-16 22:45:54 -04:00
Thomas Harte
93422f4b1c Brings timings into line with WoS specs. 2021-04-16 22:40:51 -04:00
Thomas Harte
06cedb2e50 Merge pull request #912 from TomHarte/128kDecoding
Corrects Spectrum 128kb partial decoding.
2021-04-16 22:02:25 -04:00
Thomas Harte
7fdb1d848b Corrects Spectrum 128kb partial decoding. 2021-04-16 21:54:52 -04:00
Thomas Harte
246fd9442f Merge pull request #911 from TomHarte/48kbSpectrum
Adds the 48kb and 128kb Spectrums.
2021-04-15 22:25:07 -04:00
Thomas Harte
eb99a64b29 Adds new Spectrum models to Qt UI. 2021-04-15 22:20:34 -04:00
Thomas Harte
d7954a4cb1 Tweaks timing a little. 2021-04-15 21:51:49 -04:00
Thomas Harte
ef636da866 Attempts 48/128kb floating bus behaviour. 2021-04-15 21:19:21 -04:00
Thomas Harte
fa18b06dbf Correct get_floating_value to be consistent in out-of-bounds behaviour. 2021-04-15 21:13:36 -04:00
Thomas Harte
349b9ce502 Don't post contended accesses other than on the +2a/+3.
Those machines have an actual latch for this stuff, the others don't.
2021-04-15 21:13:06 -04:00
Thomas Harte
b2cf121410 Regresses default to the more-compatible +2. 2021-04-15 19:31:45 -04:00
Thomas Harte
71cf63bd35 Corrects internal cycle contention. 2021-04-15 19:17:11 -04:00
Thomas Harte
d1bb3aada4 Attempts to complete the in-machine application of contention. 2021-04-15 18:57:34 -04:00
Thomas Harte
b4214c6e08 Blocks off the AY from inputs in 48kb mode. 2021-04-15 18:04:16 -04:00
Thomas Harte
f5c7746493 Extends fast loading support to the just-introduced models. 2021-04-15 17:31:42 -04:00
Thomas Harte
f10ec80153 Gets started on different video timings. 2021-04-14 22:23:27 -04:00
Thomas Harte
0af405aa46 Starts working in the 48kb and 128kb Spectrums. 2021-04-14 21:37:10 -04:00
Thomas Harte
cf481effa6 Merge pull request #910 from TomHarte/FastContention
Establishes that the 48/128kb contention patterns can be derived from my partial machine cycles alone.
2021-04-14 20:21:52 -04:00
Thomas Harte
a1511f9600 Establishes that the 48/128kb contention patterns can be derived from my partial machine cycles alone. 2021-04-14 20:15:40 -04:00
Thomas Harte
325e2b3941 Merge pull request #902 from TomHarte/Z80Lines
Spell out, test and correct Z80 bus activity.
2021-04-13 22:22:26 -04:00
Thomas Harte
7017324d60 r_step is obsolete now that I know that [DD/FD]CB don't have a refresh cycle. 2021-04-13 22:17:30 -04:00
Thomas Harte
deb5d69ac7 Consolidates macros. 2021-04-13 22:11:28 -04:00
Thomas Harte
68a04f4e6a Adds IN/OUT I/D [R] to complete tests. 2021-04-13 22:00:24 -04:00
Thomas Harte
0d61902b10 Adds CP[I/D/IR/DR] tests. 2021-04-13 20:03:11 -04:00
Thomas Harte
3eec210b30 Adds LDI/LDD/LDIR/LDDR tests. 2021-04-13 20:00:29 -04:00
Thomas Harte
5998f3b35b Corrects LD[I/D/IR/DR] timing.
Macro cleanup to come.
2021-04-13 20:00:18 -04:00
Thomas Harte
869567fdd9 Corrects EX (SP), HL breakdown. 2021-04-13 19:45:48 -04:00
Thomas Harte
2e70b5eb9f Advances to EX (SP), HL, leaving only [LD/CP/IN/OT][I/D]{R}. 2021-04-13 19:45:29 -04:00
Thomas Harte
8a3bfb8672 Adds an IN/OUT test. 2021-04-13 17:55:51 -04:00
Thomas Harte
06f1e64177 Advances to IO. 2021-04-12 21:41:20 -04:00
Thomas Harte
b42780173a Establishes that there really is no Read4 and Read4Pre distinction.
Will finish these unit tests, then clean up.
2021-04-12 20:54:10 -04:00
Thomas Harte
36c8821c4c Reaches the halfway point in tests. 2021-04-12 17:29:03 -04:00
Thomas Harte
947de2d54a Switches five-cycle read to a post hoc pause. 2021-04-12 17:17:08 -04:00
Thomas Harte
9347fe5f44 Advances to next failing test: LD (ii+n), n. 2021-04-12 17:11:58 -04:00
Thomas Harte
e82367def3 Switches to test-conformant behaviour for (IX/IY+n) opcode fetches. 2021-04-11 23:01:00 -04:00
Thomas Harte
9cde7c12ba Shifts responsibility for refresh into the fetch-decode-execute sequence. 2021-04-11 22:50:24 -04:00
Thomas Harte
015556cc91 Switch (ii+n) to Read4Pre. 2021-04-11 10:26:14 -04:00
Thomas Harte
47c5a243aa Restructures, the better to explore errors. 2021-04-10 21:32:42 -04:00
Thomas Harte
070e359d82 Introduces failing test for BIT b, (ii+n). 2021-04-10 18:00:23 -04:00
Thomas Harte
b397059d5e Moves read time in Read4Pre. 2021-04-10 17:54:20 -04:00
Thomas Harte
400f54e508 Introduces failing test for bit b, (hl). 2021-04-10 12:04:48 -04:00
Thomas Harte
e0736435f8 Makes assumption that the address bus just holds its value during an internal operation. 2021-04-10 12:00:53 -04:00
Thomas Harte
b09c5538c6 Adds failing test for simple (ii+n) tests. 2021-04-09 21:28:35 -04:00
Thomas Harte
ce3d2913bf Advances to 9 source table rows tested out of 37. 2021-04-09 20:38:17 -04:00
Thomas Harte
87202a2a27 Add two further tests, add checking of collected data size for all tests. 2021-04-09 18:32:03 -04:00
Thomas Harte
818a4dff25 Corrects ADD HL, dd test.
Or, at least, likely corrects. The bus cycle breakdown in the Z80 data sheet implies these accesses should come after completion of the refresh cycle, not during its long tail, so I think +1 is correct.
2021-04-08 22:23:15 -04:00
Thomas Harte
eacffa49f5 Exposes IR during 'internal' operations. 2021-04-08 22:22:26 -04:00
Thomas Harte
9e506c3206 Adds failing ADD hl, dd test. 2021-04-08 22:19:22 -04:00
Thomas Harte
29cf80339a Corrects too-short buffer. 2021-04-08 22:15:03 -04:00
Thomas Harte
50f53f7d97 Adds INC/DEC rr and LD SP, HL tests. 2021-04-08 22:14:53 -04:00
Thomas Harte
73fbd89c85 Correct opcodes, ability to terminate on a single-cycle contention. 2021-04-08 22:09:33 -04:00
Thomas Harte
f74fa06f2d Introduces failing test for LD [A/I/R], [A/I/R]. 2021-04-08 20:28:55 -04:00
Thomas Harte
ee989ab762 Fills in the rest of the simple two-byte instructions. 2021-04-08 20:13:52 -04:00
Thomas Harte
818655a9b6 Starts on two-bus-cycle instructions, correcting validators. 2021-04-08 20:01:46 -04:00
Thomas Harte
57a7e0834f Corrects sampling of MREQ. 2021-04-08 19:21:35 -04:00
Thomas Harte
cd787486d2 Tests all of the single-byte, no-access opcodes. 2021-04-07 22:07:52 -04:00
Thomas Harte
67fd6787a6 Builds what I think I need to validate Z80 address, MREQ, IOREQ and RFSH. 2021-04-07 21:57:40 -04:00
Thomas Harte
627b96f73c Merge branch 'master' into Z80Lines 2021-04-07 21:02:15 -04:00
Thomas Harte
8a6985c2e8 Merge pull request #909 from TomHarte/BackToFive
Tweaks video timing, again.
2021-04-06 21:16:50 -04:00
Thomas Harte
60e8273de2 Tweaks video timing, again. 2021-04-06 21:04:54 -04:00
Thomas Harte
aa8ce5c1ac Merge pull request #908 from TomHarte/ZXSpectrumInterrupts
Better indicate ZX Spectrum interrupt timing.
2021-04-06 13:49:25 -04:00
Thomas Harte
dd28246f9f Better indicate interrupt timing. 2021-04-06 12:06:13 -04:00
Thomas Harte
dc25a60b9b Merge pull request #907 from TomHarte/TMSSequencePoints
Makes the TMS a sequence-point-generating JustInTimeActor.
2021-04-06 12:03:22 -04:00
Thomas Harte
094d623485 Updates unit tests. 2021-04-05 21:33:04 -04:00
Thomas Harte
1266bbb224 Makes the TMS a sequence-point-generating JustInTimeActor. 2021-04-05 21:02:37 -04:00
Thomas Harte
bd1ea5740a Merge pull request #906 from TomHarte/LoadingImprovements
Attempts to improve ZX fast-loading compatibility
2021-04-05 19:20:46 -04:00
Thomas Harte
3e04b51122 Walks back pretty names. Probably a bad idea. 2021-04-05 17:26:18 -04:00
Thomas Harte
76f2aba51a Makes use of pretty names in descriptions optional. 2021-04-05 17:24:16 -04:00
Thomas Harte
fd88071c0a Remove further detritus. 2021-04-05 17:21:26 -04:00
Thomas Harte
16bfe1a55c Resolves use-after-return memory error. 2021-04-04 22:45:56 -04:00
Thomas Harte
90c3d6a1e8 Attempts a later interception of tape loading. 2021-04-04 22:39:30 -04:00
Thomas Harte
18d6197d6c Makes provision for pretty-printed key names.
i.e. keys that don't fit C++ naming rules.
2021-04-04 22:20:35 -04:00
Thomas Harte
27eddf6dff Merge pull request #905 from TomHarte/JustInTimeOric
Adopts JustInTimeActor in the Oric.
2021-04-04 20:57:52 -04:00
Thomas Harte
57b32d9537 Avoid adding additional threading constraints. 2021-04-04 20:48:15 -04:00
Thomas Harte
837b9499d5 Translates Oric video and Disk II into JustInTimeActors. 2021-04-04 20:43:16 -04:00
Thomas Harte
c2fde2b147 Merge pull request #900 from TomHarte/SpeccyTiming
Further tweaks Spectrum timing.
2021-04-04 20:19:54 -04:00
Thomas Harte
f26bf4b9e4 Splitting here isn't achieving anything. 2021-04-04 19:52:38 -04:00
Thomas Harte
1da51bee6c 14368 and six seem to be the proper numbers, per my comprehension of Patrick Rak. 2021-04-04 19:52:19 -04:00
Thomas Harte
5a66956221 Merge branch 'master' into SpeccyTiming 2021-04-04 19:12:37 -04:00
Thomas Harte
91d973c4a9 Merge pull request #904 from TomHarte/JITElectron
Moves the Electron to JustInTimeActor video.
2021-04-04 19:12:06 -04:00
Thomas Harte
fa79589db8 Minor style improvements. 2021-04-04 18:59:46 -04:00
Thomas Harte
e52649f74d Normalises logging. 2021-04-04 17:39:49 -04:00
Thomas Harte
d77ddaf4fa Switches the Electron to JustInTimeActor video.
Also reorders template parameters; I think that specifying a different time base is likely to be more common than using a divider.
2021-04-04 17:33:49 -04:00
Thomas Harte
9ff392279a Merge pull request #895 from TomHarte/JITSleeper
Works `ClockingHint` logic into `JustInTimeActor`.
2021-04-04 17:11:05 -04:00
Thomas Harte
448d9dc3e1 Correct article. 2021-04-04 16:14:47 -04:00
Thomas Harte
afb4e6d37d Merge branch 'master' into JITSleeper 2021-04-04 15:37:19 -04:00
Thomas Harte
158122fbf4 Determine TargetTimeScale automatically. 2021-04-04 15:37:07 -04:00
Thomas Harte
417ece2386 Adds a couple of TODOs and some further documentation. 2021-04-04 00:25:22 -04:00
Thomas Harte
77b241af4f Eliminates unused RealTimeActor, provides more feedback from +=, gets specific as to nodiscards. 2021-04-03 21:26:43 -04:00
Thomas Harte
25b8c4c062 Provide clearer failure case. 2021-04-03 21:04:44 -04:00
Thomas Harte
1be88a5308 Remove first draft. 2021-04-02 07:39:22 -04:00
Thomas Harte
294280a94e Spells out everything except interrupt acknowledge. 2021-04-02 07:38:06 -04:00
Thomas Harte
32aebfebe0 Starts spelling out meaning of the Z80's partial machine cycles. 2021-04-02 07:37:56 -04:00
Thomas Harte
14663bd06b I think 3 is what I'm aiming for here.
But this probably isn't correct for IO cycles.
2021-04-02 07:36:57 -04:00
Thomas Harte
68abd197aa 'Dock' is a common noun here. 2021-04-02 07:11:28 -04:00
Thomas Harte
18fd21eae7 Merge pull request #901 from TomHarte/ReadMeClarity
Clarifies the object in the 'Single-click Loading' readme section
2021-04-01 23:25:01 -04:00
Thomas Harte
3296347370 Hit this point even harder. 2021-04-01 23:22:47 -04:00
Thomas Harte
28c9463e0d Clarify object. 2021-04-01 23:18:20 -04:00
Thomas Harte
044ac949ba Rearrange fields. 2021-04-01 12:44:00 -04:00
Thomas Harte
87317f5673 Improve documentation, pin down read/write times. 2021-04-01 12:38:58 -04:00
Thomas Harte
5e21a49841 Merge pull request #898 from TomHarte/LoadingImprovements
Include AF' in Z80 state.
2021-03-31 23:08:43 -04:00
Thomas Harte
687c05365e Flushes before set_last_contended_area_access. 2021-03-31 22:52:41 -04:00
Thomas Harte
4f80523828 Tweaks contended timing. 2021-03-31 22:51:20 -04:00
Thomas Harte
76299a2add Include AF' in Z80 state. 2021-03-29 22:58:52 -04:00
Thomas Harte
48f794dc2d Merge pull request #897 from TomHarte/LoadingImprovements
Corrects Spectrum TAP `is_at_end`.
2021-03-29 15:27:06 -04:00
Thomas Harte
51b8dcd011 Fixes is_at_end — must be at end of file and have finished final block. 2021-03-28 23:25:29 -04:00
Thomas Harte
acdbd88b9e Merge pull request #896 from TomHarte/FastLoadUponInsert
Ensure CPC and Spectrum update fast-tape flag upon media insertion.
2021-03-28 11:44:01 -04:00
Thomas Harte
00a3a3c724 Merge pull request #894 from TomHarte/AYCleanup
Uses `GI::AY38910::Utility` far and wide.
2021-03-28 11:43:43 -04:00
Thomas Harte
729edeac6c Ensure CPC and Spectrum update fast-tape flag upon media insertion. 2021-03-27 18:08:46 -04:00
Thomas Harte
faaa4961ed Attempts to rely on JustInTimeActor's built-in ClockingHint::Observer. 2021-03-26 23:54:08 -04:00
Thomas Harte
7937cc2d0f Imputes ClockingHint::Observer logic into JustInTimeActor. 2021-03-26 23:44:15 -04:00
Thomas Harte
8a11a5832c Uses GI::AY38910::Utility far and wide. 2021-03-26 23:19:47 -04:00
Thomas Harte
53ba0e67d1 Revert change to screenshot destination.
For a sandboxed app, there's a lot more to it than this.
2021-03-25 22:44:18 -04:00
Thomas Harte
e8825aeada Merge pull request #893 from TomHarte/DesktopScreenshots
Switches to a more compact macOS machine picker
2021-03-25 22:42:56 -04:00
Thomas Harte
e90e30e766 Enables start by double-click. 2021-03-25 17:53:07 -04:00
Thomas Harte
9f6bb325e6 Fixes longstanding issue with initial target for input. 2021-03-25 17:48:48 -04:00
Thomas Harte
6e2c65435a Tweaks cell height slightly further. 2021-03-25 17:44:46 -04:00
Thomas Harte
052ab44f1c Adds a title and adjusts aspect ratio. 2021-03-25 17:37:40 -04:00
Thomas Harte
daa5679241 Don't allow cell editing, lock size. 2021-03-25 16:48:11 -04:00
Thomas Harte
e055668554 With no space constraint, this can be 'ZX Spectrum'. 2021-03-25 16:27:12 -04:00
Thomas Harte
c96829c29e Adds a table view to control tab selection.
This should allow the new machine dialogue to retain a sensible width from here onwards.
2021-03-25 16:25:11 -04:00
Thomas Harte
c88abed2dc Merge branch 'master' into DesktopScreenshots 2021-03-24 21:47:40 -04:00
Thomas Harte
e42b6cb3c8 Merge pull request #892 from TomHarte/FixedFloatingBus
Attempts to implement proper floating bus behaviour.
2021-03-24 21:44:01 -04:00
Thomas Harte
465ecc4a78 Attempts to implement proper floating bus behaviour.
As per http://sky.relative-path.com/zx/floating_bus.html
2021-03-24 20:23:33 -04:00
Thomas Harte
ae4ccdf5e6 Merge branch 'master' into DesktopScreenshots 2021-03-24 18:40:20 -04:00
Thomas Harte
6bdaa54aaf Bumps copyright year. 2021-03-23 17:46:32 -04:00
Thomas Harte
3543a25168 Merge pull request #890 from TomHarte/SpectrumPolish
Adds Spectrum polish
2021-03-23 17:23:15 -04:00
Thomas Harte
03ef81b07c Attempts to reduce initial bounce. 2021-03-23 17:12:00 -04:00
Thomas Harte
0ac11fc39e Add floating bus. 2021-03-23 17:09:42 -04:00
Thomas Harte
3d0503a35e Adds a genuine Spectrum mapping, tweaks timing. 2021-03-23 16:59:43 -04:00
Thomas Harte
ad8cb52f11 Improves const correctness. 2021-03-23 16:59:26 -04:00
Thomas Harte
496a294c71 Adds clocking observers for the tape and FDC. 2021-03-23 16:38:04 -04:00
Thomas Harte
465c74ab86 Adds the Spectrum side of typing.
The character mapper itself needs some Spectrum logic.
2021-03-23 10:44:43 -04:00
Thomas Harte
4e8f82a39c Adds ZX Spectrum activity indicators. 2021-03-23 10:32:22 -04:00
Thomas Harte
584a5ad7fb Maps HFE files to the Spectrum. 2021-03-23 10:30:30 -04:00
Thomas Harte
0ab85cce20 Merge pull request #888 from TomHarte/SpectrumShots
Adds mention of the ZX Spectrum.
2021-03-23 08:01:41 -04:00
Thomas Harte
44e5caf803 Adds mention of the ZX Spectrum. 2021-03-23 08:00:10 -04:00
Thomas Harte
04291e9a86 Merge pull request #883 from TomHarte/ZXSpectrum
Adds the ZX Spectrum +2a and +3 as emulated machines.
2021-03-22 23:28:04 -04:00
Thomas Harte
d0776b58cf Tweaks timing empirically. 2021-03-22 23:20:49 -04:00
Thomas Harte
6da099d7e1 Ensures the enter key is cleared before fast-loading tapes have loaded. 2021-03-22 22:42:10 -04:00
Thomas Harte
60e77785e8 Makes an attempt to provide the necessary hook for floating bus behaviour. 2021-03-22 22:34:28 -04:00
Thomas Harte
19cd6a55d3 Rejigs the way video is counted to orient it around fetch times. 2021-03-22 22:18:38 -04:00
Thomas Harte
08432dd94b Adds automatic media starts. 2021-03-22 20:12:03 -04:00
Thomas Harte
cc3c3663f6 Makes minor style improvements. 2021-03-22 19:55:03 -04:00
Thomas Harte
b76c923ff4 Adds detection of Spectrum-bootable disks. 2021-03-22 19:53:51 -04:00
Thomas Harte
3c1131a84b Attempts to implement the +3. 2021-03-22 19:36:05 -04:00
Thomas Harte
a3cd953415 Fixes Spectrum machine selection. 2021-03-22 19:28:12 -04:00
Thomas Harte
c0abdf1b86 Factors out the CPC's simple FDC adaptor. 2021-03-22 19:12:10 -04:00
Thomas Harte
3ef2715eee Implements the ROM version of fast loading. 2021-03-22 19:04:38 -04:00
Thomas Harte
4a12d7086d Makes another guess at total colour phase. 2021-03-22 17:24:38 -04:00
Thomas Harte
a6b75b8637 Attempts improvements to video fetch timing. Alas, a lot of guess work here. 2021-03-22 15:59:03 -04:00
Thomas Harte
bdb3bce8d6 Corrects semantics on contended-timing calculation. 2021-03-22 15:48:51 -04:00
Thomas Harte
a26716919c Switches to an is-in-video test that allows for video memory being paged twice.
This is trivially possible even in plain 128kb mode.
2021-03-22 15:46:02 -04:00
Thomas Harte
8dbc7649aa Adds note-to-self re: FDC. 2021-03-22 09:15:00 -04:00
Thomas Harte
42a9dc7c2b Minimises video flushing, moves it to the proper time. 2021-03-22 09:02:49 -04:00
Thomas Harte
7965772745 Moves contention delays up to the time of MREQ going active. 2021-03-21 23:04:20 -04:00
Thomas Harte
f37f89a7d3 Merge branch 'master' into ZXSpectrum 2021-03-21 22:44:37 -04:00
Thomas Harte
d987e5a9d7 Merge pull request #887 from TomHarte/ZX80Wait
Ensures no signalling to wait by a ZX80, ever.
2021-03-21 22:44:11 -04:00
Thomas Harte
fcba0cc3d6 Merge pull request #886 from TomHarte/AppleIIgsWarnings
Resolves GCC warnings from dangling Apple IIgs work.
2021-03-21 22:40:56 -04:00
Thomas Harte
c097ed348a Ensures no signalling to wait by a ZX80, ever. 2021-03-21 22:38:50 -04:00
Thomas Harte
0f9ab53ea0 Resolves GCC warnings from dangling Apple IIgs work. 2021-03-21 22:36:18 -04:00
Thomas Harte
21b1dab4a5 Adds the ZX Spectrum to Qt's New... menu. 2021-03-21 22:35:46 -04:00
Thomas Harte
dd7419282d Resolves GCC warnings from dangling Apple IIgs work. 2021-03-21 22:25:14 -04:00
Thomas Harte
7562917740 Adds the Spectrum to the macOS New... menu. 2021-03-21 21:50:50 -04:00
Thomas Harte
3925eee575 Attempts more relaxed decoding of AY accesses. 2021-03-21 21:03:35 -04:00
Thomas Harte
6482303063 Reduces code duplication slightly. 2021-03-21 20:34:58 -04:00
Thomas Harte
388b136980 Relaxes test for a valid TAP. 2021-03-21 20:31:09 -04:00
Thomas Harte
9ce1dbaebb Switches to partial decoding for paging registers; permits video address changes after paging is locked. 2021-03-21 20:23:00 -04:00
Thomas Harte
064667c0c3 Corrects asymmetrical flash, ensures consistent burst phase. 2021-03-21 20:22:27 -04:00
Thomas Harte
58be770eaa Factors out some boilerplate.
When I'm confident this is correct, I can fix up the other call sites.
2021-03-21 00:14:48 -04:00
Thomas Harte
1b0f45649e Improves contended timing.
Still not quite on the money, but this was an overt bug.
2021-03-21 00:00:18 -04:00
Thomas Harte
42bfabbe8c The implication seems to be of a fixed phase swing.
I'm enquiring further.
2021-03-20 23:46:13 -04:00
Thomas Harte
986c4006a6 Corrected: PAL machines can now be overt in terms of odd/even colour burst. 2021-03-20 23:45:49 -04:00
Thomas Harte
07a63d62dd Adds some quick arithmetic on the clock speed. 2021-03-20 11:19:44 -04:00
Thomas Harte
26911a16e8 Lengthens sync, better to conform to PAL; experiments with fixed-phase colour burst.
I need to get hold of real documentation here.
2021-03-20 10:38:21 -04:00
Thomas Harte
cf9a5d595b Completes piping of audio. 2021-03-19 23:33:46 -04:00
Thomas Harte
09a6a1905b Implements TAP support. 2021-03-19 23:29:09 -04:00
Thomas Harte
2ad2b4384b Introduces a container for ZX Spectrum-style TAPs. 2021-03-19 23:01:49 -04:00
Thomas Harte
7729f1f3d0 Attempts automatic Spectrum tape control. 2021-03-19 22:43:48 -04:00
Thomas Harte
7d59ff6d8f Builds in a colour burst, producing colour composite. 2021-03-19 22:25:37 -04:00
Thomas Harte
2ee478b4c4 Goes some way towards wiring up Spectrum options. 2021-03-19 22:17:20 -04:00
Thomas Harte
bb0d35e3d0 Minor formatting/layout fixes. 2021-03-19 22:17:03 -04:00
Thomas Harte
84774a7910 Update Qt and SDL build files. 2021-03-19 11:19:10 -04:00
Thomas Harte
a482ce1546 Adds a tape player. 2021-03-19 11:12:50 -04:00
Thomas Harte
a35e1f4fbe Starts to make formal Spectrum accommodations. 2021-03-19 11:06:09 -04:00
Thomas Harte
2371048ad1 Formally separates keyboard code.
With an eye to formalising the Spectrum/ZX81/ZX80 differences.
2021-03-19 10:36:08 -04:00
Thomas Harte
93b9ea67e6 Takes a run at contended timings. 2021-03-19 08:49:56 -04:00
Thomas Harte
60a0f8e824 Merge pull request #885 from TomHarte/MasterSystemBlue
Tweak Master System blue scale.
2021-03-19 08:48:47 -04:00
Thomas Harte
b3fc64d4f2 Merge pull request #884 from MaddTheSane/master
Minor pokes to the test files code.
2021-03-19 08:40:16 -04:00
Thomas Harte
650b9a139b Tweak Master System blue scale. 2021-03-19 08:38:21 -04:00
C.W. Betts
5758693b7d Minor pokes to the test files code. 2021-03-19 02:19:49 -06:00
Thomas Harte
f8c9ef2950 Add necessary header for memset. 2021-03-19 00:00:59 -04:00
Thomas Harte
69ca2e8803 Update Xcode project. 2021-03-18 23:52:35 -04:00
Thomas Harte
87fac15cc4 This is going to remain purely a template; no .cpp. 2021-03-18 23:51:45 -04:00
Thomas Harte
2d51924a3c Wires up Spectrum keyboard.
The machine now appears to be fully interactive and functional. Timing and media aside, that is.
2021-03-18 23:51:21 -04:00
Thomas Harte
c3d96b30d7 Factors out a little of the ZX81's keyboard logic. 2021-03-18 23:45:57 -04:00
Thomas Harte
44240773ef Corrects address generation, ink/paper selection.
Seemingly to give a correct +2a boot. Time to add a keyboard and find out, I guess.
2021-03-18 23:30:48 -04:00
Thomas Harte
ed587a4db5 Provides a better no-port-here value. 2021-03-18 23:14:39 -04:00
Thomas Harte
020a04006e Adds flashing, randomises initial RAM contents. 2021-03-18 23:07:51 -04:00
Thomas Harte
622a8abf7f Takes a stab at pixel output. 2021-03-18 22:57:10 -04:00
Thomas Harte
871bac6c8a Marks out and approximately centres a pixel region. 2021-03-18 22:41:20 -04:00
Thomas Harte
fe3e8f87e7 Takes a shot at an all-border output. 2021-03-18 22:29:24 -04:00
Thomas Harte
87fc7c02e8 Provides a base pointer for video output. 2021-03-18 22:04:41 -04:00
Thomas Harte
f2620e6afb Adds a CRT. Not yet clocked. 2021-03-18 21:54:42 -04:00
Thomas Harte
ab2ad70885 Takes a run at interrupts. 2021-03-18 21:29:52 -04:00
Thomas Harte
135134acfd Adds a shell for video emulation. 2021-03-18 12:47:48 -04:00
Thomas Harte
5664e81d48 It appears the +2a and +3 have a different clock rate. 2021-03-18 12:41:24 -04:00
Thomas Harte
c353923557 This can be constexpr. 2021-03-18 12:40:59 -04:00
Thomas Harte
b830d62850 Adds quick notes on port FE. 2021-03-18 12:32:54 -04:00
Thomas Harte
17f551e89d Attempts a full audio wiring. 2021-03-18 12:23:54 -04:00
Thomas Harte
4a4da90d56 Implements some of the memory map, and instantiates audio objects. 2021-03-18 12:14:48 -04:00
Thomas Harte
404c1f06e6 Insert missing space. 2021-03-18 10:44:01 -04:00
Thomas Harte
730bfcd1fd Stumbles towards a memory map. 2021-03-18 10:43:51 -04:00
Thomas Harte
97249b0edd Slow walks further towards a functioning Spectrum. 2021-03-18 10:18:17 -04:00
Thomas Harte
5a1bda1d82 Performs boilerplate towards a ZX Spectrum class. 2021-03-17 23:38:55 -04:00
Thomas Harte
b7d6b8efcf Fix Xcode project. 2021-03-17 23:27:34 -04:00
Thomas Harte
9bec91c2b9 Correct further namespace references. 2021-03-17 22:56:03 -04:00
Thomas Harte
3d1775d853 Correct namespace. 2021-03-17 22:52:23 -04:00
Thomas Harte
814c057570 Update further path references. 2021-03-17 22:46:25 -04:00
Thomas Harte
b63ca16ce2 Attempts to hatch a Sinclair namespace. 2021-03-17 22:40:29 -04:00
Thomas Harte
0ddf09ac0f Adds the +2a/+3 ROM. 2021-03-17 22:16:57 -04:00
Thomas Harte
e53586df1d Adds tape-file static analysis for a hypothetical ZX Spectrum. 2021-03-17 22:09:44 -04:00
Thomas Harte
54491b35ef Merge branch 'master' into ZXSpectrum 2021-03-17 12:39:20 -04:00
Thomas Harte
b447f5f174 Starts adding the Spectrum to the static analyser. 2021-03-17 12:38:37 -04:00
Thomas Harte
39a105b48a Merge pull request #879 from TomHarte/CPCTapes
Slightly Improves CPC tape loading times
2021-03-16 22:09:15 -04:00
Thomas Harte
cdc19c6990 Adds TODO. 2021-03-15 11:39:15 -04:00
Thomas Harte
397704a1e6 Withdraws published quick-load option for the CPC. 2021-03-15 11:37:23 -04:00
Thomas Harte
1a5dafae00 Slightly neatens. 2021-03-15 11:37:03 -04:00
Thomas Harte
d368dae94a Adds tape motor LED. 2021-03-12 23:09:51 -05:00
Thomas Harte
54e2eb0948 Shortens wasted typing. 2021-03-12 23:04:45 -05:00
Thomas Harte
7d778bc328 Formally introduces fast tape support as an option.
It doesn't feel that fast yet though.
2021-03-12 22:57:02 -05:00
Thomas Harte
7a8317ad81 It seems a full CRC is in play. 2021-03-12 22:45:48 -05:00
Thomas Harte
a32a2f36be Advances to correctly reading bytes.
Something is still amiss though. Maybe I'm supposed to update the checksum?
2021-03-12 19:15:35 -05:00
Thomas Harte
064fe7658c Adds necessary interface to inherit a CPC tape-speed byte. 2021-03-12 18:43:20 -05:00
Thomas Harte
cd215ef521 Stumbles towards supporting fast tape loading.
Right now: in a non-optional manner.
2021-03-12 18:42:17 -05:00
Thomas Harte
14c5e038e2 Merge pull request #881 from Cacodemon345/patch-1
Fix compilation on GCC 10
2021-03-12 16:02:10 -05:00
Cacodemon345
82717b39bb Fix compilation on GCC 10 2021-03-13 01:27:29 +06:00
Thomas Harte
f190a1395a Enables detection of CPC-format tape data.
It turns out that the Spectrum's timings are its alone; speed autodetection added.
2021-03-10 22:02:10 -05:00
Thomas Harte
4eaf3440bd Add note to self. 2021-03-07 21:21:58 -05:00
Thomas Harte
f985248902 Add header for memcpy. 2021-03-07 21:20:35 -05:00
Thomas Harte
5c90744f0c More minor style improvements. 2021-03-07 20:49:40 -05:00
Thomas Harte
e9177bbb2a Makes an attempt to parse headers. 2021-03-07 20:49:09 -05:00
Thomas Harte
ab5e4ca9c7 Factors proceed_to_symbol upwards. 2021-03-07 20:48:51 -05:00
Thomas Harte
40516c9cec Minor style improvements: some local consts, and overrides. 2021-03-07 15:56:58 -05:00
Thomas Harte
d93d380c88 Adds bit-level Spectrum-style tape parsing.
More to do, obviously.
2021-03-07 15:51:25 -05:00
Thomas Harte
8a1c6978de Merge pull request #877 from TomHarte/MissingConstraints
Corrects minor macOS layout constraint issues.
2021-03-07 13:12:02 -05:00
Thomas Harte
6839e9e3b3 Ensures no double definition of NDEBUG. 2021-03-07 12:52:54 -05:00
Thomas Harte
83cbbe09c6 Adds missing constraints; eliminates magic constants. 2021-03-07 12:52:39 -05:00
Thomas Harte
166ddab5e0 Merge pull request #876 from TomHarte/SafeQuickboot
Makes absolutely sure not to try to use quickboot workaround for Mac 128kb/512kb.
2021-03-06 22:40:35 -05:00
Thomas Harte
67408521cd Makes absolutely sure not to try to use quickboot workaround for Mac 128kb/512kb.
Albeit that it should be harmless; it's just seeding RAM.
2021-03-06 22:34:35 -05:00
Thomas Harte
f05260b839 ZX80/1: fix initial key state, wait line when NMI disabled. 2021-03-06 21:59:45 -05:00
Thomas Harte
62949d2f8b Merge pull request #875 from TomHarte/InitialSelection
Ensures machine selection carries over sessions.
2021-03-06 21:38:41 -05:00
Thomas Harte
2f18f40697 Ensures machine selection carries over sessions. 2021-03-06 21:32:35 -05:00
Thomas Harte
eea4c1f148 Wires up machineSelectionTabs. 2021-03-06 21:31:08 -05:00
Thomas Harte
63a792f434 Merge pull request #844 from TomHarte/AppleIIgs
Adds incomplete Apple IIgs emulation.
2021-03-06 21:27:39 -05:00
Thomas Harte
7b164de6fd Reenables interrupts. 2021-03-06 18:53:39 -05:00
Thomas Harte
26ad760904 Withdraws the Apple IIgs tab item.
Also makes some Swift style changes while I'm here: I'm pervasively assuming that all these objects exist, might as well be upfront about it.
2021-03-06 18:53:09 -05:00
Thomas Harte
24e68166c6 Minor clean-ups of my temporary cruft. 2021-03-06 17:11:06 -05:00
Thomas Harte
b72474f418 Reduces debugging shout outs a touch. 2021-03-03 20:53:05 -05:00
Thomas Harte
38046d49aa Increases debugging noise. 2021-03-03 20:52:14 -05:00
Thomas Harte
4601421aa6 This conditional is gone. 2021-03-03 20:52:01 -05:00
Thomas Harte
86fd47545d Silences. 2021-03-03 20:51:33 -05:00
Thomas Harte
c8471eb993 Adds various asserts, some comments. 2021-03-03 20:47:45 -05:00
Thomas Harte
83d0cfc24e Improves commentary. 2021-03-03 20:33:28 -05:00
Thomas Harte
cbf5a79ee8 Takes a swing at improper key repeat. 2021-02-28 16:46:09 -05:00
Thomas Harte
2f45e07d82 Further consolidates region map, now that shadowing is orthogonal. 2021-02-28 15:22:36 -05:00
Thomas Harte
496b6b5cfc Introduces a further 128 bits of storage to eliminate the conditional in IsShadowed. 2021-02-28 15:14:32 -05:00
Thomas Harte
8604b1786e Simplifies banks $02+ to a single region. 2021-02-27 23:34:51 -05:00
Thomas Harte
267e28e012 Adds various bits of debugging detritus. 2021-02-27 22:27:57 -05:00
Thomas Harte
631a8a7421 Adds bitset header. 2021-02-27 22:13:49 -05:00
Thomas Harte
7dcb0553e4 Switches to a target-centric view of shadowing. 2021-02-27 22:13:10 -05:00
Thomas Harte
2a7ea9f57c Merge branch 'master' into AppleIIgs 2021-02-26 21:31:18 -05:00
Thomas Harte
e2b20568c6 Merge pull request #873 from TomHarte/Mac128kb
Fixes 400kb drive PWM interpretation; enables Mac 128kb and 512kb.
2021-02-26 21:29:57 -05:00
Thomas Harte
4f5eb4d71b Adds the Mac 128k & 512k as Qt options. 2021-02-26 21:25:11 -05:00
Thomas Harte
a1df8452ce Add the 128kb and 512kb Macintoshes as selectable options in macOS. 2021-02-26 21:22:54 -05:00
Thomas Harte
9781460c41 Thanks to a hint from the MAME guys: finally completes Macintosh 128kb and 512kb emulation (!) 2021-02-26 21:22:35 -05:00
Thomas Harte
55c9d152e9 Slightly smarter: this does branchless shadowing without additional storage. 2021-02-24 18:46:41 -05:00
Thomas Harte
71a107fe75 Silences the IWM again, for now. 2021-02-23 21:57:19 -05:00
Thomas Harte
6cf9099ce1 Don't clear the mouse data full flag until both registers have been read. 2021-02-23 21:57:02 -05:00
Thomas Harte
e6dc39f6f0 Makes an attempt at mouse event transmission. 2021-02-19 22:48:15 -05:00
Thomas Harte
f6466fd657 Remove temporary hackery. 2021-02-19 22:47:50 -05:00
Thomas Harte
28ce675c96 Takes a further stab at ::CommandDataIsValid. 2021-02-19 22:22:14 -05:00
Thomas Harte
3d91b0a31b Fixes keyboard data return.
Input sort of works now! Except that key repeat is way out of control.
2021-02-19 21:55:06 -05:00
Thomas Harte
5d1970d201 Adds a hacky different guess at how register access might work. 2021-02-19 21:46:18 -05:00
Thomas Harte
72d7901c88 Takes a shot at the keyboard data full flag.
Just a guess. But likely?
2021-02-19 20:06:12 -05:00
Thomas Harte
60cfec6a65 Amongst ever more cruft, adds a couple of extra asserts. 2021-02-18 22:49:48 -05:00
Thomas Harte
2e9065b34c Increases number of fixed initial values. 2021-02-18 22:48:53 -05:00
Thomas Harte
992ee6d631 Don't zero out the program bank until after it has headed stackward. 2021-02-17 22:08:08 -05:00
Thomas Harte
772093c311 Add missing header. 2021-02-16 22:51:57 -05:00
Thomas Harte
e42843cca0 This may temporarily exhaust my wit for asserts. 2021-02-16 22:47:46 -05:00
Thomas Harte
3336a123f8 Asserts even more overtly. 2021-02-16 22:33:28 -05:00
Thomas Harte
bd54e30748 Adds workaround for Sweet 16, which can produce bad data. 2021-02-16 22:21:10 -05:00
Thomas Harte
35be402354 Improve sanity check. 2021-02-16 19:47:25 -05:00
Thomas Harte
28bd620e7f Adds joystick support to the IIgs. 2021-02-16 19:39:22 -05:00
Thomas Harte
96f2d802d9 Adds a safeguard against undefined behaviour in the debugger. 2021-02-16 19:17:54 -05:00
Thomas Harte
b117df3367 Factors out joystick logic. 2021-02-16 19:17:32 -05:00
Thomas Harte
fa8236741d Takes a shot at an ADB mouse. 2021-02-15 20:49:16 -05:00
Thomas Harte
e16d5f33d1 Adds service requests. The microcontroller now appears to consume keyboard events. 2021-02-15 20:33:10 -05:00
Thomas Harte
2a45e7a8d4 Slows timer X, to what may or may not be correct. 2021-02-15 16:40:27 -05:00
Thomas Harte
f8f0ff0fae Add timer X counting.
Still no interrupts.
2021-02-15 16:29:25 -05:00
Thomas Harte
f5dcff2f29 Honours interrupt vector. 2021-02-15 15:05:56 -05:00
Thomas Harte
e773b331cd Implements register 2 listen. 2021-02-15 15:05:46 -05:00
Thomas Harte
99c21925f4 Makes attempt at keyboard mapping. 2021-02-15 15:00:12 -05:00
Thomas Harte
eccf5ca043 Makes first effort to wire up the ADB vertical blank input.
However: looking at the disassembly, I'm not sure it really is wired to INTR. So work to do.
2021-02-14 22:20:58 -05:00
Thomas Harte
24af62a3e5 Sets a default handler of 1. 2021-02-14 22:20:07 -05:00
Thomas Harte
52cf15c3e6 Attempts to route out modifier state. 2021-02-14 21:15:31 -05:00
Thomas Harte
a791680e6f Implements set_status as per advice. 2021-02-14 21:04:20 -05:00
Thomas Harte
a3e98907ca Removes temporary printf. 2021-02-14 21:03:54 -05:00
Thomas Harte
6e53b4c507 Corrects centralised ADB decoder.
I still think it's appropriate to do this in only a single place, given that using it is optional.
2021-02-14 20:41:05 -05:00
Thomas Harte
52c38e72f6 Starts seeking to automate register 3 handling.
Immediate pitfall: byte capture on the bus side isn't working correctly.
2021-02-14 20:37:33 -05:00
Thomas Harte
a51d143c35 Corrects reactive-device transmission logic.
Albeit that I'm still not properly responding to register 3 stuff, so the ADB bus needn't believe anything is out there. Also, without VSYNC being piped to the microcontroller it may well just not be polling anyway.
2021-02-14 18:54:22 -05:00
Thomas Harte
17e9305282 Starts adding a keyboard. 2021-02-13 23:16:45 -05:00
Thomas Harte
c284b34003 Resolves inability of ADB microcontroller to read its own ROM (!) 2021-02-13 17:53:40 -05:00
Thomas Harte
2ab3bba695 Attempts GLU register latching, restoring expected startup sequence. 2021-02-13 17:38:42 -05:00
Thomas Harte
2c4dcf8843 Edges towards implementing an ADB device. 2021-02-12 21:50:24 -05:00
Thomas Harte
ea40b2c982 Takes a stab at implementing device response. 2021-02-12 18:56:43 -05:00
Thomas Harte
adfdfa205f Starts to establish the means by which I'll implement ADB devices. 2021-02-12 18:42:12 -05:00
Thomas Harte
e83b2120ce Tidies up, allows Operations and AddressingModes to be posted directly to ostreams. 2021-02-10 21:46:56 -05:00
Thomas Harte
33abdc95aa Adds a helper for decoding ADB commands.
Still very noticeably to do: any sort of standard part for devices to respond to the bus.
2021-02-10 21:39:33 -05:00
Thomas Harte
6ca8aa99fc Commit SDL and Qt project files; improve commenting. 2021-02-10 21:28:32 -05:00
Thomas Harte
17bac4c8cf Starts to formalise the ADB bus. 2021-02-10 21:24:31 -05:00
Thomas Harte
46bd20b5e0 Attempts to simplify ADB bit parsing.
On-line output still looks reasonable, albeit that the microcontroller suddenly seems to be interested in devices F and 3 rather than 2 and 3.
2021-02-08 22:08:49 -05:00
Thomas Harte
3c7f9a43ad Merge branch 'AppleIIgs' of github.com:TomHarte/CLK into AppleIIgs 2021-02-08 18:43:27 -05:00
Thomas Harte
82312d3b59 Provide a more convincing version of port output. 2021-02-08 18:14:08 -05:00
Thomas Harte
93a80a30d3 With correct divider appears to get reset requests posted. 2021-02-07 23:05:01 -05:00
Thomas Harte
77b1efd176 Sets sensible 'reset' values. 2021-02-07 21:53:57 -05:00
Thomas Harte
acfab1dfb3 Starts to make some effort at timers. 2021-02-06 21:02:44 -05:00
Thomas Harte
819e9039ab Corrects printed target address for ZeroPageRelative. 2021-02-04 20:54:31 -05:00
Thomas Harte
6526c645a5 Merge branch 'master' into AppleIIgs 2021-02-02 21:29:38 -05:00
Thomas Harte
3d2490b774 Merge pull request #869 from TomHarte/OricReads
Flips conditionals to ensure 65802 safety.
2021-02-02 21:03:08 -05:00
Thomas Harte
1e041f1adf Flips conditionals to ensure 65802 safety. 2021-02-02 20:52:34 -05:00
Thomas Harte
4fdf01a1a8 Merge pull request #868 from TomHarte/ElectronSCSI
Adds Electron hard disk support.
2021-02-02 20:43:08 -05:00
Thomas Harte
beb514b231 Adds an additional mapping for copy. 2021-02-02 20:37:15 -05:00
Thomas Harte
f57e897085 Corrects visibility of SCSI output. 2021-02-02 20:24:39 -05:00
Thomas Harte
2a8e8a4982 Slightly increases logging. 2021-02-02 20:24:19 -05:00
Thomas Harte
9f202d4238 Adds SCSI interrupt support. 2021-02-01 17:40:11 -05:00
Thomas Harte
1a40cc048e Niceties: include AP6 ROM for hard-disk users; show SCSI activity indicator. 2021-01-31 21:41:11 -05:00
Thomas Harte
53514c7fdc Ensures non-breakage of Qt interface. 2021-01-31 21:28:55 -05:00
Thomas Harte
274b3c7d24 Handles SCSI changes on-demand. 2021-01-31 21:24:54 -05:00
Thomas Harte
07df7572b3 Switch to preferred Acorn-world extension: DAT. 2021-01-31 21:03:09 -05:00
Thomas Harte
906b6ccdb7 This appears to be sufficient for the Electron to _read_ SCSI.
So that's step one.
2021-01-31 18:36:29 -05:00
Thomas Harte
f1ba040dd8 This is probably how Acorn hard disk images look (?) 2021-01-31 16:00:52 -05:00
Thomas Harte
8db289e229 Adds some notes-to-self on SCSI and a route to using Acorn's ADFS. 2021-01-31 13:12:59 -05:00
Thomas Harte
8142487d57 Merge pull request #867 from TomHarte/ElectronStarCommand
Pause longer for Electron commands that start with a modifier.
2021-01-31 12:34:19 -05:00
Thomas Harte
2860be7068 Permit a longer pause at startup for Electron commands that start with shift, control or func. 2021-01-31 12:25:22 -05:00
Thomas Harte
b5ecd5f7ef Merge branch 'master' into AppleIIgs 2021-01-31 11:47:40 -05:00
Thomas Harte
7e720e754b Merge pull request #866 from TomHarte/ElectronUI
Adds UI for the new Electron configuration options.
2021-01-31 11:44:47 -05:00
Thomas Harte
41a618c957 Adds new Electron configuration options to the Qt UI. 2021-01-31 10:13:32 -05:00
Thomas Harte
3d85e6bb97 Adds Mac UI for new Electron configuration options. 2021-01-31 09:49:51 -05:00
Thomas Harte
d54085c7fd Merge pull request #865 from TomHarte/ADL
Electron: adds support for the ADL file format, and logic for AP6 and sideways RAM selection
2021-01-31 09:37:24 -05:00
Thomas Harte
0bb8bdf938 Switch to O(1) test, which avoids an extra #include. 2021-01-30 23:33:03 -05:00
Thomas Harte
865058b8d6 Adds basic text search to achieve AP6 detection. 2021-01-30 23:32:04 -05:00
Thomas Harte
b6bc0a21fb Adds a TODO on intended logic around the AP6 ROM.
... plus a promise as to intent in the Electron-specific ROM readme.
2021-01-30 23:20:43 -05:00
Thomas Harte
8311ac4a7c Adds parsing of the top-level directory for ADFS images. 2021-01-30 23:10:59 -05:00
Thomas Harte
4636d8dfb7 Adds support for installing the AP6 ROM and/or sideways RAM. 2021-01-30 19:38:19 -05:00
Thomas Harte
ac95e4d758 Adds support for ADL-format disk images. 2021-01-30 18:39:29 -05:00
Thomas Harte
b8c6d4b153 Rips out my high-level ADB microcontroller protocol implementation.
Adds just enough that the main computer validates the ADB controller as present and talking.
2021-01-30 17:53:27 -05:00
Thomas Harte
5eddc92846 Implements direction registers. 2021-01-28 21:06:11 -05:00
Thomas Harte
f50e8b5106 If I'm going to maintain the max_address approach, & is 'correct'.
% +1 would be 'more correct', but I think this approach is probably misguided.
2021-01-27 18:31:11 -05:00
Thomas Harte
dcc2fe0990 Improves M50470 entry-point detection, adds test output. 2021-01-26 21:29:17 -05:00
Thomas Harte
56111c75ae Makes first efforts towards disassembly. 2021-01-26 19:52:30 -05:00
Thomas Harte
cc90935abd Starts to provide just a touch of reflection. 2021-01-26 19:22:00 -05:00
Thomas Harte
413e42e1b6 Attempts to fix BBC.
But thereby stops all ADB output.
2021-01-25 22:34:03 -05:00
Thomas Harte
fc4bda0047 Experimentally flipping interpretation of the output bit gives something closer to coherent. 2021-01-25 22:02:39 -05:00
Thomas Harte
c8beb59172 Attempts properly to track ADB bus activity.
Output is not yet a valid ADB stream. Work to do.
2021-01-25 17:43:22 -05:00
Thomas Harte
8789ffda15 Corrects performer storage, RMW/W confusion, implicit casts, port readback. 2021-01-24 22:30:42 -05:00
Thomas Harte
e8e604dc3c Attempts to wire up M50470 and GLU.
Resulting in an unexpected interest in R15. Bugs to find, I guess.
2021-01-24 18:07:05 -05:00
Thomas Harte
57e0fdfadc Ensures ADB microcontroller is clocked.
And runs at the 'correct' speed (i.e. modulo my instruction-by-instruction implementation).
2021-01-23 22:55:12 -05:00
Thomas Harte
7f62732476 Fixes kiosk target, accepts that I'll probably never add UI tests. 2021-01-23 21:59:21 -05:00
Thomas Harte
36aebe0ff9 Posts cycle lengths. 2021-01-23 21:58:52 -05:00
Thomas Harte
051d2b83f4 Corrects TSX lookup. 2021-01-23 15:45:21 -05:00
Thomas Harte
17b12120eb Corrects bit-selection shifts. 2021-01-21 23:13:00 -05:00
Thomas Harte
6e9ce50569 Corrects duration-based iteration. 2021-01-21 23:05:43 -05:00
Thomas Harte
adef2e9b4e Starts formalising end conditions. 2021-01-21 22:36:44 -05:00
Thomas Harte
0fafbf5092 Completes M50740 instruction set. 2021-01-21 19:08:38 -05:00
Thomas Harte
3c887aff95 Improves consistency. 2021-01-21 18:58:22 -05:00
Thomas Harte
e5076b295b Corrects namespace. 2021-01-21 18:58:11 -05:00
Thomas Harte
c10c161d39 Implements ADC and SBC. 2021-01-21 18:53:24 -05:00
Thomas Harte
04024ca159 Adds BIT. 2021-01-20 21:41:43 -05:00
Thomas Harte
64d556f60f Implements shifts and rotates. 2021-01-20 21:39:13 -05:00
Thomas Harte
8564e7406b Corrects index-mode CMP, LDA. 2021-01-20 21:32:46 -05:00
Thomas Harte
ebdb58d790 Seemingly advances to the first indefinite loop. 2021-01-20 21:18:52 -05:00
Thomas Harte
cf8afc70b2 Takes a swing at BBC, BBS. 2021-01-20 20:52:04 -05:00
Thomas Harte
4f02e8fbaf Knocks off the low-hanging instruction fruit. 2021-01-20 20:41:35 -05:00
Thomas Harte
6e618a6bb7 Adds a list of missing instructions.
Not looking too bad; subject to not yet having a strategy for interrupts, timing, nothing yet implemented for timers, IO ports...
2021-01-20 20:37:35 -05:00
Thomas Harte
df1bc18fb3 Pushes ahead to what will be my first interaction with the T flag. 2021-01-20 20:27:09 -05:00
Thomas Harte
9f12ce2fb8 Corrects RTS, adds the remainder of the direct flag manipulations. 2021-01-20 20:16:55 -05:00
Thomas Harte
b9672c0669 Gets beyond a prima facie convincing JSR/RET. 2021-01-20 18:21:44 -05:00
Thomas Harte
e58608b25a Gets as far as executing a first loop. 2021-01-20 18:15:24 -05:00
Thomas Harte
e502d76371 Corrects immediate instruction length, muddles through to having to parse a second program segment.
Albeit with JSR not yet properly implemented.
2021-01-19 22:12:18 -05:00
Thomas Harte
b0c790f3c6 Adds enough flags seemingly to reach an ASL. 2021-01-19 21:54:15 -05:00
Thomas Harte
aa478cd222 Stops trying to force bit ID into the addressing mode. 2021-01-19 21:51:01 -05:00
Thomas Harte
c78c121159 Succeeds at executing a single instruction. 2021-01-18 20:16:01 -05:00
Thomas Harte
e71e506883 This assert is redundant; not worth an extra #include. 2021-01-18 17:56:40 -05:00
Thomas Harte
a601ac0cab Corrects performer population, lookup, calls. 2021-01-18 17:53:14 -05:00
Thomas Harte
9b92753e0a In theory this should 'execute' up to the first unconditional branch.
Where execution means: do very little.
2021-01-18 17:11:11 -05:00
Thomas Harte
ec0018df79 Routes in the ADB keyboard ROM. This should get as far as parsing. 2021-01-18 16:59:49 -05:00
Thomas Harte
8b19c523cf Starts to bend towards getting some performers in motion. 2021-01-18 16:45:52 -05:00
Thomas Harte
5ace61f9b9 Continues walking very slowly towards cached execution. 2021-01-18 11:20:45 -05:00
Thomas Harte
8a74f5911c Minor reorganisation to finish the day. 2021-01-17 21:56:15 -05:00
Thomas Harte
4982430a29 Takes a run at most of the remaining addressing modes. 2021-01-17 21:52:16 -05:00
Thomas Harte
dea79c6dea Adds missing #include. 2021-01-17 20:56:22 -05:00
Thomas Harte
ad03858c6e Switches performers to member functions. Very slightly starts work on M50740 performers. 2021-01-17 20:53:11 -05:00
Thomas Harte
54b26c7991 Bends to using 8-bit lookups for M50740 instructions. 2021-01-17 20:03:36 -05:00
Thomas Harte
17c3a3eb4b Seeks to switch to maintaining a bank of performers.
My thinking here is that for really simple processors there'll be 256 or less, meaning that they can be stored by simple uint8_t; for every other processor I can currently think of it'll likely be uint16_t.

Either way, that's a much better outcome than using plain pointers, which on architectures I currently build for will always be 8 bytes. For the simple processors I can get eight times as much into the cache; for the others four times.
2021-01-17 19:38:23 -05:00
Thomas Harte
5f413a38df Switches all American-style dates.
I'd failed to configure my new computer appropriately, it seems.
2021-01-16 22:09:19 -05:00
Thomas Harte
8860d0ff51 Starts to establish the CachingExecutor. 2021-01-16 22:06:16 -05:00
Thomas Harte
8bd471fa3c Corrects recursive call. 2021-01-16 21:50:48 -05:00
Thomas Harte
cd6ac51aa6 Muddles along to generating functions.
Albeit right now without a body.
2021-01-16 21:45:44 -05:00
Thomas Harte
10caa1a1fb Steps gingerly towards execution. 2021-01-16 20:51:02 -05:00
Thomas Harte
722e0068ca Adds additional exposition. 2021-01-16 20:10:20 -05:00
Thomas Harte
8f2eea8819 Corrects AccessType::Read. 2021-01-16 20:04:48 -05:00
Thomas Harte
3b2d65fa16 Adds access type declaration. 2021-01-16 20:04:01 -05:00
Thomas Harte
3dc36b704a Starts on the next piece: parsers. 2021-01-16 19:54:40 -05:00
Thomas Harte
37a20e125c Completes the M50740 decoder.
Completely untested.
2021-01-15 22:47:52 -05:00
Thomas Harte
2910faf963 Adds missing #include. 2021-01-15 22:33:14 -05:00
Thomas Harte
321e10fffb Adds 'InstructionSets' to the SDL and Qt projects. 2021-01-15 22:30:02 -05:00
Thomas Harte
1acb8c3c42 Completes the opcode map. 2021-01-15 22:24:37 -05:00
Thomas Harte
f667dd223f Advances to 50% of the opcode map. 2021-01-15 22:05:34 -05:00
Thomas Harte
e0d90f69ec Fills in the first quarter of the opcode map. 2021-01-15 21:58:46 -05:00
Thomas Harte
d82187bee2 Decides to shove bit number into AddressingMode. 2021-01-15 21:50:05 -05:00
Thomas Harte
3c20e1f037 Adds files for the M50740 and corrects namespace errors elsewhere. 2021-01-15 21:30:30 -05:00
Thomas Harte
15bedc74d4 Merge branch 'master' into AppleIIgs 2021-01-15 21:15:10 -05:00
Thomas Harte
4bd6ffa9e4 Merge pull request #863 from TomHarte/DecodersAhoy
Sketches out the concept of a `Decoder`
2021-01-15 21:14:49 -05:00
Thomas Harte
9c2c918760 Better sorts by function, corrects TEST description. 2021-01-15 21:07:02 -05:00
Thomas Harte
47d20699d8 Completes list, ensures POP acts as documented. 2021-01-15 20:48:31 -05:00
Thomas Harte
e8ce70dccb Chips further away at documentation. 2021-01-15 18:52:59 -05:00
Thomas Harte
fa4938f29c Establishes the reason I'm sort-of documenting these. 2021-01-15 18:27:55 -05:00
Thomas Harte
ddb4bb1421 Better plans project layout. 2021-01-15 18:16:01 -05:00
Thomas Harte
ca94e9038e Introduces 'far' test, fixes parsing. 2021-01-14 22:15:38 -05:00
Thomas Harte
2c72a77a25 Adds byte-by-byte decoder test; corrects divergences. 2021-01-13 21:51:18 -05:00
Thomas Harte
8c0e06e645 Adds a test for 0x83 and fixes sign extension.
ODA doesn't seem to accept 0x82, but testing 0x83 adds some confidence.
2021-01-13 20:42:21 -05:00
Thomas Harte
a24ae727a7 Takes a run at 0x82 and 0x83, completing the set. 2021-01-13 20:29:44 -05:00
Thomas Harte
5058a8b96a Completes the first test stream.
... and improves decoding consistency in conjunction.
2021-01-12 21:49:22 -05:00
Thomas Harte
762ecab3aa Adds operand/displacement capture.
This gets unit test as far as a disagreement over how to handle bad 0xc4 suffixes.
2021-01-10 22:55:25 -05:00
Thomas Harte
9ba5b7c1d4 Adds a few more asserts.
It's still just operands and displacements failing, which is nice.
2021-01-08 23:21:01 -05:00
Thomas Harte
5f807b6e47 Ensures that the operand is the only thing failing in decoding of the first instruction. 2021-01-08 23:02:06 -05:00
Thomas Harte
718f950071 Implements 80 and 81. 2021-01-08 22:50:59 -05:00
Thomas Harte
68fe16a092 Marks intent for operand/displacement. 2021-01-08 22:45:27 -05:00
Thomas Harte
97a64db5e0 Edges closer towards full x86 recording. 2021-01-08 22:38:56 -05:00
Thomas Harte
86577b772b Rethinks size; packs all captured information into an x86 Instruction.
Albeit that operand and displacement are't yet captured. Or extractable.
2021-01-08 22:22:07 -05:00
Thomas Harte
306df7554e Starts trying to find a good packing for X86 instructions.
To consider: do I really need `size` on every instruction?
2021-01-08 21:33:01 -05:00
Thomas Harte
30c2c0f050 Attempts to complete operand recognition. 2021-01-07 21:59:00 -05:00
Thomas Harte
205649cac2 Decodes 8e. 2021-01-07 21:36:05 -05:00
Thomas Harte
fd49b72e31 Simplifies macros, implements d0, d1, d2 and d3. 2021-01-07 21:30:01 -05:00
Thomas Harte
995904993d Fills in 8f, c2, c3, ca and cb.
Also switches to RETN and RETF for near/far RET as this seems idiomatic.
2021-01-06 21:18:24 -05:00
Thomas Harte
17cbba85fc Formalises what's missing in terms of opcodes and fills in some blanks. 2021-01-05 21:47:12 -05:00
Thomas Harte
9d7d45338f Ostensibly gets the instruction stream correct for test case 1.
Subject to operand and displacement currently being absent, and likely inconsistencies in field population, most of which are omitted from the Instruction anyway.
2021-01-05 21:34:35 -05:00
Thomas Harte
3b55d3f158 Nudges up to a need to decode operation from the ModRegRM byte. 2021-01-05 21:25:12 -05:00
Thomas Harte
fda2293d6b Improves constness. 2021-01-04 22:36:39 -05:00
Thomas Harte
da814c62bc Merge branch 'master' into AppleIIgs 2021-01-03 20:57:08 -05:00
Thomas Harte
d4095b1b3b Merge branch 'master' into DecodersAhoy 2021-01-03 20:56:47 -05:00
Thomas Harte
ed41154338 Merge pull request #862 from MaddTheSane/madds-patch-1
Madd's improvements
2021-01-03 20:53:39 -05:00
Thomas Harte
38bca5f0f0 Finally runs into the wall of trying to merge operands and offsets. 2021-01-03 20:08:13 -05:00
Thomas Harte
a8738b533a Switch for now to block-level decoding.
It's easier to step debug.
2021-01-03 20:07:46 -05:00
Thomas Harte
29cf96c703 Adds decoding of disp16 RETs. 2021-01-03 19:39:28 -05:00
Thomas Harte
782dc3d046 Distinguishes inter- and intra-segment RET. 2021-01-03 19:37:37 -05:00
Thomas Harte
0ae217f51d Improves exposition, adds decoding of the 0xbx patch of MOVs. 2021-01-03 19:33:16 -05:00
Thomas Harte
adcb2e03e8 Attempts to consolidate source/destination ordering. 2021-01-03 17:28:29 -05:00
Thomas Harte
11b6c1d4b5 Proceeds to three instructions correctly decoded. 'Wow'. 2021-01-03 17:03:50 -05:00
Thomas Harte
367cb1789d Starts building an x86 test. 2021-01-03 16:37:35 -05:00
Thomas Harte
adf1484ecc Introduces third test sequence, uneventfully. 2021-01-03 16:21:23 -05:00
Thomas Harte
5401ff6c78 Proactively fixes li sign extension. 2021-01-03 11:14:43 -05:00
Thomas Harte
eb8d0eefd5 Factors out some boilerplate and introduces second sequence. 2021-01-03 11:14:30 -05:00
Thomas Harte
c934e22cee Introduces a first test of PowerPC decoding.
Corrected as a result: the bcx conditional, that stdu is 64-bit only, extraction of the li field.
2021-01-02 22:47:42 -05:00
Thomas Harte
1a3effc692 Modifies contract again. This is why I'm doing this now. 2021-01-02 21:19:45 -05:00
Thomas Harte
32c942d154 Muddles drunkenly towards decoding ModRM. 2021-01-02 21:11:19 -05:00
Thomas Harte
9c5dc0ed29 Deferring ModRM work, proceeds to 0x9f. 2021-01-02 19:29:43 -05:00
Thomas Harte
290972cedf Adds health warning. 2021-01-02 19:16:21 -05:00
Thomas Harte
dc9d370952 Does the easier part of the easier half of 8086 decoding. 2021-01-02 19:16:07 -05:00
Thomas Harte
a41be61f99 Slightly fleshes out models, for a sensible beginning. 2021-01-01 17:36:47 -05:00
Thomas Harte
3d1783ddae Add exposition as to the purpose of decoders. 2021-01-01 17:32:57 -05:00
Thomas Harte
8151c8e409 Rounds out field list. 2021-01-01 16:38:40 -05:00
Thomas Harte
0ef42f93ff Further rounds out decoder. 2021-01-01 11:46:26 -05:00
Thomas Harte
d318ab4e70 Edges further onwards. 2020-12-31 21:12:36 -05:00
Thomas Harte
ebfa35c2c7 Conquers another page of instructions; adds supervisor flag. 2020-12-31 18:14:38 -05:00
Thomas Harte
db50b0fe23 Gets started on 6+10 decoding, places stake as to other fields. 2020-12-31 16:51:31 -05:00
Thomas Harte
233a69a1d8 Decodes operations for the simplest 45. 2020-12-31 16:02:52 -05:00
C.W. Betts
3749b7b776 My improvements:
Use synthesized properties for CSMissingROM.
Remove openGLView from the xib: that will quiet a warning.
Add nullability metadata to CSStaticAnalyser.
2020-12-31 13:23:46 -07:00
Thomas Harte
ed63e7ea75 Starts building out a PowerPC decoder. 2020-12-30 22:55:59 -05:00
Thomas Harte
31d68622c8 Better ensures frame buffer can be cleared. 2020-12-29 22:26:19 -05:00
Thomas Harte
ee5f45c979 Merge branch 'master' into AppleIIgs 2020-12-29 22:16:23 -05:00
Thomas Harte
3d79b11f92 Merge pull request #861 from TomHarte/DiskIIOtherROM
Ensure proper in-memory ordering of the b72a2c70 ROM.
2020-12-29 22:13:24 -05:00
Thomas Harte
dfe4e49110 Ensure proper in-memory ordering of the b72a2c70 ROM. 2020-12-29 22:08:48 -05:00
Thomas Harte
12784a71e2 A stab in the dark: does the IOLC inhibit also affect vector fetches? 2020-12-29 20:53:56 -05:00
Thomas Harte
e0b36c9c3d Corrects PBR/DBR resetting upon an exception. 2020-12-29 15:27:49 -05:00
Thomas Harte
c5c56f9d05 Mention my manual list sorting. 2020-12-23 11:15:57 -04:00
Thomas Harte
9f0129cab8 Merge pull request #859 from MaddTheSane/gcJoystick
Initial GameController joystick support.
2020-12-16 21:39:28 -04:00
C.W. Betts
5a48e50355 Use isEqual: to compare GCController when connecting/disconnecting.
Only remove observers for GCController notifications.
2020-12-14 15:41:11 -07:00
C.W. Betts
86283b1815 Actually write the setup code. 2020-12-14 01:14:40 -07:00
C.W. Betts
a38d964f62 Initial GameController joystick support. 2020-12-13 11:23:33 -07:00
Thomas Harte
114d48b076 This register appears to be read/write. 2020-12-11 21:43:34 -05:00
Thomas Harte
6e9d517c26 Minor cleanliness improvement. 2020-12-11 21:43:13 -05:00
Thomas Harte
3b2e97e77c Introduces basic auxiliary switch tests.
All of which pass. Grrr.
2020-12-11 21:30:03 -05:00
Thomas Harte
159924dcc0 More clarity tweaks. 2020-12-10 22:47:11 -05:00
Thomas Harte
5d8f284757 Makes minor style improvements. 2020-12-10 22:11:53 -05:00
Thomas Harte
c978a95463 Increases asserts and adds a test.
Thereby discovers and fixes a problem with set_main_paging().
2020-12-10 21:49:23 -05:00
Thomas Harte
fe4caf7a41 Nudges tick frequency up to match the other platforms. 2020-12-10 21:02:13 -05:00
Thomas Harte
4bf85abf30 Ensure defined initial state for the frame buffer. 2020-12-10 18:15:07 -05:00
Thomas Harte
49cee90b4d Ensures no retraces are missed. 2020-12-09 20:32:26 -05:00
Thomas Harte
394f6b58d8 Ensure _finalisedLineTexture really is cleared. 2020-12-09 20:18:53 -05:00
Thomas Harte
dbdea95241 Ensure use_automatic_tape_control_ is always a valid bool. 2020-12-09 20:10:56 -05:00
Thomas Harte
1928c955d9 Ensures safe startup of the Ensoniq. 2020-12-09 19:46:32 -05:00
Thomas Harte
a91a13b46b Merge branch 'master' into AppleIIgs 2020-12-09 19:33:23 -05:00
Thomas Harte
2f86d5ebaf Merge pull request #858 from TomHarte/M1ForLife
Corrects Metal buffer sizing on Retina displays.
2020-12-09 19:18:56 -05:00
Thomas Harte
b589d6e3ef Fixes retina-display buffer size. 2020-12-09 18:51:10 -05:00
Thomas Harte
db8b265e80 Enable M1 release builds. 2020-12-09 18:38:14 -05:00
Thomas Harte
8560b38ffa Reduce to less-daunting URL. 2020-12-09 16:38:59 -05:00
Thomas Harte
049a78c667 Slightly restricts video flushing test. 2020-12-08 18:47:15 -05:00
Thomas Harte
574a37814c Attempts to fix exception selection and timing. 2020-12-08 18:46:30 -05:00
Thomas Harte
94eb17db0c Add sponsorship exposition; improve general wording 2020-12-08 16:35:00 -05:00
Thomas Harte
9577c8e27f Experiment with F 2020-12-08 16:08:25 -05:00
Thomas Harte
c72bdd776e Adds a new assert: I think this is the issue getting into GS/OS. 2020-12-07 22:43:24 -05:00
Thomas Harte
d35def4bbc Ensures a consistent initial state. 2020-12-06 22:01:59 -05:00
Thomas Harte
d5f209366a Extends testing to disabling IO space. 2020-12-06 21:53:53 -05:00
Thomas Harte
9062e80e9d Adds anti-IO protection. 2020-12-06 21:46:04 -05:00
Thomas Harte
fd3760cedc Adds passing test of basic $00 -> $01 -> $e1 shadowing. 2020-12-06 21:19:38 -05:00
Thomas Harte
9b73331ee9 Resolves deprecated use of scanHexInt32. 2020-12-06 20:49:12 -05:00
Thomas Harte
65ca931e83 Throws in a new assert, against the unimplemented bit 0 of new video. 2020-12-06 20:26:24 -05:00
Thomas Harte
6cb71eb11b This needs explicitly to be a bool for the table lookups to work. 2020-12-06 16:43:07 -05:00
Thomas Harte
43251193ee The actual maximum line length is now 656. 2020-12-06 16:42:43 -05:00
Thomas Harte
55de98fb46 Adds a new statement of intent.
Now I need to try to decide whether I like my current all-in-one mapping for shadowing + paging, or whether it's better to split the things. I'm tending towards the latter at least until the functionality works.
2020-12-05 19:09:21 -05:00
Thomas Harte
1422d43c35 Corrects documentation errors and ambiguities. 2020-12-05 19:07:38 -05:00
Thomas Harte
6273ef8ba2 Adds means to force specific ROM 03 self tests. 2020-12-02 20:48:19 -05:00
Thomas Harte
3c6f09a898 Corrects super high-res aspect ratio and placement. 2020-12-02 20:47:26 -05:00
Thomas Harte
24fcb0c24b Corrects video counter values.
The built-in speed test now passes.
2020-12-01 18:35:55 -05:00
Thomas Harte
3162873a9c Improves the meaning and result of time_since_flush(). 2020-12-01 18:35:07 -05:00
Thomas Harte
03e2b6a265 Makes a slightly more rigorous attempt at discerning 1Mhz and 2.8Mhz operation. 2020-12-01 17:46:30 -05:00
Thomas Harte
ee22cf7ca1 Ensures that PAGE2 propagates from the state register to video. 2020-11-30 22:56:19 -05:00
Thomas Harte
187f507532 The soft switch is LCBANK2, not LCBANK1.
[This also jimmys the IIgs into always entering its extended self test, for now]
2020-11-30 22:35:51 -05:00
Thomas Harte
6000bd3a5e Adds a bonus debugging assert. Let's see. 2020-11-30 18:15:02 -05:00
Thomas Harte
87069da3dd Improves exposition, eliminates a couple of redundant map adjustments. 2020-11-30 18:07:03 -05:00
Thomas Harte
5cb4077576 Switches from modulo to and. 2020-11-30 17:47:57 -05:00
Thomas Harte
e9c7e0b9dd Provisionally reverses meaning of language card RAM bank select. 2020-11-29 21:57:17 -05:00
Thomas Harte
35aa7612bb Ensures that auxiliary/language-card soft switches don't trigger my assert. 2020-11-29 21:32:24 -05:00
Thomas Harte
acaa841822 Adds guaranteed trip to ROM for vector pulls. 2020-11-29 21:29:15 -05:00
Thomas Harte
46c1c9b5ee CLRVBLINT calls it 3.75Hz. Which makes the arithmetic nicer. 2020-11-29 21:25:06 -05:00
Thomas Harte
4bdbca64b2 Takes a shot at the Mega II-style video interrupts. 2020-11-29 21:21:46 -05:00
Thomas Harte
3da6b4709c Fixes sign of arithmetic. 2020-11-29 20:23:33 -05:00
Thomas Harte
11fe8ab6db Corrects counter scales, adds a read for $c032.
Albeit that I have no idea what that's supposed to read as.
2020-11-29 20:08:59 -05:00
Thomas Harte
a9ce43d244 Takes a shot at the two video counter registers. 2020-11-29 19:57:35 -05:00
Thomas Harte
091bce9350 Merge branch 'master' into AppleIIgs 2020-11-29 00:09:20 -05:00
Thomas Harte
32ccce3040 Merge pull request #855 from TomHarte/QtNoKeyboardCopy
Qt: don't copy the result of get_keyboard().
2020-11-29 00:05:26 -05:00
Thomas Harte
ab3fcb3ea0 Qt: don't copy the result of get_keyboard(). 2020-11-29 00:01:11 -05:00
Thomas Harte
9610672615 Merge pull request #854 from TomHarte/OpenGLNoColourBurst
Avoids all risk of infinities when there is no colour burst
2020-11-28 23:54:29 -05:00
Thomas Harte
5ee9630624 Use compositeAmplitude in favour of its reciprocal. 2020-11-28 19:53:34 -05:00
Thomas Harte
1b3836eb1c Adds an overt branch for mono/colour composite selection. 2020-11-28 19:47:04 -05:00
Thomas Harte
1302a046e9 Merge branch 'OpenGLNoColourBurst' of github.com:TomHarte/CLK into OpenGLNoColourBurst 2020-11-28 17:19:42 -05:00
Thomas Harte
33dec3c220 Given that lineCompositeAmplitude is not normalised, ups threshold. 2020-11-28 17:19:28 -05:00
Thomas Harte
7c29c3a944 Given that lineCompositeAmplitude is not normalised, ups threshold. 2020-11-28 17:13:18 -05:00
Thomas Harte
c9ca1fc7a0 Merge pull request #853 from TomHarte/AppleIIReset
Improves Apple II keyboard input, especially under SDL.
2020-11-28 12:43:32 -05:00
Thomas Harte
a965c8de9f Resolves intended reset_all_keys. 2020-11-27 21:53:34 -05:00
Thomas Harte
0b4b271e3d Pulls out redundant check. 2020-11-27 21:04:20 -05:00
Thomas Harte
5fc6dd1a4d Regresses macOS deployment target for kiosk mode to avoid OpenGL warning. 2020-11-27 21:02:04 -05:00
Thomas Harte
79ef026b93 Allows machines to declare a preference for logical input.
It's only a preference, and the Apple II does prefer it.
2020-11-27 21:00:48 -05:00
Thomas Harte
a4ab5b0b49 Does a better job of ensuring sensible key mappings. 2020-11-27 20:49:38 -05:00
Thomas Harte
310282b7c9 Ensures extra_border_length always has a defined value. 2020-11-27 10:31:04 -05:00
Thomas Harte
af667c718e Gets a bit more rigorous in remaining missing parts. 2020-11-26 22:36:32 -05:00
Thomas Harte
950f5b1691 Closes the loop on interrupts. 2020-11-26 19:56:42 -05:00
Thomas Harte
f54a3f8619 Limit test target to latest macOS, current architecture. 2020-11-26 19:50:38 -05:00
Thomas Harte
cbc0d848ad Implements most of get_data. 2020-11-26 17:25:27 -05:00
Thomas Harte
f4d13d1f6f Takes a run at the bus side of honouring Ensoniq sequence points. 2020-11-26 17:14:46 -05:00
Thomas Harte
6808ad6f5d Adds a getter for the interrupt line. 2020-11-26 16:44:35 -05:00
Thomas Harte
7a8920ee38 Takes a stab at next_sequence_point. 2020-11-26 16:41:11 -05:00
Thomas Harte
4870506f6e Implements skip_audio. 2020-11-26 16:24:48 -05:00
Thomas Harte
6f47f9d67c Corrects placement of address bits. 2020-11-26 16:15:40 -05:00
Thomas Harte
8093f67173 Ensures video interrupts can't be missed by a suitably-timed access. 2020-11-26 16:11:03 -05:00
Thomas Harte
72884f37c3 It's still interrupt-deficient, but fills in additional Ensoniq audio generation. 2020-11-26 16:03:28 -05:00
Thomas Harte
8edb3fcd5f Attempts to obey accumulator size in determining sample end. 2020-11-26 15:07:29 -05:00
Thomas Harte
b0efc647f1 An OpenGL context is neither still necessary nor desirable. 2020-11-26 13:49:41 -05:00
Thomas Harte
fdd102df52 Resolves border colour resets. 2020-11-26 13:13:48 -05:00
Thomas Harte
73d28838c0 Slightly rebalances template.
More clearly to ensure the lock_guard stays in the correct place.
2020-11-26 13:08:40 -05:00
Thomas Harte
03a893dc74 Quick refactor: this clearly isn't a VideoBase, it's the full implementation. 2020-11-26 12:54:20 -05:00
Thomas Harte
56de2512ae Adds a further safety assert. 2020-11-25 23:34:30 -05:00
Thomas Harte
cdc2311045 Enables fuzzing, adds a definite no-op write. 2020-11-25 23:33:55 -05:00
Thomas Harte
c6c12209e8 Corrects end_data thread safety; permits caller not to have reached new_modals before a machine starts trying to push data. 2020-11-25 23:32:37 -05:00
Thomas Harte
eec27c3406 Reaches for marginally more coherent ADB data. 2020-11-25 17:34:00 -05:00
Thomas Harte
2ac6f96806 Merge branch 'AppleIIgs' of github.com:TomHarte/CLK into AppleIIgs 2020-11-24 18:28:24 -05:00
Thomas Harte
0bd3103949 Wires in the most common IIgs style of 2MG. 2020-11-24 18:19:34 -05:00
Thomas Harte
098a22aa95 Avoid out-of-bounds access of double_bytes. 2020-11-24 09:38:07 -05:00
Thomas Harte
9a819d6ca0 Transcribes interesting 2MG fields, albeit without acting on them. 2020-11-23 22:02:32 -05:00
Thomas Harte
b4bf541eec Adds boilerplate route into a 2MG-handling class. 2020-11-23 21:42:18 -05:00
Thomas Harte
7ede3d2b9e Corrects collection of palettes other than palette 0. 2020-11-23 21:00:26 -05:00
Thomas Harte
e7160fe3c3 Rounds out the IIgs video hardware, bugs aside. 2020-11-23 20:58:32 -05:00
Thomas Harte
9d61665014 Attempts to add colour double [low/high] resolution output. 2020-11-23 19:05:18 -05:00
Thomas Harte
d2938ad7c8 Eliminate magic constants. 2020-11-23 18:36:44 -05:00
Thomas Harte
9e0e063f8a Resolves one further GCC warning.
Technically this leaves one further, on a temporary printf I have in my IIgs. I'll fix that when I strip all this caveman stufff.
2020-11-22 21:57:48 -05:00
Thomas Harte
46f7ff07f7 Adds support for fill mode. 2020-11-22 21:55:21 -05:00
Thomas Harte
8ace258fbc Tackles outstanding GCC warnings. 2020-11-22 21:43:56 -05:00
Thomas Harte
4359fb1746 Enables undefined-behaviour sanitiser. 2020-11-22 21:30:00 -05:00
Thomas Harte
a34f294ba8 Pulls out commonalities re: NTSC colour, ensures mixed modes on a line works. 2020-11-22 21:29:40 -05:00
Thomas Harte
cd7d080b7a Corrects low-resolution mode. 2020-11-22 20:52:42 -05:00
Thomas Harte
b0936b6ef4 Resolves high-resolution output.
Yet to optimise, but working.
2020-11-22 19:10:05 -05:00
Thomas Harte
8fae74f93e Reintroduces delay bit, reverses phase.
There are stray columns of errors, but otherwise this is almost correct.
2020-11-22 11:06:14 -05:00
Thomas Harte
fca48e4b66 Makes hasty attempt to shift 'NTSC' in the most natural direction. 2020-11-21 23:39:58 -05:00
Thomas Harte
dd816c5a0a Restore valid buffering. 2020-11-21 22:55:54 -05:00
Thomas Harte
3b2ea37428 Slightly cleans up. 2020-11-21 22:53:26 -05:00
Thomas Harte
8a805b6ba1 Ensures that get_average_output_peak() returns something sensible even before a set_relative_volumes. 2020-11-21 22:52:57 -05:00
Thomas Harte
3cc89cb4d2 Seeks to avoid false assert failures. 2020-11-21 22:52:19 -05:00
Thomas Harte
9b45c5a1cd Resolves out-of-bounds reads. 2020-11-21 22:36:10 -05:00
Thomas Harte
3cba3a5ac0 Corrects card mask test outside of bank $00. 2020-11-21 22:22:27 -05:00
Thomas Harte
4b024c5787 Starts to make some attempt at classic II modes. 2020-11-21 18:07:51 -05:00
Thomas Harte
4a42de4f18 Attempts to add 5.25" drive support to the IIgs.
I want to try some classic software.
2020-11-20 21:37:17 -05:00
Thomas Harte
d00e5d23ef Takes a second shot at the MemoryWrite constructor complaint. 2020-11-19 22:28:10 -05:00
Thomas Harte
2c9ce116a2 Resolves various GCC-reported issues. 2020-11-19 22:21:20 -05:00
Thomas Harte
3512352c32 Attempt to use the most-significant relevant bits for sample position. 2020-11-19 22:13:09 -05:00
Thomas Harte
4d9372c52f Also takes a stab at swap mode. 2020-11-19 21:56:49 -05:00
Thomas Harte
1d288b08b6 Attempts the two most basic forms of DOC output.
Sans interrupts. Or register reads of any variety.
2020-11-19 21:19:27 -05:00
Thomas Harte
f3c7c11772 Register writes now reach the audio thread. 2020-11-18 21:52:03 -05:00
Thomas Harte
4b9fe805e9 Sets up a queue to push memory writes onto the audio thread. 2020-11-18 21:40:56 -05:00
Thomas Harte
a7051e4e42 Strip this forceinline until I've satisfied myself that it works in declarations. 2020-11-18 21:40:25 -05:00
Thomas Harte
34794223b4 For now, at least, c800–cfff is always built-in ROM.
Otherwise I probably need to extend my c3 logic to cover the other built-in cards (?)
2020-11-18 19:49:45 -05:00
Thomas Harte
96cf617ee6 Advances slightly. I think I need a custom queue for RAM writes. 2020-11-18 19:48:53 -05:00
Thomas Harte
69dddf34b9 Adds bonus sanity check. 2020-11-18 19:47:56 -05:00
Thomas Harte
8f4597f742 Hacks in double text.
Actually, only one error: it should start half a column earlier. All 'double' output should. TODO.
2020-11-18 19:47:22 -05:00
Thomas Harte
98347cb1c3 Starts in the direction of audio support. 2020-11-18 18:39:11 -05:00
Thomas Harte
c7ab3d4075 Reduces cost of bookending video data. 2020-11-18 17:32:11 -05:00
Thomas Harte
cddd72876f Flips meaning of ejected bit, to please the IIgs. 2020-11-18 17:20:48 -05:00
Thomas Harte
62f936128d It seems possibly there is a distinct IIgs character ROM? 2020-11-16 22:22:26 -05:00
Thomas Harte
bb80e53021 Reduces frequency of video flushes. 2020-11-16 21:55:41 -05:00
Thomas Harte
952891d1b6 Improves commentary. 2020-11-16 21:46:35 -05:00
Thomas Harte
6dfad6a44b Slightly reduces logging.
Hopefully soon I can tear the whole lot out.
2020-11-16 21:46:19 -05:00
Thomas Harte
e4c5bfdd5c Takes a repeat shot at proper shadowing.
I think the Apple IIgs Technical Reference explains how these bits interact, and I just had inhibit_all_pages off all on my own.
2020-11-16 19:54:12 -05:00
Thomas Harte
da8563733b Adds an informal guarantee. 2020-11-16 19:53:17 -05:00
Thomas Harte
e41faeb557 Adds a quick protection against sector ID buffer overrun. 2020-11-16 19:52:42 -05:00
Thomas Harte
9a55eb56ea Attempts to provide saner sequence point behaviour. 2020-11-16 19:00:11 -05:00
Thomas Harte
9206ab5dc3 Adds notes to self; implements get_next_sequence_point for video, allowing per-line interrupts. 2020-11-16 14:42:50 -05:00
Thomas Harte
7e39550fc0 Attempts to make JustInTimeActor sequence-point aware.
With the objective of chopping out a lot of future boilerplate.
2020-11-15 21:58:18 -05:00
Thomas Harte
96e79301f3 Clamps 16-bit positioning values. 2020-11-15 19:14:57 -05:00
Thomas Harte
c3f5fbd300 Picks a better framing compromise for classic and new video modes. 2020-11-15 19:14:43 -05:00
Thomas Harte
1db713fec1 Attempts more meaningful super high-res pixel output.
With a timing hack as noted.
2020-11-15 18:36:24 -05:00
Thomas Harte
68ba73bee0 Ensures I get some sort of feedback for non-text modes. 2020-11-15 17:16:52 -05:00
Thomas Harte
cdacf280e1 After much extra logging, corrects destination bank for MVN and MVP. 2020-11-15 16:08:29 -05:00
Thomas Harte
1538a02e18 Better explains concern. 2020-11-14 19:27:20 -05:00
Thomas Harte
f9cec9a102 Attempts also to implement 1Mhz access costs.
Subject to TODO, and same observation as before: this is as to my current understanding only.
2020-11-14 19:23:01 -05:00
Thomas Harte
adda3d8f42 Attempts a 'full' model of 2.8Mhz access timing.
i.e. full to my current understanding.
2020-11-14 19:10:41 -05:00
Thomas Harte
ec3ff0da12 Steps towards proper calculation of time. 2020-11-14 18:39:16 -05:00
Thomas Harte
73c38b3b0d Collapses nested conditionals. 2020-11-14 18:23:31 -05:00
Thomas Harte
edc8050b36 Adds activity indicators. 2020-11-14 18:00:06 -05:00
Thomas Harte
37815a982a Much logging later, corrects 7Mhz IWM windows.
Confirmed by mathematics — the new ones are seven-eighths the length of the established 8Mhz windows — and with reference to suitable Apple documentation.
2020-11-13 22:05:45 -05:00
Thomas Harte
bd8af25294 Merge branch 'master' into AppleIIgs 2020-11-13 21:27:47 -05:00
Thomas Harte
3207183f05 Merge pull request #850 from TomHarte/BigSurAgain
Takes a second stab at resolving Big Sur File -> New...
2020-11-13 20:02:29 -05:00
Thomas Harte
e803f993b7 Increases minimum macOS version to 10.14.
This is lazy, but it means I definitely don't need non-Metal fallback code.
2020-11-13 19:48:45 -05:00
Thomas Harte
5dbc87caf0 Smarter: just ensures any attached panels are closed at close(). 2020-11-13 19:09:30 -05:00
Thomas Harte
4862ccc947 Dismisses ROM requester upon that cancel too. 2020-11-13 19:01:53 -05:00
Thomas Harte
e1ecf66485 Dismisses sheet before closing document. 2020-11-13 19:00:37 -05:00
Thomas Harte
2c71ba0744 Ameliorates against a potential NSRangeException. 2020-11-13 18:29:48 -05:00
Thomas Harte
a7aeb779e9 Disables Apple Silicon binaries until I have some means to test. 2020-11-13 18:07:45 -05:00
Thomas Harte
e72cfbf447 Stop assuming that NSNotification => window.isVisible. 2020-11-13 18:04:31 -05:00
Thomas Harte
0c04a376c4 Stop assuming that NSNotification => window.isVisible. 2020-11-13 18:03:46 -05:00
Thomas Harte
3c6dc4c448 Merge branch 'master' into AppleIIgs 2020-11-13 12:51:53 -05:00
Thomas Harte
5d154e3d0c Merge pull request #849 from TomHarte/BigSur
Slightly tweaks machine picker for macOS Big Sur.
2020-11-13 12:37:36 -05:00
Thomas Harte
86a24cc928 Allows Xcode to bump its versioning on the ROM requester too. 2020-11-13 12:23:48 -05:00
Thomas Harte
e8b52d20e9 Slightly tweaks machine picker for macOS Big Sur. 2020-11-13 12:14:35 -05:00
Thomas Harte
b0fc2f6ecf Amps up logging.
Current suspicion is that the IIgs isn't getting a clean byte stream, never mind whether my assumption of exactly-Mac-style GCR holds (which it probably doesn't).
2020-11-12 21:54:54 -05:00
Thomas Harte
715a1b9cd6 Ensures safe shutdown. 2020-11-12 21:44:51 -05:00
Thomas Harte
81969bbea9 Improves logging, at least for now. 2020-11-12 21:17:14 -05:00
Thomas Harte
86310849eb Corrects IWM clocking. 2020-11-12 18:09:31 -05:00
Thomas Harte
a2a928e262 Takes a guess at the format of IIgs .po files; wires them through to the actual machine.
... which still declines to boot.
2020-11-12 18:01:26 -05:00
Thomas Harte
ffc9e229b6 Adds a route for 'DiskII' images to the IIgs. 2020-11-12 17:35:27 -05:00
Thomas Harte
3813e00ca3 Adds the Apple II toggle speaker. 2020-11-11 21:04:38 -05:00
Thomas Harte
5698aa6499 Corrects colour mapping and improves documentation for self. 2020-11-11 20:41:30 -05:00
Thomas Harte
1f5908dc51 Corrects logging output. 2020-11-11 20:26:04 -05:00
Thomas Harte
72884c3ead Does a better job of shifting output; takes a new guess at the no-receiver case.
ROM03 at least now reaches "check startup device!"
2020-11-11 20:19:35 -05:00
Thomas Harte
80358cf5bd Shift output even if nobody is listening. 2020-11-11 20:04:48 -05:00
Thomas Harte
a15af1df5e Attempts to use the other bit of disk drive control, the 5.25"/3.5" select.
For the record, the ROM thinks it finds some Smartport devices and then attempts to talk to them. Since none is present, it blocks forever.
2020-11-11 17:55:50 -05:00
Thomas Harte
6d511f01a4 Ensures intended no-drive behaviour; no more risks with dangling pointers or nullptr. 2020-11-11 17:54:21 -05:00
Thomas Harte
da9e378ab1 Quietens, for now. 2020-11-11 17:53:21 -05:00
Thomas Harte
6d3d7c6006 It seems like this fix is no longer needed. 2020-11-11 17:30:22 -05:00
Thomas Harte
8024bbd721 Provides minor extra detail. 2020-11-11 17:08:56 -05:00
Thomas Harte
ece9382a4e Also attaches IWM select line. 2020-11-10 18:59:23 -05:00
Thomas Harte
6ba517a4c1 Applies a will-do-for-now crop to video output. 2020-11-10 18:50:23 -05:00
Thomas Harte
20fd5adb24 Makes a first effort at attaching an IWM. 2020-11-10 18:38:23 -05:00
Thomas Harte
abb350ff5b Stubs in audio toggle and disk control.
It appears that ROM 01 now fails because reading the disk interface register doesn't do as expected. ROM 03 starts hitting what should be the IWM and dies in a surplus of logging.
2020-11-09 22:21:52 -05:00
Thomas Harte
dc8d4d49f5 Gives the two sets of switches responsibility for supplying 'state'.
(And fixes language-card state value.)
2020-11-09 22:11:20 -05:00
Thomas Harte
54352cb1cb Stubs in a couple more registers.
PC now hits $0000. Likely a bug.
2020-11-09 21:54:25 -05:00
Thomas Harte
7e106c6add Attempts to stub in read from microcontroller, and extends command 0x06.
A complete guess on the latter, as if you didn't know.
2020-11-09 21:20:53 -05:00
Thomas Harte
0ae49b356a Seems to do enough padding out to get me to my second failing ADB command.
That's better than failing at the first.
2020-11-09 19:05:48 -05:00
Thomas Harte
32374444ba Fixes text output window. 2020-11-08 17:04:04 -05:00
Thomas Harte
287bfeb924 Hacks in 40-column text.
Hot gossip: my IIgs is reporting a system error. A clue!
2020-11-08 17:01:23 -05:00
Thomas Harte
b5fa574686 Merge pull request #847 from TomHarte/MetalTones
Corrects R4G4B4 and R2G2B2 output in Metal.
2020-11-07 23:22:36 -05:00
Thomas Harte
7aea3dc124 Corrects R4G4B4 and R2G2B2 output. 2020-11-07 23:15:48 -05:00
Thomas Harte
81c38c7200 Per the IIgs tech note, this value works the other way around. 2020-11-07 23:15:07 -05:00
Thomas Harte
3bb3d8c5c1 Adds text colour register.
Oddly this isn't currently being set. So probably another latent fault elsewhere.
2020-11-07 23:14:50 -05:00
Thomas Harte
b57a2bfec9 Completes logic for pixel framing. Well, mostly; this doesn't yet allow for auxiliary-using II modes being off to the left.
The perceived effect though is that a frame appears and then freezes. So a clocking issue may still be afoot.
2020-11-07 22:23:48 -05:00
Thomas Harte
93968d267d Corrects R4G4B4 and R2G2B2 output. 2020-11-07 22:19:27 -05:00
Thomas Harte
d27fb5f199 Merge branch 'AppleIIgs' of github.com:TomHarte/CLK into AppleIIgs 2020-11-07 22:03:31 -05:00
Thomas Harte
a51f4122f0 Attempts to respect border colour.
Though for now my display is just a sea of purple.
2020-11-07 22:03:05 -05:00
Thomas Harte
35ba5fc894 Resolves video timing issues. 2020-11-07 21:28:08 -05:00
Thomas Harte
228d901253 Attempts to stabilise image horizontally. 2020-11-07 21:10:05 -05:00
Thomas Harte
d37ba62343 Makes first, faltering steps towards video display. 2020-11-07 20:42:34 -05:00
Thomas Harte
699fb0aa4b Switches to just-in-time video, for easy access to a clock divider. 2020-11-07 19:40:26 -05:00
Thomas Harte
613d4b7c8b Migrates character ROM handling; supplies one for the IIgs. 2020-11-07 17:45:03 -05:00
Thomas Harte
4f9d06d8c7 Merge pull request #846 from MaddTheSane/maddsIIgs
Use url(forResource:... instead of path(forResource:…
2020-11-06 09:39:27 -05:00
Thomas Harte
5149e4364a Merge pull request #845 from MaddTheSane/patch-1
Update 65816kromTests.swift
2020-11-06 09:38:59 -05:00
Thomas Harte
6b29e1f598 Corrects accesses to switch values. 2020-11-05 21:25:06 -05:00
Thomas Harte
6c9edbb7a2 Resolves specious interrupts.dic 2020-11-05 20:51:00 -05:00
Thomas Harte
282d0f1ebb For debugging, adds a dump of anything in the [presumably] text buffer.
Nothing is there.
2020-11-05 18:17:21 -05:00
Thomas Harte
f466cbadec Attempts to do just enough with video to get a functioning vertical blank query. 2020-11-05 17:56:20 -05:00
C.W. Betts
189a468ad4 Use url(forResource:... instead of path(forResource:… as it cuts down on creating a URL struct. 2020-11-05 14:42:39 -07:00
C.W. Betts
a3414c2673 Update 65816kromTests.swift
Only have one runTest method.
2020-11-05 14:36:34 -07:00
Thomas Harte
5126163c5d Attempts to reduce pull request heft.
Given that the licensing of krom's tests is uncertain, and I've given credit and an appropriate link, I needn't include the original code.
2020-11-04 21:49:45 -05:00
Thomas Harte
46ee98639e Stubs in $c010.
Also reduces memory map logging.
2020-11-04 21:35:11 -05:00
Thomas Harte
cc6c0d535c Stubs in some of the sound GLU registers. 2020-11-04 21:29:44 -05:00
Thomas Harte
78b57e73d5 Hacks in a lying vertical blank value. 2020-11-04 21:18:27 -05:00
Thomas Harte
9e2a6526d1 Corrects interpretation of bit 3 of the state register.
And attempts to be a bit more careful with the language card in general.
2020-11-04 21:15:10 -05:00
Thomas Harte
d3c7253981 Shifts size-limiting of X and Y to transitions and mutations, away from reads.
Primarily to remove potential bug-causing complexity — this is easier to debug. But let's see.
2020-11-04 20:35:41 -05:00
Thomas Harte
e3147b6b45 Introduces a pre-STP/WAI limit for the MSC test.
This way I retain testing of NOP, BRK, COP and WDM.
2020-11-03 20:59:07 -05:00
Thomas Harte
d50b059a17 Imports 6502-esque test for decimal SBC overflow.
All applicable krom tests now pass.
2020-11-03 20:37:30 -05:00
Thomas Harte
cc5ec78156 Provides something on WAI/STP; sizes STY by the x flag; disables MSC test. 2020-11-03 20:17:44 -05:00
Thomas Harte
ddc44ce0d1 Reshuffles enum to make macro tests marginally easier. 2020-11-03 20:17:09 -05:00
Thomas Harte
5cbb91f352 Fixes COP vector, ensures WDM skips a byte. 2020-11-03 20:01:02 -05:00
Thomas Harte
91ea2eff4c Corrects MVN/MVP off-by-one and failure to store what was read. 2020-11-03 18:29:35 -05:00
Thomas Harte
bf85d71674 Brings ADC into conformance. Fixes JML. 2020-11-03 18:12:10 -05:00
Thomas Harte
426e90eebf Adds logic to work around Nintendo dependence in the krom tests.
Let the real work begin!
2020-11-03 14:18:40 -05:00
Thomas Harte
3889646d6b Takes a swing at incorporating krom's 65816 test suite. At least as far as ADC. 2020-11-02 21:09:32 -05:00
Thomas Harte
0178aaee2b Attempts retroactively to enforce the rule that 8-bit index modes => no top byte.
(Rather than a preserved but ignored top byte)
2020-11-02 18:55:28 -05:00
Thomas Harte
53f60f7c87 Adds some notes for a pending ADB implementation. 2020-11-01 14:49:04 -05:00
Thomas Harte
2da71acefd Stubs in the ADB GLU. 2020-10-31 21:00:15 -04:00
Thomas Harte
45f5896b76 Stubs video switches into the IIgs. 2020-10-31 20:39:32 -04:00
Thomas Harte
531a3bb7e6 Ensures RAM is zero-initialised, for now, to aid in repeatable bug finding. 2020-10-31 20:03:23 -04:00
Thomas Harte
1b28d929e4 Factors out the Apple II/IIe video switches and mode selection logic. 2020-10-31 20:02:50 -04:00
Thomas Harte
e8943618dc Adds some extra commentary and distinguishes X/Y sizing from M. 2020-10-31 10:21:13 -04:00
Thomas Harte
1ae2f6f449 PHD and PLD should always be 16-bit; PLP 8-bit. 2020-10-31 09:22:35 -04:00
Thomas Harte
88e26b42f5 Fixed: PHP pushes only 8 bits regardless of mode. 2020-10-30 22:36:00 -04:00
Thomas Harte
03d1aff6c0 Fixes 8-bit read/write. 2020-10-30 22:17:55 -04:00
Thomas Harte
e4459b6256 Adds power-on bit to speed register. 2020-10-30 21:50:39 -04:00
Thomas Harte
2be817a6a1 Maps in "the interrupt ROM addresses". 2020-10-30 21:42:43 -04:00
Thomas Harte
a833bb892b Increases logging substantially. 2020-10-30 20:11:55 -04:00
Thomas Harte
7f3f6c339f Corrects stacked program bank during native-mode exceptions. 2020-10-30 20:11:39 -04:00
Thomas Harte
0d562699a2 Ensures unmapped regions are really unmapped. 2020-10-29 22:18:01 -04:00
Thomas Harte
034056d0cd Adds full 8-bit clock addressing; stubs clock into the IIgs. 2020-10-29 21:38:36 -04:00
Thomas Harte
1249fb598b Factors Apple's RTC out of the Macintosh. 2020-10-29 21:03:02 -04:00
Thomas Harte
5a8b8478d2 Corrects unhandled IO assert.
The IIgs proper is actually waiting on communication with the RTC.
2020-10-28 22:14:02 -04:00
Thomas Harte
6c54699c44 Connects up an SCC.
Thereby putting my IIgs into its first perpetual loop. Trying to do something with the SCC I haven't implemented yet perhaps?
2020-10-28 22:07:34 -04:00
Thomas Harte
266022b193 Fixes PEA. 2020-10-28 22:00:28 -04:00
Thomas Harte
94a6da6b7d Exposes much of the auxiliary and language card stuff to the IIgs bus. 2020-10-28 21:58:20 -04:00
Thomas Harte
885fae1534 Stubs in a speed register. 2020-10-28 21:23:45 -04:00
Thomas Harte
1df2ce513a Ensures that reset doesn't push to the stack. 2020-10-28 21:23:35 -04:00
Thomas Harte
1e4679ae14 Corrects JSL and RTL. 2020-10-28 17:25:40 -04:00
Thomas Harte
267dd59a59 Gets as far as seemingly yet another memory-map setting.
Tomorrow, maybe?
2020-10-27 22:31:58 -04:00
Thomas Harte
0a91ac5af5 Adds some extra notes, starts getting into trying to run the IIgs. 2020-10-27 22:09:45 -04:00
Thomas Harte
ad93ad6018 Attempts to finish off shadowing. 2020-10-27 22:05:04 -04:00
Thomas Harte
0c700094ea Goes branchless on shadowing. 2020-10-27 21:56:03 -04:00
Thomas Harte
20631a157b Contorts somewhat in pursuit of branchless shadowing regardless of page and without extra storage. 2020-10-27 21:37:39 -04:00
Thomas Harte
bdda84dfde Adds a very basic shadowing test.
For the record, I'm aware that there's a lot here that I'm not testing. I think the smart move is to get towards a running machine and see which configurations it actually tries to set up, then follow along with appropriate testing; it might cause me to discover a flaw in my comprehension before I've made the same mistake in both the code and a test.
2020-10-27 19:59:41 -04:00
Thomas Harte
e44f95a882 Takes a first, faltering shot at shadowing. 2020-10-27 19:49:47 -04:00
Thomas Harte
31cd45f8b5 Takes a run at set_card_paging and simplifies method of shadowing. 2020-10-27 19:33:47 -04:00
Thomas Harte
74f9f6ad3b Tests and corrects ROM access beyond bank $00. 2020-10-27 19:02:15 -04:00
Thomas Harte
1dfdb51e61 Hits a few other easy cases.
Still to do: card paging, and finding out which banks that applies to, and shadowing. So: everything with flags.
2020-10-26 21:49:47 -04:00
Thomas Harte
18832dc19d Attempts to expand the language card stuff to all affected pages. 2020-10-26 20:30:41 -04:00
Thomas Harte
3dee0666cb Corrects current bank $00 language card behaviour. 2020-10-26 17:46:40 -04:00
Thomas Harte
f830f6a57a Adds failing test of initial ROM mirroring.
It's the end of the evening, so this is it for today.
2020-10-25 22:13:54 -04:00
Thomas Harte
82c733c68c Adds some very basic actual tests. 2020-10-25 21:40:50 -04:00
Thomas Harte
ed510409c4 Starts memory map test class, already finding a typo. 2020-10-25 21:31:21 -04:00
Thomas Harte
7614eba4bf Factors out the IIgs memory map logic.
As testing would be rational.
2020-10-25 21:10:04 -04:00
Thomas Harte
13c8032465 ROM isn't writeable. The clue is in the name. 2020-10-25 18:29:17 -04:00
Thomas Harte
44fc08cd5b Switches to a mapping system that supports non-continuous regions, and is smaller. 2020-10-25 18:28:32 -04:00
Thomas Harte
7631b11c55 Corrects double low-res colour serialisation. 2020-10-24 19:26:32 -04:00
Thomas Harte
726b5f62bb Corrects read/write access to auxiliary soft switches. 2020-10-24 19:00:03 -04:00
Thomas Harte
ddd84db510 Edges towards a functioning IIgs memory map.
Next up: making sure language and auxiliary switches apply. That should get something from the ROM.
2020-10-23 19:41:10 -04:00
Thomas Harte
966241b4cc Adds documentation, ensures the language card signals less noisily. 2020-10-23 18:44:47 -04:00
Thomas Harte
9371a8993f Factors out auxiliary memory switches and related decisions. 2020-10-22 22:33:31 -04:00
Thomas Harte
410c99de54 Factors out the language card memory selection logic. 2020-10-22 21:01:12 -04:00
Thomas Harte
817f93a490 Edges towards a working memory subsystem. At least structurally. 2020-10-22 19:25:04 -04:00
Thomas Harte
43611792ac Adds just enough to get a 65816 ticking over. 2020-10-21 21:19:18 -04:00
Thomas Harte
62231708d7 read_pages_ can be const. 2020-10-21 21:17:15 -04:00
Thomas Harte
a5dcab4092 Ensures machines with no audio output are handled correctly. 2020-10-21 21:16:00 -04:00
Thomas Harte
8bde2e5f4c Slightly neatens Cocoa machine picker. 2020-10-20 22:25:39 -04:00
Thomas Harte
5287c57ee0 Adds the IIgs as a user-selectable machine.
Albeit that there is no underlying machine yet.
2020-10-20 22:18:11 -04:00
Thomas Harte
3aa47f9c68 Merge pull request #843 from TomHarte/MoreDormann
Introduces a build of Dormann's 65C02 tests that is 65816 compatible.
2020-10-19 21:13:46 -04:00
Thomas Harte
ab07814614 Eliminates now-broken 65816 flow test. 2020-10-19 21:02:46 -04:00
Thomas Harte
1653abdf88 Adds the .lst; otherwise I'll probably just lose it. 2020-10-19 20:58:24 -04:00
Thomas Harte
b3ab9fff9b Imports a custom-built copy of Klaus Dormann's 65C02 test, with only 65816-compatible parts.
Thereby fixes another couple of 65816 issues — BRK(, etc) not clearing the decimal flag, and `TRB d` being mismapped.
2020-10-19 19:27:16 -04:00
Thomas Harte
14718b93a4 Improve commentary. 2020-10-19 09:32:50 -04:00
Thomas Harte
69450e27ad Merge pull request #839 from TomHarte/65816
Adds emulation of the 65816.
2020-10-18 21:49:46 -04:00
Thomas Harte
0cd08aa79d Permits the Oric analyser to check CPC-style DSKs.
Oric Mist seems to use that format, so some of these now exist out in the wild.
2020-10-18 21:44:44 -04:00
Thomas Harte
1fa94e1b08 Adds the 65816 as an in-code option for Oric emulation.
This also means it'll be exposed via the SDL build, but that's okay.
2020-10-18 21:43:08 -04:00
Thomas Harte
76d9893866 Declares address-bus sizes formally.
This allows me to fix the final two implicit conversion warnings, albeit that it would have been nice to find a templatey way just to get the type directly from the declaration of `perform_bus_operation`.
2020-10-18 15:08:21 -04:00
Thomas Harte
c3f8982c62 Resolves all internal implicit type-conversion warnings.
Chasing those down, it looks like flags were wrong for PLB and PLD. So it's official: warnings help.
2020-10-18 14:55:17 -04:00
Thomas Harte
99eba2f8ba Ensures intended 65816 exception behaviour.
i.e. the relevant micro-op sequence exists, and its operation isn't lost. Also sets the 65816 by default to jump straight into power-on, not to execute an instruction first. That shouldn't make a functional difference, but it makes debugging easier because it makes startup fully deterministic.
2020-10-18 14:43:47 -04:00
Thomas Harte
69509f6502 Attempts to bring a little more consistency to my use of Swift in test code. 2020-10-17 22:42:54 -04:00
Thomas Harte
c3187fdbe1 Makes minor formatting improvement. 2020-10-17 22:31:51 -04:00
Thomas Harte
42228ea955 Adds 65C02As6502 test, to round out the set. 2020-10-17 22:31:32 -04:00
Thomas Harte
e5f57ea743 Make isReadOperation more overt. 2020-10-17 22:27:04 -04:00
Thomas Harte
3b398f7a9a Attempts to complete all 65816 bus signalling. 2020-10-16 21:56:20 -04:00
Thomas Harte
096add7551 Exposes non-BusOperation bus outputs. 2020-10-16 21:05:42 -04:00
Thomas Harte
334e0666b7 Reports ::Ready upon a WAI. 2020-10-15 21:37:37 -04:00
Thomas Harte
98c81749c8 Adds the conventional flush. 2020-10-15 21:36:04 -04:00
Thomas Harte
5dcf720bb5 Extends list of BusOperations.
Now to retest, widely.
2020-10-15 21:35:01 -04:00
Thomas Harte
9c0c0255f6 Ensures data/program bank can't accidentally be set to 16-bit values. 2020-10-15 21:10:32 -04:00
Thomas Harte
68c15bd605 Updates Qt project; catches another couple of issues via its compiler. 2020-10-15 21:09:22 -04:00
Thomas Harte
9a2f32795f Revokes stack-local storage non-optimisation. 2020-10-15 21:03:10 -04:00
Thomas Harte
7aa6cf4c6b Tidies up layout very slightly. 2020-10-15 20:51:23 -04:00
Thomas Harte
dfda2adf0d Attempts implementations of both ready and abort.
Which I think concludes the inputs?
2020-10-15 20:46:18 -04:00
Thomas Harte
c0a1c34012 Wraps all registers into a struct, so that I can implement abort.
Makes some preparations for ready too.
2020-10-15 18:42:38 -04:00
Thomas Harte
3c6adc1ff4 Completes 65816 addressing mode tests and corresponding fixes. 2020-10-14 22:00:52 -04:00
Thomas Harte
e511d33a7c Adds test for [d], y; fixes implementation. 2020-10-14 21:42:41 -04:00
Thomas Harte
c35969d677 Adds tests for (d, x) and (d), y. Both amply tested in emulation mode, so no problems.
Five to go, all potentially troublesome.
2020-10-14 21:38:00 -04:00
Thomas Harte
27afb8f0a7 Adds direct indirect long test, and thereby fixes addressing mode.
Nine to go!
2020-10-14 21:26:20 -04:00
Thomas Harte
327ab81436 Fills in direct, x and (direct) tests, fixing implementation of the latter.
10 to go.
2020-10-14 21:17:28 -04:00
Thomas Harte
db7178495f Implements direct and final absolute test.
14 to go.
2020-10-14 20:57:47 -04:00
Thomas Harte
979186e71d Transcribes the English-language versions of the outstanding tests.
Passing these will make me willing to call the 65816 functionality provisionally done, other than making sureI signal VPA, VDA, VPB, etc, correctly.
2020-10-14 13:56:37 -04:00
Thomas Harte
f05e0d956b Adds a TODO list in order to keep an end in sight. 2020-10-13 21:43:42 -04:00
Thomas Harte
b22aa5d699 Starts transcribing the addressing examples I have into tests.
Correspondingly extends the exposed register set and test-machine addressing range.
2020-10-13 21:38:30 -04:00
Thomas Harte
3e6a2adaaf Corrects absolute, x and absolute, y addressing modes. 2020-10-13 20:30:39 -04:00
Thomas Harte
8f5537aaaa Attempts to resolve my direct-indirect addressing stumble. 2020-10-13 20:21:53 -04:00
Thomas Harte
a15d4a156b Starts trying to ensure appropriate address wrapping. 2020-10-12 22:33:43 -04:00
Thomas Harte
6a47571d17 Stops truncating tests by two bytes.
Not that it seems to have been problematic.
2020-10-12 21:53:27 -04:00
Thomas Harte
7479dc74ed Removes printf. It's no longer telling me anything. 2020-10-12 21:52:58 -04:00
Thomas Harte
28da1a724a Introduces Jeek816 test case. 2020-10-12 21:43:44 -04:00
Thomas Harte
f529eadbec Corrects 16-bit read-modify-write.
Subject to the TODO proviso on 'correct'; has my 6502 prejudice pushed me into unrealistic bus signalling?
2020-10-12 18:36:09 -04:00
Thomas Harte
5dc3cd3a2f Starts using Jeek816 for a basic native-mode audit. Fixes absolute long addressing. 2020-10-11 22:02:46 -04:00
Thomas Harte
3039a445f0 Ups the 65816 test machine to a full 16mb RAM. 2020-10-11 21:18:01 -04:00
Thomas Harte
82797fd395 Attempts to do the proper thing for interrupts. 2020-10-11 21:10:44 -04:00
Thomas Harte
a0885ab7d0 Implements STP and WAI.
Albeit still without fully-implemented reactions to exceptions in general.
2020-10-11 17:56:55 -04:00
Thomas Harte
8eaf1303a3 Attempts proactively to ensure proper RTI behaviour on the 65816. 2020-10-11 15:25:13 -04:00
Thomas Harte
20cbe72985 Ties to 8- or 16-bit those instructions that aren't M/X-dependent.
This is technically redundant for PEI, PEA and PER since they have dedicated bus programs anyway, but it's good to be explicit.
2020-10-11 14:38:35 -04:00
Thomas Harte
071ad6b767 I don't think RTL is needed; JML looks like it covers it. 2020-10-10 22:16:35 -04:00
Thomas Harte
0619e49eac Takes a short at TSB and TRB.
Three to go.
2020-10-10 22:00:17 -04:00
Thomas Harte
b8848d8580 Implements TCD, TDC, TCS, TSC. 2020-10-10 21:43:05 -04:00
Thomas Harte
aface1f8be Implements XBA and XCE. 2020-10-10 21:34:22 -04:00
Thomas Harte
ae87728770 Ensures M and X are exposed to the public interface. 2020-10-10 21:33:56 -04:00
Thomas Harte
28c8ba70c1 Implements REP and SEP and exposes the MX flags generally. 2020-10-10 21:23:59 -04:00
Thomas Harte
486324ecab This test isn't actually 65816-compatible. 2020-10-10 18:19:48 -04:00
Thomas Harte
6892ac13e8 Corrects BIT. All 65816-applicable Wolfgang Lorenz tests now pass. 2020-10-10 17:47:33 -04:00
Thomas Harte
340ad093a6 Adds 65816 runs of the final tranche of applicable tests. 2020-10-10 17:26:41 -04:00
Thomas Harte
0fe09cd1e4 Knocks SBC into producing likely results; disables Lorenz testing. 2020-10-10 17:13:16 -04:00
Thomas Harte
da4702851f Fixes ADC. 2020-10-10 16:29:48 -04:00
Thomas Harte
09fba72d58 Adds flag manipulation, ADC and SBC 65816 tests.
The latter two fail.
2020-10-10 11:30:15 -04:00
Thomas Harte
d17c90edf7 Corrects ROL d, x. 2020-10-10 11:25:14 -04:00
Thomas Harte
7966592fae Corrects ROL d. 2020-10-10 11:22:23 -04:00
Thomas Harte
6efe4e1753 Fixes AND, EOR, ORA. Takes an unsuccessful shot at ROL. 2020-10-10 10:53:17 -04:00
Thomas Harte
536c4d45c1 Adds additional 65816 tests, some failing; seeks to improve carry behaviour in ASL and ROL. 2020-10-10 10:11:57 -04:00
Thomas Harte
a02f88fe7c Confirms a couple more of the easy sets. 2020-10-10 09:34:29 -04:00
Thomas Harte
d9be6ab806 Confirms that a few other simple tests work immediately on the 65816. 2020-10-09 23:26:35 -04:00
Thomas Harte
290598429a Applies indirect page zero emulation mode addressing constraint to ix addressing.
Lorenz's LDA tests now pass in emulation mode.
2020-10-09 23:22:48 -04:00
Thomas Harte
92e72959c3 Makes corrections to ix addressing mode and shift/roll flags. 2020-10-09 23:12:20 -04:00
Thomas Harte
776f014dbe Attempts LDA tests against the 65816.
Result: ix is faulty. Which we already knew.
2020-10-09 22:23:54 -04:00
Thomas Harte
c01bc784b9 Slightly reduces branching. 2020-10-09 22:21:55 -04:00
Thomas Harte
abcd86a294 Fixes accumulator instructions. 2020-10-09 22:18:22 -04:00
Thomas Harte
451f83ba51 Corrects emulation-mode read-modify-writes not to empty the data buffer. 2020-10-09 22:14:42 -04:00
Thomas Harte
b439f40fe2 Corrects INC and DEC. 2020-10-09 22:04:25 -04:00
Thomas Harte
968166b06d Resolves incorrectly flow after setting up an absolute address. 2020-10-09 21:48:35 -04:00
Thomas Harte
88293909f4 Enables running of a first test on the 65816. 2020-10-09 21:44:47 -04:00
Thomas Harte
9b6c48631d Removes usage of a JAM instruction to spot end-of-tests. 2020-10-09 21:39:34 -04:00
Thomas Harte
0ed98cbfac Attempts to fix direct indirect indexed; not yet successful I think. 2020-10-08 22:15:19 -04:00
Thomas Harte
7dde7cc743 Implements altered direct indexed addressing in emulation mode. 2020-10-08 22:02:14 -04:00
Thomas Harte
755627f12d Corrects direct addressing. 2020-10-08 20:00:01 -04:00
Thomas Harte
f8004d7096 Implements RTI, corrects TAY. 2020-10-08 18:06:11 -04:00
Thomas Harte
0418f51ef2 Takes a shot at emulation-mode 'exceptions'.
It's just RTI and correct decimal SBC left of the official 6502s now, I think.
2020-10-08 17:52:13 -04:00
Thomas Harte
054e0af071 Corrects RTS behaviour: the return address on the stack is off by one.
Dormann's tests now proceed to a BRK.
2020-10-08 16:55:45 -04:00
Thomas Harte
907c3374c3 Attempts to clean up my JMP/JSR mess.
Also takes a step forwards in decimal SBC, but it's not right yet.
2020-10-08 16:48:46 -04:00
Thomas Harte
b578240993 Adds a further error.
Clearly I've severely overloaded 'JMP' and not fully thought through where it gets its addresses from.
2020-10-07 21:47:58 -04:00
Thomas Harte
f83ee97439 PHP pushes with the BRK flag set in emulation mode. 2020-10-07 21:37:50 -04:00
Thomas Harte
19aea85184 Corrects CMP, CPX, CPY carry flags. 2020-10-07 21:23:29 -04:00
Thomas Harte
1ba0a117e7 Corrects PLB, PLD, PLP. 2020-10-07 20:23:53 -04:00
Thomas Harte
b510b9d337 Adds PHD, PHK and 8-bit PHP and PLP. 2020-10-07 20:13:12 -04:00
Thomas Harte
b608e11965 Realises that not all non-incrementing PC fetches should be thrown away. 2020-10-07 20:06:27 -04:00
Thomas Harte
e68b3a2f32 Corrects JMP program. 2020-10-07 19:59:29 -04:00
Thomas Harte
f7b119ffe1 Moves temporary logging, fixes branch instructions. 2020-10-07 19:57:58 -04:00
Thomas Harte
a4cec95db1 Corrects load and transfer flag oversights. 2020-10-07 19:36:23 -04:00
Thomas Harte
84c4fa197b Corrects DEX mapping, notes new Dormann failure case. 2020-10-07 18:48:03 -04:00
Thomas Harte
eac722cf59 Implements enough of ADC and SBC for the Dormann test definitively to fail. 2020-10-07 18:36:17 -04:00
Thomas Harte
7439a326a6 Implements BIT (in regular and immediate forms). 2020-10-07 18:15:18 -04:00
Thomas Harte
5ca1c0747f Generalises CMP to implement CPX and CPY. 2020-10-07 18:09:56 -04:00
Thomas Harte
466ca38dfa Corrects TXY and TYX; kudos to PatrickvL for the spot! 2020-10-07 18:05:42 -04:00
Thomas Harte
93b0839036 Knocks out some transfer operations.
I'm possibly only seven or eight away from being able to test with complete official-opcode-only 6502 code?
2020-10-06 22:29:34 -04:00
Thomas Harte
e068cbc103 Implements CMP and fixes a zero-flag error on 16-bit operations. 2020-10-06 21:47:26 -04:00
Thomas Harte
5c809e5fbf Implements rolls and shifts. 2020-10-06 21:34:39 -04:00
Thomas Harte
3933bf49cf Implements BRL. 2020-10-06 21:28:54 -04:00
Thomas Harte
7065ba4857 Implements the single-byte branches. 2020-10-06 21:24:43 -04:00
Thomas Harte
ebff83018e Implements the bitwise operators. 2020-10-06 20:17:03 -04:00
Thomas Harte
9ce9167e3c Formalises work left to do. 2020-10-06 19:12:19 -04:00
Thomas Harte
993eff1d3d Starts slowly, with flag manipulation. 2020-10-06 16:25:30 -04:00
Thomas Harte
7be983ec00 Slightly improve exposition. 2020-10-05 22:25:20 -04:00
Thomas Harte
18e8d6ce06 Makes an effort to factor out the 6502's [lazy] flags.
This is preparatory to deciding which instructions, if any, are worth factoring out.
2020-10-05 22:23:33 -04:00
Thomas Harte
b7ba0d4327 Attempts to complete all addressing modes.
So, if bugs didn't exist, it'd just be members of the Operation enum to go.
2020-10-05 17:04:57 -04:00
Thomas Harte
825201f4f2 Adds direct indirect. 2020-10-04 22:11:41 -04:00
Thomas Harte
9a05c68ce7 Attempts direct and direct indexed indirect. 2020-10-04 22:06:25 -04:00
Thomas Harte
d8dccf2500 Attempts a full implementation of MVN and MVP. 2020-10-04 19:21:04 -04:00
Thomas Harte
b416aa640f Slightly tidies up, eliminating some store bugs. 2020-10-04 19:12:04 -04:00
Thomas Harte
4ebf594b3b This should bring me up to absolute, y.
i.e. next is datasheet program 7.
2020-10-04 19:02:47 -04:00
Thomas Harte
8a83024962 Starts a dash towards just completing the addressing modes for now.
This brings me up to the end of absolute long (i.e. 4a on the datasheet).
2020-10-04 18:52:46 -04:00
Thomas Harte
bdc1136b96 Edges towards working short absolute addressing mode. 2020-10-03 21:30:24 -04:00
Thomas Harte
da78dea98f Merge branch 'master' into 65816 2020-10-03 21:00:29 -04:00
Thomas Harte
dcf8cb14e2 Merge pull request #842 from TomHarte/QtMouseEscape
Adds F8+F12 as an alternative mouse-release combo for Qt.
2020-10-02 20:37:46 -04:00
Thomas Harte
38912859e1 Adds F8+F12 as an alternative mouse-release combo for Qt. 2020-10-02 20:31:47 -04:00
Thomas Harte
b83d93abc2 Accepts that whether instructions do 8- or 16-bit bus accesses depends on either M or X depending on the operation. 2020-10-02 17:08:30 -04:00
Thomas Harte
36f843bc6e Ensure std::function is visible to 65816Storage.cpp. 2020-09-29 19:23:38 -04:00
Thomas Harte
15c87e02e9 Ditto for printf. 2020-09-29 18:53:02 -04:00
Thomas Harte
00923eac7c Ensure assert is visible to 65816Implementation.hpp. 2020-09-29 18:52:25 -04:00
Thomas Harte
a72ac8294c Adds 65816 alternates to Klaus Dormann's tests.
While also correcting a couple of misspellings of his name. Apologies, Klaus!
2020-09-29 18:49:58 -04:00
Thomas Harte
4f03bf754d Adds the 65816 to SConstruct. 2020-09-29 18:43:39 -04:00
Thomas Harte
78b3ec4b10 The actual work begins: starts implementing 65816 micro-ops. 2020-09-29 18:42:07 -04:00
Thomas Harte
ef1a514785 Introduces 6502Selector, for picking either a 6502 or a 65816 based on a single template parameter. 2020-09-28 21:35:46 -04:00
Thomas Harte
6635876e7e Performs a bare factoring out of the 6502 bus handler. 2020-09-28 18:43:53 -04:00
Thomas Harte
5645f90abe Takes a minor first step towards actually performing 65816 instructions. 2020-09-27 22:20:58 -04:00
Thomas Harte
b96cd4d18b Resolves another unsafe pointer assumption. 2020-09-27 22:20:13 -04:00
Thomas Harte
ad8a2e2cb9 Corrects a long-standing naming obscurity. 2020-09-27 22:19:42 -04:00
Thomas Harte
fa438e5113 Merge branch 'master' into 65816 2020-09-27 15:10:54 -04:00
Thomas Harte
8641494809 Resolve various test-case warnings. 2020-09-27 15:10:29 -04:00
Thomas Harte
f4a23af5d6 Merge pull request #840 from MaddTheSane/patch-1
Update 6502TimingTests.swift
2020-09-27 15:02:10 -04:00
Thomas Harte
5449e90b34 Edges towards offering the 65816 as another type of 6502 for testing. 2020-09-26 22:31:50 -04:00
Thomas Harte
1cd664ad85 Adds a sanity check. 2020-09-26 21:43:26 -04:00
Thomas Harte
e680022b1f Completes the opcode set.
A million bugs yet to find.
2020-09-26 21:35:31 -04:00
Thomas Harte
67c2ce2174 Takes a run at completing the stack section.
I'm not really sure about BRK though — does it gain a signature on the 65816?
2020-09-26 21:20:01 -04:00
Thomas Harte
596e700b60 Drags myself onto the final page of bus programs.
233 opcodes now complete; six bus programs to go.
2020-09-26 20:57:24 -04:00
Thomas Harte
4a53b6e538 Adds push and pull, reaching 229/256 opcodes. 2020-09-26 20:38:29 -04:00
Thomas Harte
687f4bb3bb Adds relative and relative long bus patterns.
Many of the rest cover only one or two opcodes so this puts me at 216/256 opcodes covered; 35/47 bus programs; just more than 5/7 pages.
2020-09-26 20:24:50 -04:00
Thomas Harte
473799cb62 There's not a lot to STP and WAI from a bus program point of view. 2020-09-26 20:18:30 -04:00
C.W. Betts
ce0536cdfa Update 6502TimingTests.swift 2020-09-26 16:13:27 -06:00
Thomas Harte
3dc22a9fd5 Adds implied and immediate modes.
... for 204/256 opcodes covered.
2020-09-26 17:42:42 -04:00
Thomas Harte
f54b655606 Adds d, x and d, y. 2020-09-26 17:26:17 -04:00
Thomas Harte
d2e868ea2b Adds (d), y; [d], y; and [d].
Now covered: 146/256 opcodes, 4/7 pages, 25/47 bus programs.
2020-09-26 16:55:58 -04:00
Thomas Harte
3fc649359a Transcribes the titles of all remaining bus programs.
Thereby frames the distance yet to travel.
2020-09-25 22:29:19 -04:00
Thomas Harte
1512ac11da Adds (d, x) and (d) modes. Albeit by deferring the hard work.
That's: 122/256 opcodes; 22/47 bus programs, ~3.5/7 pages transcribed. Maybe I'll be able to get to the runtime stuff sooner rather than later?
2020-09-25 22:22:30 -04:00
Thomas Harte
5039cc7bb2 Adds direct page.
... to cover 106 opcodes.
2020-09-25 22:01:36 -04:00
Thomas Harte
5360a7b4ce Adds block moves.
These are fairly specialised, dealing in two data addresses simultaneously.
2020-09-25 21:49:03 -04:00
Thomas Harte
2957a31f40 Adds absolute, x; absolute,y; and accumulator addressing modes.
Now covered: 80/256 opcodes, from 2/6 pages of the data sheet; or 16/47 bus programs.
2020-09-25 21:16:36 -04:00
Thomas Harte
8c11df52bf Adds absolute long, x.
Factors out the commonality of a closing read/write while I'm here.
2020-09-25 19:27:17 -04:00
Thomas Harte
2b7ffcd48f Takes a run at JSL al. 2020-09-25 18:35:00 -04:00
Thomas Harte
7980a9033e Adds two-thirds of absolute long.
Working total: 31 opcodes covered; 10/47ths of bus patterns.

Next is JSL, which I think will require additional operations.
2020-09-25 18:16:49 -04:00
Thomas Harte
125ddfa513 Pays a little attention to runtime storage; completes the first page of bus patterns. 2020-09-25 18:00:02 -04:00
Thomas Harte
636e929607 Adds a check for 8/16-bit redundancy. 2020-09-25 17:42:42 -04:00
Thomas Harte
22c792dc46 Adds enough logic to start serialising instructions to somewhere.
Possibly extraneous for now, but it means I can start stepping and testing.
2020-09-25 17:18:25 -04:00
Thomas Harte
95af1815c8 Completes absolute indexed indirect micro-ops.
For the record: this is just six out of forty-seven codes complete. Or about two-thirds of six pages. Plenty to do even before I start trying to interpret these things.
2020-09-24 22:37:31 -04:00
Thomas Harte
d707c5ac95 Switches to generators with stable pointers; adds 2a. 2020-09-24 22:27:20 -04:00
Thomas Harte
5c9192e5e6 Switches to generators for spitting out micro-ops.
Hopefully with a lot of parts to factor out naturally.
2020-09-24 17:36:11 -04:00
Thomas Harte
72b5584042 Immediately runs afoul of a read/write difference in the specs between 8/16-bit mode that suggests maybe this isn't a good structure.
Perhaps generators of some sort?
2020-09-23 22:28:15 -04:00
Thomas Harte
f9045b5352 Rounds out declaration of the absolutes. 2020-09-23 22:23:23 -04:00
Thomas Harte
f87fe92bc8 Begins a meandering road towards the 65816. 2020-09-23 22:14:42 -04:00
Thomas Harte
669d8e64ab Merge pull request #838 from TomHarte/MTKViewRace
Resolves a minor MTKView main-thread race condition.
2020-09-22 22:18:57 -04:00
Thomas Harte
9447aa38be Removes debugging printf. 2020-09-22 22:13:54 -04:00
Thomas Harte
a781c3eb4d Resolves thread-unsafe access of _view.bounds. 2020-09-22 22:13:37 -04:00
Thomas Harte
c0b1308dfd Merge branch 'Vic20Tests' 2020-09-22 22:08:29 -04:00
Thomas Harte
2d9dd6704a Merge branch 'master' of github.com:TomHarte/CLK 2020-09-22 22:07:47 -04:00
Thomas Harte
94dba70bbe Merge pull request #837 from TomHarte/Vic20Tests
Further improves 6522 emulation.
2020-09-22 22:07:34 -04:00
Thomas Harte
022ec20e75 Tries to add semantic meaning to the various auxiliary control fields.
To consider: decoding at set?
2020-09-22 20:50:39 -04:00
Thomas Harte
41f69405d8 Don't decrement timer 1 from the system clock when in PB6 mode.
TODO: rest of PB6 mode.
2020-09-21 22:39:49 -04:00
Thomas Harte
5741e22e29 Switch back to debug-by-default builds. 2020-09-20 18:22:13 -04:00
Thomas Harte
8e242eea54 Ensures timer-linked PB7 output is actually output. 2020-09-20 15:03:26 -04:00
Thomas Harte
703065a0a5 Takes a run at timer-linked PB7 output behaviour.
Seemingly sufficiently to pass the VICE test (which I've transcribed), though with some guesswork.
2020-09-20 14:51:59 -04:00
Thomas Harte
291aa42fe1 Corrects test target. 2020-09-19 21:20:37 -04:00
Thomas Harte
8fc3496cc9 Merge pull request #836 from TomHarte/Vic20Tests
Corrects a couple of minor VIA timer issues
2020-09-17 21:56:43 -04:00
Thomas Harte
e807a462a1 My new reading is that only a write to the counter should affect the interrupt flag. 2020-09-17 21:31:29 -04:00
Thomas Harte
18790a90ae Ensures timer 2 doesn't use timed behaviour when in pulse mode. 2020-09-17 21:09:32 -04:00
Thomas Harte
21afc70261 Adds formal data-sheet names. 2020-09-17 19:00:46 -04:00
Thomas Harte
7bb74af478 Merge pull request #835 from TomHarte/ErrantScan
Allows for permitted 1/32nd timing error in `time_multiplier_`.
2020-09-17 18:17:37 -04:00
Thomas Harte
894269aa06 Allows for permitted 1/32nd timing error in time_multiplier_. 2020-09-17 18:12:21 -04:00
Thomas Harte
8b16da9695 Merge pull request #834 from TomHarte/FloatingSpeaker
Resolves lowpass-speaker position aliasing
2020-09-16 19:05:54 -04:00
Thomas Harte
f783ec6269 Since input and output are floating point, using an integer Stepper is not appropriate. 2020-09-16 18:53:44 -04:00
Thomas Harte
22c9734874 Merge pull request #832 from TomHarte/MetalScanTarget
Adds a Metal ScanTarget, for macOS.
2020-09-16 18:19:58 -04:00
Thomas Harte
a17d0e428f Protects against some further uninitialised values. 2020-09-16 18:15:57 -04:00
Thomas Harte
bb57f0bcc7 Ensures all 6560 properties have a valid default value. 2020-09-16 17:24:18 -04:00
Thomas Harte
b1aefbfe85 Separates asserts. 2020-09-15 23:24:06 -04:00
Thomas Harte
061288f5a7 Add the Macintosh to the Mac kiosk mode informal test set. 2020-09-15 22:49:00 -04:00
Thomas Harte
5a53474536 Ensure MultiKeyboard deconstructs properly. 2020-09-15 22:48:44 -04:00
Thomas Harte
18d0fff8da Graduates the Atari ST. 2020-09-15 22:46:38 -04:00
Thomas Harte
0ac2145740 Add Metal/OpenGL distinction. 2020-09-15 22:43:39 -04:00
Thomas Harte
bc8787ded6 Improves macro safety. 2020-09-15 22:26:33 -04:00
Thomas Harte
69d21daaa3 Improves commentary. 2020-09-15 22:21:05 -04:00
Thomas Harte
5651ef606d Resolves failure to advance video address when output is blocked. 2020-09-15 22:20:06 -04:00
Thomas Harte
b831b31382 Adds a further sanity check. 2020-09-15 17:04:04 -04:00
Thomas Harte
2fd5cc056c Adds std::atomic_thread_fences, but these seem not to be a magic bullet. 2020-09-15 16:34:34 -04:00
Thomas Harte
82dbdf7dfc Switches to using regular linear interpolation for supersampling. 2020-09-14 22:36:00 -04:00
Thomas Harte
eb9903cd10 Defensively disables allocation of anything outside of visible lines. 2020-09-14 22:29:05 -04:00
Thomas Harte
227e98d6d7 Slightly simplifies control flow. 2020-09-14 22:27:25 -04:00
Thomas Harte
35476063b7 Resolves potential data races. 2020-09-14 21:07:50 -04:00
Thomas Harte
8557bb2136 Adds minor exposition. 2020-09-14 20:39:52 -04:00
Thomas Harte
c0c7818d5d Reintroduces screenshots. 2020-09-14 20:33:05 -04:00
Thomas Harte
ceeadd6a33 Edges up towards reimplementing screenshots. 2020-09-13 22:30:17 -04:00
Thomas Harte
1a2545fdea Excises dangling references to OpenGLView, reinstates display link. 2020-09-13 22:11:51 -04:00
Thomas Harte
c5e9a74c88 Uses DisplayMetrics to disable supersampling when too slow. 2020-09-13 21:07:59 -04:00
Thomas Harte
d7972a7b86 Enforces across-the-board supersampling.
I'm damned if I can figure out how to talk an MTKView, or Metal in general, into supersampling so as a first effort this does it in software.
2020-09-13 19:30:26 -04:00
Thomas Harte
7dd4c67304 Corrects access to data_type_size, adds sanity check on output area return. 2020-09-13 18:59:27 -04:00
Thomas Harte
e113780fd1 Minor: ensures no possibility of a dangling(-ish) pointer within the Mac video. 2020-09-10 22:13:19 -04:00
Thomas Harte
e32ae6c191 Adds UGLY HACKs to workaround uncovered issues in the OpenGL scan target. 2020-09-10 22:10:24 -04:00
Thomas Harte
bcaceff378 Simplifies in-Metal transform logic, loading responsibility for setup onto the CPU.
I think I've also finally excised whatever order-of-operations issue I was having with regard to non-4:3 displays.
2020-09-10 20:32:58 -04:00
Thomas Harte
d7b405c6f8 Ensures direct luminance -> 'RGB' video doesn't go down the composition pipeline. 2020-09-10 13:20:40 -04:00
Thomas Harte
edf8cf4dc6 Completes the set of with/without gamma, and ensures correct alpha selection.
Also culls some other repetitive TODOs.
2020-09-09 19:28:38 -04:00
Thomas Harte
dfcc8e9822 Switches some of the interpolated fields to half precision. 2020-09-09 18:17:05 -04:00
Thomas Harte
016e96e6f8 Extends usage of half. Possibly towards its conclusion. 2020-09-09 15:10:19 -04:00
Thomas Harte
e7ce03c418 Attempts to ensure initial finalised line texture state.
This was an attempt to remove the vertical line on the left of a composite display. Obviously the cause is not as suspected.
2020-09-09 13:15:21 -04:00
Thomas Harte
3d392dd81d Completes conversion of composite & S-Video per-pixel processing to 16-bit floats. 2020-09-09 13:02:04 -04:00
Thomas Harte
42d810db7f Switches per-pixel uniforms to halfs. 2020-09-09 10:53:09 -04:00
Thomas Harte
18571e8351 Also calculates a chroma kernel size, though it isn't used for anything yet. 2020-09-08 20:08:56 -04:00
Thomas Harte
dda1649ab7 Introduces smaller luma kernel functions where useable. 2020-09-08 19:55:37 -04:00
Thomas Harte
c82e0df071 Starts a transition towards half-precision arithmetic. 2020-09-08 19:37:36 -04:00
Thomas Harte
06b7ea5a6e Strips the luma kernel back to 1d. 2020-09-08 19:15:19 -04:00
Thomas Harte
c49fcb9ec9 Based on further play: one box filter to separate luma/chroma, another to filter chroma, plus a FIR sharpen on luma. 2020-09-08 16:35:05 -04:00
Thomas Harte
0e44d6d214 Experiments with an all-box filter. 2020-09-08 16:19:08 -04:00
Thomas Harte
6adad7fbf5 Starts experimenting again with box filters. 2020-09-07 22:47:49 -04:00
Thomas Harte
de6ed7b615 Corrects phase-linked luminance support. 2020-09-07 20:53:28 -04:00
Thomas Harte
07dcb4dbb1 Starts reintroducing brightness, gamma and transparency for composite and S-Video pipelines. 2020-09-07 18:19:13 -04:00
Thomas Harte
e99896eadc At least nominates alpha, gamma and brightness to metal. 2020-09-04 16:07:58 -04:00
Thomas Harte
489701afcb Fixes window resizing. 2020-09-03 21:28:39 -04:00
Thomas Harte
55e576cc57 Ensures unpainted areas in composite displays have a non-asymptotic effect on luminance calculations. 2020-09-03 21:10:30 -04:00
Thomas Harte
6bd8ec9545 Alas, 1.0 seems to be the limit for proper artefact colour. 2020-09-03 20:53:45 -04:00
Thomas Harte
5cd8d86eef Switches to dynamic generation of the 'sharpness' filter, correcting issues with the Apple II (amongst others). 2020-09-03 20:48:44 -04:00
Thomas Harte
74d0acdaec Fixes non-RGB colour composite generation.
The hard-coded sharpen filter proves to be a really bad fit for the Apple II though.
2020-09-03 19:04:17 -04:00
Thomas Harte
0288a1974b Tries: separate filters for chroma and luma, plus a post-separation sharpen filter on the latter. 2020-09-03 13:18:21 -04:00
Thomas Harte
6efd8782fe Tweaks coefficients some more; makes sure that data is never larger than the intermediate buffers. 2020-09-02 20:14:41 -04:00
Thomas Harte
8bab9d5d60 Corrects S-Video and composite generation for RGB[1/2/4] sources.
Also toys with a double luminance filter in order to try to sharpen chrominance. But maybe I should be looking at other convolutions entirely?
2020-09-02 19:13:54 -04:00
Thomas Harte
6ef1dfd8be Sets a more realistic colour subcarrier amplitude. 2020-09-02 15:52:05 -04:00
Thomas Harte
7e58648743 Corrects front-running bug, plays further with colour amplitude. 2020-09-02 15:51:48 -04:00
Thomas Harte
0f0c3e616d Tweaks some numbers.
I'm largely treading water here. Probably time to think about the race.
2020-09-02 08:17:01 -04:00
Thomas Harte
c7ce65ea4c Attempts fully to restore composite video.
Subject to some sort of nasty race condition for the time being.
2020-09-02 08:03:10 -04:00
Thomas Harte
c36247b609 Ensures reuse of offset buffers.
There seems to be some sort of epic race condition as the drawing pipeline lags though. Will need to investigate.
2020-09-01 22:11:48 -04:00
Thomas Harte
15296e43a4 Attempts correctly to set up the CPU side of a composite video pipeline, at least.
So: I think this is really close, but I'm out of time for the day.
2020-09-01 21:58:33 -04:00
Thomas Harte
f2929230a2 [Experimentally] introduces blending between computed S-Video fragments. 2020-09-01 21:37:36 -04:00
Thomas Harte
bf252b8061 Fixes sizing of buffers to the current output. 2020-09-01 21:33:54 -04:00
Thomas Harte
9e2bf2af7e Restricts S-Video processing to updated lines. 2020-09-01 21:27:40 -04:00
Thomas Harte
245f2654f0 Shifts S-Video processing into the compute shader. 2020-09-01 20:37:11 -04:00
Thomas Harte
67ca298a72 Forces a no-op compute shader into the S-Video pipeline.
The intention is to restrict the area acted over, and to do the S-Video filtering in there. Then I'll just need two such stages for composite.
2020-09-01 18:39:52 -04:00
Thomas Harte
67d4dbf91a Starts girding for a third pipeline. 2020-08-31 20:01:59 -04:00
Thomas Harte
b344269140 I think I accept the need for intermediate steps now.
This allocates storage.
2020-08-30 20:21:01 -04:00
Thomas Harte
bb547610f2 Adds commentary, shrinks some intermediate texture sizes. 2020-08-30 12:06:29 -04:00
Thomas Harte
1e1f007bb7 Possibly convinces myself that no-separation chroma/luma isn't practical.
... as appealing as it may be, were filters perfect.
2020-08-29 21:25:49 -04:00
Thomas Harte
c40d858f02 Switches back to angular stuff at input resolution; ensures all S-Video modes work.
Now to roll back onto composite. Fingers crossed!
2020-08-29 20:54:46 -04:00
Thomas Harte
3d564d85fd Proves that per-pixel sine/cos evaluation avoids phase issues.
Even in PAL mode. But I'd rather not _require_ this as it kind of negates directly-sampled input.
2020-08-29 18:53:37 -04:00
Thomas Harte
02cea40ffa Attempts to avoid introducing phase error in scanToComposition.
Also brightens S-Video up to RGB levels.
2020-08-25 22:41:37 -04:00
Thomas Harte
e502d336db Having decided that these things probably need to be separate, starts drilling down on S-Video. 2020-08-25 22:05:19 -04:00
Thomas Harte
807cb99f6d Composite angles are signed. 2020-08-23 21:39:04 -04:00
Thomas Harte
8b6879a782 Brief detour: introduces myself to C++11 multiline string literals.
A full cleaning coming soon, I imagine.
2020-08-23 21:18:38 -04:00
Thomas Harte
7ca0362f23 Treads water.
Difficult current question: why does the Atari 2600's display change colours as the display tries to achieve horizontal lock? Phase should be unchanged. Ergo something is amiss.
2020-08-23 21:03:26 -04:00
Thomas Harte
56c7bd242a Marginally tidies. 2020-08-22 16:38:36 -04:00
Thomas Harte
5c6112415a Sets appropriate clear colour for composition render pass. 2020-08-21 22:41:54 -04:00
Thomas Harte
bf6a0c9fc4 Achieves a return of composite colour for RGB-producing machines. 2020-08-21 22:06:36 -04:00
Thomas Harte
d54b937ab6 Starts trying to do actual composite processing. 2020-08-21 21:11:25 -04:00
Thomas Harte
7c23c32e44 Corrects composition colour phase. 2020-08-20 20:45:45 -04:00
Thomas Harte
4e21d24b5f Corrects composition colour amplitude. 2020-08-20 20:34:37 -04:00
Thomas Harte
ad6fb85fda Corrects use of composition buffer.
Something is still very obviously amiss in colour processing somewhere down the line, but the correct forms are once again visibly in evidence.
2020-08-20 20:21:28 -04:00
Thomas Harte
5dc39a5d24 Adds the composition render pass.
Albeit that something here doesn't work at present.
2020-08-19 21:56:53 -04:00
Thomas Harte
3597f687de Continues sidling towards composite & S-Video handling. 2020-08-19 21:20:06 -04:00
Thomas Harte
8811506adf Starts towards building a compound[/composition?] buffer.
I now need to discover whether I can use natural integer texture coordinates.
2020-08-17 22:10:02 -04:00
Thomas Harte
11dec6fc0f Avoids a redundant clear. 2020-08-17 22:09:15 -04:00
Thomas Harte
59c4c8233f Generalises existing scanToDisplay to add lineToDisplay. 2020-08-17 21:15:19 -04:00
Thomas Harte
9da79d2d81 Clarifies scaling logic. 2020-08-17 20:29:46 -04:00
Thomas Harte
246b474a25 Removes ONE_BIG_LOCK, having effectively neutered it anyway.
Starts work on more explicit API usage validation. Maybe the issue isn't a race condition?
2020-08-16 22:09:25 -04:00
Thomas Harte
27e8a3a1b5 Obeys modals' zoom.
Subject to an attempt at factoring aspect ratio differences.
2020-08-16 21:11:43 -04:00
Thomas Harte
745797b596 Introduces a stencil buffer plus the inter-frame clearing it allows. 2020-08-16 16:42:32 -04:00
Thomas Harte
940e9e037e Adds first_scan to LineMetadata.
Also reorders `Line` fields to match `Scan` fields, just for visual consistency.
2020-08-16 08:59:37 -04:00
Thomas Harte
512c0079a9 Makes thread safe. 2020-08-15 21:52:55 -04:00
Thomas Harte
645c29f853 Adds an intermediate buffer to correct inter-frame smoothing.
Also goes someway back to the old scan output scheduling, albeit presently with limited thread safety.
2020-08-15 21:24:10 -04:00
Thomas Harte
e55945674d Reduces main thread blocking. 2020-08-14 22:16:49 -04:00
Thomas Harte
7ac88536dd Respects machine aspect ratio.
To an extent. Doesn't currently deal with cropping of machines when the window aspect ratio is smaller.
2020-08-14 21:24:25 -04:00
Thomas Harte
230b9fc9e6 Permits multiple simultaneous scan reading ranges.
Also updates the OpenGL scan target as per the latest movements of things.
2020-08-12 22:08:41 -04:00
Thomas Harte
27ca782cac Enables blending; attempts to enable frame preservation.
The latter seems to be evidencing a double buffer at play. More investigation required.

On the plus side, the direct route is still well within GPU budget at 4k on my Core M. So a huge improvement there.
2020-08-12 19:34:07 -04:00
Thomas Harte
a136a00a2f Takes a shot at adding RGB -> S-Video and composite conversion, for all RGB types. 2020-08-11 22:11:50 -04:00
Thomas Harte
637ec35d6a Adds getters for standard colour-space conversion matrices.
These are just more details on the meaning of the colour spaces, so I think they belong here.
2020-08-11 19:58:57 -04:00
Thomas Harte
4b55df1cb4 Starts upon a macro-oriented means of RGB input function generation. 2020-08-10 22:03:39 -04:00
Thomas Harte
b9309268ba Possibly finally succeeds at moving Accelerate.framework to where it should be. 2020-08-10 21:46:11 -04:00
Thomas Harte
8fa89baf54 Slightly cleans up Xcode project; reenables kiosk-for-Mac builds. 2020-08-10 21:43:32 -04:00
Thomas Harte
8374a5e579 Adds superficially correct compositeSampleLuminance8Phase8 function.
Thereby uncovering a minor error in my decoding of colour phase.
2020-08-10 21:33:59 -04:00
Thomas Harte
525233e10b Ensures all input data types are parseable in Metal.
Though now I need to think a bit more about the best way to compose signal-type conversions, and whether output-type calculations (i.e. gamma, brightness) are applied.
2020-08-10 19:47:47 -04:00
Thomas Harte
eadda6a967 Further strips OpenGL from the macOS target. 2020-08-09 22:17:27 -04:00
Thomas Harte
3d6590af89 Throws out a little more OpenGL. 2020-08-09 22:11:31 -04:00
Thomas Harte
28d933d5d6 Does just enough to get 8-bit RGB and 1-bit luminance machines to display.
Assuming an 'RGB' output.
2020-08-09 21:19:07 -04:00
Thomas Harte
c1dc42a094 Add comment on latent design aim.
In the hope that I don't forget why I did this.
2020-08-09 21:18:23 -04:00
Thomas Harte
6384ff3ee7 Add fix for data_type_size_ for owners that don't change texture pointer upon new modals. 2020-08-09 21:17:51 -04:00
Thomas Harte
a118594c8b Hacks to make RGB1 visible (in a fashion). 2020-08-09 20:45:51 -04:00
Thomas Harte
93c6105442 Corrects calculation of dirty texture area. 2020-08-09 20:45:14 -04:00
Thomas Harte
ced4a75a1a Adds note on the buffering scan target's minor adaptation of data_offset. 2020-08-09 20:44:46 -04:00
Thomas Harte
57fecdc09e Ties everything together in an attempt to display RGB scans.
I'm actually just getting a mess of pixels, but it's something!
2020-08-09 18:41:15 -04:00
Thomas Harte
cd491bb6e0 Cleans up project file; macOS 10.13 is definitely the deployment target. 2020-08-09 18:27:57 -04:00
Thomas Harte
f16ad8f71d Takes a shot at submitting texture changes. 2020-08-09 17:59:52 -04:00
Thomas Harte
e340685a99 Seemingly proves that proper geometry is reaching Metal by drawing scans.
No in-buffer accumulation yet, but this is progress. If I can add accumulation and stencil clearing, I'm not doing badly.
2020-08-08 23:11:44 -04:00
Thomas Harte
df89a8771c Makes an attempt to have the emulator fill the actual GPU buffers.
Not that they're drawn from correctly yet. I might first take a run at a new quick-path output route for emulated RGB displays, that just seeks to use the scans directly. No intermediate buffers. Besides probably being a good feature, it'll be a good way to ramp further up with Metal.
2020-08-08 22:49:02 -04:00
Thomas Harte
bdcf266e45 Having learnt a bit more: eliminates Metal attribute tags, switches to more natural expression of structs.
Also thereby eliminates the need for a forced alignas(4) on various structs.
2020-08-08 17:27:32 -04:00
Thomas Harte
edf41b06fd Eliminates the quad buffer.
Vertices can be adduced from vertex ID.
2020-08-08 17:12:49 -04:00
Thomas Harte
38960a08d6 Adds adjustment for display aspect ratio.
While also realising that I appear to be getting away without an MTLVertexDescriptor for Scans. Maybe OpenGL has prejudiced me, and they're actually optional for interleaved data?
2020-08-07 22:29:24 -04:00
Thomas Harte
fbda7aab23 Does just enough to get the correct (aspect ratio aside) output of scan outlines.
So, up next, can I start streaming these things?
2020-08-07 22:20:01 -04:00
Thomas Harte
c575aa0640 Adds a buffer for scans, and posts two test instances. 2020-08-07 22:03:54 -04:00
Thomas Harte
583f6b1ba2 Modifies BufferingScanTarget to allow has-a relationship.
I might switch fully to has-a. Further consideration required.
2020-08-07 22:03:27 -04:00
Thomas Harte
bb55ecc101 Disables --volume for kiosk mode testing. 2020-08-07 21:19:53 -04:00
Thomas Harte
4421acef34 Gets some uniforms in on the action.
With some effort towards scans, but incompletely so.
2020-08-07 21:19:17 -04:00
Thomas Harte
4c9418f59a Guarantees alignof(4) on all GPU-bound structures.
Taken as given: Metal's requirement here is reasonable enough that it'll either be the same as other frameworks, or at least possibly help them down a fast path.
2020-08-07 21:18:08 -04:00
Thomas Harte
219923bd63 Reduces vertex size, draws a quad. 2020-08-05 21:33:25 -04:00
Thomas Harte
7551782a25 Switches to interleaved vertex data.
This more closely relates to what I actually want to do.
2020-08-05 17:27:43 -04:00
Thomas Harte
5c836604c0 Reenable MaserSystem code.
Accidental/poor branch management is evidenced here.
2020-08-04 21:50:54 -04:00
Thomas Harte
eff24a8726 My first baby steps in Metal continue; here's a triangle. 2020-08-04 21:49:01 -04:00
Thomas Harte
72df6e52cd This is possibly at least dispatching an empty command buffer correctly. 2020-08-04 19:44:56 -04:00
Thomas Harte
e235a45abb Breaks all output.
... by switching out NSOpenGLView for MKLView with no drawing infrastructure yet in place.
2020-08-04 18:22:14 -04:00
Thomas Harte
d20c11e401 Merge pull request #831 from TomHarte/MultiKeyboard
Ensures that the MultiKeyboard functions.
2020-07-31 22:08:08 -04:00
Thomas Harte
693b889fdd Ensures that the MultiKeyboard functions. 2020-07-31 21:48:20 -04:00
Thomas Harte
671f48dc10 Merge pull request #830 from TomHarte/MSXCrash
Restores audio to multimachines
2020-07-31 18:31:23 -04:00
Thomas Harte
7b1708f0bc Gets explicit that the delegate_ doesn't need a memory barrier. 2020-07-31 18:21:47 -04:00
Thomas Harte
f34a9b4346 Corrects audio output from the multi-speaker.
Specifically: local duplication of the delegate is unnecessary, and leads to confusion.
2020-07-31 18:18:19 -04:00
Thomas Harte
1e6d03246b Merge pull request #829 from TomHarte/MSXCrash
Ensures proper handover of speaker state when picking in a multimachine.
2020-07-30 23:04:55 -04:00
Thomas Harte
cdde57fcf2 Remove unused code. 2020-07-30 23:02:01 -04:00
Thomas Harte
c0a61ac1ee Ensures proper handover of speaker state when picking in a multimachine. 2020-07-30 22:50:32 -04:00
Thomas Harte
9c97c0a906 Merge pull request #828 from TomHarte/LockFreeQueue
Completes LockFreeQueue branch.
2020-07-30 21:46:56 -04:00
Thomas Harte
8cacab196d Merge branch 'master' into LockFreeQueue 2020-07-30 21:43:25 -04:00
Thomas Harte
b14bedbe29 Merge pull request #817 from TomHarte/LockFreeQueue
Fully splits buffering from drawing for the existing OpenGL scan target.
2020-07-30 21:42:20 -04:00
Thomas Harte
6bc66d8b96 Tidies, ensures ::will_change_owner acquires the producer mutex. 2020-07-29 23:18:03 -04:00
Thomas Harte
23f381f381 Fixes frame_is_complete_, gets rid of active_line_, explains ONE_BIG_LOCK in set_write_area. 2020-07-29 23:03:38 -04:00
Thomas Harte
51ad423eca Resolves off-by-one error in line writing, adds diagnostic one-big-lock option. 2020-07-29 22:45:13 -04:00
Thomas Harte
72a8fef989 Switches to much more straightforward Line/LineMetadata storage.
Spoiler: covering this whole segment behind producer_mutex_ seems to resolve all output issues, so clearly the existing logic isn't functioning correctly. Making it simpler seems like a pretty obvious way to get to the bottom of that.
2020-07-29 21:49:17 -04:00
Thomas Harte
02f41ee513 This has become the general producer mutex, might as well name it as such. 2020-07-29 21:34:07 -04:00
Thomas Harte
9410594486 Merge branch 'master' into LockFreeQueue 2020-07-29 21:22:19 -04:00
Thomas Harte
1c6223cc11 Merge pull request #825 from TomHarte/Microdisc
Gives Qt disk controllers independent ROM/RAM selection logic.
2020-07-29 21:21:29 -04:00
Thomas Harte
82d6a5387f Gives Qt disk controllers independent ROM/RAM selection logic.
In particular, this fixes the Microdisc.
2020-07-29 21:06:41 -04:00
Thomas Harte
5165e65021 Reduces scan_buffer_ to a saner size.
Albeit still probably overspecified.
2020-07-28 22:36:57 -04:00
Thomas Harte
1942742d73 Resolves thread data race on Macintosh audio output. 2020-07-28 22:21:52 -04:00
Thomas Harte
b7760bb052 Reorders code, gets explicit about memory ordering. 2020-07-28 22:02:22 -04:00
Thomas Harte
2470055d90 Hides the modals. 2020-07-27 23:33:39 -04:00
Thomas Harte
62be2a2eec Merge branch 'master' into LockFreeQueue 2020-07-27 23:18:45 -04:00
Thomas Harte
b1e062945e Merge pull request #821 from TomHarte/QtThreading
Qt issue mega ticket
2020-07-27 21:19:12 -04:00
Thomas Harte
3db4a8c312 Attempts to improve vsync deadline estimation.
Also increases probability of bad estimation being discarded.
2020-07-27 21:08:00 -04:00
Thomas Harte
db8e1b0edf Adds feedback on unidentified ROMs. 2020-07-27 20:45:47 -04:00
Thomas Harte
71c3f58c99 Provides user feedback upon improper command-line usage. 2020-07-27 20:40:38 -04:00
Thomas Harte
7c05b1788e Ensures proper thread confinement for updateStatusBarText. 2020-07-27 20:25:52 -04:00
Thomas Harte
77c5b86acc Moves ownership of the scan and line buffers out of the BufferingScanTarget. 2020-07-26 22:46:03 -04:00
Thomas Harte
bc6426313e Localises three of the four macros. 2020-07-26 17:54:33 -04:00
Thomas Harte
8bef7ff4c5 Makes all three PointerSets and is_updating_ private. 2020-07-26 17:27:19 -04:00
Thomas Harte
a2db6ddea5 Add link to Snap releases. 2020-07-25 23:00:29 -04:00
Thomas Harte
f9f500c194 Merge branch 'master' into LockFreeQueue 2020-07-24 22:29:45 -04:00
Thomas Harte
6ad1e3e17e Merge pull request #819 from TomHarte/Warnings
Resolves GCC 7 warnings.
2020-07-24 22:17:50 -04:00
Thomas Harte
e097a841d2 Adds a c++1z fallback for SDL builds, too. 2020-07-24 22:01:22 -04:00
Thomas Harte
fa95a17af5 Resolves receive_bit_count-unused warnings. 2020-07-24 21:59:27 -04:00
Thomas Harte
b961665985 Ensures WOZ2 behaviour even if type_ has an invalid value.
This pleases GCC 7.
2020-07-24 21:56:20 -04:00
Thomas Harte
8af35bc6bb Resolves signed comparison mismatches. 2020-07-24 21:55:33 -04:00
Thomas Harte
9b75287a52 Merge pull request #818 from TomHarte/QtC++1z
Add c++1z as a config option, for older versions of Qt.
2020-07-24 16:34:04 -04:00
Thomas Harte
84d5316aa7 Add c++1z as a config option, for older versions of Qt. 2020-07-24 16:32:59 -04:00
Thomas Harte
89acb70091 Slightly reorganise. 2020-07-24 16:20:20 -04:00
Thomas Harte
66165a6dea Add missing include files. 2020-07-23 23:24:24 -04:00
Thomas Harte
84dcf9925b Updates Scons and Qt projects to include new files. 2020-07-23 23:14:10 -04:00
Thomas Harte
ee1d7eb61f Makes more buffer-specific stuff private. 2020-07-23 23:06:14 -04:00
Thomas Harte
e260f92988 Privatises write_pointers_mutex_ and write_pointers_.
Also gives subclasses control over write-area texture space allocation.
2020-07-23 22:54:40 -04:00
Thomas Harte
74788ccf8e Pulls the BufferingScanTarget into a separate file. 2020-07-22 22:16:47 -04:00
Thomas Harte
0da5c07942 Starts splitting ring-buffer stuff from OpenGL stuff.
Initially via two very codependent classes.
2020-07-21 22:49:46 -04:00
Thomas Harte
e8cd5a0511 Merge pull request #816 from TomHarte/RelaxedTracks
Corrects a regression in disk image handling; liberalises Disk II analyser
2020-07-20 19:53:34 -04:00
Thomas Harte
5ebbab6f35 Further relax Apple GCR static analysis requirements. 2020-07-20 19:50:33 -04:00
Thomas Harte
84dd194afd Corrects test for ::tracks_differ. 2020-07-20 19:48:20 -04:00
Thomas Harte
e1ad1a4cb6 Update Qt status. 2020-07-20 09:17:43 -04:00
Thomas Harte
9de43dac95 Merge pull request #815 from TomHarte/WOZ2
Support WOZ 2 disk images
2020-07-19 23:22:55 -04:00
Thomas Harte
47f121ee4c Mark WOZs as read-only, with exposition as to why. 2020-07-19 00:08:49 -04:00
Thomas Harte
d8b699c869 Corrects index pulse signalling. 2020-07-19 00:06:27 -04:00
Thomas Harte
a7855e8c98 Ensure float literals are floats. 2020-07-17 23:18:41 -04:00
Thomas Harte
8dcb48254a Simplifies calculations very slightly. 2020-07-17 23:18:08 -04:00
Thomas Harte
f6b7467d75 Implement custom tracks_differ; support WOZ 2 3.5" drive geometry properly. 2020-07-17 22:09:55 -04:00
Thomas Harte
9d1d162cc8 Add an ability to avoid track flushing when file formats have sub-track precision. 2020-07-17 22:09:21 -04:00
Thomas Harte
4ee29b3266 Switches disk seeking logic fully to floating point. 2020-07-17 22:08:58 -04:00
Thomas Harte
cbb0594e6b Use 16-sector state machine even with the 13-sector boot ROM.
I think I've proven that the Disk II doesn't decode the 13-sector state machine correctly. Work to do there.
2020-07-16 23:27:27 -04:00
Thomas Harte
8aeebdbc99 Remove redundant comment. 2020-07-16 23:26:45 -04:00
Thomas Harte
c7ef258494 Ensures that five-and-three sectors pass static analysis. 2020-07-16 21:44:14 -04:00
Thomas Harte
4fec7c82ab Very minor grammar improvement. 2020-07-16 21:43:03 -04:00
Thomas Harte
9a952c889f Fixes exit from random gain noise. 2020-07-15 22:44:54 -04:00
Thomas Harte
8da7806ee9 Liberalises segment parser not necessarily to require a standard epilogue.
It seems that real disks don't always have them; I guess the boot ROM doesn't require one.
2020-07-15 22:27:04 -04:00
Thomas Harte
aed61f6251 Implements latest advocated MC3470 behaviour. 2020-07-15 19:34:05 -04:00
Thomas Harte
d065d6d98f Adds read-only WOZ 2 support. 2020-07-15 19:15:03 -04:00
Thomas Harte
ab20a23f2b Merge pull request #814 from TomHarte/ZX81Autosrun
Ensures the ZX80 and ZX81 automatically RUN software that doesn't do that itself
2020-07-14 23:53:17 -04:00
Thomas Harte
e1c57b6fbe Further ensures both ZX80 and ZX81 functionality. 2020-07-14 23:45:51 -04:00
Thomas Harte
371c26251c Switches strategy for the ZX80. 2020-07-14 22:36:04 -04:00
Thomas Harte
645d198bee Causes ZX80 and ZX81 software that doesn't already autorun to do so. 2020-07-14 22:17:56 -04:00
Thomas Harte
ab1a999df4 Merge pull request #812 from TomHarte/QtLoadAtLaunch
Qt: Attempt to load a file if passed on the command line.
2020-07-13 22:00:11 -04:00
Thomas Harte
42f2bf05bf Attempt to load a file if passed on the command line. 2020-07-13 21:51:55 -04:00
Thomas Harte
5e55d3d7c7 Merge pull request #660 from TomHarte/FurtherSCC
IN PROGRESS. More fully implements the Macintosh's SCC.
2020-07-12 00:05:59 -04:00
Thomas Harte
1288369865 Merge branch 'master' into FurtherSCC 2020-07-11 23:54:40 -04:00
Thomas Harte
d86b0d4213 Merge pull request #811 from TomHarte/QtPaths
Ensures qmake paths are explicit.
2020-07-11 17:47:29 -04:00
Thomas Harte
d91cf598be Ensures qmake paths are explicit. 2020-07-11 17:46:32 -04:00
Thomas Harte
9be56aa4a2 Merge pull request #809 from TomHarte/QtActivity
Exposes activity lights in Qt.
2020-07-10 23:32:38 -04:00
Thomas Harte
86737454a0 Exposes activity lights in Qt.
As a status bar, which is a bit of a quick fix, but it's better than not displaying this information.
2020-07-10 23:18:38 -04:00
Thomas Harte
f0c0caf800 Merge pull request #807 from TomHarte/QtSDL
Works around Qt's keyboard limitations, under X11 at least
2020-07-10 22:36:27 -04:00
Thomas Harte
223a960a06 Implements standard keyboard -> joystick mapping. 2020-07-10 22:30:43 -04:00
Thomas Harte
f72570386c Installs and removes an 'Input' menu where required.
Also ensures safe shutdown of a second machine.
2020-07-09 23:47:38 -04:00
Thomas Harte
56e5491e5c Ensures safe startup. 2020-07-09 23:06:32 -04:00
Thomas Harte
be1c3e9136 Ensures key state is cleared upon activation changes. 2020-07-08 21:31:29 -04:00
Thomas Harte
2d223305eb Correct subject of switch. 2020-07-08 00:49:29 -04:00
Thomas Harte
48c2dcf50e Introduce provisional X11 bindings. 2020-07-08 00:46:29 -04:00
Thomas Harte
fa26c82273 Undoes extra dependency, checks for X11 at runtime. 2020-07-08 00:15:44 -04:00
Thomas Harte
0763ae38dd Attempts to add conditional include for non-Mac UNIX only. 2020-07-07 23:57:32 -04:00
Thomas Harte
2230ac6c38 Merge pull request #800 from TomHarte/QtProject
UNREADY. Adds a provisional Qt target.
2020-07-06 22:33:39 -04:00
Thomas Harte
abe1e7f244 Provide current thoughts on Qt and the keyboard. 2020-07-06 22:27:50 -04:00
Thomas Harte
24b03f733f Switches to an image more distinct from the existing.
i.e. less heavy on blue and green.
2020-07-04 22:03:08 -04:00
Thomas Harte
5a729f92c1 Attempts to move the 'Help' menu to the correct place. 2020-07-04 19:19:41 -04:00
Thomas Harte
366793498a Ensures ScanTargetWidget doesn't eat irrelevant keypresses. 2020-07-04 19:12:34 -04:00
Thomas Harte
cdda3f74ab Attempts mouse event capture. 2020-07-04 00:29:37 -04:00
Thomas Harte
51f4242e9b Reapplies image optimisation, saving a few bytes. 2020-07-04 00:29:10 -04:00
Thomas Harte
d97ebae200 Request Qt deprecation warnings. 2020-07-03 23:16:49 -04:00
Thomas Harte
daa195a7fb Add Qt to the main README. 2020-07-03 23:16:35 -04:00
Thomas Harte
2d5e9bf1bb Declines to set up audio output if none is available. 2020-07-02 22:58:15 -04:00
Thomas Harte
402f2ddbd9 Increases likelihood of 68000 Program offset-size assumptions being met. 2020-07-02 22:24:04 -04:00
Thomas Harte
8bf5ed52ea Ensures keyboard events are restricted to single windows. 2020-07-02 22:03:12 -04:00
Thomas Harte
b850183a1e Switches to an alternative to window(), for older Qt support. 2020-07-02 21:53:30 -04:00
Thomas Harte
f7e13356c4 FunctionThreads no longer automatically start.
Improvements as a result: audio works in a second machine started in an existing window; there is no audio thread footprint if there is no audio.
2020-07-01 18:55:42 -04:00
Thomas Harte
55cc3089f9 Ensures complete deallocation of the QAudioOutput. 2020-06-30 23:33:41 -04:00
Thomas Harte
a096a09c72 Trusts Qt to supply a refresh rate, and handles retina <-> non-retina window transitions. 2020-06-30 23:03:39 -04:00
Thomas Harte
365e1f2e85 Merge pull request #803 from Margen67/actions
ccpp.yml: Changes
2020-06-29 15:26:17 -04:00
Thomas Harte
b9e117cdcf Centralises window title responsibility. 2020-06-28 23:08:40 -04:00
Margen67
fc3a03a856 ccpp.yml: Changes
Build all branches.
Delete whitespace.
Use checkout v2.
Change ; to &&.
Use working-directory instead of cd.
Add -j to speed up build.
2020-06-28 19:53:19 -07:00
Thomas Harte
f6e5a2fb04 Resolves duplicative enums. 2020-06-28 22:50:24 -04:00
Thomas Harte
404c35feb5 Implements Atari 2600 switches menu. 2020-06-28 17:57:20 -04:00
Thomas Harte
b5962c58bb Completes ZX80/81-specific menu. 2020-06-28 16:23:35 -04:00
Thomas Harte
74da762ae1 Starts sketching out the ZX80/81 menu items. 2020-06-28 01:04:32 -04:00
Thomas Harte
d87c840b76 Adds quick load and quick boot options.
This should leave only the ZX80/81 and 2600 as special cases.
2020-06-27 17:08:29 -04:00
Thomas Harte
afb835398f Ensures display selection is preserved in the app settings. 2020-06-27 16:26:39 -04:00
Thomas Harte
c982c78285 Ensures Reflection::set is widely available. 2020-06-27 16:26:01 -04:00
Thomas Harte
b4cdf8d987 Separates runtime TypeInfo into its own header. 2020-06-27 15:53:06 -04:00
Thomas Harte
6925a04088 Ensures 'Display' menu is removed if machine is closed. 2020-06-26 23:27:14 -04:00
Thomas Harte
a0e534b309 Starts towards offering display-type selection. 2020-06-26 23:04:45 -04:00
Thomas Harte
74d1ca4fa8 Simplifies indentation, correcting flow while there. 2020-06-26 21:16:15 -04:00
Thomas Harte
3c896050fb Ensures proper output sizeing on HiDPI displays. 2020-06-26 21:14:43 -04:00
Thomas Harte
387500f01a Implements 'Insert...' menu item. 2020-06-26 18:25:56 -04:00
Thomas Harte
21c41ed4cb Reduces boilerplate and key repetition. 2020-06-26 00:39:30 -04:00
Thomas Harte
293ab25634 Ensures complete machine picker state is stored. 2020-06-26 00:23:52 -04:00
Thomas Harte
3ddc1a1722 Eliminates hard-coded concept of timer jitter. 2020-06-25 23:59:44 -04:00
Thomas Harte
478d081095 Ensures machines take user-friendly default settings. 2020-06-23 23:27:56 -04:00
Thomas Harte
9d4b49bbb5 Attempts to be more rigorous in vsync prediction. 2020-06-23 22:59:12 -04:00
Thomas Harte
4417f81014 Attempts to set a meaningful window title. 2020-06-22 22:58:58 -04:00
Thomas Harte
b96f7711e3 Corrects attempt at back-to-UI final window SDI behaviour.
Maybe it'll turn out to be not what I want, but at least now it works.
2020-06-22 22:36:36 -04:00
Thomas Harte
1875a03757 Plugs a per-window memory leak.
While also ensuring proper OpenGL resource destruction.
2020-06-22 20:32:44 -04:00
Thomas Harte
13336b8ad5 Consolidates and disables failed attempt at final-window close behaviour. 2020-06-21 23:52:41 -04:00
Thomas Harte
b17cceaeaf Tidies up and makes a failing attempt at SDI improvements. 2020-06-21 23:50:18 -04:00
Thomas Harte
782a62585e Preserves open path between launches. 2020-06-21 19:10:06 -04:00
Thomas Harte
c5d8d9127b Rejigs ScanTarget relationship from pull to push, so it can be set whenever it is safe. 2020-06-21 18:25:38 -04:00
Thomas Harte
336dffefe0 Ensures changes in the framebuffer are passed onward. 2020-06-21 17:25:21 -04:00
Thomas Harte
e297d4cced Decouples scan target drawing and lifetime. 2020-06-21 17:20:44 -04:00
Thomas Harte
b052ca5ca2 Switch to Qt-style member naming. 2020-06-21 17:16:11 -04:00
Thomas Harte
68d4d7d10a Ensures no out-of-bounds access for unlabelled keys. 2020-06-21 17:11:24 -04:00
Thomas Harte
a03211c410 Makes an attempt at the single document interface. 2020-06-21 12:30:18 -04:00
Thomas Harte
c953ab09db Ensures overloaded assignments work. 2020-06-20 00:17:16 -04:00
Thomas Harte
68645742f7 This is a deliberate fallthrough. 2020-06-20 00:12:08 -04:00
Thomas Harte
1fbb733f7f Expands upon comment. 2020-06-20 00:05:41 -04:00
Thomas Harte
6e4b8d58a5 Completes [[fallthrough]]s. 2020-06-19 23:50:37 -04:00
Thomas Harte
7af8646470 Allowing for the constexpr, this is maybe_unused. 2020-06-19 23:47:43 -04:00
Thomas Harte
945a9da94f Adds further [[fallthrough]]s. 2020-06-19 23:44:20 -04:00
Thomas Harte
2477752fa4 Adds further [[fallthrough]] attributes. 2020-06-19 23:36:51 -04:00
Thomas Harte
240d3c482b Removes redundant constructors. 2020-06-19 23:26:22 -04:00
Thomas Harte
91229a1dbd Adds overt fallthrough attributes. 2020-06-19 23:22:29 -04:00
Thomas Harte
4f9b3259d5 Adds explicit conversions to qint64. 2020-06-19 23:12:18 -04:00
Thomas Harte
3cb1072c29 Adds an explicit [[fallthrough]] tag. 2020-06-19 23:10:25 -04:00
Thomas Harte
12ee8e4db4 Ensures audio is not being pumped while the AudioBuffer is being destructed. 2020-06-19 23:09:39 -04:00
Thomas Harte
95e98323c5 Adds missing header for lock_guard and mutex. 2020-06-19 23:09:20 -04:00
Thomas Harte
7431d56166 Ensures is_in_retrace is properly initialised. 2020-06-19 23:09:02 -04:00
Thomas Harte
222c16c5b8 Ensures newly-hidden widgets aren't still in focus. 2020-06-19 22:01:53 -04:00
Thomas Harte
4e83e80962 Goes further in ensuring safe shutdown.
Especially if no machine has been started.
2020-06-19 20:17:47 -04:00
Thomas Harte
4fdbe578cc Wires up all new machine options. 2020-06-18 23:34:37 -04:00
Thomas Harte
c5cad865d7 Tidies up: arranges initialisers into alphabetical order, shortens some enum references. 2020-06-18 23:34:28 -04:00
Thomas Harte
ae5fe9225f Fills in all machine options. 2020-06-18 22:24:45 -04:00
Thomas Harte
327b9051c8 Adds necessary layouts for Apple II type selection. 2020-06-18 20:30:50 -04:00
Thomas Harte
8151c24cf5 Starts the machine-picker side of the interface. 2020-06-18 20:05:46 -04:00
Thomas Harte
ee659095c2 Retains the default window background colour until a machine is running. 2020-06-17 23:16:29 -04:00
Thomas Harte
8c35fe1062 Finally succeeds at making the missingROMsBox resize with the window. 2020-06-17 22:22:15 -04:00
Thomas Harte
9ca6a1031c Adds an 'about' box and a hypothetical 'New' file option. 2020-06-16 23:15:47 -04:00
Thomas Harte
59458f6444 Resolves errant spaces. 2020-06-16 23:15:38 -04:00
Thomas Harte
e8939aada4 Now that this spin blocks at startup, I can use a standard atomic_flag. 2020-06-16 23:12:58 -04:00
Thomas Harte
17bb3dce26 Makes a firmer attempt at enforcing safe shutdown. 2020-06-16 22:33:50 -04:00
Thomas Harte
495024d6fe Cleans up all redundant lock/unique_guard declarations. 2020-06-15 00:24:10 -04:00
Thomas Harte
902b33d25d Makes more failing attempts at a clean shutdown. 2020-06-15 00:00:44 -04:00
Thomas Harte
ac732e2e7b Attempts to ensure clean shutdown. 2020-06-14 23:38:44 -04:00
Thomas Harte
d08ffd6c8b Makes sure the timer really, really is on a different thread.
Thereby allows me substantially to reduce audio latency.
2020-06-14 23:22:00 -04:00
Thomas Harte
530ff7471d Adds a virtual destructor, given how these things might be held. 2020-06-14 21:14:51 -04:00
Thomas Harte
79833deeaf With some attempt at vsync prediction, seeks to smooth audio/video output.
There's plenty more work to do here, but hopefully it takes the issue immediately off the table.
2020-06-14 19:26:56 -04:00
Thomas Harte
405e9e7c68 Shunts audio into its own QThread.
For the record, this was the first means I found of attempting that which actually seemed to work. A plain QThread, with something `connect`ed to its `started` signal didn't seem to work (perhaps `connect` is smart at thread confinement?), `moveToThread` didn't work on the audio output after the fact, etc.
2020-06-10 22:14:54 -04:00
Thomas Harte
5f13ee7c19 Simplifies AudioBuffer by consolidating logic into writes.
This is kind of fiddling in the margins though; I'm having a lot of difficulty determining the semantically-correct way to get Qt not to funnel all activity through a single thread.
2020-06-09 23:56:08 -04:00
Thomas Harte
d9f02aecdf Adds an additional buffer. To reduce latency. No, really.
Specifically: there's no way to guarantee no overbuffering due to the startup race, other than having QAudioOutput obtain data by pull rather than push. But if it's pulling then that implies an extra buffer. And since the sizes it may pull are not explicit, there's guesswork involved there.

So: no extra buffer => uncontrollable risk of over-buffering. Extra buffer => a controllable risk of over-buffering.
2020-06-09 00:01:22 -04:00
Thomas Harte
bcb23d9a15 Attempt to reduce audio latency. Unsuccessfully. 2020-06-08 21:30:35 -04:00
Thomas Harte
d027450502 Consolidates timer/thread ownership for the timer. 2020-06-07 00:31:46 -04:00
Thomas Harte
63ad1290f4 Actually, QIODevice is listed as reentrant. So no need to forward audio.
That said, latency is still absurd for some reason.
2020-06-06 23:47:57 -04:00
Thomas Harte
7c7cb61d2f Corrects missing audio, at the cost of frame rate.
I'm now spinning on the ability of QAudioOutput to accept additional data.
2020-06-06 22:35:50 -04:00
Thomas Harte
68b165e244 QIODevice isn't guaranteed thread safe, so use of it is now thread confined. 2020-06-06 21:14:04 -04:00
Thomas Harte
fe1b6812f1 Fixes processing cap and attempts full-rate video output.
Audio now seems to be present, though hugely stuttered.
2020-06-06 19:47:35 -04:00
Thomas Harte
378ff39e5e Makes an unsuccessful attempt at producing audio.
On the plus side, it does seem successfully to sniff out an appropriate audio format and to communicate mono/stereo onward.
2020-06-06 19:19:01 -04:00
Thomas Harte
e47cb91223 Pushes rudimentary keyboard input. 2020-06-05 23:06:28 -04:00
Thomas Harte
d62fb16a58 Adds an eventFilter, in order to steal keypresses. 2020-06-05 22:11:17 -04:00
Thomas Harte
235efcb2d4 Attempts to silence asserts, etc, for release builds. 2020-06-04 23:14:51 -04:00
Thomas Harte
a6ada129e8 Adds very low quality, race-condition infested video output. 2020-06-04 22:58:02 -04:00
Thomas Harte
a681576d6c Adds redraw logic.
If you sit around and constantly reeize the window, you can now see that a machine is running.
2020-06-04 22:39:32 -04:00
Thomas Harte
fdc234ed3b Advances to having a selected machine actually run.
Albeit, invisibly.
2020-06-03 23:39:16 -04:00
Thomas Harte
e2ceb77501 Attempts to start updating a started machine.
No real progress on graphics output though.
2020-06-03 00:21:37 -04:00
Thomas Harte
11c28357a1 Implements a basic ROM installation loop.
Albeit that I need to figure out how layouts work to keep that request view at least centred.
2020-06-02 23:35:01 -04:00
Thomas Harte
f215405beb Corrects capitalisation errors. 2020-06-02 23:27:29 -04:00
Thomas Harte
ba2a0600dc Adds a basic Qt ROM fetcher and attempt to create a machine. 2020-06-01 23:14:57 -04:00
Thomas Harte
ab53165b34 Adds note on implementation obstacle. 2020-06-01 22:08:21 -04:00
Thomas Harte
a30723c3d4 Cleans up a little and ensures a safe exit of the timer thread. 2020-05-31 23:58:19 -04:00
Thomas Harte
d64b4fbc26 Adds a Qt timer class. Precision seems to be 'acceptable'. 2020-05-31 23:39:08 -04:00
Thomas Harte
73131735fa Further qmake warning corrections. 2020-05-30 19:31:17 -04:00
Thomas Harte
5e0bea9d1c Adds all header files to the QMake project. 2020-05-30 16:48:52 -04:00
Thomas Harte
48afc54af6 Cuts down unused parameter warnings to just a few that may well indicate implementation errors. 2020-05-30 01:06:43 -04:00
Thomas Harte
d066dd2b44 Resolves further unused parameter warnings.
Also adds warning to Xcode build, for better symmetry with Qt defaults.
2020-05-30 00:58:10 -04:00
Thomas Harte
0bf7de9d43 Advances to actually completing a build.
Many more warnings to iron out, however.
2020-05-30 00:47:43 -04:00
Thomas Harte
267006782f Starts to add Qt target; resolves many build warnings. 2020-05-30 00:37:06 -04:00
Thomas Harte
a9de745e51 Merge pull request #798 from qeeg/master
Fix Windows MSYS2 build (mostly)
2020-05-27 21:52:49 -04:00
Thomas Harte
ca1f3c600d Merge branch 'master' into master 2020-05-27 21:52:39 -04:00
Thomas Harte
743353a0ed Merge pull request #799 from TomHarte/WindowsBuildErrors
Fixes a couple of Windows build errors.
2020-05-27 21:42:06 -04:00
Thomas Harte
f7c10ef9e9 Replaces POSIX stpncpy with ANSI strlen, memcpy and memset. 2020-05-27 21:31:46 -04:00
Thomas Harte
ecb44711d1 Add glext.h. 2020-05-27 21:20:43 -04:00
Melissa Goad
603b747ac5 Fix Windows MSYS2 build (mostly) 2020-05-27 18:09:56 -05:00
Thomas Harte
0f2f776e6a Merge pull request #797 from TomHarte/Serialisation
Adds BSON serialisation and deserialisation for all reflectable structs.
2020-05-26 23:18:41 -04:00
Thomas Harte
1308f119a6 Relocates cassert. 2020-05-26 23:07:26 -04:00
Thomas Harte
51d684820f Attempts to add array support to ::set and BSON deserialisation. 2020-05-26 22:55:55 -04:00
Thomas Harte
023d76a3e7 Permits int truncation, adds double decoder. Arrays still TODO. 2020-05-26 22:20:15 -04:00
Thomas Harte
4d34d9ae2b Implements BSON deserialisation, other than arrays. 2020-05-25 23:39:00 -04:00
Thomas Harte
c83c827484 Adds necessary header for math. 2020-05-24 12:19:20 -04:00
Thomas Harte
b8b880a91d Extends encoding to handle vector<uint8_t>, floats and doubles. 2020-05-24 01:20:48 -04:00
Thomas Harte
bb2f21a22e Encodes enumerated values as strings. 2020-05-23 22:54:43 -04:00
Thomas Harte
b3587d4cde Corrects: logic for int promotion, object sizes, int64_t gets, sizes prefixed to objects. 2020-05-22 23:38:07 -04:00
Thomas Harte
39ffe45f3c Attempts to add support for arrays. 2020-05-22 21:55:12 -04:00
Thomas Harte
d36e592afb Starts towards BSON serialisation for all deflectable structs.
Still to be tackled: arrays, enumerated types should probably be encoded as strings, deserialisation, probably distinguish get and fuzzy_get...
2020-05-22 00:31:40 -04:00
Thomas Harte
74fb697fa6 Merge pull request #796 from TomHarte/MintBuildIssues
Increases const correctness.
2020-05-20 23:52:16 -04:00
Thomas Harte
512a52e88d Increases const correctness, marks some additional constructors as constexpr, switches std::atomic construction style. 2020-05-20 23:34:26 -04:00
Thomas Harte
41fc6c20a0 Merge pull request #794 from TomHarte/68000State
Adds a `State` for the 68000.
2020-05-19 22:33:57 -04:00
Thomas Harte
28881cb391 Implements apply. 2020-05-19 18:27:10 -04:00
Thomas Harte
a16b710d22 Removes <cassert> from Struct.h (which means it's needed in the 68000's State). 2020-05-19 00:06:29 -04:00
Thomas Harte
a3d4c7599b Attempts fully to capture 68000 state.
Albeit that it can't be put back yet.
2020-05-18 23:55:54 -04:00
Thomas Harte
6f16928215 Adds all remaining simple scalar fields. 2020-05-16 22:47:04 -04:00
Thomas Harte
ff3c2fdc59 Adds 68000 state to SConstruct. 2020-05-16 18:33:36 -04:00
Thomas Harte
57edfe8751 Formalises TODO list and marches onward into execution state. 2020-05-16 18:31:43 -04:00
Thomas Harte
dcc0ee3679 Adds input line capture. 2020-05-16 17:44:15 -04:00
Thomas Harte
f7a16762b4 Starts populating the 68000 state registers. 2020-05-16 00:06:04 -04:00
Thomas Harte
375835a950 Extends .description() to handle arrays. 2020-05-14 23:58:17 -04:00
Thomas Harte
4481386a3d Extends Reflection::Struct slightly to capture the lengths of arrays. 2020-05-14 22:59:44 -04:00
Thomas Harte
8b76d4007e Starts adding State for the 68000. 2020-05-14 22:46:40 -04:00
Thomas Harte
4f30118b37 Merge pull request #793 from TomHarte/Z80State
Adds reflective state for the Z80.
2020-05-14 00:18:58 -04:00
Thomas Harte
c5b746543b Factors the half mask into steps count. 2020-05-14 00:09:01 -04:00
Thomas Harte
11d936331d Attempts to preserve scheduled_program_counter_. 2020-05-13 23:58:04 -04:00
Thomas Harte
4f619de675 Permits ::get from a reflective enum to an int. 2020-05-13 23:48:28 -04:00
Thomas Harte
80f2836cb8 Adds Z80 state to SConstruct. 2020-05-13 22:05:23 -04:00
Thomas Harte
3709aa7555 Edges almost up to an initially complete implementation. 2020-05-13 22:04:04 -04:00
Thomas Harte
7c9d9ee048 Adds basic Z80 state. 2020-05-13 20:15:22 -04:00
Thomas Harte
e4335577ca Merge pull request #792 from TomHarte/BIOSFreeMasterSystem
Ensures the Master System makes a genuine attempt to boot sans BIOS
2020-05-12 22:35:17 -04:00
Thomas Harte
66c2eb0414 Further tightens const and constexpr usage. 2020-05-12 22:22:21 -04:00
Thomas Harte
f82e4ee923 Makes additional minor const improvements. 2020-05-12 00:31:16 -04:00
Thomas Harte
b62ee33318 Improves constness of Joystick interface. 2020-05-12 00:19:48 -04:00
Thomas Harte
8596a9826f Whether the BIOS is available in hardware is now decided entirely based on whether it is on disk. 2020-05-12 00:11:46 -04:00
Thomas Harte
3f2fb1fa58 Merge pull request #790 from ajacocks/master
Create RPM package and man page
2020-05-11 13:06:47 -04:00
Alexander Jacocks
5f39938a19 add Ansible build playbook to create RPM package for clksignal and create basic man page 2020-05-11 00:52:51 -04:00
Thomas Harte
d964ebd4c1 Merge pull request #789 from TomHarte/OPLLDrums
Softens OPLL tremolo and vibrato; adds drum damping.
2020-05-10 15:51:34 -04:00
Thomas Harte
9458963311 Factors out shift by 7. 2020-05-10 13:57:50 -04:00
Thomas Harte
44690b1066 Halves effect of vibrato. 2020-05-10 12:05:14 -04:00
Thomas Harte
c41028cdc7 Adds further exposition. 2020-05-10 00:44:03 -04:00
Thomas Harte
64c62c16fb Adjusts tremolo scale. 2020-05-10 00:43:46 -04:00
Thomas Harte
afef4f05fe Adds damping and phase resets for the rhythm section. 2020-05-10 00:10:51 -04:00
Thomas Harte
fc0f290c85 Merge pull request #788 from TomHarte/ConstFun
Cleans up a variety of dangling issues.
2020-05-09 23:57:22 -04:00
Thomas Harte
81d70ee325 Adds in a few further consts. 2020-05-09 23:49:37 -04:00
Thomas Harte
6dc7a4471d Removes unused .cpp file. 2020-05-09 23:43:05 -04:00
Thomas Harte
fcb8bd00b6 Adds further costs. 2020-05-09 23:42:42 -04:00
Thomas Harte
05c3f2a30d Adds some further `costs. 2020-05-09 23:03:33 -04:00
Thomas Harte
25996ce180 Further doubles down on construction syntax for type conversions. 2020-05-09 23:00:39 -04:00
Thomas Harte
3729bddb2a Farewell, BestEffortUpdater. 2020-05-09 21:48:04 -04:00
Thomas Harte
4136428db3 Removes dead StandardOptions.cpp. 2020-05-09 21:35:15 -04:00
Thomas Harte
31c6faf3c8 Adds a bunch of consts. 2020-05-09 21:23:52 -04:00
Thomas Harte
5c1ae40a9c Merge pull request #783 from TomHarte/OPL2
Adds provisional OPLL emulation.
2020-05-09 18:28:03 -04:00
Thomas Harte
4c6d0f7fa0 Corrects SConstruct; applies default initialisation in Struct.cpp. 2020-05-09 18:11:50 -04:00
Thomas Harte
40b60fe5d4 Renames folder as per intended scope. 2020-05-09 18:04:11 -04:00
Thomas Harte
eed357abb4 Introduces concept of 'average peak volume' in order better to normalise audio sources like the OPLL. 2020-05-09 17:57:21 -04:00
Thomas Harte
8f541602c1 Moves modulator updates a sample behind operator updates. 2020-05-08 21:14:25 -04:00
Thomas Harte
668f4b77f3 Implements feedback. 2020-05-08 21:05:23 -04:00
Thomas Harte
303965fbb8 Removes the crutch of my first-attempt implementation. 2020-05-08 20:53:34 -04:00
Thomas Harte
792aed242d Fixes the use-sustain flag. 2020-05-08 20:49:39 -04:00
Thomas Harte
dc5654b941 Attempts to implement the proper attack phase.
It's sounding pretty good now, but for sustain.
2020-05-08 18:59:05 -04:00
Thomas Harte
e51e2425cc Attempts to implement decay and release the right way around and with full precision.
Higher numbers = decay/release more quickly, not more slowly.
2020-05-08 18:40:49 -04:00
Thomas Harte
95c6b9b55d Declare proper envelope precision. 2020-05-08 17:58:50 -04:00
Thomas Harte
ea25ead19d Ensures rhythm envelope generators don't pick up should_damp state. 2020-05-08 00:18:31 -04:00
Thomas Harte
24100ec3b0 Switches snare and high-hat envelope generators. 2020-05-08 00:08:14 -04:00
Thomas Harte
32437fbf8b Attempts to use the proper rhythm mode envelope generators. 2020-05-07 23:56:15 -04:00
Thomas Harte
5219a86a41 In principle fully implements rhythm mode. 2020-05-07 23:38:51 -04:00
Thomas Harte
e12dc5d894 Reduce the amount of time spent installing instruments. 2020-05-06 00:15:28 -04:00
Thomas Harte
75315406bb Ensure all channels begin in 'release' phase, which is currently code for 'off' in conjunction with attenuation of 511. 2020-05-06 00:13:01 -04:00
Thomas Harte
ea42fe638a Corrects channel attenuation and carrier sustain level settings. 2020-05-05 23:41:15 -04:00
Thomas Harte
744211cec0 Ensures rhythm instruments are installed. 2020-05-05 23:13:13 -04:00
Thomas Harte
1a4321d7d0 Attempts better to balance attenuations. 2020-05-05 22:14:11 -04:00
Thomas Harte
b943441901 Marks up more specific TODOs.
I think I'm already much happier with this factoring.
2020-05-05 00:35:03 -04:00
Thomas Harte
0505b82384 Restores top bit of channel period, propagates it to the envelope generator. 2020-05-05 00:28:24 -04:00
Thomas Harte
c9fb5721cd Makes first attempt to reintroduce full-melodic output. 2020-05-05 00:16:45 -04:00
Thomas Harte
386a7ca442 Continues doing away with the attempt heavily to interleave the OPLL and OPL2, creating a new OPLL class. 2020-05-04 21:14:51 -04:00
Thomas Harte
e929d5d819 Ensures proper dereferencing of the std::optional. 2020-05-03 21:57:15 -04:00
Thomas Harte
94614ae4c3 Shifts the LFO implementation inline. 2020-05-03 21:44:22 -04:00
Thomas Harte
1223c99e0f Adds waveform generation logic to the new factoring. 2020-05-03 21:38:20 -04:00
Thomas Harte
1ff5ea0a6e Adds KeyLevelScaler, implements EnvelopeGenerator, adds reset to PhaseGenerator. 2020-05-03 16:24:55 -04:00
Thomas Harte
9d2691d1d2 Taking it as given that outstanding deficiencies are mostly due to poor design, starts breaking out the envelope and phase generators. 2020-05-01 23:46:42 -04:00
Thomas Harte
e4ef2c68bb Feeds through drum volume levels. 2020-04-30 19:35:09 -04:00
Thomas Harte
7fffafdfd4 Wires the high-hat through, possibly incorrectly. 2020-04-29 22:44:15 -04:00
Thomas Harte
5896288edd Adapts to new interface. 2020-04-29 22:08:36 -04:00
Thomas Harte
c4135fad2b Attempts completely to decouple updates and audio outputs. 2020-04-29 22:07:40 -04:00
Thomas Harte
1f34214fb3 Imagines a future of being able to boot into the BIOS. 2020-04-29 22:07:20 -04:00
Thomas Harte
f899af0eef Fixes OPL tests. 2020-04-28 20:17:16 -04:00
Thomas Harte
9f0c8bcae7 Attempts to add the missing noise generators. I think I may still be astray on volumes. 2020-04-26 15:51:33 -04:00
Thomas Harte
2bc36a6cde Eliminates branch within snare output. 2020-04-26 00:21:15 -04:00
Thomas Harte
ee10fe3d2c Fully separates updates and outputs in operators; takes a shot at the snare. 2020-04-26 00:18:09 -04:00
Thomas Harte
a424e867f9 Continues factoring this apart, albeit with a decision on whether to retain update-and-output still pending. 2020-04-25 23:07:40 -04:00
Thomas Harte
f52b40396a Re-ups output level.
Though it's still quiet compared to the SN.
2020-04-25 23:07:06 -04:00
Thomas Harte
cd2ab70a58 Moves the LFSR to the LowFrequencyOscillator.
Possibly I should come up with a better name for that?
2020-04-25 22:21:42 -04:00
Thomas Harte
a5d1941d28 Adds necessary standalone #imports; makes safe for signed types. 2020-04-25 22:21:10 -04:00
Thomas Harte
65a3783dd2 Attempts the tom tom. 2020-04-25 19:21:55 -04:00
Thomas Harte
b9b5c2a3bc Takes a first run at proper slot mixing and the bass drum. 2020-04-25 18:01:05 -04:00
Thomas Harte
12c618642e Corrects output range. 2020-04-25 00:07:58 -04:00
Thomas Harte
6ebc93c995 Switches to maximum-rate multiplexing. Hopefully to eliminate the mixer as a consideration for now. 2020-04-24 23:50:06 -04:00
Thomas Harte
6d4e29c851 Strips mixer back to basics in search of audio issues. 2020-04-24 23:32:02 -04:00
Thomas Harte
b3979e2fda Looking towards rhythm mode, and in search of bugs: factors out ADSR.
Further factorings to come.
2020-04-24 18:48:32 -04:00
Thomas Harte
983c32bf75 Adds vibrato.
This would complete melodic output, subject to bug fixes.
2020-04-24 18:02:41 -04:00
Thomas Harte
9e3614066a Adds tremolo support, switches to global timer for ADSR stages other than attack. 2020-04-23 23:55:49 -04:00
Thomas Harte
c7ad6b1b50 Minor layout and commenting improvements. 2020-04-21 23:35:48 -04:00
Thomas Harte
676dcf7fbb Calculates the proper key scale rate, though ADSR itself is still lacking that precision. 2020-04-21 22:57:56 -04:00
Thomas Harte
50d725330c Adds missing header. 2020-04-21 22:48:52 -04:00
Thomas Harte
2886dd1dae Collapses key-level scaling to a single 2d table.
I dare imagine I can do better; the columns in particular look like arithmetic progressions.
2020-04-21 20:19:02 -04:00
Thomas Harte
40424ac38b Re-enables key-level scaling, with 3db and 1.5db the correct way around. 2020-04-21 20:10:40 -04:00
Thomas Harte
a4d3865394 Decreases sustain level attenuation; disables key-level scaling for now.
The latter was definitely wrong, I also think I don't need the big four tables.
2020-04-21 19:58:40 -04:00
Thomas Harte
0ac99e8d42 Disables low low-pass filter, honours audio control bits for better volume usage. 2020-04-21 19:57:13 -04:00
Thomas Harte
bdce1c464a Takes a shot at key-level scaling. Testing to come. 2020-04-21 00:09:42 -04:00
Thomas Harte
475d75c16a Preserves fractional part of modulator phase. 2020-04-20 23:35:37 -04:00
Thomas Harte
32fd1897d0 Via a unit test, confirms and fixes relative volumes of OPLL channels.
Also rejigs responsibility for scaling to emulator-standard volume.
2020-04-20 23:17:29 -04:00
Thomas Harte
39e6a28730 Rearranges file. 2020-04-20 19:41:04 -04:00
Thomas Harte
3852e119aa Adds test data for FM wave generation. 2020-04-20 19:33:03 -04:00
Thomas Harte
f19fd7c166 Pulls out common melodic update calls. 2020-04-20 18:58:31 -04:00
Thomas Harte
100fddcee1 Corrects divider, takes another whack at ADSR. 2020-04-20 18:58:10 -04:00
Thomas Harte
99fa86a67e Adds a test for lookup sine. And fixes lookup sine. 2020-04-20 18:40:47 -04:00
Thomas Harte
6568c29c54 Improves commentary. 2020-04-19 22:42:25 -04:00
Thomas Harte
c54bbc5a04 Rename Table.h; LogSin -> LogSign and make it a bit more typer. 2020-04-19 13:33:17 -04:00
Thomas Harte
92d0c466c2 Moves complete phase -> output calculation inside Operator.
Reasoning being: otherwise I wasn't currently enforcing non-sine waveforms.
2020-04-19 13:27:24 -04:00
Thomas Harte
020c760976 Simplifies the phase counter. 2020-04-19 00:30:14 -04:00
Thomas Harte
cdfd7de221 Minor: enables all melodic channels when rhythm mode is disabled; supports non-modulated channels. 2020-04-18 17:48:29 -04:00
Thomas Harte
3da2e91acf Adjusts range of output, makes declaration of level full owner of type information. 2020-04-17 23:29:09 -04:00
Thomas Harte
3948304172 Attempts to use table-based maths. 2020-04-17 23:23:16 -04:00
Thomas Harte
4a295cd95e Wraps log_sin in an access function to enshrine sign and mask rules; switches both functions to non-math.h clashing names. 2020-04-17 23:22:42 -04:00
Thomas Harte
6f7c8b35c5 Applies an ahead-of-time transformation to the exp table, and wraps it in a helper function. 2020-04-17 22:33:13 -04:00
Thomas Harte
e58ba27c00 Clarifies meaning of scaling. Though it isn't yet applied. 2020-04-17 22:30:10 -04:00
Thomas Harte
0aceddd088 Starts tidying up the OPL2.
This is as a precursor to switching to using the proper table lookups, which I hope will automatically fix my range issues.
2020-04-15 22:10:50 -04:00
Thomas Harte
30ff399218 With some fixes for scale, I think possibly this is close for melodic channels. 2020-04-15 21:27:27 -04:00
Thomas Harte
a7e63b61eb Just from printing numbers: corrects transition from attack to decay. 2020-04-15 00:26:01 -04:00
Thomas Harte
b13b0d9311 Starts towards implementing some OPL test cases. 2020-04-14 23:51:45 -04:00
Thomas Harte
d8380dc3e2 Tries to be a little neater in spelling out the work here.
I think I'm somewhat circling here now; I need to think of a way of getting clean comparison data.
2020-04-14 21:55:42 -04:00
Thomas Harte
d805e9a8f0 Actually, octave probably works this way around? Higher octaves = higher frequencies. 2020-04-14 21:39:12 -04:00
Thomas Harte
aa45142728 Endeavours to fix attenuation and add FM synthesis.
I now definitely think my frequency counting is wrong.
2020-04-14 18:32:06 -04:00
Thomas Harte
09d1aed3a5 Attempts to voice the current attenuation (and, therefore, the ADSR output), even if linearly rather than logarithmically. 2020-04-13 22:12:55 -04:00
Thomas Harte
a1f80b5142 Takes a stab at per-operator ADSR.
Heavy caveats apply: no KSR is applied, non-ADSR attenuation isn't applied, attenuation isn't voiced in general.
2020-04-13 21:39:06 -04:00
Thomas Harte
cb1970ebab Switch to more compact form of output for bool.
This also will hopefully deal with GCC's slightly confused claim that 'value' may be used without having been initialised down at #define OutputIntC (i.e. after it's out of scope, but I can sort of see why GCC might get confused while it remains in scope).
2020-04-12 14:40:32 -04:00
Thomas Harte
d3fbdba77c Add missing #include. 2020-04-12 14:20:02 -04:00
Thomas Harte
632d797c9d Adjusts frequency formula. This could be close.
I guess next I need to get ADSR/volume in general working, before I can go FM? Then I'll worry about using the proper log-sin/exp tables.
2020-04-12 14:15:09 -04:00
Thomas Harte
559a2d81c1 Baby step: starts trying to output the raw FM carrier, no modulation, no ADSR. 2020-04-12 12:46:40 -04:00
Thomas Harte
7a5f23c0a5 Adds accommodations for the OPLL. 2020-04-10 22:05:22 -04:00
Thomas Harte
84b115f15f Attempts to move forward in defining what the parts of an OPL are meant to do. 2020-04-10 19:13:52 -04:00
Thomas Harte
a0d14f4030 Starts trying to make sense of the various fields at play. 2020-04-08 23:15:44 -04:00
Thomas Harte
dd6769bfbc Splits OPLL and OPL2 classes.
Logic is: they have different mixers (additive in the OPL2, time-division multiplexing in the OPLL) as well as different register sets. So I'll put operator and channel logic directly into those structs.
2020-04-07 23:15:26 -04:00
Thomas Harte
027af5acca Allow LFSR to be instantiated with a given value. 2020-04-05 22:58:09 -04:00
Thomas Harte
db4b71fc9a Adds correct LSFR, something of OPLL -> OPL2 logic. 2020-04-05 22:57:53 -04:00
Thomas Harte
d9e41d42b5 Adds the OPL2 to SConstruct. 2020-04-05 21:34:19 -04:00
Thomas Harte
0ed7d257e1 Add some extra notes, implement correct mapping to only 18 operators. Not 22. 2020-04-05 14:32:55 -04:00
Thomas Harte
335a68396f Attempts to complete OPL2 register decoding. 2020-04-04 23:39:09 -04:00
Thomas Harte
84cdf6130f Starts at least trying to decode OPL2 register writes. 2020-04-04 23:29:25 -04:00
Thomas Harte
b0abc4f7bb Implements enough wiring that the Master System will instantiate and talk to an OPLL. 2020-04-03 20:05:36 -04:00
Thomas Harte
ab81d1093d Merge pull request #782 from TomHarte/6502Tidy
Makes `State`, and therefore the 'Reflection' dependency, an optional adjunct to the 6502.
2020-04-02 20:49:18 -04:00
Thomas Harte
e4d4e4e002 Adds 6502 State to the SConstruct file.
On the assumption I'll actually use it at some point.
2020-04-02 19:16:22 -04:00
Thomas Harte
cc357a6afa Removes boilerplate from header. 2020-04-02 19:15:57 -04:00
Thomas Harte
dfc1c7d358 Separates 6502 State object to make it optional.
Also makes a few minor const improvements while I'm poking around.
2020-04-02 19:11:27 -04:00
Thomas Harte
7ed8e33622 Eliminates unused 6502 counter. 2020-04-02 18:49:28 -04:00
Thomas Harte
474822e83d Merge pull request #781 from TomHarte/NoMoreCRTMachine
Splits 'CRTMachine' into three parts: ScanProducer, AudioProducer, TimedMachine.
2020-04-02 09:46:54 -04:00
Thomas Harte
fe3942c5b3 Updates comments. 2020-04-01 23:49:07 -04:00
Thomas Harte
f417fa82a4 Splits 'CRTMachine' into three parts: ScanProducer, AudioProducer, TimedMachine.
Simultaneously cleans up some of the naming conventions and tries to make things a bit more template-compatible.
2020-04-01 23:19:34 -04:00
Thomas Harte
c4b114133a Merge pull request #779 from TomHarte/6502State
Provisionally adds `State` and `get/set_state` to the 6502.
2020-03-31 21:05:29 -04:00
Thomas Harte
2f4b0c2b9a Removes non-functional assert. 2020-03-30 21:48:07 -04:00
Thomas Harte
a491650c8b Adds safety asserts. 2020-03-30 21:39:31 -04:00
Thomas Harte
6805acd74f Adds padding for all integer types. 2020-03-30 00:31:25 -04:00
Thomas Harte
95c68c76e1 Corrects use of StructImpl. 2020-03-30 00:27:40 -04:00
Thomas Harte
60aa383c95 Makes a not-quite-correct attempt at a .description for reflective structs. 2020-03-30 00:24:49 -04:00
Thomas Harte
edc553fa1d Removes duplicative 'register'. 2020-03-29 22:58:00 -04:00
Thomas Harte
4f2ebad8e0 Takes a shot a set_state. 2020-03-29 22:50:30 -04:00
Thomas Harte
1810ef60be Adds --fix-missing in the hope of catching more issues automatically. 2020-03-29 18:41:30 -04:00
Thomas Harte
f720a6201b Adds explicit type cast. 2020-03-29 18:36:57 -04:00
Thomas Harte
cfb75b58ca Pulls all 6502 MicroOp sequences into the main operations_ table.
This will make state restoration somewhat more tractable.
2020-03-29 18:36:41 -04:00
Thomas Harte
4fbe983527 Provisionally adds State and get_state to the 6502.
`set_state` may be a little more complicated, requiring a way to advance in single-cycle steps **without applying bus accesses**.
2020-03-28 00:33:27 -04:00
Thomas Harte
272383cac7 Merge pull request #778 from TomHarte/AppleIIDisks
Resolves a potential crash with NIB files
2020-03-25 21:52:26 -04:00
Thomas Harte
39380c63cb Throws in some consts. 2020-03-25 21:25:50 -04:00
Thomas Harte
ea26f4f7bf Eliminates test code, adds a caveat. 2020-03-25 21:22:30 -04:00
Thomas Harte
5fd2be3c8e Makes a genuine attempt at five and three decoding. 2020-03-25 20:50:26 -04:00
Thomas Harte
2320b5c1fe Takes some steps towards five-and-three decoding.
Now I 'just' need to figure out how bits are distributed within the decoded sector. The XORing and data checksum seem the same (?)
2020-03-25 00:15:31 -04:00
Thomas Harte
e5cbdfc67c It turns out that 5-and-3 disks have a different header prologue. 2020-03-24 21:59:55 -04:00
Thomas Harte
894d196b64 Avoids massive overallocation where sync blocks overlap the index hole. 2020-03-24 21:34:33 -04:00
Thomas Harte
af037649c3 Merge pull request #777 from TomHarte/ShowCRCs
Show CRC32s of missing ROMs.
2020-03-23 21:33:10 -04:00
Thomas Harte
cfca3e2507 Adds missing header for std::setw, std::set fill. 2020-03-23 21:26:50 -04:00
Thomas Harte
7a12a0149a Ensures BIOS is really not paged if not loaded. 2020-03-23 20:00:31 -04:00
Thomas Harte
fcdc1bfbd0 Prints the CRC32(s) of any missing ROMs. 2020-03-23 20:00:13 -04:00
Thomas Harte
d1d14ba9a0 Merge pull request #775 from TomHarte/SavedVolume
Ensures the macOS version retains volume.
2020-03-23 00:18:51 -04:00
Thomas Harte
0e502f6d5c Ensures the macOS version retains volume. 2020-03-23 00:10:56 -04:00
Thomas Harte
d3bac57d6a Merge pull request #774 from TomHarte/VolumeControl
Adds output volume control.
2020-03-22 21:23:49 -04:00
Thomas Harte
bd1b4b8a9f Increases volume fade-out speed. 2020-03-22 21:13:55 -04:00
Thomas Harte
38d81c394f Switches OSAtomics to stdatomics. The former were deprecated by macOS 10.12. 2020-03-22 21:11:04 -04:00
Thomas Harte
72103a4adb Corrects execution cap for splitAndSync ticks. 2020-03-22 19:25:02 -04:00
Thomas Harte
e6bae261c4 Ensures volume controls appear for mouse-capture machines when not capturing. 2020-03-22 19:06:38 -04:00
Thomas Harte
5edb0c0ee7 Adds animated fade-out to volume control. Bumps macOS version to 10.12.2. 2020-03-22 18:45:24 -04:00
Thomas Harte
442ce403f9 It's a bit jarring, but ensures volume control shows and hides according to mouse cursor. 2020-03-22 16:25:07 -04:00
Thomas Harte
7398cb44e2 Adds a functioning volume control for macOS, it just doesn't know how to hide yet. 2020-03-22 13:24:23 -04:00
Thomas Harte
15d54dfb4c Adds 'volume' command-line parameter for kiosk mode. 2020-03-21 22:24:31 -04:00
Thomas Harte
9087bb9b08 Allows audio volume to be set. 2020-03-21 22:00:47 -04:00
Thomas Harte
0c689e85a5 Use screen number for spotting screen changes.
NSScreen implements Swift Equatable but doesn't seem officially to implement -isEqual:.
2020-03-21 17:01:57 -04:00
Thomas Harte
75f2b0487e Merge pull request #773 from TomHarte/MacCrashAgain
Ensures proper NSScreen comparison...
2020-03-20 23:19:53 -04:00
Thomas Harte
5a1bae8a9c Ensures proper NSScreen comparison, and no never-ending setupDisplayLink loop on exit. 2020-03-20 23:00:16 -04:00
Thomas Harte
129bc485bf Merge pull request #772 from TomHarte/ReflectiveEnum
Endeavours to bring introspection to machine selection options.
2020-03-19 23:30:19 -04:00
Thomas Harte
69277bbb27 Renames files to match project convention. 2020-03-19 23:24:06 -04:00
Thomas Harte
b8b335f67d Exposes the Master System's region for SDL selection. 2020-03-19 21:46:42 -04:00
Thomas Harte
eef7868199 Ensures 'new' overrides default selection; doesn't try to propagate multiple files if machines won't take them. 2020-03-19 21:15:38 -04:00
Thomas Harte
23aa7ea85f Revives MultiConfigurable. 2020-03-19 21:02:14 -04:00
Thomas Harte
c1b69fd091 Attempts to support multiple pieces of media on the SDL command line, ensures proper window titling. 2020-03-19 20:40:43 -04:00
Thomas Harte
7ab7efdbc1 Ensures consistent ordering. 2020-03-19 19:41:50 -04:00
Thomas Harte
b8ebdc012f Ensure normative construction declaration ordering. 2020-03-19 18:58:36 -04:00
Thomas Harte
9995d776de Attempts to fix the macOS version, plus some implicit type conversions. 2020-03-18 23:29:09 -04:00
Thomas Harte
c6f35c9aac Rejigs help output. 2020-03-18 23:11:25 -04:00
Thomas Harte
615ea2f573 Applies parsed arguments. 2020-03-18 22:31:32 -04:00
Thomas Harte
311458f41f Restores Macintosh 'runtime' options.
Also cleans up some leftover parts elsewhere.
2020-03-18 21:50:02 -04:00
Thomas Harte
b2a381d401 Restores Vic-20 runtime options. 2020-03-18 20:23:55 -04:00
Thomas Harte
ffc1b0ff29 Reintroduces Oric runtime options. 2020-03-18 18:31:31 -04:00
Thomas Harte
ead2823322 Reintroduces MSX and Master System runtime options. 2020-03-18 18:26:22 -04:00
Thomas Harte
a7e1920597 Restores ColecoVision runtime options. 2020-03-18 00:06:52 -04:00
Thomas Harte
ec6664f590 Takes steps to guarantee property naming; reintroduces Electron runtime options. 2020-03-17 23:52:55 -04:00
Thomas Harte
8c6ca89da2 Restores runtime options for the Acorn Electron. 2020-03-17 22:06:20 -04:00
Thomas Harte
b6e81242e7 Reintroduces Apple II runtime options. 2020-03-17 21:53:26 -04:00
Thomas Harte
f9ca443667 Adds the ability for reflective structs to limit the permitted values to enumerated properties. 2020-03-17 21:44:04 -04:00
Thomas Harte
394ee61c78 Starts a switch to reflectable-style runtime options.
The Amstrad CPC and ZX80/81 have made the jump so far, subject to caveats. The macOS build is unlikely currently to work properly.
2020-03-16 23:25:05 -04:00
Thomas Harte
1d40aa687e Adds necessary include for unique_ptr. 2020-03-15 23:52:24 -04:00
Thomas Harte
8e3bf0dbca Starts moving towards a Deflectable-based system of runtime options. 2020-03-15 23:48:53 -04:00
Thomas Harte
2031a33edf Technically SDL users can now start a new machine.
Missing though: all the old per-machine command-line options, and any control over the new one.
2020-03-15 21:50:43 -04:00
Thomas Harte
fc3d3c76f8 Edges further towards providing enough information for dynamic user-provided machine creation. 2020-03-15 12:54:55 -04:00
Thomas Harte
880bed04f5 Adds AllMachines, rounds out ConstructionOptionsByMachineName. 2020-03-15 00:15:19 -04:00
Thomas Harte
f9c8470b20 Ensure targets always nominate a machine. 2020-03-15 00:13:38 -04:00
Thomas Harte
36acc2dddd Add necessary include for std::find. 2020-03-14 00:22:23 -04:00
Thomas Harte
a59963b6a0 Adds necessary header for memcpy. 2020-03-14 00:17:58 -04:00
Thomas Harte
cab4bead72 Promotes explicit specialisations to namespace scope. 2020-03-13 23:38:29 -04:00
Thomas Harte
1a2872c815 Starts to build an easy set interface. 2020-03-13 22:42:37 -04:00
Thomas Harte
f27e0a141d Sketches but doesn't implement an interface for serialisation. 2020-03-13 20:16:36 -04:00
Thomas Harte
52f644c4f1 Ensures that reflection is completely blind; starts adding SDL instantiation logic. 2020-03-12 20:56:02 -04:00
Thomas Harte
06c08a0574 Merge branch 'ReflectiveEnum' of github.com:TomHarte/CLK into ReflectiveEnum 2020-03-11 23:30:27 -04:00
Thomas Harte
724e2e6d27 Withdraws ability to select an integer size for ReflectableEnums.
It isn't that useful, and this'll help if/when I get to serialisation.
2020-03-11 23:28:38 -04:00
Thomas Harte
fd052189ca Adds reflection to all of the other computer targets. 2020-03-11 23:25:29 -04:00
Thomas Harte
044a2b67e1 Beefs up documentation on this miniature sort-of reflection. 2020-03-11 23:03:05 -04:00
Thomas Harte
7e8b86e9bb Attempts to flesh out Reflection::Enum. 2020-03-11 23:03:05 -04:00
Thomas Harte
ce80825abb Starts working towards a registration-based model of reflective enums. 2020-03-11 23:03:05 -04:00
Thomas Harte
a99bb3ba6d Switches to class storage. 2020-03-11 23:03:05 -04:00
Thomas Harte
3428e9887d Starts experimenting with declared reflection. 2020-03-11 23:03:05 -04:00
Thomas Harte
5a8fcac4dc Gives function overloading a try. 2020-03-11 23:03:05 -04:00
Thomas Harte
6a9b14f7d1 Adds a prototype reflective enum.
I need to make this scopeable before it is acceptable.
2020-03-11 23:03:05 -04:00
Thomas Harte
a74d8bd6e8 Merge pull request #771 from TomHarte/MacShutdownRace
Ensure race condition workaround is applied for all CVDisplayLinkStops.
2020-03-11 22:47:17 -04:00
Thomas Harte
3c70f056ed Ensure race condition workaround is applied for all CVDisplayLinkStops.
This also centralises the workaround, the better for replacing it when I discover a safer alternative.
2020-03-11 22:09:36 -04:00
Thomas Harte
a546880a65 Beefs up documentation on this miniature sort-of reflection. 2020-03-11 22:06:16 -04:00
Thomas Harte
238145f27f Attempts to flesh out Reflection::Enum. 2020-03-10 23:36:52 -04:00
Thomas Harte
0502e6be67 Starts working towards a registration-based model of reflective enums. 2020-03-10 22:32:55 -04:00
Thomas Harte
6a8c6f5a06 Switches to class storage. 2020-03-10 22:32:55 -04:00
Thomas Harte
5248475e73 Starts experimenting with declared reflection. 2020-03-10 22:32:55 -04:00
Thomas Harte
d6c6b9bdb8 Gives function overloading a try. 2020-03-10 22:32:55 -04:00
Thomas Harte
7bf04d5338 Adds a prototype reflective enum.
I need to make this scopeable before it is acceptable.
2020-03-10 22:32:55 -04:00
Thomas Harte
9668ec789a Merge pull request #769 from TomHarte/SDLKeyboardAgain
Return to old SDL behaviour if --logical-keyboard isn't specified.
2020-03-09 23:18:14 -04:00
Thomas Harte
ead32fb6b2 Return to old behaviour if --logical-keyboard isn't specified.
This is at least until I'm more confident in the keypress/text input merging. Also, switches to a vector for intermediate keypresses, to ensure order is retained even if timestamps are absent.
2020-03-09 23:10:39 -04:00
Thomas Harte
fbe479c43f Switch to saving screenshots to the desktop.
Or, at least, try. User permission would be required. More reading necessary.
2020-01-26 17:36:16 -05:00
Thomas Harte
45a391d69e Increases quantity of annotations.
I'm now at almost 500 lines, and I haven't even really written anything yet.
2019-12-18 22:57:12 -05:00
Thomas Harte
15bc18b64f Merge branch 'master' into FurtherSCC 2019-12-18 22:17:10 -05:00
Thomas Harte
fb0343cafb Merge branch 'FurtherSCC' of github.com:TomHarte/CLK into FurtherSCC 2019-12-17 22:39:49 -05:00
Thomas Harte
7d9bedf7de Merge branch 'master' into FurtherSCC 2019-12-17 22:39:39 -05:00
Thomas Harte
6c99048211 Copies in a few more hardware notes. 2019-10-02 19:18:09 -04:00
Thomas Harte
2638a901d9 Improves documentation of existing degree of implementation. 2019-09-30 21:36:37 -04:00
Thomas Harte
71083fd0f7 Improves documentation of existing degree of implementation. 2019-09-29 22:08:16 -04:00
761 changed files with 3512495 additions and 13367 deletions

13
.github/FUNDING.yml vendored Normal file
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@@ -0,0 +1,13 @@
# These are supported funding model platforms
github: # Replace with up to 4 GitHub Sponsors-enabled usernames e.g., [user1, user2]
patreon: # Replace with a single Patreon username
open_collective: # Replace with a single Open Collective username
ko_fi: # Replace with a single Ko-fi username
tidelift: # Replace with a single Tidelift platform-name/package-name e.g., npm/babel
community_bridge: # Replace with a single Community Bridge project-name e.g., cloud-foundry
liberapay: # Replace with a single Liberapay username
issuehunt: # Replace with a single IssueHunt username
otechie: # Replace with a single Otechie username
custom: ['https://www.amazon.com/hz/wishlist/ls/8WPVFLQQDPTA']
# Replace with up to 4 custom sponsorship URLs e.g., ['link1', 'link2']

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@@ -1,22 +1,16 @@
name: SDL/Ubuntu
on:
push:
branches:
- master
pull_request:
branches:
- master
on: [push, pull_request]
jobs:
build:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v1
- uses: actions/checkout@v2
- name: Install dependencies
run: sudo apt-get --allow-releaseinfo-change update; sudo apt-get install libsdl2-dev scons
run: sudo apt-get --allow-releaseinfo-change update && sudo apt-get --fix-missing install libsdl2-dev scons
- name: Make
run: cd OSBindings/SDL; scons
working-directory: OSBindings/SDL
run: scons -j$(nproc --all)

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@@ -23,14 +23,23 @@ namespace Activity {
*/
class Observer {
public:
/// Provides hints as to the sort of information presented on an LED.
enum LEDPresentation: uint8_t {
/// This LED informs the user of some sort of persistent state, e.g. scroll lock.
/// If this flag is absent then the LED describes an ephemeral state, such as media access.
Persistent = (1 << 0),
};
/// Announces to the receiver that there is an LED of name @c name.
virtual void register_led(const std::string &name) {}
virtual void register_led([[maybe_unused]] const std::string &name, [[maybe_unused]] uint8_t presentation = 0) {}
/// Announces to the receiver that there is a drive of name @c name.
virtual void register_drive(const std::string &name) {}
///
/// If a drive has the same name as an LED, that LED goes with this drive.
virtual void register_drive([[maybe_unused]] const std::string &name) {}
/// Informs the receiver of the new state of the LED with name @c name.
virtual void set_led_status(const std::string &name, bool lit) {}
virtual void set_led_status([[maybe_unused]] const std::string &name, [[maybe_unused]] bool lit) {}
enum class DriveEvent {
StepNormal,
@@ -39,10 +48,10 @@ class Observer {
};
/// Informs the receiver that the named event just occurred for the drive with name @c name.
virtual void announce_drive_event(const std::string &name, DriveEvent event) {}
virtual void announce_drive_event([[maybe_unused]] const std::string &name, [[maybe_unused]] DriveEvent event) {}
/// Informs the receiver of the motor-on status of the drive with name @c name.
virtual void set_drive_motor_status(const std::string &name, bool is_on) {}
virtual void set_drive_motor_status([[maybe_unused]] const std::string &name, [[maybe_unused]] bool is_on) {}
};
}

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@@ -11,20 +11,20 @@
using namespace Analyser::Dynamic;
float ConfidenceCounter::get_confidence() {
return static_cast<float>(hits_) / static_cast<float>(hits_ + misses_);
return float(hits_) / float(hits_ + misses_);
}
void ConfidenceCounter::add_hit() {
hits_++;
++hits_;
}
void ConfidenceCounter::add_miss() {
misses_++;
++misses_;
}
void ConfidenceCounter::add_equivocal() {
if(hits_ > misses_) {
hits_++;
misses_++;
++hits_;
++misses_;
}
}

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@@ -35,8 +35,8 @@ class ConfidenceSummary: public ConfidenceSource {
float get_confidence() final;
private:
std::vector<ConfidenceSource *> sources_;
std::vector<float> weights_;
const std::vector<ConfidenceSource *> sources_;
const std::vector<float> weights_;
float weight_sum_;
};

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@@ -1,94 +0,0 @@
//
// MultiCRTMachine.cpp
// Clock Signal
//
// Created by Thomas Harte on 29/01/2018.
// Copyright 2018 Thomas Harte. All rights reserved.
//
#include "MultiCRTMachine.hpp"
#include <condition_variable>
#include <mutex>
using namespace Analyser::Dynamic;
MultiCRTMachine::MultiCRTMachine(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines, std::recursive_mutex &machines_mutex) :
machines_(machines), machines_mutex_(machines_mutex), queues_(machines.size()) {
speaker_ = MultiSpeaker::create(machines);
}
void MultiCRTMachine::perform_parallel(const std::function<void(::CRTMachine::Machine *)> &function) {
// Apply a blunt force parallelisation of the machines; each run_for is dispatched
// to a separate queue and this queue will block until all are done.
volatile std::size_t outstanding_machines;
std::condition_variable condition;
std::mutex mutex;
{
std::lock_guard<decltype(machines_mutex_)> machines_lock(machines_mutex_);
std::lock_guard<std::mutex> lock(mutex);
outstanding_machines = machines_.size();
for(std::size_t index = 0; index < machines_.size(); ++index) {
CRTMachine::Machine *crt_machine = machines_[index]->crt_machine();
queues_[index].enqueue([&mutex, &condition, crt_machine, function, &outstanding_machines]() {
if(crt_machine) function(crt_machine);
std::lock_guard<std::mutex> lock(mutex);
outstanding_machines--;
condition.notify_all();
});
}
}
std::unique_lock<std::mutex> lock(mutex);
condition.wait(lock, [&outstanding_machines] { return !outstanding_machines; });
}
void MultiCRTMachine::perform_serial(const std::function<void (::CRTMachine::Machine *)> &function) {
std::lock_guard<decltype(machines_mutex_)> machines_lock(machines_mutex_);
for(const auto &machine: machines_) {
CRTMachine::Machine *const crt_machine = machine->crt_machine();
if(crt_machine) function(crt_machine);
}
}
void MultiCRTMachine::set_scan_target(Outputs::Display::ScanTarget *scan_target) {
scan_target_ = scan_target;
CRTMachine::Machine *const crt_machine = machines_.front()->crt_machine();
if(crt_machine) crt_machine->set_scan_target(scan_target);
}
Outputs::Display::ScanStatus MultiCRTMachine::get_scan_status() const {
CRTMachine::Machine *const crt_machine = machines_.front()->crt_machine();
if(crt_machine) crt_machine->get_scan_status();
return Outputs::Display::ScanStatus();
}
Outputs::Speaker::Speaker *MultiCRTMachine::get_speaker() {
return speaker_;
}
void MultiCRTMachine::run_for(Time::Seconds duration) {
perform_parallel([duration](::CRTMachine::Machine *machine) {
if(machine->get_confidence() >= 0.01f) machine->run_for(duration);
});
if(delegate_) delegate_->multi_crt_did_run_machines();
}
void MultiCRTMachine::did_change_machine_order() {
if(scan_target_) scan_target_->will_change_owner();
perform_serial([](::CRTMachine::Machine *machine) {
machine->set_scan_target(nullptr);
});
CRTMachine::Machine *const crt_machine = machines_.front()->crt_machine();
if(crt_machine) crt_machine->set_scan_target(scan_target_);
if(speaker_) {
speaker_->set_new_front_machine(machines_.front().get());
}
}

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@@ -12,6 +12,97 @@
using namespace Analyser::Dynamic;
namespace {
class MultiStruct: public Reflection::Struct {
public:
MultiStruct(const std::vector<Configurable::Device *> &devices) : devices_(devices) {
for(auto device: devices) {
options_.emplace_back(device->get_options());
}
}
void apply() {
auto options = options_.begin();
for(auto device: devices_) {
device->set_options(*options);
++options;
}
}
std::vector<std::string> all_keys() const final {
std::set<std::string> keys;
for(auto &options: options_) {
const auto new_keys = options->all_keys();
keys.insert(new_keys.begin(), new_keys.end());
}
return std::vector<std::string>(keys.begin(), keys.end());
}
std::vector<std::string> values_for(const std::string &name) const final {
std::set<std::string> values;
for(auto &options: options_) {
const auto new_values = options->values_for(name);
values.insert(new_values.begin(), new_values.end());
}
return std::vector<std::string>(values.begin(), values.end());
}
const std::type_info *type_of(const std::string &name) const final {
for(auto &options: options_) {
auto info = options->type_of(name);
if(info) return info;
}
return nullptr;
}
size_t count_of(const std::string &name) const final {
for(auto &options: options_) {
auto info = options->type_of(name);
if(info) return options->count_of(name);
}
return 0;
}
const void *get(const std::string &name) const final {
for(auto &options: options_) {
auto value = options->get(name);
if(value) return value;
}
return nullptr;
}
void *get(const std::string &name) final {
for(auto &options: options_) {
auto value = options->get(name);
if(value) return value;
}
return nullptr;
}
void set(const std::string &name, const void *value, size_t offset) final {
const auto safe_type = type_of(name);
if(!safe_type) return;
// Set this property only where the child's type is the same as that
// which was returned from here for type_of.
for(auto &options: options_) {
const auto type = options->type_of(name);
if(!type) continue;
if(*type == *safe_type) {
options->set(name, value, offset);
}
}
}
private:
const std::vector<Configurable::Device *> &devices_;
std::vector<std::unique_ptr<Reflection::Struct>> options_;
};
}
MultiConfigurable::MultiConfigurable(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines) {
for(const auto &machine: machines) {
Configurable::Device *device = machine->configurable_device();
@@ -19,46 +110,11 @@ MultiConfigurable::MultiConfigurable(const std::vector<std::unique_ptr<::Machine
}
}
std::vector<std::unique_ptr<Configurable::Option>> MultiConfigurable::get_options() {
std::vector<std::unique_ptr<Configurable::Option>> options;
// Produce the list of unique options.
for(const auto &device : devices_) {
std::vector<std::unique_ptr<Configurable::Option>> device_options = device->get_options();
for(auto &option : device_options) {
if(std::find(options.begin(), options.end(), option) == options.end()) {
options.push_back(std::move(option));
}
}
}
return options;
void MultiConfigurable::set_options(const std::unique_ptr<Reflection::Struct> &str) {
const auto options = dynamic_cast<MultiStruct *>(str.get());
options->apply();
}
void MultiConfigurable::set_selections(const Configurable::SelectionSet &selection_by_option) {
for(const auto &device : devices_) {
device->set_selections(selection_by_option);
}
}
Configurable::SelectionSet MultiConfigurable::get_accurate_selections() {
Configurable::SelectionSet set;
for(const auto &device : devices_) {
Configurable::SelectionSet device_set = device->get_accurate_selections();
for(auto &selection : device_set) {
set.insert(std::move(selection));
}
}
return set;
}
Configurable::SelectionSet MultiConfigurable::get_user_friendly_selections() {
Configurable::SelectionSet set;
for(const auto &device : devices_) {
Configurable::SelectionSet device_set = device->get_user_friendly_selections();
for(auto &selection : device_set) {
set.insert(std::move(selection));
}
}
return set;
std::unique_ptr<Reflection::Struct> MultiConfigurable::get_options() {
return std::make_unique<MultiStruct>(devices_);
}

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@@ -10,6 +10,7 @@
#define MultiConfigurable_hpp
#include "../../../../Machines/DynamicMachine.hpp"
#include "../../../../Configurable/Configurable.hpp"
#include <memory>
#include <vector>
@@ -28,10 +29,8 @@ class MultiConfigurable: public Configurable::Device {
MultiConfigurable(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines);
// Below is the standard Configurable::Device interface; see there for documentation.
std::vector<std::unique_ptr<Configurable::Option>> get_options() final;
void set_selections(const Configurable::SelectionSet &selection_by_option) final;
Configurable::SelectionSet get_accurate_selections() final;
Configurable::SelectionSet get_user_friendly_selections() final;
void set_options(const std::unique_ptr<Reflection::Struct> &options) final;
std::unique_ptr<Reflection::Struct> get_options() final;
private:
std::vector<Configurable::Device *> devices_;

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@@ -16,7 +16,7 @@ namespace {
class MultiJoystick: public Inputs::Joystick {
public:
MultiJoystick(std::vector<JoystickMachine::Machine *> &machines, std::size_t index) {
MultiJoystick(std::vector<MachineTypes::JoystickMachine *> &machines, std::size_t index) {
for(const auto &machine: machines) {
const auto &joysticks = machine->get_joysticks();
if(joysticks.size() >= index) {
@@ -25,7 +25,7 @@ class MultiJoystick: public Inputs::Joystick {
}
}
std::vector<Input> &get_inputs() final {
const std::vector<Input> &get_inputs() final {
if(inputs.empty()) {
for(const auto &joystick: joysticks_) {
std::vector<Input> joystick_inputs = joystick->get_inputs();
@@ -67,9 +67,9 @@ class MultiJoystick: public Inputs::Joystick {
MultiJoystickMachine::MultiJoystickMachine(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines) {
std::size_t total_joysticks = 0;
std::vector<JoystickMachine::Machine *> joystick_machines;
std::vector<MachineTypes::JoystickMachine *> joystick_machines;
for(const auto &machine: machines) {
JoystickMachine::Machine *joystick_machine = machine->joystick_machine();
auto joystick_machine = machine->joystick_machine();
if(joystick_machine) {
joystick_machines.push_back(joystick_machine);
total_joysticks = std::max(total_joysticks, joystick_machine->get_joysticks().size());

View File

@@ -23,7 +23,7 @@ namespace Dynamic {
Makes a static internal copy of the list of machines; makes no guarantees about the
order of delivered messages.
*/
class MultiJoystickMachine: public JoystickMachine::Machine {
class MultiJoystickMachine: public MachineTypes::JoystickMachine {
public:
MultiJoystickMachine(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines);

View File

@@ -10,12 +10,12 @@
using namespace Analyser::Dynamic;
MultiKeyboardMachine::MultiKeyboardMachine(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines) :
keyboard_(machines_) {
MultiKeyboardMachine::MultiKeyboardMachine(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines) {
for(const auto &machine: machines) {
KeyboardMachine::Machine *keyboard_machine = machine->keyboard_machine();
auto keyboard_machine = machine->keyboard_machine();
if(keyboard_machine) machines_.push_back(keyboard_machine);
}
keyboard_ = std::make_unique<MultiKeyboard>(machines_);
}
void MultiKeyboardMachine::clear_all_keys() {
@@ -36,7 +36,7 @@ void MultiKeyboardMachine::type_string(const std::string &string) {
}
}
bool MultiKeyboardMachine::can_type(char c) {
bool MultiKeyboardMachine::can_type(char c) const {
bool can_type = true;
for(const auto &machine: machines_) {
can_type &= machine->can_type(c);
@@ -45,10 +45,10 @@ bool MultiKeyboardMachine::can_type(char c) {
}
Inputs::Keyboard &MultiKeyboardMachine::get_keyboard() {
return keyboard_;
return *keyboard_;
}
MultiKeyboardMachine::MultiKeyboard::MultiKeyboard(const std::vector<::KeyboardMachine::Machine *> &machines)
MultiKeyboardMachine::MultiKeyboard::MultiKeyboard(const std::vector<::MachineTypes::KeyboardMachine *> &machines)
: machines_(machines) {
for(const auto &machine: machines_) {
observed_keys_.insert(machine->get_keyboard().observed_keys().begin(), machine->get_keyboard().observed_keys().end());
@@ -70,10 +70,10 @@ void MultiKeyboardMachine::MultiKeyboard::reset_all_keys() {
}
}
const std::set<Inputs::Keyboard::Key> &MultiKeyboardMachine::MultiKeyboard::observed_keys() {
const std::set<Inputs::Keyboard::Key> &MultiKeyboardMachine::MultiKeyboard::observed_keys() const {
return observed_keys_;
}
bool MultiKeyboardMachine::MultiKeyboard::is_exclusive() {
bool MultiKeyboardMachine::MultiKeyboard::is_exclusive() const {
return is_exclusive_;
}

View File

@@ -24,25 +24,25 @@ namespace Dynamic {
Makes a static internal copy of the list of machines; makes no guarantees about the
order of delivered messages.
*/
class MultiKeyboardMachine: public KeyboardMachine::Machine {
class MultiKeyboardMachine: public MachineTypes::KeyboardMachine {
private:
std::vector<::KeyboardMachine::Machine *> machines_;
std::vector<MachineTypes::KeyboardMachine *> machines_;
class MultiKeyboard: public Inputs::Keyboard {
public:
MultiKeyboard(const std::vector<::KeyboardMachine::Machine *> &machines);
MultiKeyboard(const std::vector<MachineTypes::KeyboardMachine *> &machines);
bool set_key_pressed(Key key, char value, bool is_pressed) final;
void reset_all_keys() final;
const std::set<Key> &observed_keys() final;
bool is_exclusive() final;
const std::set<Key> &observed_keys() const final;
bool is_exclusive() const final;
private:
const std::vector<::KeyboardMachine::Machine *> &machines_;
const std::vector<MachineTypes::KeyboardMachine *> &machines_;
std::set<Key> observed_keys_;
bool is_exclusive_ = false;
};
MultiKeyboard keyboard_;
std::unique_ptr<MultiKeyboard> keyboard_;
public:
MultiKeyboardMachine(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines);
@@ -51,7 +51,7 @@ class MultiKeyboardMachine: public KeyboardMachine::Machine {
void clear_all_keys() final;
void set_key_state(uint16_t key, bool is_pressed) final;
void type_string(const std::string &) final;
bool can_type(char c) final;
bool can_type(char c) const final;
Inputs::Keyboard &get_keyboard() final;
};

View File

@@ -12,7 +12,7 @@ using namespace Analyser::Dynamic;
MultiMediaTarget::MultiMediaTarget(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines) {
for(const auto &machine: machines) {
MediaTarget::Machine *media_target = machine->media_target();
auto media_target = machine->media_target();
if(media_target) targets_.push_back(media_target);
}
}

View File

@@ -24,7 +24,7 @@ namespace Dynamic {
Makes a static internal copy of the list of machines; makes no guarantees about the
order of delivered messages.
*/
struct MultiMediaTarget: public MediaTarget::Machine {
struct MultiMediaTarget: public MachineTypes::MediaTarget {
public:
MultiMediaTarget(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines);
@@ -32,7 +32,7 @@ struct MultiMediaTarget: public MediaTarget::Machine {
bool insert_media(const Analyser::Static::Media &media) final;
private:
std::vector<MediaTarget::Machine *> targets_;
std::vector<MachineTypes::MediaTarget *> targets_;
};
}

View File

@@ -0,0 +1,105 @@
//
// MultiProducer.cpp
// Clock Signal
//
// Created by Thomas Harte on 29/01/2018.
// Copyright 2018 Thomas Harte. All rights reserved.
//
#include "MultiProducer.hpp"
#include <condition_variable>
#include <mutex>
using namespace Analyser::Dynamic;
// MARK: - MultiInterface
template <typename MachineType>
void MultiInterface<MachineType>::perform_parallel(const std::function<void(MachineType *)> &function) {
// Apply a blunt force parallelisation of the machines; each run_for is dispatched
// to a separate queue and this queue will block until all are done.
volatile std::size_t outstanding_machines;
std::condition_variable condition;
std::mutex mutex;
{
std::lock_guard machines_lock(machines_mutex_);
std::lock_guard lock(mutex);
outstanding_machines = machines_.size();
for(std::size_t index = 0; index < machines_.size(); ++index) {
const auto machine = ::Machine::get<MachineType>(*machines_[index].get());
queues_[index].enqueue([&mutex, &condition, machine, function, &outstanding_machines]() {
if(machine) function(machine);
std::lock_guard lock(mutex);
outstanding_machines--;
condition.notify_all();
});
}
}
std::unique_lock lock(mutex);
condition.wait(lock, [&outstanding_machines] { return !outstanding_machines; });
}
template <typename MachineType>
void MultiInterface<MachineType>::perform_serial(const std::function<void(MachineType *)> &function) {
std::lock_guard machines_lock(machines_mutex_);
for(const auto &machine: machines_) {
const auto typed_machine = ::Machine::get<MachineType>(*machine.get());
if(typed_machine) function(typed_machine);
}
}
// MARK: - MultiScanProducer
void MultiScanProducer::set_scan_target(Outputs::Display::ScanTarget *scan_target) {
scan_target_ = scan_target;
std::lock_guard machines_lock(machines_mutex_);
const auto machine = machines_.front()->scan_producer();
if(machine) machine->set_scan_target(scan_target);
}
Outputs::Display::ScanStatus MultiScanProducer::get_scan_status() const {
std::lock_guard machines_lock(machines_mutex_);
const auto machine = machines_.front()->scan_producer();
if(machine) return machine->get_scan_status();
return Outputs::Display::ScanStatus();
}
void MultiScanProducer::did_change_machine_order() {
if(scan_target_) scan_target_->will_change_owner();
perform_serial([](MachineTypes::ScanProducer *machine) {
machine->set_scan_target(nullptr);
});
std::lock_guard machines_lock(machines_mutex_);
const auto machine = machines_.front()->scan_producer();
if(machine) machine->set_scan_target(scan_target_);
}
// MARK: - MultiAudioProducer
MultiAudioProducer::MultiAudioProducer(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines, std::recursive_mutex &machines_mutex) : MultiInterface(machines, machines_mutex) {
speaker_ = MultiSpeaker::create(machines);
}
Outputs::Speaker::Speaker *MultiAudioProducer::get_speaker() {
return speaker_;
}
void MultiAudioProducer::did_change_machine_order() {
if(speaker_) {
speaker_->set_new_front_machine(machines_.front().get());
}
}
// MARK: - MultiTimedMachine
void MultiTimedMachine::run_for(Time::Seconds duration) {
perform_parallel([duration](::MachineTypes::TimedMachine *machine) {
if(machine->get_confidence() >= 0.01f) machine->run_for(duration);
});
if(delegate_) delegate_->did_run_machines(this);
}

View File

@@ -1,16 +1,16 @@
//
// MultiCRTMachine.hpp
// MultiProducer.hpp
// Clock Signal
//
// Created by Thomas Harte on 29/01/2018.
// Copyright 2018 Thomas Harte. All rights reserved.
//
#ifndef MultiCRTMachine_hpp
#define MultiCRTMachine_hpp
#ifndef MultiProducer_hpp
#define MultiProducer_hpp
#include "../../../../Concurrency/AsyncTaskQueue.hpp"
#include "../../../../Machines/CRTMachine.hpp"
#include "../../../../Machines/MachineTypes.hpp"
#include "../../../../Machines/DynamicMachine.hpp"
#include "MultiSpeaker.hpp"
@@ -22,6 +22,91 @@
namespace Analyser {
namespace Dynamic {
template <typename MachineType> class MultiInterface {
public:
MultiInterface(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines, std::recursive_mutex &machines_mutex) :
machines_(machines), machines_mutex_(machines_mutex), queues_(machines.size()) {}
protected:
/*!
Performs a parallel for operation across all machines, performing the supplied
function on each and returning only once all applications have completed.
No guarantees are extended as to which thread operations will occur on.
*/
void perform_parallel(const std::function<void(MachineType *)> &);
/*!
Performs a serial for operation across all machines, performing the supplied
function on each on the calling thread.
*/
void perform_serial(const std::function<void(MachineType *)> &);
protected:
const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines_;
std::recursive_mutex &machines_mutex_;
private:
std::vector<Concurrency::AsyncTaskQueue> queues_;
};
class MultiTimedMachine: public MultiInterface<MachineTypes::TimedMachine>, public MachineTypes::TimedMachine {
public:
using MultiInterface::MultiInterface;
/*!
Provides a mechanism by which a delegate can be informed each time a call to run_for has
been received.
*/
struct Delegate {
virtual void did_run_machines(MultiTimedMachine *) = 0;
};
/// Sets @c delegate as the receiver of delegate messages.
void set_delegate(Delegate *delegate) {
delegate_ = delegate;
}
void run_for(Time::Seconds duration) final;
private:
void run_for(const Cycles) final {}
Delegate *delegate_ = nullptr;
};
class MultiScanProducer: public MultiInterface<MachineTypes::ScanProducer>, public MachineTypes::ScanProducer {
public:
using MultiInterface::MultiInterface;
/*!
Informs the MultiScanProducer that the order of machines has changed; it
uses this as an opportunity to synthesis any CRTMachine::Machine::Delegate messages that
are necessary to bridge the gap between one machine and the next.
*/
void did_change_machine_order();
void set_scan_target(Outputs::Display::ScanTarget *scan_target) final;
Outputs::Display::ScanStatus get_scan_status() const final;
private:
Outputs::Display::ScanTarget *scan_target_ = nullptr;
};
class MultiAudioProducer: public MultiInterface<MachineTypes::AudioProducer>, public MachineTypes::AudioProducer {
public:
MultiAudioProducer(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines, std::recursive_mutex &machines_mutex);
/*!
Informs the MultiAudio that the order of machines has changed; it
uses this as an opportunity to switch speaker delegates as appropriate.
*/
void did_change_machine_order();
Outputs::Speaker::Speaker *get_speaker() final;
private:
MultiSpeaker *speaker_ = nullptr;
};
/*!
Provides a class that multiplexes the CRT machine interface to multiple machines.
@@ -29,61 +114,9 @@ namespace Dynamic {
acquiring a supplied mutex. The owner should also call did_change_machine_order()
if the order of machines changes.
*/
class MultiCRTMachine: public CRTMachine::Machine {
public:
MultiCRTMachine(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines, std::recursive_mutex &machines_mutex);
/*!
Informs the MultiCRTMachine that the order of machines has changed; the MultiCRTMachine
uses this as an opportunity to synthesis any CRTMachine::Machine::Delegate messages that
are necessary to bridge the gap between one machine and the next.
*/
void did_change_machine_order();
/*!
Provides a mechanism by which a delegate can be informed each time a call to run_for has
been received.
*/
struct Delegate {
virtual void multi_crt_did_run_machines() = 0;
};
/// Sets @c delegate as the receiver of delegate messages.
void set_delegate(Delegate *delegate) {
delegate_ = delegate;
}
// Below is the standard CRTMachine::Machine interface; see there for documentation.
void set_scan_target(Outputs::Display::ScanTarget *scan_target) final;
Outputs::Display::ScanStatus get_scan_status() const final;
Outputs::Speaker::Speaker *get_speaker() final;
void run_for(Time::Seconds duration) final;
private:
void run_for(const Cycles cycles) final {}
const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines_;
std::recursive_mutex &machines_mutex_;
std::vector<Concurrency::AsyncTaskQueue> queues_;
MultiSpeaker *speaker_ = nullptr;
Delegate *delegate_ = nullptr;
Outputs::Display::ScanTarget *scan_target_ = nullptr;
/*!
Performs a parallel for operation across all machines, performing the supplied
function on each and returning only once all applications have completed.
No guarantees are extended as to which thread operations will occur on.
*/
void perform_parallel(const std::function<void(::CRTMachine::Machine *)> &);
/*!
Performs a serial for operation across all machines, performing the supplied
function on each on the calling thread.
*/
void perform_serial(const std::function<void(::CRTMachine::Machine *)> &);
};
}
}
#endif /* MultiCRTMachine_hpp */
#endif /* MultiProducer_hpp */

View File

@@ -13,7 +13,7 @@ using namespace Analyser::Dynamic;
MultiSpeaker *MultiSpeaker::create(const std::vector<std::unique_ptr<::Machine::DynamicMachine>> &machines) {
std::vector<Outputs::Speaker::Speaker *> speakers;
for(const auto &machine: machines) {
Outputs::Speaker::Speaker *speaker = machine->crt_machine()->get_speaker();
Outputs::Speaker::Speaker *speaker = machine->audio_producer()->get_speaker();
if(speaker) speakers.push_back(speaker);
}
if(speakers.empty()) return nullptr;
@@ -34,7 +34,7 @@ float MultiSpeaker::get_ideal_clock_rate_in_range(float minimum, float maximum)
ideal += speaker->get_ideal_clock_rate_in_range(minimum, maximum);
}
return ideal / static_cast<float>(speakers_.size());
return ideal / float(speakers_.size());
}
void MultiSpeaker::set_computed_output_rate(float cycles_per_second, int buffer_size, bool stereo) {
@@ -54,34 +54,39 @@ bool MultiSpeaker::get_is_stereo() {
return false;
}
void MultiSpeaker::set_delegate(Outputs::Speaker::Speaker::Delegate *delegate) {
delegate_ = delegate;
void MultiSpeaker::set_output_volume(float volume) {
for(const auto &speaker: speakers_) {
speaker->set_output_volume(volume);
}
}
void MultiSpeaker::speaker_did_complete_samples(Speaker *speaker, const std::vector<int16_t> &buffer) {
if(!delegate_) return;
auto delegate = delegate_.load(std::memory_order::memory_order_relaxed);
if(!delegate) return;
{
std::lock_guard<std::mutex> lock_guard(front_speaker_mutex_);
std::lock_guard lock_guard(front_speaker_mutex_);
if(speaker != front_speaker_) return;
}
did_complete_samples(this, buffer, stereo_output_);
}
void MultiSpeaker::speaker_did_change_input_clock(Speaker *speaker) {
if(!delegate_) return;
auto delegate = delegate_.load(std::memory_order::memory_order_relaxed);
if(!delegate) return;
{
std::lock_guard<std::mutex> lock_guard(front_speaker_mutex_);
std::lock_guard lock_guard(front_speaker_mutex_);
if(speaker != front_speaker_) return;
}
delegate_->speaker_did_change_input_clock(this);
delegate->speaker_did_change_input_clock(this);
}
void MultiSpeaker::set_new_front_machine(::Machine::DynamicMachine *machine) {
{
std::lock_guard<std::mutex> lock_guard(front_speaker_mutex_);
front_speaker_ = machine->crt_machine()->get_speaker();
std::lock_guard lock_guard(front_speaker_mutex_);
front_speaker_ = machine->audio_producer()->get_speaker();
}
if(delegate_) {
delegate_->speaker_did_change_input_clock(this);
auto delegate = delegate_.load(std::memory_order::memory_order_relaxed);
if(delegate) {
delegate->speaker_did_change_input_clock(this);
}
}

View File

@@ -40,8 +40,8 @@ class MultiSpeaker: public Outputs::Speaker::Speaker, Outputs::Speaker::Speaker:
// Below is the standard Outputs::Speaker::Speaker interface; see there for documentation.
float get_ideal_clock_rate_in_range(float minimum, float maximum) override;
void set_computed_output_rate(float cycles_per_second, int buffer_size, bool stereo) override;
void set_delegate(Outputs::Speaker::Speaker::Delegate *delegate) override;
bool get_is_stereo() override;
void set_output_volume(float) override;
private:
void speaker_did_complete_samples(Speaker *speaker, const std::vector<int16_t> &buffer) final;
@@ -50,7 +50,6 @@ class MultiSpeaker: public Outputs::Speaker::Speaker, Outputs::Speaker::Speaker:
std::vector<Outputs::Speaker::Speaker *> speakers_;
Outputs::Speaker::Speaker *front_speaker_ = nullptr;
Outputs::Speaker::Speaker::Delegate *delegate_ = nullptr;
std::mutex front_speaker_mutex_;
bool stereo_output_ = false;

View File

@@ -16,74 +16,55 @@ using namespace Analyser::Dynamic;
MultiMachine::MultiMachine(std::vector<std::unique_ptr<DynamicMachine>> &&machines) :
machines_(std::move(machines)),
configurable_(machines_),
crt_machine_(machines_, machines_mutex_),
joystick_machine_(machines),
timed_machine_(machines_, machines_mutex_),
scan_producer_(machines_, machines_mutex_),
audio_producer_(machines_, machines_mutex_),
joystick_machine_(machines_),
keyboard_machine_(machines_),
media_target_(machines_) {
crt_machine_.set_delegate(this);
timed_machine_.set_delegate(this);
}
Activity::Source *MultiMachine::activity_source() {
return nullptr; // TODO
}
MediaTarget::Machine *MultiMachine::media_target() {
if(has_picked_) {
return machines_.front()->media_target();
} else {
return &media_target_;
#define Provider(type, name, member) \
type *MultiMachine::name() { \
if(has_picked_) { \
return machines_.front()->name(); \
} else { \
return &member; \
} \
}
}
CRTMachine::Machine *MultiMachine::crt_machine() {
if(has_picked_) {
return machines_.front()->crt_machine();
} else {
return &crt_machine_;
}
}
Provider(Configurable::Device, configurable_device, configurable_)
Provider(MachineTypes::TimedMachine, timed_machine, timed_machine_)
Provider(MachineTypes::ScanProducer, scan_producer, scan_producer_)
Provider(MachineTypes::AudioProducer, audio_producer, audio_producer_)
Provider(MachineTypes::JoystickMachine, joystick_machine, joystick_machine_)
Provider(MachineTypes::KeyboardMachine, keyboard_machine, keyboard_machine_)
Provider(MachineTypes::MediaTarget, media_target, media_target_)
JoystickMachine::Machine *MultiMachine::joystick_machine() {
if(has_picked_) {
return machines_.front()->joystick_machine();
} else {
return &joystick_machine_;
}
}
KeyboardMachine::Machine *MultiMachine::keyboard_machine() {
if(has_picked_) {
return machines_.front()->keyboard_machine();
} else {
return &keyboard_machine_;
}
}
MouseMachine::Machine *MultiMachine::mouse_machine() {
MachineTypes::MouseMachine *MultiMachine::mouse_machine() {
// TODO.
return nullptr;
}
Configurable::Device *MultiMachine::configurable_device() {
if(has_picked_) {
return machines_.front()->configurable_device();
} else {
return &configurable_;
}
}
#undef Provider
bool MultiMachine::would_collapse(const std::vector<std::unique_ptr<DynamicMachine>> &machines) {
return
(machines.front()->crt_machine()->get_confidence() > 0.9f) ||
(machines.front()->crt_machine()->get_confidence() >= 2.0f * machines[1]->crt_machine()->get_confidence());
(machines.front()->timed_machine()->get_confidence() > 0.9f) ||
(machines.front()->timed_machine()->get_confidence() >= 2.0f * machines[1]->timed_machine()->get_confidence());
}
void MultiMachine::multi_crt_did_run_machines() {
std::lock_guard<decltype(machines_mutex_)> machines_lock(machines_mutex_);
void MultiMachine::did_run_machines(MultiTimedMachine *) {
std::lock_guard machines_lock(machines_mutex_);
#ifndef NDEBUG
for(const auto &machine: machines_) {
CRTMachine::Machine *crt = machine->crt_machine();
LOGNBR(PADHEX(2) << crt->get_confidence() << " " << crt->debug_type() << "; ");
auto timed_machine = machine->timed_machine();
LOGNBR(PADHEX(2) << timed_machine->get_confidence() << " " << timed_machine->debug_type() << "; ");
}
LOGNBR(std::endl);
#endif
@@ -91,13 +72,14 @@ void MultiMachine::multi_crt_did_run_machines() {
DynamicMachine *front = machines_.front().get();
std::stable_sort(machines_.begin(), machines_.end(),
[] (const std::unique_ptr<DynamicMachine> &lhs, const std::unique_ptr<DynamicMachine> &rhs){
CRTMachine::Machine *lhs_crt = lhs->crt_machine();
CRTMachine::Machine *rhs_crt = rhs->crt_machine();
return lhs_crt->get_confidence() > rhs_crt->get_confidence();
auto lhs_timed = lhs->timed_machine();
auto rhs_timed = rhs->timed_machine();
return lhs_timed->get_confidence() > rhs_timed->get_confidence();
});
if(machines_.front().get() != front) {
crt_machine_.did_change_machine_order();
scan_producer_.did_change_machine_order();
audio_producer_.did_change_machine_order();
}
if(would_collapse(machines_)) {
@@ -107,9 +89,28 @@ void MultiMachine::multi_crt_did_run_machines() {
void MultiMachine::pick_first() {
has_picked_ = true;
// Ensure output rate specifics are properly copied; these may be set only once by the owner,
// but rather than being propagated directly by the MultiSpeaker only the derived computed
// output rate is propagated. So this ensures that if a new derivation is made, it's made correctly.
if(machines_[0]->audio_producer()) {
auto multi_speaker = audio_producer_.get_speaker();
auto specific_speaker = machines_[0]->audio_producer()->get_speaker();
if(specific_speaker && multi_speaker) {
specific_speaker->copy_output_rate(*multi_speaker);
}
}
// TODO: because it is not invalid for a caller to keep a reference to anything previously returned,
// this erase can be added only once the Multi machines that take static copies of the machines list
// are updated.
//
// Example failing use case otherwise: a caller still has reference to the MultiJoystickMachine, and
// it has dangling references to the various JoystickMachines.
//
// This gets into particularly long grass with the MultiConfigurable and its MultiStruct.
// machines_.erase(machines_.begin() + 1, machines_.end());
// TODO: this isn't quite correct, because it may leak OpenGL/etc resources through failure to
// request a close_output while the context is active.
}
void *MultiMachine::raw_pointer() {

View File

@@ -11,8 +11,9 @@
#include "../../../Machines/DynamicMachine.hpp"
#include "Implementation/MultiProducer.hpp"
#include "Implementation/MultiConfigurable.hpp"
#include "Implementation/MultiCRTMachine.hpp"
#include "Implementation/MultiProducer.hpp"
#include "Implementation/MultiJoystickMachine.hpp"
#include "Implementation/MultiKeyboardMachine.hpp"
#include "Implementation/MultiMediaTarget.hpp"
@@ -38,7 +39,7 @@ namespace Dynamic {
If confidence for any machine becomes disproportionately low compared to
the others in the set, that machine stops running.
*/
class MultiMachine: public ::Machine::DynamicMachine, public MultiCRTMachine::Delegate {
class MultiMachine: public ::Machine::DynamicMachine, public MultiTimedMachine::Delegate {
public:
/*!
Allows a potential MultiMachine creator to enquire as to whether there's any benefit in
@@ -52,21 +53,25 @@ class MultiMachine: public ::Machine::DynamicMachine, public MultiCRTMachine::De
Activity::Source *activity_source() final;
Configurable::Device *configurable_device() final;
CRTMachine::Machine *crt_machine() final;
JoystickMachine::Machine *joystick_machine() final;
MouseMachine::Machine *mouse_machine() final;
KeyboardMachine::Machine *keyboard_machine() final;
MediaTarget::Machine *media_target() final;
MachineTypes::TimedMachine *timed_machine() final;
MachineTypes::ScanProducer *scan_producer() final;
MachineTypes::AudioProducer *audio_producer() final;
MachineTypes::JoystickMachine *joystick_machine() final;
MachineTypes::KeyboardMachine *keyboard_machine() final;
MachineTypes::MouseMachine *mouse_machine() final;
MachineTypes::MediaTarget *media_target() final;
void *raw_pointer() final;
private:
void multi_crt_did_run_machines() final;
void did_run_machines(MultiTimedMachine *) final;
std::vector<std::unique_ptr<DynamicMachine>> machines_;
std::recursive_mutex machines_mutex_;
MultiConfigurable configurable_;
MultiCRTMachine crt_machine_;
MultiTimedMachine timed_machine_;
MultiScanProducer scan_producer_;
MultiAudioProducer audio_producer_;
MultiJoystickMachine joystick_machine_;
MultiKeyboardMachine keyboard_machine_;
MultiMediaTarget media_target_;

View File

@@ -14,16 +14,20 @@ namespace Analyser {
enum class Machine {
AmstradCPC,
AppleII,
AppleIIgs,
Atari2600,
AtariST,
Amiga,
ColecoVision,
Electron,
Enterprise,
Macintosh,
MasterSystem,
MSX,
Oric,
Vic20,
ZX8081
ZX8081,
ZXSpectrum,
};
}

View File

@@ -21,8 +21,8 @@ std::unique_ptr<Catalogue> Analyser::Static::Acorn::GetDFSCatalogue(const std::s
auto catalogue = std::make_unique<Catalogue>();
Storage::Encodings::MFM::Parser parser(false, disk);
Storage::Encodings::MFM::Sector *names = parser.get_sector(0, 0, 0);
Storage::Encodings::MFM::Sector *details = parser.get_sector(0, 0, 1);
const Storage::Encodings::MFM::Sector *const names = parser.get_sector(0, 0, 0);
const Storage::Encodings::MFM::Sector *const details = parser.get_sector(0, 0, 1);
if(!names || !details) return nullptr;
if(names->samples.empty() || details->samples.empty()) return nullptr;
@@ -48,18 +48,21 @@ std::unique_ptr<Catalogue> Analyser::Static::Acorn::GetDFSCatalogue(const std::s
char name[10];
snprintf(name, 10, "%c.%.7s", names->samples[0][file_offset + 7] & 0x7f, &names->samples[0][file_offset]);
new_file.name = name;
new_file.load_address = (uint32_t)(details->samples[0][file_offset] | (details->samples[0][file_offset+1] << 8) | ((details->samples[0][file_offset+6]&0x0c) << 14));
new_file.execution_address = (uint32_t)(details->samples[0][file_offset+2] | (details->samples[0][file_offset+3] << 8) | ((details->samples[0][file_offset+6]&0xc0) << 10));
new_file.is_protected = !!(names->samples[0][file_offset + 7] & 0x80);
new_file.load_address = uint32_t(details->samples[0][file_offset] | (details->samples[0][file_offset+1] << 8) | ((details->samples[0][file_offset+6]&0x0c) << 14));
new_file.execution_address = uint32_t(details->samples[0][file_offset+2] | (details->samples[0][file_offset+3] << 8) | ((details->samples[0][file_offset+6]&0xc0) << 10));
if(names->samples[0][file_offset + 7] & 0x80) {
// File is locked; it may not be altered or deleted.
new_file.flags |= File::Flags::Locked;
}
long data_length = static_cast<long>(details->samples[0][file_offset+4] | (details->samples[0][file_offset+5] << 8) | ((details->samples[0][file_offset+6]&0x30) << 12));
long data_length = long(details->samples[0][file_offset+4] | (details->samples[0][file_offset+5] << 8) | ((details->samples[0][file_offset+6]&0x30) << 12));
int start_sector = details->samples[0][file_offset+7] | ((details->samples[0][file_offset+6]&0x03) << 8);
new_file.data.reserve(static_cast<std::size_t>(data_length));
new_file.data.reserve(size_t(data_length));
if(start_sector < 2) continue;
while(data_length > 0) {
uint8_t sector = static_cast<uint8_t>(start_sector % 10);
uint8_t track = static_cast<uint8_t>(start_sector / 10);
uint8_t sector = uint8_t(start_sector % 10);
uint8_t track = uint8_t(start_sector / 10);
start_sector++;
Storage::Encodings::MFM::Sector *next_sector = parser.get_sector(0, track, sector);
@@ -69,11 +72,16 @@ std::unique_ptr<Catalogue> Analyser::Static::Acorn::GetDFSCatalogue(const std::s
new_file.data.insert(new_file.data.end(), next_sector->samples[0].begin(), next_sector->samples[0].begin() + length_from_sector);
data_length -= length_from_sector;
}
if(!data_length) catalogue->files.push_back(new_file);
if(!data_length) catalogue->files.push_back(std::move(new_file));
}
return catalogue;
}
/*
Primary resource used: "Acorn 8-Bit ADFS Filesystem Structure";
http://mdfs.net/Docs/Comp/Disk/Format/ADFS
*/
std::unique_ptr<Catalogue> Analyser::Static::Acorn::GetADFSCatalogue(const std::shared_ptr<Storage::Disk::Disk> &disk) {
auto catalogue = std::make_unique<Catalogue>();
Storage::Encodings::MFM::Parser parser(true, disk);
@@ -84,7 +92,7 @@ std::unique_ptr<Catalogue> Analyser::Static::Acorn::GetADFSCatalogue(const std::
std::vector<uint8_t> root_directory;
root_directory.reserve(5 * 256);
for(uint8_t c = 2; c < 7; c++) {
Storage::Encodings::MFM::Sector *sector = parser.get_sector(0, 0, c);
const Storage::Encodings::MFM::Sector *const sector = parser.get_sector(0, 0, c);
if(!sector) return nullptr;
root_directory.insert(root_directory.end(), sector->samples[0].begin(), sector->samples[0].end());
}
@@ -101,5 +109,73 @@ std::unique_ptr<Catalogue> Analyser::Static::Acorn::GetADFSCatalogue(const std::
case 3: catalogue->bootOption = Catalogue::BootOption::ExecBOOT; break;
}
// Parse the root directory, at least.
for(std::size_t file_offset = 0x005; file_offset < 0x4cb; file_offset += 0x1a) {
// Obtain the name, which will be at most ten characters long, and will
// be terminated by either a NULL character or a \r.
char name[11];
std::size_t c = 0;
for(; c < 10; c++) {
const char next = root_directory[file_offset + c] & 0x7f;
name[c] = next;
if(next == '\0' || next == '\r') break;
}
name[c] = '\0';
// Skip if the name is empty.
if(name[0] == '\0') continue;
// Populate a file then.
File new_file;
new_file.name = name;
new_file.flags =
(root_directory[file_offset + 0] & 0x80 ? File::Flags::Readable : 0) |
(root_directory[file_offset + 1] & 0x80 ? File::Flags::Writable : 0) |
(root_directory[file_offset + 2] & 0x80 ? File::Flags::Locked : 0) |
(root_directory[file_offset + 3] & 0x80 ? File::Flags::IsDirectory : 0) |
(root_directory[file_offset + 4] & 0x80 ? File::Flags::ExecuteOnly : 0) |
(root_directory[file_offset + 5] & 0x80 ? File::Flags::PubliclyReadable : 0) |
(root_directory[file_offset + 6] & 0x80 ? File::Flags::PubliclyWritable : 0) |
(root_directory[file_offset + 7] & 0x80 ? File::Flags::PubliclyExecuteOnly : 0) |
(root_directory[file_offset + 8] & 0x80 ? File::Flags::IsPrivate : 0);
new_file.load_address =
(uint32_t(root_directory[file_offset + 0x0a]) << 0) |
(uint32_t(root_directory[file_offset + 0x0b]) << 8) |
(uint32_t(root_directory[file_offset + 0x0c]) << 16) |
(uint32_t(root_directory[file_offset + 0x0d]) << 24);
new_file.execution_address =
(uint32_t(root_directory[file_offset + 0x0e]) << 0) |
(uint32_t(root_directory[file_offset + 0x0f]) << 8) |
(uint32_t(root_directory[file_offset + 0x10]) << 16) |
(uint32_t(root_directory[file_offset + 0x11]) << 24);
new_file.sequence_number = root_directory[file_offset + 0x19];
const uint32_t size =
(uint32_t(root_directory[file_offset + 0x12]) << 0) |
(uint32_t(root_directory[file_offset + 0x13]) << 8) |
(uint32_t(root_directory[file_offset + 0x14]) << 16) |
(uint32_t(root_directory[file_offset + 0x15]) << 24);
uint32_t start_sector =
(uint32_t(root_directory[file_offset + 0x16]) << 0) |
(uint32_t(root_directory[file_offset + 0x17]) << 8) |
(uint32_t(root_directory[file_offset + 0x18]) << 16);
new_file.data.reserve(size);
while(new_file.data.size() < size) {
const Storage::Encodings::MFM::Sector *const sector = parser.get_sector(start_sector / (80 * 16), (start_sector / 16) % 80, start_sector % 16);
if(!sector) break;
const auto length_from_sector = std::min(size - new_file.data.size(), sector->samples[0].size());
new_file.data.insert(new_file.data.end(), sector->samples[0].begin(), sector->samples[0].begin() + ssize_t(length_from_sector));
++start_sector;
}
catalogue->files.push_back(std::move(new_file));
}
return catalogue;
}

View File

@@ -19,19 +19,38 @@ namespace Acorn {
struct File {
std::string name;
uint32_t load_address;
uint32_t execution_address;
bool is_protected;
uint32_t load_address = 0;
uint32_t execution_address = 0;
enum Flags: uint16_t {
Readable = 1 << 0,
Writable = 1 << 1,
Locked = 1 << 2,
IsDirectory = 1 << 3,
ExecuteOnly = 1 << 4,
PubliclyReadable = 1 << 5,
PubliclyWritable = 1 << 6,
PubliclyExecuteOnly = 1 << 7,
IsPrivate = 1 << 8,
};
uint16_t flags = Flags::Readable | Flags::Readable | Flags::PubliclyReadable | Flags::PubliclyWritable;
uint8_t sequence_number = 0;
std::vector<uint8_t> data;
/// Describes a single chunk of file data; these relate to the tape and ROM filing system.
/// The File-level fields contain a 'definitive' version of the load and execution addresses,
/// but both of those filing systems also store them per chunk.
///
/// Similarly, the file-level data will contain the aggregate data of all chunks.
struct Chunk {
std::string name;
uint32_t load_address;
uint32_t execution_address;
uint16_t block_number;
uint16_t block_length;
uint8_t block_flag;
uint32_t next_address;
uint32_t load_address = 0;
uint32_t execution_address = 0;
uint16_t block_number = 0;
uint16_t block_length = 0;
uint32_t next_address = 0;
uint8_t block_flag = 0;
bool header_crc_matched;
bool data_crc_matched;

View File

@@ -12,6 +12,8 @@
#include "Tape.hpp"
#include "Target.hpp"
#include <algorithm>
using namespace Analyser::Static::Acorn;
static std::vector<std::shared_ptr<Storage::Cartridge::Cartridge>>
@@ -29,7 +31,7 @@ static std::vector<std::shared_ptr<Storage::Cartridge::Cartridge>>
if(segment.data.size() != 0x4000 && segment.data.size() != 0x2000) continue;
// is a copyright string present?
uint8_t copyright_offset = segment.data[7];
const uint8_t copyright_offset = segment.data[7];
if(
segment.data[copyright_offset] != 0x00 ||
segment.data[copyright_offset+1] != 0x28 ||
@@ -57,13 +59,8 @@ static std::vector<std::shared_ptr<Storage::Cartridge::Cartridge>>
return acorn_cartridges;
}
Analyser::Static::TargetList Analyser::Static::Acorn::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::Acorn::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
auto target = std::make_unique<Target>();
target->machine = Machine::Electron;
target->confidence = 0.5; // TODO: a proper estimation
target->has_dfs = false;
target->has_adfs = false;
target->should_shift_restart = false;
// strip out inappropriate cartridges
target->media.cartridges = AcornCartridgesFrom(media.cartridges);
@@ -78,14 +75,14 @@ Analyser::Static::TargetList Analyser::Static::Acorn::GetTargets(const Media &me
if(!files.empty()) {
bool is_basic = true;
// protected files are always for *RUNning only
if(files.front().is_protected) is_basic = false;
// If a file is execute-only, that means *RUN.
if(files.front().flags & File::Flags::ExecuteOnly) is_basic = false;
// check also for a continuous threading of BASIC lines; if none then this probably isn't BASIC code,
// so that's also justification to *RUN
std::size_t pointer = 0;
uint8_t *data = &files.front().data[0];
std::size_t data_size = files.front().data.size();
uint8_t *const data = &files.front().data[0];
const std::size_t data_size = files.front().data.size();
while(1) {
if(pointer >= data_size-1 || data[pointer] != 13) {
is_basic = false;
@@ -109,15 +106,60 @@ Analyser::Static::TargetList Analyser::Static::Acorn::GetTargets(const Media &me
dfs_catalogue = GetDFSCatalogue(disk);
if(dfs_catalogue == nullptr) adfs_catalogue = GetADFSCatalogue(disk);
if(dfs_catalogue || adfs_catalogue) {
// Accept the disk and determine whether DFS or ADFS ROMs are implied.
// Use the Pres ADFS if using an ADFS, as it leaves Page at &EOO.
target->media.disks = media.disks;
target->has_dfs = !!dfs_catalogue;
target->has_adfs = !!adfs_catalogue;
target->has_dfs = bool(dfs_catalogue);
target->has_pres_adfs = bool(adfs_catalogue);
// Check whether a simple shift+break will do for loading this disk.
Catalogue::BootOption bootOption = (dfs_catalogue ?: adfs_catalogue)->bootOption;
if(bootOption != Catalogue::BootOption::None)
if(bootOption != Catalogue::BootOption::None) {
target->should_shift_restart = true;
else
} else {
target->loading_command = "*CAT\n";
}
// Check whether adding the AP6 ROM is justified.
// For now this is an incredibly dense text search;
// if any of the commands that aren't usually present
// on a stock Electron are here, add the AP6 ROM and
// some sideways RAM such that the SR commands are useful.
for(const auto &file: dfs_catalogue ? dfs_catalogue->files : adfs_catalogue->files) {
for(const auto &command: {
"AQRPAGE", "BUILD", "DUMP", "FORMAT", "INSERT", "LANG", "LIST", "LOADROM",
"LOCK", "LROMS", "RLOAD", "ROMS", "RSAVE", "SAVEROM", "SRLOAD", "SRPAGE",
"SRUNLOCK", "SRWIPE", "TUBE", "TYPE", "UNLOCK", "UNPLUG", "UROMS",
"VERIFY", "ZERO"
}) {
if(std::search(file.data.begin(), file.data.end(), command, command+strlen(command)) != file.data.end()) {
target->has_ap6_rom = true;
target->has_sideways_ram = true;
}
}
}
}
}
// Enable the Acorn ADFS if a mass-storage device is attached;
// unlike the Pres ADFS it retains SCSI logic.
if(!media.mass_storage_devices.empty()) {
target->has_pres_adfs = false; // To override a floppy selection, if one was made.
target->has_acorn_adfs = true;
// Assume some sort of later-era Acorn work is likely to happen;
// so ensure *TYPE, etc are present.
target->has_ap6_rom = true;
target->has_sideways_ram = true;
target->media.mass_storage_devices = media.mass_storage_devices;
// Check for a boot option.
const auto sector = target->media.mass_storage_devices.front()->get_block(1);
if(sector[0xfd]) {
target->should_shift_restart = true;
} else {
target->loading_command = "*CAT\n";
}
}

View File

@@ -41,24 +41,24 @@ static std::unique_ptr<File::Chunk> GetNextChunk(const std::shared_ptr<Storage::
char name[11];
std::size_t name_ptr = 0;
while(!tape->is_at_end() && name_ptr < sizeof(name)) {
name[name_ptr] = (char)parser.get_next_byte(tape);
name[name_ptr] = char(parser.get_next_byte(tape));
if(!name[name_ptr]) break;
name_ptr++;
++name_ptr;
}
name[sizeof(name)-1] = '\0';
new_chunk->name = name;
// addresses
new_chunk->load_address = (uint32_t)parser.get_next_word(tape);
new_chunk->execution_address = (uint32_t)parser.get_next_word(tape);
new_chunk->block_number = static_cast<uint16_t>(parser.get_next_short(tape));
new_chunk->block_length = static_cast<uint16_t>(parser.get_next_short(tape));
new_chunk->block_flag = static_cast<uint8_t>(parser.get_next_byte(tape));
new_chunk->next_address = (uint32_t)parser.get_next_word(tape);
new_chunk->load_address = uint32_t(parser.get_next_word(tape));
new_chunk->execution_address = uint32_t(parser.get_next_word(tape));
new_chunk->block_number = uint16_t(parser.get_next_short(tape));
new_chunk->block_length = uint16_t(parser.get_next_short(tape));
new_chunk->block_flag = uint8_t(parser.get_next_byte(tape));
new_chunk->next_address = uint32_t(parser.get_next_word(tape));
uint16_t calculated_header_crc = parser.get_crc();
uint16_t stored_header_crc = static_cast<uint16_t>(parser.get_next_short(tape));
stored_header_crc = static_cast<uint16_t>((stored_header_crc >> 8) | (stored_header_crc << 8));
uint16_t stored_header_crc = uint16_t(parser.get_next_short(tape));
stored_header_crc = uint16_t((stored_header_crc >> 8) | (stored_header_crc << 8));
new_chunk->header_crc_matched = stored_header_crc == calculated_header_crc;
if(!new_chunk->header_crc_matched) return nullptr;
@@ -66,13 +66,13 @@ static std::unique_ptr<File::Chunk> GetNextChunk(const std::shared_ptr<Storage::
parser.reset_crc();
new_chunk->data.reserve(new_chunk->block_length);
for(int c = 0; c < new_chunk->block_length; c++) {
new_chunk->data.push_back(static_cast<uint8_t>(parser.get_next_byte(tape)));
new_chunk->data.push_back(uint8_t(parser.get_next_byte(tape)));
}
if(new_chunk->block_length && !(new_chunk->block_flag&0x40)) {
uint16_t calculated_data_crc = parser.get_crc();
uint16_t stored_data_crc = static_cast<uint16_t>(parser.get_next_short(tape));
stored_data_crc = static_cast<uint16_t>((stored_data_crc >> 8) | (stored_data_crc << 8));
uint16_t stored_data_crc = uint16_t(parser.get_next_short(tape));
stored_data_crc = uint16_t((stored_data_crc >> 8) | (stored_data_crc << 8));
new_chunk->data_crc_matched = stored_data_crc == calculated_data_crc;
} else {
new_chunk->data_crc_matched = true;
@@ -109,7 +109,12 @@ static std::unique_ptr<File> GetNextFile(std::deque<File::Chunk> &chunks) {
file->name = file->chunks.front().name;
file->load_address = file->chunks.front().load_address;
file->execution_address = file->chunks.front().execution_address;
file->is_protected = !!(file->chunks.back().block_flag & 0x01); // I think the last flags are the ones that count; TODO: check.
// I think the final chunk's flags are the ones that count; TODO: check.
if(file->chunks.back().block_flag & 0x01) {
// File is locked, which in more generalised terms means it is
// for execution only.
file->flags |= File::Flags::ExecuteOnly;
}
// copy all data into a single big block
for(File::Chunk chunk : file->chunks) {

View File

@@ -9,6 +9,7 @@
#ifndef Analyser_Static_Acorn_Target_h
#define Analyser_Static_Acorn_Target_h
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
#include <string>
@@ -16,11 +17,24 @@ namespace Analyser {
namespace Static {
namespace Acorn {
struct Target: public ::Analyser::Static::Target {
bool has_adfs = false;
struct Target: public ::Analyser::Static::Target, public Reflection::StructImpl<Target> {
bool has_acorn_adfs = false;
bool has_pres_adfs = false;
bool has_dfs = false;
bool has_ap6_rom = false;
bool has_sideways_ram = false;
bool should_shift_restart = false;
std::string loading_command;
Target() : Analyser::Static::Target(Machine::Electron) {
if(needs_declare()) {
DeclareField(has_pres_adfs);
DeclareField(has_acorn_adfs);
DeclareField(has_dfs);
DeclareField(has_ap6_rom);
DeclareField(has_sideways_ram);
}
}
};
}

View File

@@ -0,0 +1,25 @@
//
// StaticAnalyser.cpp
// Clock Signal
//
// Created by Thomas Harte on 16/07/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#include "StaticAnalyser.hpp"
#include "Target.hpp"
Analyser::Static::TargetList Analyser::Static::Amiga::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
// This analyser can comprehend disks and mass-storage devices only.
if(media.disks.empty()) return {};
// As there is at least one usable media image, wave it through.
Analyser::Static::TargetList targets;
using Target = Analyser::Static::Amiga::Target;
auto *const target = new Target();
target->media = media;
targets.push_back(std::unique_ptr<Analyser::Static::Target>(target));
return targets;
}

View File

@@ -0,0 +1,27 @@
//
// StaticAnalyser.hpp
// Clock Signal
//
// Created by Thomas Harte on 16/07/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef Analyser_Static_Amiga_StaticAnalyser_hpp
#define Analyser_Static_Amiga_StaticAnalyser_hpp
#include "../StaticAnalyser.hpp"
#include "../../../Storage/TargetPlatforms.hpp"
#include <string>
namespace Analyser {
namespace Static {
namespace Amiga {
TargetList GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms);
}
}
}
#endif /* Analyser_Static_Amiga_StaticAnalyser_hpp */

View File

@@ -0,0 +1,48 @@
//
// Target.hpp
// Clock Signal
//
// Created by Thomas Harte on 16/07/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef Analyser_Static_Amiga_Target_h
#define Analyser_Static_Amiga_Target_h
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
namespace Analyser {
namespace Static {
namespace Amiga {
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(ChipRAM,
FiveHundredAndTwelveKilobytes,
OneMegabyte,
TwoMegabytes);
ReflectableEnum(FastRAM,
None,
OneMegabyte,
TwoMegabytes,
FourMegabytes,
EightMegabytes);
ChipRAM chip_ram = ChipRAM::FiveHundredAndTwelveKilobytes;
FastRAM fast_ram = FastRAM::EightMegabytes;
Target() : Analyser::Static::Target(Machine::Amiga) {
if(needs_declare()) {
DeclareField(fast_ram);
DeclareField(chip_ram);
AnnounceEnum(FastRAM);
AnnounceEnum(ChipRAM);
}
}
};
}
}
}
#endif /* Analyser_Static_Amiga_Target_h */

View File

@@ -11,12 +11,15 @@
#include <algorithm>
#include <cstring>
#include "Target.hpp"
#include "../../../Storage/Disk/Parsers/CPM.hpp"
#include "../../../Storage/Disk/Encodings/MFM/Parser.hpp"
#include "../../../Storage/Tape/Parsers/Spectrum.hpp"
static bool strcmp_insensitive(const char *a, const char *b) {
#include "Target.hpp"
namespace {
bool strcmp_insensitive(const char *a, const char *b) {
if(std::strlen(a) != std::strlen(b)) return false;
while(*a) {
if(std::tolower(*a) != std::tolower(*b)) return false;
@@ -26,20 +29,20 @@ static bool strcmp_insensitive(const char *a, const char *b) {
return true;
}
static bool is_implied_extension(const std::string &extension) {
bool is_implied_extension(const std::string &extension) {
return
extension == " " ||
strcmp_insensitive(extension.c_str(), "BAS") ||
strcmp_insensitive(extension.c_str(), "BIN");
}
static void right_trim(std::string &string) {
void right_trim(std::string &string) {
string.erase(std::find_if(string.rbegin(), string.rend(), [](int ch) {
return !std::isspace(ch);
}).base(), string.end());
}
static std::string RunCommandFor(const Storage::Disk::CPM::File &file) {
std::string RunCommandFor(const Storage::Disk::CPM::File &file) {
// Trim spaces from the name.
std::string name = file.name;
right_trim(name);
@@ -58,7 +61,7 @@ static std::string RunCommandFor(const Storage::Disk::CPM::File &file) {
return command + "\n";
}
static void InspectCatalogue(
void InspectCatalogue(
const Storage::Disk::CPM::Catalogue &catalogue,
const std::unique_ptr<Analyser::Static::AmstradCPC::Target> &target) {
@@ -155,7 +158,7 @@ static void InspectCatalogue(
target->loading_command = "cat\n";
}
static bool CheckBootSector(const std::shared_ptr<Storage::Disk::Disk> &disk, const std::unique_ptr<Analyser::Static::AmstradCPC::Target> &target) {
bool CheckBootSector(const std::shared_ptr<Storage::Disk::Disk> &disk, const std::unique_ptr<Analyser::Static::AmstradCPC::Target> &target) {
Storage::Encodings::MFM::Parser parser(true, disk);
Storage::Encodings::MFM::Sector *boot_sector = parser.get_sector(0, 0, 0x41);
if(boot_sector != nullptr && !boot_sector->samples.empty() && boot_sector->samples[0].size() == 512) {
@@ -179,22 +182,49 @@ static bool CheckBootSector(const std::shared_ptr<Storage::Disk::Disk> &disk, co
return false;
}
Analyser::Static::TargetList Analyser::Static::AmstradCPC::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
bool IsAmstradTape(const std::shared_ptr<Storage::Tape::Tape> &tape) {
// Limited sophistication here; look for a CPC-style file header, that is
// any Spectrum-esque block with a synchronisation character of 0x2c.
//
// More could be done here: parse the header, look for 0x16 data records.
using Parser = Storage::Tape::ZXSpectrum::Parser;
Parser parser(Parser::MachineType::AmstradCPC);
while(true) {
const auto block = parser.find_block(tape);
if(!block) break;
if(block->type == 0x2c) {
return true;
}
}
return false;
}
} // namespace
Analyser::Static::TargetList Analyser::Static::AmstradCPC::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
TargetList destination;
auto target = std::make_unique<Target>();
target->machine = Machine::AmstradCPC;
target->confidence = 0.5;
target->model = Target::Model::CPC6128;
if(!media.tapes.empty()) {
// TODO: which of these are actually potentially CPC tapes?
target->media.tapes = media.tapes;
bool has_cpc_tape = false;
for(auto &tape: media.tapes) {
has_cpc_tape |= IsAmstradTape(tape);
}
// Ugliness flows here: assume the CPC isn't smart enough to pause between pressing
// enter and responding to the follow-on prompt to press a key, so just type for
// a while. Yuck!
target->loading_command = "|tape\nrun\"\n1234567890";
if(has_cpc_tape) {
target->media.tapes = media.tapes;
// Ugliness flows here: assume the CPC isn't smart enough to pause between pressing
// enter and responding to the follow-on prompt to press a key, so just type for
// a while. Yuck!
target->loading_command = "|tape\nrun\"\n123";
}
}
if(!media.disks.empty()) {

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@@ -9,6 +9,8 @@
#ifndef Analyser_Static_AmstradCPC_Target_h
#define Analyser_Static_AmstradCPC_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
#include <string>
@@ -16,15 +18,17 @@ namespace Analyser {
namespace Static {
namespace AmstradCPC {
struct Target: public ::Analyser::Static::Target {
enum class Model {
CPC464,
CPC664,
CPC6128
};
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(Model, CPC464, CPC664, CPC6128);
Model model = Model::CPC464;
std::string loading_command;
Target() : Analyser::Static::Target(Machine::AmstradCPC) {
if(needs_declare()) {
DeclareField(model);
AnnounceEnum(Model);
}
}
};
}

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@@ -9,9 +9,8 @@
#include "StaticAnalyser.hpp"
#include "Target.hpp"
Analyser::Static::TargetList Analyser::Static::AppleII::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::AppleII::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
auto target = std::make_unique<Target>();
target->machine = Machine::AppleII;
target->media = media;
if(!target->media.disks.empty())

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@@ -6,34 +6,45 @@
// Copyright 2018 Thomas Harte. All rights reserved.
//
#ifndef Target_h
#define Target_h
#ifndef Analyser_Static_AppleII_Target_h
#define Analyser_Static_AppleII_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
namespace Analyser {
namespace Static {
namespace AppleII {
struct Target: public ::Analyser::Static::Target {
enum class Model {
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(Model,
II,
IIplus,
IIe,
EnhancedIIe
};
enum class DiskController {
);
ReflectableEnum(DiskController,
None,
SixteenSector,
ThirteenSector
};
);
Model model = Model::IIe;
DiskController disk_controller = DiskController::None;
Target() : Analyser::Static::Target(Machine::AppleII) {
if(needs_declare()) {
DeclareField(model);
DeclareField(disk_controller);
AnnounceEnum(Model);
AnnounceEnum(DiskController);
}
}
};
}
}
}
#endif /* Target_h */
#endif /* Analyser_Static_AppleII_Target_h */

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@@ -0,0 +1,19 @@
//
// StaticAnalyser.cpp
// Clock Signal
//
// Created by Thomas Harte on 20/10/2020.
// Copyright 2018 Thomas Harte. All rights reserved.
//
#include "StaticAnalyser.hpp"
#include "Target.hpp"
Analyser::Static::TargetList Analyser::Static::AppleIIgs::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
auto target = std::make_unique<Target>();
target->media = media;
TargetList targets;
targets.push_back(std::move(target));
return targets;
}

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@@ -0,0 +1,26 @@
//
// StaticAnalyser.hpp
// Clock Signal
//
// Created by Thomas Harte on 20/10/2020.
// Copyright 2018 Thomas Harte. All rights reserved.
//
#ifndef Analyser_Static_AppleIIgs_StaticAnalyser_hpp
#define Analyser_Static_AppleIIgs_StaticAnalyser_hpp
#include "../StaticAnalyser.hpp"
#include "../../../Storage/TargetPlatforms.hpp"
#include <string>
namespace Analyser {
namespace Static {
namespace AppleIIgs {
TargetList GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms);
}
}
}
#endif /* Analyser_Static_AppleIIgs_StaticAnalyser_hpp */

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@@ -0,0 +1,49 @@
//
// Target.hpp
// Clock Signal
//
// Created by Thomas Harte on 20/10/2020.
// Copyright 2018 Thomas Harte. All rights reserved.
//
#ifndef Analyser_Static_AppleIIgs_Target_h
#define Analyser_Static_AppleIIgs_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
namespace Analyser {
namespace Static {
namespace AppleIIgs {
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(Model,
ROM00,
ROM01,
ROM03
);
ReflectableEnum(MemoryModel,
TwoHundredAndFiftySixKB,
OneMB,
EightMB
);
Model model = Model::ROM01;
MemoryModel memory_model = MemoryModel::EightMB;
Target() : Analyser::Static::Target(Machine::AppleIIgs) {
if(needs_declare()) {
DeclareField(model);
DeclareField(memory_model);
AnnounceEnum(Model);
AnnounceEnum(MemoryModel);
}
}
};
}
}
}
#endif /* Analyser_Static_AppleIIgs_Target_h */

View File

@@ -16,24 +16,22 @@ using namespace Analyser::Static::Atari2600;
using Target = Analyser::Static::Atari2600::Target;
static void DeterminePagingFor2kCartridge(Target &target, const Storage::Cartridge::Cartridge::Segment &segment) {
// if this is a 2kb cartridge then it's definitely either unpaged or a CommaVid
uint16_t entry_address, break_address;
// If this is a 2kb cartridge then it's definitely either unpaged or a CommaVid.
const uint16_t entry_address = uint16_t(segment.data[0x7fc] | (segment.data[0x7fd] << 8)) & 0x1fff;
const uint16_t break_address = uint16_t(segment.data[0x7fe] | (segment.data[0x7ff] << 8)) & 0x1fff;
entry_address = (static_cast<uint16_t>(segment.data[0x7fc] | (segment.data[0x7fd] << 8))) & 0x1fff;
break_address = (static_cast<uint16_t>(segment.data[0x7fe] | (segment.data[0x7ff] << 8))) & 0x1fff;
// a CommaVid start address needs to be outside of its RAM
// A CommaVid start address needs to be outside of its RAM.
if(entry_address < 0x1800 || break_address < 0x1800) return;
std::function<std::size_t(uint16_t address)> high_location_mapper = [](uint16_t address) {
address &= 0x1fff;
return static_cast<std::size_t>(address - 0x1800);
return size_t(address - 0x1800);
};
Analyser::Static::MOS6502::Disassembly high_location_disassembly =
Analyser::Static::MOS6502::Disassemble(segment.data, high_location_mapper, {entry_address, break_address});
// assume that any kind of store that looks likely to be intended for large amounts of memory implies
// large amounts of memory
// Assume that any kind of store that looks likely to be intended for large amounts of memory implies
// large amounts of memory.
bool has_wide_area_store = false;
for(std::map<uint16_t, Analyser::Static::MOS6502::Instruction>::value_type &entry : high_location_disassembly.instructions_by_address) {
if(entry.second.operation == Analyser::Static::MOS6502::Instruction::STA) {
@@ -45,17 +43,17 @@ static void DeterminePagingFor2kCartridge(Target &target, const Storage::Cartrid
}
}
// conclude that this is a CommaVid if it attempted to write something to the CommaVid RAM locations;
// Conclude that this is a CommaVid if it attempted to write something to the CommaVid RAM locations;
// caveat: false positives aren't likely to be problematic; a false positive is a 2KB ROM that always addresses
// itself so as to land in ROM even if mapped as a CommaVid and this code is on the fence as to whether it
// attempts to modify itself but it probably doesn't
// attempts to modify itself but it probably doesn't.
if(has_wide_area_store) target.paging_model = Target::PagingModel::CommaVid;
}
static void DeterminePagingFor8kCartridge(Target &target, const Storage::Cartridge::Cartridge::Segment &segment, const Analyser::Static::MOS6502::Disassembly &disassembly) {
// Activision stack titles have their vectors at the top of the low 4k, not the top, and
// always list 0xf000 as both vectors; they do not repeat them, and, inexplicably, they all
// issue an SEI as their first instruction (maybe some sort of relic of the development environment?)
// issue an SEI as their first instruction (maybe some sort of relic of the development environment?).
if(
segment.data[4095] == 0xf0 && segment.data[4093] == 0xf0 && segment.data[4094] == 0x00 && segment.data[4092] == 0x00 &&
(segment.data[8191] != 0xf0 || segment.data[8189] != 0xf0 || segment.data[8190] != 0x00 || segment.data[8188] != 0x00) &&
@@ -65,7 +63,7 @@ static void DeterminePagingFor8kCartridge(Target &target, const Storage::Cartrid
return;
}
// make an assumption that this is the Atari paging model
// Make an assumption that this is the Atari paging model.
target.paging_model = Target::PagingModel::Atari8k;
std::set<uint16_t> internal_accesses;
@@ -90,8 +88,8 @@ static void DeterminePagingFor8kCartridge(Target &target, const Storage::Cartrid
else if(tigervision_access_count > atari_access_count) target.paging_model = Target::PagingModel::Tigervision;
}
static void DeterminePagingFor16kCartridge(Target &target, const Storage::Cartridge::Cartridge::Segment &segment, const Analyser::Static::MOS6502::Disassembly &disassembly) {
// make an assumption that this is the Atari paging model
static void DeterminePagingFor16kCartridge(Target &target, const Storage::Cartridge::Cartridge::Segment &, const Analyser::Static::MOS6502::Disassembly &disassembly) {
// Make an assumption that this is the Atari paging model.
target.paging_model = Target::PagingModel::Atari16k;
std::set<uint16_t> internal_accesses;
@@ -110,8 +108,8 @@ static void DeterminePagingFor16kCartridge(Target &target, const Storage::Cartri
if(mnetwork_access_count > atari_access_count) target.paging_model = Target::PagingModel::MNetwork;
}
static void DeterminePagingFor64kCartridge(Target &target, const Storage::Cartridge::Cartridge::Segment &segment, const Analyser::Static::MOS6502::Disassembly &disassembly) {
// make an assumption that this is a Tigervision if there is a write to 3F
static void DeterminePagingFor64kCartridge(Target &target, const Storage::Cartridge::Cartridge::Segment &, const Analyser::Static::MOS6502::Disassembly &disassembly) {
// Make an assumption that this is a Tigervision if there is a write to 3F.
target.paging_model =
(disassembly.external_stores.find(0x3f) != disassembly.external_stores.end()) ?
Target::PagingModel::Tigervision : Target::PagingModel::MegaBoy;
@@ -123,17 +121,15 @@ static void DeterminePagingForCartridge(Target &target, const Storage::Cartridge
return;
}
uint16_t entry_address, break_address;
entry_address = static_cast<uint16_t>(segment.data[segment.data.size() - 4] | (segment.data[segment.data.size() - 3] << 8));
break_address = static_cast<uint16_t>(segment.data[segment.data.size() - 2] | (segment.data[segment.data.size() - 1] << 8));
const uint16_t entry_address = uint16_t(segment.data[segment.data.size() - 4] | (segment.data[segment.data.size() - 3] << 8));
const uint16_t break_address = uint16_t(segment.data[segment.data.size() - 2] | (segment.data[segment.data.size() - 1] << 8));
std::function<std::size_t(uint16_t address)> address_mapper = [](uint16_t address) {
if(!(address & 0x1000)) return static_cast<std::size_t>(-1);
return static_cast<std::size_t>(address & 0xfff);
if(!(address & 0x1000)) return size_t(-1);
return size_t(address & 0xfff);
};
std::vector<uint8_t> final_4k(segment.data.end() - 4096, segment.data.end());
const std::vector<uint8_t> final_4k(segment.data.end() - 4096, segment.data.end());
Analyser::Static::MOS6502::Disassembly disassembly = Analyser::Static::MOS6502::Disassemble(final_4k, address_mapper, {entry_address, break_address});
switch(segment.data.size()) {
@@ -159,7 +155,7 @@ static void DeterminePagingForCartridge(Target &target, const Storage::Cartridge
break;
}
// check for a Super Chip. Atari ROM images [almost] always have the same value stored over RAM
// Check for a Super Chip. Atari ROM images [almost] always have the same value stored over RAM
// regions; when they don't they at least seem to have the first 128 bytes be the same as the
// next 128 bytes. So check for that.
if( target.paging_model != Target::PagingModel::CBSRamPlus &&
@@ -174,17 +170,16 @@ static void DeterminePagingForCartridge(Target &target, const Storage::Cartridge
target.uses_superchip = has_superchip;
}
// check for a Tigervision or Tigervision-esque scheme
// Check for a Tigervision or Tigervision-esque scheme
if(target.paging_model == Target::PagingModel::None && segment.data.size() > 4096) {
bool looks_like_tigervision = disassembly.external_stores.find(0x3f) != disassembly.external_stores.end();
if(looks_like_tigervision) target.paging_model = Target::PagingModel::Tigervision;
}
}
Analyser::Static::TargetList Analyser::Static::Atari2600::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::Atari2600::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
// TODO: sanity checking; is this image really for an Atari 2600?
auto target = std::make_unique<Target>();
target->machine = Machine::Atari2600;
target->confidence = 0.5;
target->media.cartridges = media.cartridges;
target->paging_model = Target::PagingModel::None;

View File

@@ -34,6 +34,8 @@ struct Target: public ::Analyser::Static::Target {
// TODO: shouldn't these be properties of the cartridge?
PagingModel paging_model = PagingModel::None;
bool uses_superchip = false;
Target() : Analyser::Static::Target(Machine::Atari2600) {}
};
}

View File

@@ -9,16 +9,15 @@
#include "StaticAnalyser.hpp"
#include "Target.hpp"
Analyser::Static::TargetList Analyser::Static::AtariST::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::AtariST::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
// This analyser can comprehend disks and mass-storage devices only.
if(media.disks.empty()) return {};
// As there is at least one usable media image, wave it through.
Analyser::Static::TargetList targets;
using Target = Analyser::Static::Target;
auto *target = new Target;
target->machine = Analyser::Machine::AtariST;
using Target = Analyser::Static::AtariST::Target;
auto *const target = new Target();
target->media = media;
targets.push_back(std::unique_ptr<Analyser::Static::Target>(target));

View File

@@ -9,11 +9,15 @@
#ifndef Analyser_Static_AtariST_Target_h
#define Analyser_Static_AtariST_Target_h
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
namespace Analyser {
namespace Static {
namespace AtariST {
struct Target: public ::Analyser::Static::Target {
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
Target() : Analyser::Static::Target(Machine::AtariST) {}
};
}

View File

@@ -22,7 +22,7 @@ static std::vector<std::shared_ptr<Storage::Cartridge::Cartridge>>
// the two bytes that will be first must be 0xaa and 0x55, either way around
auto *start = &segment.data[0];
if((data_size & static_cast<std::size_t>(~8191)) > 32768) {
if((data_size & size_t(~8191)) > 32768) {
start = &segment.data[segment.data.size() - 16384];
}
if(start[0] != 0xaa && start[0] != 0x55 && start[1] != 0xaa && start[1] != 0x55) continue;
@@ -52,10 +52,9 @@ static std::vector<std::shared_ptr<Storage::Cartridge::Cartridge>>
return coleco_cartridges;
}
Analyser::Static::TargetList Analyser::Static::Coleco::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::Coleco::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
TargetList targets;
auto target = std::make_unique<Target>();
target->machine = Machine::ColecoVision;
auto target = std::make_unique<Target>(Machine::ColecoVision);
target->confidence = 1.0f - 1.0f / 32768.0f;
target->media.cartridges = ColecoCartridgesFrom(media.cartridges);
if(!target->media.empty())

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@@ -38,7 +38,7 @@ class CommodoreGCRParser: public Storage::Disk::Controller {
@returns a sector if one was found; @c nullptr otherwise.
*/
std::shared_ptr<Sector> get_sector(uint8_t track, uint8_t sector) {
int difference = static_cast<int>(track) - static_cast<int>(track_);
int difference = int(track) - int(track_);
track_ = track;
if(difference) {
@@ -71,7 +71,7 @@ class CommodoreGCRParser: public Storage::Disk::Controller {
std::shared_ptr<Sector> sector_cache_[65536];
void process_input_bit(int value) {
shift_register_ = ((shift_register_ << 1) | static_cast<unsigned int>(value)) & 0x3ff;
shift_register_ = ((shift_register_ << 1) | unsigned(value)) & 0x3ff;
bit_count_++;
}
@@ -112,15 +112,15 @@ class CommodoreGCRParser: public Storage::Disk::Controller {
}
std::shared_ptr<Sector> get_sector(uint8_t sector) {
uint16_t sector_address = static_cast<uint16_t>((track_ << 8) | sector);
const uint16_t sector_address = uint16_t((track_ << 8) | sector);
if(sector_cache_[sector_address]) return sector_cache_[sector_address];
std::shared_ptr<Sector> first_sector = get_next_sector();
const std::shared_ptr<Sector> first_sector = get_next_sector();
if(!first_sector) return first_sector;
if(first_sector->sector == sector) return first_sector;
while(1) {
std::shared_ptr<Sector> next_sector = get_next_sector();
const std::shared_ptr<Sector> next_sector = get_next_sector();
if(next_sector->sector == first_sector->sector) return nullptr;
if(next_sector->sector == sector) return next_sector;
}
@@ -138,12 +138,12 @@ class CommodoreGCRParser: public Storage::Disk::Controller {
}
// get sector details, skip if this looks malformed
uint8_t checksum = static_cast<uint8_t>(get_next_byte());
sector->sector = static_cast<uint8_t>(get_next_byte());
sector->track = static_cast<uint8_t>(get_next_byte());
uint8_t checksum = uint8_t(get_next_byte());
sector->sector = uint8_t(get_next_byte());
sector->track = uint8_t(get_next_byte());
uint8_t disk_id[2];
disk_id[0] = static_cast<uint8_t>(get_next_byte());
disk_id[1] = static_cast<uint8_t>(get_next_byte());
disk_id[0] = uint8_t(get_next_byte());
disk_id[1] = uint8_t(get_next_byte());
if(checksum != (sector->sector ^ sector->track ^ disk_id[0] ^ disk_id[1])) continue;
// look for the following data
@@ -154,12 +154,12 @@ class CommodoreGCRParser: public Storage::Disk::Controller {
checksum = 0;
for(std::size_t c = 0; c < 256; c++) {
sector->data[c] = static_cast<uint8_t>(get_next_byte());
sector->data[c] = uint8_t(get_next_byte());
checksum ^= sector->data[c];
}
if(checksum == get_next_byte()) {
uint16_t sector_address = static_cast<uint16_t>((sector->track << 8) | sector->sector);
uint16_t sector_address = uint16_t((sector->track << 8) | sector->sector);
sector_cache_[sector_address] = sector;
return sector;
}
@@ -192,7 +192,7 @@ std::vector<File> Analyser::Static::Commodore::GetFiles(const std::shared_ptr<St
}
// parse directory
std::size_t header_pointer = static_cast<std::size_t>(-32);
std::size_t header_pointer = size_t(-32);
while(header_pointer+32+31 < directory.size()) {
header_pointer += 32;
@@ -216,7 +216,7 @@ std::vector<File> Analyser::Static::Commodore::GetFiles(const std::shared_ptr<St
}
new_file.name = Storage::Data::Commodore::petscii_from_bytes(&new_file.raw_name[0], 16, false);
std::size_t number_of_sectors = static_cast<std::size_t>(directory[header_pointer + 0x1e]) + (static_cast<std::size_t>(directory[header_pointer + 0x1f]) << 8);
std::size_t number_of_sectors = size_t(directory[header_pointer + 0x1e]) + (size_t(directory[header_pointer + 0x1f]) << 8);
new_file.data.reserve((number_of_sectors - 1) * 254 + 252);
bool is_first_sector = true;
@@ -227,7 +227,7 @@ std::vector<File> Analyser::Static::Commodore::GetFiles(const std::shared_ptr<St
next_track = sector->data[0];
next_sector = sector->data[1];
if(is_first_sector) new_file.starting_address = static_cast<uint16_t>(sector->data[2]) | static_cast<uint16_t>(sector->data[3] << 8);
if(is_first_sector) new_file.starting_address = uint16_t(sector->data[2]) | uint16_t(sector->data[3] << 8);
if(next_track)
new_file.data.insert(new_file.data.end(), sector->data.begin() + (is_first_sector ? 4 : 2), sector->data.end());
else

View File

@@ -23,7 +23,7 @@ bool Analyser::Static::Commodore::File::is_basic() {
// ... null-terminated code ...
// (with a next line address of 0000 indicating end of program)
while(1) {
if(static_cast<size_t>(line_address - starting_address) >= data.size() + 2) break;
if(size_t(line_address - starting_address) >= data.size() + 2) break;
uint16_t next_line_address = data[line_address - starting_address];
next_line_address |= data[line_address - starting_address + 1] << 8;
@@ -33,13 +33,13 @@ bool Analyser::Static::Commodore::File::is_basic() {
}
if(next_line_address < line_address + 5) break;
if(static_cast<size_t>(line_address - starting_address) >= data.size() + 5) break;
if(size_t(line_address - starting_address) >= data.size() + 5) break;
uint16_t next_line_number = data[line_address - starting_address + 2];
next_line_number |= data[line_address - starting_address + 3] << 8;
if(next_line_number <= line_number) break;
line_number = static_cast<uint16_t>(next_line_number);
line_number = uint16_t(next_line_number);
line_address = next_line_address;
}

View File

@@ -42,7 +42,7 @@ static std::vector<std::shared_ptr<Storage::Cartridge::Cartridge>>
return vic20_cartridges;
}
Analyser::Static::TargetList Analyser::Static::Commodore::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::Commodore::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType) {
TargetList destination;
auto target = std::make_unique<Target>();
@@ -94,6 +94,7 @@ Analyser::Static::TargetList Analyser::Static::Commodore::GetTargets(const Media
switch(files.front().starting_address) {
default:
LOG("Unrecognised loading address for Commodore program: " << PADHEX(4) << files.front().starting_address);
[[fallthrough]];
case 0x1001:
memory_model = Target::MemoryModel::Unexpanded;
break;

View File

@@ -9,6 +9,8 @@
#ifndef Analyser_Static_Commodore_Target_h
#define Analyser_Static_Commodore_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
#include <string>
@@ -16,20 +18,20 @@ namespace Analyser {
namespace Static {
namespace Commodore {
struct Target: public ::Analyser::Static::Target {
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
enum class MemoryModel {
Unexpanded,
EightKB,
ThirtyTwoKB
};
enum class Region {
ReflectableEnum(Region,
American,
Danish,
Japanese,
European,
Swedish
};
);
/// Maps from a named memory model to a bank enabled/disabled set.
void set_memory_model(MemoryModel memory_model) {
@@ -54,6 +56,19 @@ struct Target: public ::Analyser::Static::Target {
Region region = Region::European;
bool has_c1540 = false;
std::string loading_command;
Target() : Analyser::Static::Target(Machine::Vic20) {
if(needs_declare()) {
DeclareField(enabled_ram.bank0);
DeclareField(enabled_ram.bank1);
DeclareField(enabled_ram.bank2);
DeclareField(enabled_ram.bank3);
DeclareField(enabled_ram.bank5);
DeclareField(region);
DeclareField(has_c1540);
AnnounceEnum(Region);
}
}
};
}

View File

@@ -26,12 +26,12 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
Instruction instruction;
instruction.address = address;
address++;
++address;
// get operation
uint8_t operation = memory[local_address];
// Get operation.
const uint8_t operation = memory[local_address];
// decode addressing mode
// Decode addressing mode.
switch(operation&0x1f) {
case 0x00:
if(operation >= 0x80) instruction.addressing_mode = Instruction::Immediate;
@@ -74,7 +74,7 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
break;
}
// decode operation
// Decode operation.
#define RM_INSTRUCTION(base, op) \
case base+0x09: case base+0x05: case base+0x15: case base+0x01: case base+0x11: case base+0x0d: case base+0x1d: case base+0x19: \
instruction.operation = op; \
@@ -222,14 +222,14 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
#undef M_INSTRUCTION
#undef IM_INSTRUCTION
// get operand
// Get operand.
switch(instruction.addressing_mode) {
// zero-byte operands
// Zero-byte operands.
case Instruction::Implied:
instruction.operand = 0;
break;
// one-byte operands
// One-byte operands.
case Instruction::Immediate:
case Instruction::ZeroPage: case Instruction::ZeroPageX: case Instruction::ZeroPageY:
case Instruction::IndexedIndirectX: case Instruction::IndirectIndexedY:
@@ -242,7 +242,7 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
}
break;
// two-byte operands
// Two-byte operands.
case Instruction::Absolute: case Instruction::AbsoluteX: case Instruction::AbsoluteY:
case Instruction::Indirect: {
std::size_t low_operand_address = address_mapper(address);
@@ -250,18 +250,18 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
if(low_operand_address >= memory.size() || high_operand_address >= memory.size()) return;
address += 2;
instruction.operand = memory[low_operand_address] | static_cast<uint16_t>(memory[high_operand_address] << 8);
instruction.operand = memory[low_operand_address] | uint16_t(memory[high_operand_address] << 8);
}
break;
}
// store the instruction away
// Store the instruction.
disassembly.disassembly.instructions_by_address[instruction.address] = instruction;
// TODO: something wider-ranging than this
if(instruction.addressing_mode == Instruction::Absolute || instruction.addressing_mode == Instruction::ZeroPage) {
std::size_t mapped_address = address_mapper(instruction.operand);
bool is_external = mapped_address >= memory.size();
const size_t mapped_address = address_mapper(instruction.operand);
const bool is_external = mapped_address >= memory.size();
switch(instruction.operation) {
default: break;
@@ -290,7 +290,7 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
}
}
// decide on overall flow control
// Decide on overall flow control.
if(instruction.operation == Instruction::RTS || instruction.operation == Instruction::RTI) return;
if(instruction.operation == Instruction::BRK) return; // TODO: check whether IRQ vector is within memory range
if(instruction.operation == Instruction::JSR) {
@@ -302,7 +302,7 @@ static void AddToDisassembly(PartialDisassembly &disassembly, const std::vector<
return;
}
if(instruction.addressing_mode == Instruction::Relative) {
uint16_t destination = static_cast<uint16_t>(address + (int8_t)instruction.operand);
uint16_t destination = uint16_t(address + int8_t(instruction.operand));
disassembly.remaining_entry_points.push_back(destination);
}
}

View File

@@ -1,9 +0,0 @@
//
// AddressMapper.cpp
// Clock Signal
//
// Created by Thomas Harte on 30/12/2017.
// Copyright 2017 Thomas Harte. All rights reserved.
//
#include "AddressMapper.hpp"

View File

@@ -21,7 +21,7 @@ namespace Disassembler {
*/
template <typename T> std::function<std::size_t(T)> OffsetMapper(T start_address) {
return [start_address](T argument) {
return static_cast<std::size_t>(argument - start_address);
return size_t(argument - start_address);
};
}

View File

@@ -33,7 +33,7 @@ class Accessor {
uint16_t word() {
uint8_t low = byte();
uint8_t high = byte();
return static_cast<uint16_t>(low | (high << 8));
return uint16_t(low | (high << 8));
}
bool overrun() {
@@ -562,7 +562,7 @@ struct Z80Disassembler {
int access_type =
((instruction.source == Instruction::Location::Operand_Indirect) ? 1 : 0) |
((instruction.destination == Instruction::Location::Operand_Indirect) ? 2 : 0);
uint16_t address = static_cast<uint16_t>(instruction.operand);
uint16_t address = uint16_t(instruction.operand);
bool is_internal = address_mapper(address) < memory.size();
switch(access_type) {
default: break;
@@ -594,7 +594,7 @@ struct Z80Disassembler {
instruction.operation == Instruction::Operation::JR ||
instruction.operation == Instruction::Operation::CALL ||
instruction.operation == Instruction::Operation::RST) {
disassembly.remaining_entry_points.push_back(static_cast<uint16_t>(instruction.operand));
disassembly.remaining_entry_points.push_back(uint16_t(instruction.operand));
}
// This is it if: an unconditional RET, RETI, RETN, JP or JR is found.

View File

@@ -9,6 +9,7 @@
#include "StaticAnalyser.hpp"
#include "../AppleII/Target.hpp"
#include "../AppleIIgs/Target.hpp"
#include "../Oric/Target.hpp"
#include "../Disassembler/6502.hpp"
#include "../Disassembler/AddressMapper.hpp"
@@ -18,10 +19,9 @@
namespace {
Analyser::Static::Target *AppleTarget(const Storage::Encodings::AppleGCR::Sector *sector_zero) {
Analyser::Static::Target *AppleIITarget(const Storage::Encodings::AppleGCR::Sector *sector_zero) {
using Target = Analyser::Static::AppleII::Target;
auto *target = new Target;
target->machine = Analyser::Machine::AppleII;
auto *const target = new Target;
if(sector_zero && sector_zero->encoding == Storage::Encodings::AppleGCR::Sector::Encoding::FiveAndThree) {
target->disk_controller = Target::DiskController::ThirteenSector;
@@ -32,10 +32,13 @@ Analyser::Static::Target *AppleTarget(const Storage::Encodings::AppleGCR::Sector
return target;
}
Analyser::Static::Target *OricTarget(const Storage::Encodings::AppleGCR::Sector *sector_zero) {
Analyser::Static::Target *AppleIIgsTarget() {
return new Analyser::Static::AppleIIgs::Target();
}
Analyser::Static::Target *OricTarget(const Storage::Encodings::AppleGCR::Sector *) {
using Target = Analyser::Static::Oric::Target;
auto *target = new Target;
target->machine = Analyser::Machine::Oric;
auto *const target = new Target;
target->rom = Target::ROM::Pravetz;
target->disk_interface = Target::DiskInterface::Pravetz;
target->loading_command = "CALL 800\n";
@@ -44,13 +47,23 @@ Analyser::Static::Target *OricTarget(const Storage::Encodings::AppleGCR::Sector
}
Analyser::Static::TargetList Analyser::Static::DiskII::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::DiskII::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
// This analyser can comprehend disks only.
if(media.disks.empty()) return {};
auto &disk = media.disks.front();
TargetList targets;
// If the disk image is too large for a 5.25" disk, map this to the IIgs.
if(disk->get_maximum_head_position() > Storage::Disk::HeadPosition(40)) {
targets.push_back(std::unique_ptr<Analyser::Static::Target>(AppleIIgsTarget()));
targets.back()->media = media;
return targets;
}
// Grab track 0, sector 0: the boot sector.
auto track_zero = media.disks.front()->get_track_at_position(Storage::Disk::Track::Address(0, Storage::Disk::HeadPosition(0)));
auto sector_map = Storage::Encodings::AppleGCR::sectors_from_segment(
const auto track_zero = disk->get_track_at_position(Storage::Disk::Track::Address(0, Storage::Disk::HeadPosition(0)));
const auto sector_map = Storage::Encodings::AppleGCR::sectors_from_segment(
Storage::Disk::track_serialisation(*track_zero, Storage::Time(1, 50000)));
const Storage::Encodings::AppleGCR::Sector *sector_zero = nullptr;
@@ -63,12 +76,11 @@ Analyser::Static::TargetList Analyser::Static::DiskII::GetTargets(const Media &m
// If there's no boot sector then if there are also no sectors at all,
// decline to nominate a machine. Otherwise go with an Apple as the default.
TargetList targets;
if(!sector_zero) {
if(sector_map.empty()) {
return targets;
} else {
targets.push_back(std::unique_ptr<Analyser::Static::Target>(AppleTarget(nullptr)));
targets.push_back(std::unique_ptr<Analyser::Static::Target>(AppleIITarget(nullptr)));
targets.back()->media = media;
return targets;
}
@@ -77,7 +89,7 @@ Analyser::Static::TargetList Analyser::Static::DiskII::GetTargets(const Media &m
// If the boot sector looks like it's intended for the Oric, create an Oric.
// Otherwise go with the Apple II.
auto disassembly = Analyser::Static::MOS6502::Disassemble(sector_zero->data, Analyser::Static::Disassembler::OffsetMapper(0xb800), {0xb800});
const auto disassembly = Analyser::Static::MOS6502::Disassemble(sector_zero->data, Analyser::Static::Disassembler::OffsetMapper(0xb800), {0xb800});
bool did_read_shift_register = false;
bool is_oric = false;
@@ -118,7 +130,7 @@ Analyser::Static::TargetList Analyser::Static::DiskII::GetTargets(const Media &m
if(is_oric) {
targets.push_back(std::unique_ptr<Analyser::Static::Target>(OricTarget(sector_zero)));
} else {
targets.push_back(std::unique_ptr<Analyser::Static::Target>(AppleTarget(sector_zero)));
targets.push_back(std::unique_ptr<Analyser::Static::Target>(AppleIITarget(sector_zero)));
}
targets.back()->media = media;
return targets;

View File

@@ -0,0 +1,84 @@
//
// StaticAnalyser.cpp
// Clock Signal
//
// Created by Thomas Harte on 24/06/2021.
// Copyright 2021 Thomas Harte. All rights reserved.
//
#include "StaticAnalyser.hpp"
#include "Target.hpp"
#include "../../../Storage/Disk/Parsers/FAT.hpp"
#include <algorithm>
namespace {
bool insensitive_equal(const std::string &lhs, const std::string &rhs) {
return std::equal(
lhs.begin(), lhs.end(),
rhs.begin(), rhs.end(),
[] (char l, char r) {
return tolower(l) == tolower(r);
});
}
}
Analyser::Static::TargetList Analyser::Static::Enterprise::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
// This analyser can comprehend disks only.
if(media.disks.empty()) return {};
// Otherwise, assume a return will happen.
Analyser::Static::TargetList targets;
using Target = Analyser::Static::Enterprise::Target;
auto *const target = new Target;
target->media = media;
// Always require a BASIC.
target->basic_version = Target::BASICVersion::Any;
// Inspect any supplied disks.
if(!media.disks.empty()) {
// DOS will be needed.
target->dos = Target::DOS::EXDOS;
// Grab the volume information, which includes the root directory.
auto volume = Storage::Disk::FAT::GetVolume(media.disks.front());
if(volume) {
// If there's an EXDOS.INI then this disk should be able to boot itself.
// If not but if there's only one visible .COM or .BAS, automatically load
// that. Otherwise, issue a :DIR.
using File = Storage::Disk::FAT::File;
const File *selected_file = nullptr;
bool has_exdos_ini = false;
bool did_pick_file = false;
for(const auto &file: (*volume).root_directory) {
if(insensitive_equal(file.name, "exdos") && insensitive_equal(file.extension, "ini")) {
has_exdos_ini = true;
break;
}
if(!(file.attributes & File::Attribute::Hidden) &&
(insensitive_equal(file.extension, "com") || insensitive_equal(file.extension, "bas"))
) {
did_pick_file = !selected_file;
selected_file = &file;
}
}
if(!has_exdos_ini) {
if(did_pick_file) {
target->loading_command = std::string("run \"") + selected_file->name + "." + selected_file->extension + "\"\n";
} else {
target->loading_command = ":dir\n";
}
}
}
}
targets.push_back(std::unique_ptr<Analyser::Static::Target>(target));
return targets;
}

View File

@@ -0,0 +1,27 @@
//
// StaticAnalyser.hpp
// Clock Signal
//
// Created by Thomas Harte on 24/06/2021.
// Copyright 2018 Thomas Harte. All rights reserved.
//
#ifndef Analyser_Static_Enterprise_StaticAnalyser_hpp
#define Analyser_Static_Enterprise_StaticAnalyser_hpp
#include "../StaticAnalyser.hpp"
#include "../../../Storage/TargetPlatforms.hpp"
#include <string>
namespace Analyser {
namespace Static {
namespace Enterprise {
TargetList GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms);
}
}
}
#endif /* Analyser_Static_Enterprise_StaticAnalyser_hpp */

View File

@@ -0,0 +1,57 @@
//
// Target.hpp
// Clock Signal
//
// Created by Thomas Harte on 14/06/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef Analyser_Static_Enterprise_Target_h
#define Analyser_Static_Enterprise_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
#include <string>
namespace Analyser {
namespace Static {
namespace Enterprise {
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(Model, Enterprise64, Enterprise128, Enterprise256);
ReflectableEnum(EXOSVersion, v10, v20, v21, v23, Any);
ReflectableEnum(BASICVersion, v10, v11, v21, Any, None);
ReflectableEnum(DOS, EXDOS, None);
ReflectableEnum(Speed, FourMHz, SixMHz);
Model model = Model::Enterprise128;
EXOSVersion exos_version = EXOSVersion::Any;
BASICVersion basic_version = BASICVersion::None;
DOS dos = DOS::None;
Speed speed = Speed::FourMHz;
std::string loading_command;
Target() : Analyser::Static::Target(Machine::Enterprise) {
if(needs_declare()) {
AnnounceEnum(Model);
AnnounceEnum(EXOSVersion);
AnnounceEnum(BASICVersion);
AnnounceEnum(DOS);
AnnounceEnum(Speed);
DeclareField(model);
DeclareField(exos_version);
DeclareField(basic_version);
DeclareField(dos);
DeclareField(speed);
}
}
};
}
}
}
#endif /* Analyser_Static_Enterprise_Target_h */

View File

@@ -27,7 +27,7 @@ static std::unique_ptr<Analyser::Static::Target> CartridgeTarget(
std::vector<Storage::Cartridge::Cartridge::Segment> output_segments;
if(segment.data.size() & 0x1fff) {
std::vector<uint8_t> truncated_data;
std::vector<uint8_t>::difference_type truncated_size = static_cast<std::vector<uint8_t>::difference_type>(segment.data.size()) & ~0x1fff;
std::vector<uint8_t>::difference_type truncated_size = std::vector<uint8_t>::difference_type(segment.data.size()) & ~0x1fff;
truncated_data.insert(truncated_data.begin(), segment.data.begin(), segment.data.begin() + truncated_size);
output_segments.emplace_back(start_address, truncated_data);
} else {
@@ -35,7 +35,6 @@ static std::unique_ptr<Analyser::Static::Target> CartridgeTarget(
}
auto target = std::make_unique<Analyser::Static::MSX::Target>();
target->machine = Analyser::Machine::MSX;
target->confidence = confidence;
if(type == Analyser::Static::MSX::Cartridge::Type::None) {
@@ -97,7 +96,7 @@ static Analyser::Static::TargetList CartridgeTargetsFrom(
// Reject cartridge if the ROM header wasn't found.
if(!found_start) continue;
uint16_t init_address = static_cast<uint16_t>(segment.data[2] | (segment.data[3] << 8));
uint16_t init_address = uint16_t(segment.data[2] | (segment.data[3] << 8));
// TODO: check for a rational init address?
// If this ROM is less than 48kb in size then it's an ordinary ROM. Just emplace it and move on.
@@ -147,7 +146,7 @@ static Analyser::Static::TargetList CartridgeTargetsFrom(
// ) &&
// ((next_iterator->second.operand >> 13) != (0x4000 >> 13))
// ) {
// const uint16_t address = static_cast<uint16_t>(next_iterator->second.operand);
// const uint16_t address = uint16_t(next_iterator->second.operand);
// switch(iterator->second.operand) {
// case 0x6000:
// if(address >= 0x6000 && address < 0x8000) {
@@ -208,13 +207,13 @@ static Analyser::Static::TargetList CartridgeTargetsFrom(
if( instruction_pair.second.operation == Instruction::Operation::LD &&
instruction_pair.second.destination == Instruction::Location::Operand_Indirect &&
instruction_pair.second.source == Instruction::Location::A) {
address_counts[static_cast<uint16_t>(instruction_pair.second.operand)]++;
address_counts[uint16_t(instruction_pair.second.operand)]++;
}
}
// Weight confidences by number of observed hits.
float total_hits =
static_cast<float>(
float(
address_counts[0x6000] + address_counts[0x6800] +
address_counts[0x7000] + address_counts[0x7800] +
address_counts[0x77ff] + address_counts[0x8000] +
@@ -226,42 +225,42 @@ static Analyser::Static::TargetList CartridgeTargetsFrom(
segment,
start_address,
Analyser::Static::MSX::Cartridge::ASCII8kb,
static_cast<float>( address_counts[0x6000] +
address_counts[0x6800] +
address_counts[0x7000] +
address_counts[0x7800]) / total_hits));
float( address_counts[0x6000] +
address_counts[0x6800] +
address_counts[0x7000] +
address_counts[0x7800]) / total_hits));
targets.push_back(CartridgeTarget(
segment,
start_address,
Analyser::Static::MSX::Cartridge::ASCII16kb,
static_cast<float>( address_counts[0x6000] +
address_counts[0x7000] +
address_counts[0x77ff]) / total_hits));
float( address_counts[0x6000] +
address_counts[0x7000] +
address_counts[0x77ff]) / total_hits));
if(!is_ascii) {
targets.push_back(CartridgeTarget(
segment,
start_address,
Analyser::Static::MSX::Cartridge::Konami,
static_cast<float>( address_counts[0x6000] +
address_counts[0x8000] +
address_counts[0xa000]) / total_hits));
float( address_counts[0x6000] +
address_counts[0x8000] +
address_counts[0xa000]) / total_hits));
}
if(!is_ascii) {
targets.push_back(CartridgeTarget(
segment,
start_address,
Analyser::Static::MSX::Cartridge::KonamiWithSCC,
static_cast<float>( address_counts[0x5000] +
address_counts[0x7000] +
address_counts[0x9000] +
address_counts[0xb000]) / total_hits));
float( address_counts[0x5000] +
address_counts[0x7000] +
address_counts[0x9000] +
address_counts[0xb000]) / total_hits));
}
}
return targets;
}
Analyser::Static::TargetList Analyser::Static::MSX::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::MSX::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
TargetList destination;
// Append targets for any cartridges that look correct.
@@ -295,7 +294,6 @@ Analyser::Static::TargetList Analyser::Static::MSX::GetTargets(const Media &medi
target->has_disk_drive = !media.disks.empty();
if(!target->media.empty()) {
target->machine = Machine::MSX;
target->confidence = 0.5;
destination.push_back(std::move(target));
}

View File

@@ -44,7 +44,7 @@ std::vector<File> Analyser::Static::MSX::GetFiles(const std::shared_ptr<Storage:
for(std::size_t c = 0; c < sizeof(header); ++c) {
int next_byte = Parser::get_byte(*file_speed, tape_player);
if(next_byte == -1) break;
header[c] = static_cast<uint8_t>(next_byte);
header[c] = uint8_t(next_byte);
}
bool bytes_are_same = true;
@@ -67,7 +67,7 @@ std::vector<File> Analyser::Static::MSX::GetFiles(const std::shared_ptr<Storage:
// Read file name.
char name[7];
for(std::size_t c = 1; c < 6; ++c)
name[c] = static_cast<char>(Parser::get_byte(*file_speed, tape_player));
name[c] = char(Parser::get_byte(*file_speed, tape_player));
name[6] = '\0';
file.name = name;
@@ -82,7 +82,7 @@ std::vector<File> Analyser::Static::MSX::GetFiles(const std::shared_ptr<Storage:
int byte = Parser::get_byte(*file_speed, tape_player);
if(byte == -1) break;
contains_end_of_file |= (byte == 0x1a);
file.data.push_back(static_cast<uint8_t>(byte));
file.data.push_back(uint8_t(byte));
}
if(c != -1) break;
if(contains_end_of_file) {
@@ -105,13 +105,13 @@ std::vector<File> Analyser::Static::MSX::GetFiles(const std::shared_ptr<Storage:
for(c = 0; c < sizeof(locations); ++c) {
int byte = Parser::get_byte(*file_speed, tape_player);
if(byte == -1) break;
locations[c] = static_cast<uint8_t>(byte);
locations[c] = uint8_t(byte);
}
if(c != sizeof(locations)) continue;
file.starting_address = static_cast<uint16_t>(locations[0] | (locations[1] << 8));
end_address = static_cast<uint16_t>(locations[2] | (locations[3] << 8));
file.entry_address = static_cast<uint16_t>(locations[4] | (locations[5] << 8));
file.starting_address = uint16_t(locations[0] | (locations[1] << 8));
end_address = uint16_t(locations[2] | (locations[3] << 8));
file.entry_address = uint16_t(locations[4] | (locations[5] << 8));
if(end_address < file.starting_address) continue;
@@ -119,7 +119,7 @@ std::vector<File> Analyser::Static::MSX::GetFiles(const std::shared_ptr<Storage:
while(length--) {
int byte = Parser::get_byte(*file_speed, tape_player);
if(byte == -1) continue;
file.data.push_back(static_cast<uint8_t>(byte));
file.data.push_back(uint8_t(byte));
}
files.push_back(std::move(file));
@@ -135,10 +135,10 @@ std::vector<File> Analyser::Static::MSX::GetFiles(const std::shared_ptr<Storage:
next_address_buffer[1] = Parser::get_byte(*file_speed, tape_player);
if(next_address_buffer[0] == -1 || next_address_buffer[1] == -1) break;
file.data.push_back(static_cast<uint8_t>(next_address_buffer[0]));
file.data.push_back(static_cast<uint8_t>(next_address_buffer[1]));
file.data.push_back(uint8_t(next_address_buffer[0]));
file.data.push_back(uint8_t(next_address_buffer[1]));
uint16_t next_address = static_cast<uint16_t>(next_address_buffer[0] | (next_address_buffer[1] << 8));
uint16_t next_address = uint16_t(next_address_buffer[0] | (next_address_buffer[1] << 8));
if(!next_address) {
files.push_back(std::move(file));
break;
@@ -155,7 +155,7 @@ std::vector<File> Analyser::Static::MSX::GetFiles(const std::shared_ptr<Storage:
found_error = true;
break;
}
file.data.push_back(static_cast<uint8_t>(byte));
file.data.push_back(uint8_t(byte));
}
if(found_error) break;
}

View File

@@ -9,6 +9,8 @@
#ifndef Analyser_Static_MSX_Target_h
#define Analyser_Static_MSX_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
#include <string>
@@ -16,15 +18,24 @@ namespace Analyser {
namespace Static {
namespace MSX {
struct Target: public ::Analyser::Static::Target {
struct Target: public ::Analyser::Static::Target, public Reflection::StructImpl<Target> {
bool has_disk_drive = false;
std::string loading_command;
enum class Region {
ReflectableEnum(Region,
Japan,
USA,
Europe
} region = Region::USA;
);
Region region = Region::USA;
Target(): Analyser::Static::Target(Machine::MSX) {
if(needs_declare()) {
DeclareField(has_disk_drive);
DeclareField(region);
AnnounceEnum(Region);
}
}
};
}

View File

@@ -9,7 +9,7 @@
#include "StaticAnalyser.hpp"
#include "Target.hpp"
Analyser::Static::TargetList Analyser::Static::Macintosh::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::Macintosh::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
// This analyser can comprehend disks and mass-storage devices only.
if(media.disks.empty() && media.mass_storage_devices.empty()) return {};
@@ -17,9 +17,21 @@ Analyser::Static::TargetList Analyser::Static::Macintosh::GetTargets(const Media
Analyser::Static::TargetList targets;
using Target = Analyser::Static::Macintosh::Target;
auto *target = new Target;
target->machine = Analyser::Machine::Macintosh;
auto *const target = new Target;
target->media = media;
// If this is a single-sided floppy disk, guess the Macintosh 512kb.
if(media.mass_storage_devices.empty()) {
bool has_800kb_disks = false;
for(const auto &disk: media.disks) {
has_800kb_disks |= disk->get_head_count() > 1;
}
if(!has_800kb_disks) {
target->model = Target::Model::Mac512k;
}
}
targets.push_back(std::unique_ptr<Analyser::Static::Target>(target));
return targets;

View File

@@ -9,19 +9,25 @@
#ifndef Analyser_Static_Macintosh_Target_h
#define Analyser_Static_Macintosh_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
namespace Analyser {
namespace Static {
namespace Macintosh {
struct Target: public ::Analyser::Static::Target {
enum class Model {
Mac128k,
Mac512k,
Mac512ke,
MacPlus
};
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(Model, Mac128k, Mac512k, Mac512ke, MacPlus);
Model model = Model::MacPlus;
Target() : Analyser::Static::Target(Machine::Macintosh) {
// Boilerplate for declaring fields and potential values.
if(needs_declare()) {
DeclareField(model);
AnnounceEnum(Model);
}
}
};
}

View File

@@ -145,9 +145,8 @@ bool is_bd500(Storage::Encodings::MFM::Parser &parser) {
}
Analyser::Static::TargetList Analyser::Static::Oric::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::Oric::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
auto target = std::make_unique<Target>();
target->machine = Machine::Oric;
target->confidence = 0.5;
int basic10_votes = 0;

View File

@@ -49,10 +49,10 @@ std::vector<File> Analyser::Static::Oric::GetFiles(const std::shared_ptr<Storage
}
// read end and start addresses
new_file.ending_address = static_cast<uint16_t>(parser.get_next_byte(tape, is_fast) << 8);
new_file.ending_address |= static_cast<uint16_t>(parser.get_next_byte(tape, is_fast));
new_file.starting_address = static_cast<uint16_t>(parser.get_next_byte(tape, is_fast) << 8);
new_file.starting_address |= static_cast<uint16_t>(parser.get_next_byte(tape, is_fast));
new_file.ending_address = uint16_t(parser.get_next_byte(tape, is_fast) << 8);
new_file.ending_address |= uint16_t(parser.get_next_byte(tape, is_fast));
new_file.starting_address = uint16_t(parser.get_next_byte(tape, is_fast) << 8);
new_file.starting_address |= uint16_t(parser.get_next_byte(tape, is_fast));
// skip an empty byte
parser.get_next_byte(tape, is_fast);
@@ -61,7 +61,7 @@ std::vector<File> Analyser::Static::Oric::GetFiles(const std::shared_ptr<Storage
char file_name[17];
int name_pos = 0;
while(name_pos < 16) {
file_name[name_pos] = (char)parser.get_next_byte(tape, is_fast);
file_name[name_pos] = char(parser.get_next_byte(tape, is_fast));
if(!file_name[name_pos]) break;
name_pos++;
}
@@ -72,7 +72,7 @@ std::vector<File> Analyser::Static::Oric::GetFiles(const std::shared_ptr<Storage
std::size_t body_length = new_file.ending_address - new_file.starting_address + 1;
new_file.data.reserve(body_length);
for(std::size_t c = 0; c < body_length; c++) {
new_file.data.push_back(static_cast<uint8_t>(parser.get_next_byte(tape, is_fast)));
new_file.data.push_back(uint8_t(parser.get_next_byte(tape, is_fast)));
}
// only one validation check: was there enough tape?

View File

@@ -9,6 +9,8 @@
#ifndef Analyser_Static_Oric_Target_h
#define Analyser_Static_Oric_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
#include <string>
@@ -16,25 +18,42 @@ namespace Analyser {
namespace Static {
namespace Oric {
struct Target: public ::Analyser::Static::Target {
enum class ROM {
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(ROM,
BASIC10,
BASIC11,
Pravetz
};
);
enum class DiskInterface {
ReflectableEnum(DiskInterface,
None,
Microdisc,
Pravetz,
Jasmin,
BD500,
None
};
BD500
);
ReflectableEnum(Processor,
MOS6502,
WDC65816
);
ROM rom = ROM::BASIC11;
DiskInterface disk_interface = DiskInterface::None;
Processor processor = Processor::MOS6502;
std::string loading_command;
bool should_start_jasmin = false;
Target(): Analyser::Static::Target(Machine::Oric) {
if(needs_declare()) {
DeclareField(rom);
DeclareField(disk_interface);
DeclareField(processor);
AnnounceEnum(ROM);
AnnounceEnum(DiskInterface);
AnnounceEnum(Processor);
}
}
};
}

View File

@@ -13,15 +13,13 @@
#include <algorithm>
#include <cstring>
Analyser::Static::TargetList Analyser::Static::Sega::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::Sega::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType) {
if(media.cartridges.empty())
return {};
TargetList targets;
auto target = std::make_unique<Target>();
target->machine = Machine::MasterSystem;
// Files named .sg are treated as for the SG1000; otherwise assume a Master System.
if(file_name.size() >= 2 && *(file_name.end() - 2) == 's' && *(file_name.end() - 1) == 'g') {
target->model = Target::Model::SG1000;

View File

@@ -9,23 +9,27 @@
#ifndef Analyser_Static_Sega_Target_h
#define Analyser_Static_Sega_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
namespace Analyser {
namespace Static {
namespace Sega {
struct Target: public ::Analyser::Static::Target {
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
enum class Model {
SG1000,
MasterSystem,
MasterSystem2,
};
enum class Region {
ReflectableEnum(Region,
Japan,
USA,
Europe,
Brazil
};
);
enum class PagingScheme {
Sega,
@@ -35,6 +39,13 @@ struct Target: public ::Analyser::Static::Target {
Model model = Model::MasterSystem;
Region region = Region::Japan;
PagingScheme paging_scheme = PagingScheme::Sega;
Target() : Analyser::Static::Target(Machine::MasterSystem) {
if(needs_declare()) {
DeclareField(region);
AnnounceEnum(Region);
}
}
};
#define is_master_system(v) v >= Analyser::Static::Sega::Target::Model::MasterSystem

View File

@@ -15,34 +15,41 @@
// Analysers
#include "Acorn/StaticAnalyser.hpp"
#include "Amiga/StaticAnalyser.hpp"
#include "AmstradCPC/StaticAnalyser.hpp"
#include "AppleII/StaticAnalyser.hpp"
#include "AppleIIgs/StaticAnalyser.hpp"
#include "Atari2600/StaticAnalyser.hpp"
#include "AtariST/StaticAnalyser.hpp"
#include "Coleco/StaticAnalyser.hpp"
#include "Commodore/StaticAnalyser.hpp"
#include "DiskII/StaticAnalyser.hpp"
#include "Enterprise/StaticAnalyser.hpp"
#include "Macintosh/StaticAnalyser.hpp"
#include "MSX/StaticAnalyser.hpp"
#include "Oric/StaticAnalyser.hpp"
#include "Sega/StaticAnalyser.hpp"
#include "ZX8081/StaticAnalyser.hpp"
#include "ZXSpectrum/StaticAnalyser.hpp"
// Cartridges
#include "../../Storage/Cartridge/Formats/BinaryDump.hpp"
#include "../../Storage/Cartridge/Formats/PRG.hpp"
// Disks
#include "../../Storage/Disk/DiskImage/Formats/2MG.hpp"
#include "../../Storage/Disk/DiskImage/Formats/AcornADF.hpp"
#include "../../Storage/Disk/DiskImage/Formats/AmigaADF.hpp"
#include "../../Storage/Disk/DiskImage/Formats/AppleDSK.hpp"
#include "../../Storage/Disk/DiskImage/Formats/CPCDSK.hpp"
#include "../../Storage/Disk/DiskImage/Formats/D64.hpp"
#include "../../Storage/Disk/DiskImage/Formats/MacintoshIMG.hpp"
#include "../../Storage/Disk/DiskImage/Formats/G64.hpp"
#include "../../Storage/Disk/DiskImage/Formats/DMK.hpp"
#include "../../Storage/Disk/DiskImage/Formats/FAT12.hpp"
#include "../../Storage/Disk/DiskImage/Formats/HFE.hpp"
#include "../../Storage/Disk/DiskImage/Formats/IPF.hpp"
#include "../../Storage/Disk/DiskImage/Formats/MacintoshIMG.hpp"
#include "../../Storage/Disk/DiskImage/Formats/MSA.hpp"
#include "../../Storage/Disk/DiskImage/Formats/MSXDSK.hpp"
#include "../../Storage/Disk/DiskImage/Formats/NIB.hpp"
#include "../../Storage/Disk/DiskImage/Formats/OricMFMDSK.hpp"
#include "../../Storage/Disk/DiskImage/Formats/SSD.hpp"
@@ -51,8 +58,15 @@
#include "../../Storage/Disk/DiskImage/Formats/WOZ.hpp"
// Mass Storage Devices (i.e. usually, hard disks)
#include "../../Storage/MassStorage/Formats/DAT.hpp"
#include "../../Storage/MassStorage/Formats/DSK.hpp"
#include "../../Storage/MassStorage/Formats/HFV.hpp"
// State Snapshots
#include "../../Storage/State/SNA.hpp"
#include "../../Storage/State/SZX.hpp"
#include "../../Storage/State/Z80.hpp"
// Tapes
#include "../../Storage/Tape/Formats/CAS.hpp"
#include "../../Storage/Tape/Formats/CommodoreTAP.hpp"
@@ -62,80 +76,118 @@
#include "../../Storage/Tape/Formats/TapeUEF.hpp"
#include "../../Storage/Tape/Formats/TZX.hpp"
#include "../../Storage/Tape/Formats/ZX80O81P.hpp"
#include "../../Storage/Tape/Formats/ZXSpectrumTAP.hpp"
// Target Platform Types
#include "../../Storage/TargetPlatforms.hpp"
using namespace Analyser::Static;
static Media GetMediaAndPlatforms(const std::string &file_name, TargetPlatform::IntType &potential_platforms) {
Media result;
namespace {
std::string get_extension(const std::string &name) {
// Get the extension, if any; it will be assumed that extensions are reliable, so an extension is a broad-phase
// test as to file format.
std::string::size_type final_dot = file_name.find_last_of(".");
if(final_dot == std::string::npos) return result;
std::string extension = file_name.substr(final_dot + 1);
std::string::size_type final_dot = name.find_last_of(".");
if(final_dot == std::string::npos) return name;
std::string extension = name.substr(final_dot + 1);
std::transform(extension.begin(), extension.end(), extension.begin(), ::tolower);
return extension;
}
#define Insert(list, class, platforms) \
list.emplace_back(new Storage::class(file_name));\
}
static Media GetMediaAndPlatforms(const std::string &file_name, TargetPlatform::IntType &potential_platforms) {
Media result;
const std::string extension = get_extension(file_name);
#define InsertInstance(list, instance, platforms) \
list.emplace_back(instance);\
potential_platforms |= platforms;\
TargetPlatform::TypeDistinguisher *distinguisher = dynamic_cast<TargetPlatform::TypeDistinguisher *>(list.back().get());\
TargetPlatform::TypeDistinguisher *const distinguisher = dynamic_cast<TargetPlatform::TypeDistinguisher *>(list.back().get());\
if(distinguisher) potential_platforms &= distinguisher->target_platform_type();
#define TryInsert(list, class, platforms) \
#define Insert(list, class, platforms, ...) \
InsertInstance(list, new Storage::class(__VA_ARGS__), platforms);
#define TryInsert(list, class, platforms, ...) \
try {\
Insert(list, class, platforms) \
Insert(list, class, platforms, __VA_ARGS__) \
} catch(...) {}
#define Format(ext, list, class, platforms) \
if(extension == ext) { \
TryInsert(list, class, platforms) \
TryInsert(list, class, platforms, file_name) \
}
// 2MG
if(extension == "2mg") {
// 2MG uses a factory method; defer to it.
try {
InsertInstance(result.disks, Storage::Disk::Disk2MG::open(file_name), TargetPlatform::DiskII)
} catch(...) {}
}
Format("80", result.tapes, Tape::ZX80O81P, TargetPlatform::ZX8081) // 80
Format("81", result.tapes, Tape::ZX80O81P, TargetPlatform::ZX8081) // 81
Format("a26", result.cartridges, Cartridge::BinaryDump, TargetPlatform::Atari2600) // A26
Format("adf", result.disks, Disk::DiskImageHolder<Storage::Disk::AcornADF>, TargetPlatform::Acorn) // ADF
Format("adf", result.disks, Disk::DiskImageHolder<Storage::Disk::AcornADF>, TargetPlatform::Acorn) // ADF (Acorn)
Format("adf", result.disks, Disk::DiskImageHolder<Storage::Disk::AmigaADF>, TargetPlatform::Amiga) // ADF (Amiga)
Format("adl", result.disks, Disk::DiskImageHolder<Storage::Disk::AcornADF>, TargetPlatform::Acorn) // ADL
Format("bin", result.cartridges, Cartridge::BinaryDump, TargetPlatform::AllCartridge) // BIN (cartridge dump)
Format("cas", result.tapes, Tape::CAS, TargetPlatform::MSX) // CAS
Format("cdt", result.tapes, Tape::TZX, TargetPlatform::AmstradCPC) // CDT
Format("col", result.cartridges, Cartridge::BinaryDump, TargetPlatform::ColecoVision) // COL
Format("col", result.cartridges, Cartridge::BinaryDump, TargetPlatform::Coleco) // COL
Format("csw", result.tapes, Tape::CSW, TargetPlatform::AllTape) // CSW
Format("d64", result.disks, Disk::DiskImageHolder<Storage::Disk::D64>, TargetPlatform::Commodore) // D64
Format("dat", result.mass_storage_devices, MassStorage::DAT, TargetPlatform::Acorn) // DAT
Format("dmk", result.disks, Disk::DiskImageHolder<Storage::Disk::DMK>, TargetPlatform::MSX) // DMK
Format("do", result.disks, Disk::DiskImageHolder<Storage::Disk::AppleDSK>, TargetPlatform::DiskII) // DO
Format("dsd", result.disks, Disk::DiskImageHolder<Storage::Disk::SSD>, TargetPlatform::Acorn) // DSD
Format("dsk", result.disks, Disk::DiskImageHolder<Storage::Disk::CPCDSK>, TargetPlatform::AmstradCPC) // DSK (Amstrad CPC)
Format( "dsk",
result.disks,
Disk::DiskImageHolder<Storage::Disk::CPCDSK>,
TargetPlatform::AmstradCPC | TargetPlatform::Oric | TargetPlatform::ZXSpectrum) // DSK (Amstrad CPC, etc)
Format("dsk", result.disks, Disk::DiskImageHolder<Storage::Disk::AppleDSK>, TargetPlatform::DiskII) // DSK (Apple II)
Format("dsk", result.disks, Disk::DiskImageHolder<Storage::Disk::MacintoshIMG>, TargetPlatform::Macintosh) // DSK (Macintosh, floppy disk)
Format("dsk", result.mass_storage_devices, MassStorage::HFV, TargetPlatform::Macintosh) // DSK (Macintosh, hard disk)
Format("dsk", result.disks, Disk::DiskImageHolder<Storage::Disk::MSXDSK>, TargetPlatform::MSX) // DSK (MSX)
Format("dsk", result.mass_storage_devices, MassStorage::HFV, TargetPlatform::Macintosh) // DSK (Macintosh, hard disk, single volume image)
Format("dsk", result.mass_storage_devices, MassStorage::DSK, TargetPlatform::Macintosh) // DSK (Macintosh, hard disk, full device image)
Format("dsk", result.disks, Disk::DiskImageHolder<Storage::Disk::FAT12>, TargetPlatform::MSX) // DSK (MSX)
Format("dsk", result.disks, Disk::DiskImageHolder<Storage::Disk::OricMFMDSK>, TargetPlatform::Oric) // DSK (Oric)
Format("g64", result.disks, Disk::DiskImageHolder<Storage::Disk::G64>, TargetPlatform::Commodore) // G64
Format( "hfe",
result.disks,
Disk::DiskImageHolder<Storage::Disk::HFE>,
TargetPlatform::Acorn | TargetPlatform::AmstradCPC | TargetPlatform::Commodore | TargetPlatform::Oric)
TargetPlatform::Acorn | TargetPlatform::AmstradCPC | TargetPlatform::Commodore | TargetPlatform::Oric | TargetPlatform::ZXSpectrum)
// HFE (TODO: switch to AllDisk once the MSX stops being so greedy)
Format("img", result.disks, Disk::DiskImageHolder<Storage::Disk::MacintoshIMG>, TargetPlatform::Macintosh) // IMG (DiskCopy 4.2)
Format("image", result.disks, Disk::DiskImageHolder<Storage::Disk::MacintoshIMG>, TargetPlatform::Macintosh) // IMG (DiskCopy 4.2)
Format("img", result.disks, Disk::DiskImageHolder<Storage::Disk::FAT12>, TargetPlatform::Enterprise) // IMG (Enterprise/MS-DOS style)
Format( "ipf",
result.disks,
Disk::DiskImageHolder<Storage::Disk::IPF>,
TargetPlatform::Amiga | TargetPlatform::AtariST | TargetPlatform::AmstradCPC | TargetPlatform::ZXSpectrum) // IPF
Format("msa", result.disks, Disk::DiskImageHolder<Storage::Disk::MSA>, TargetPlatform::AtariST) // MSA
Format("nib", result.disks, Disk::DiskImageHolder<Storage::Disk::NIB>, TargetPlatform::DiskII) // NIB
Format("o", result.tapes, Tape::ZX80O81P, TargetPlatform::ZX8081) // O
Format("p", result.tapes, Tape::ZX80O81P, TargetPlatform::ZX8081) // P
Format("po", result.disks, Disk::DiskImageHolder<Storage::Disk::AppleDSK>, TargetPlatform::DiskII) // PO
Format("po", result.disks, Disk::DiskImageHolder<Storage::Disk::AppleDSK>, TargetPlatform::DiskII) // PO (original Apple II kind)
// PO (Apple IIgs kind)
if(extension == "po") {
TryInsert(result.disks, Disk::DiskImageHolder<Storage::Disk::MacintoshIMG>, TargetPlatform::AppleIIgs, file_name, Storage::Disk::MacintoshIMG::FixedType::GCR)
}
Format("p81", result.tapes, Tape::ZX80O81P, TargetPlatform::ZX8081) // P81
// PRG
if(extension == "prg") {
// try instantiating as a ROM; failing that accept as a tape
try {
Insert(result.cartridges, Cartridge::PRG, TargetPlatform::Commodore)
Insert(result.cartridges, Cartridge::PRG, TargetPlatform::Commodore, file_name)
} catch(...) {
try {
Insert(result.tapes, Tape::PRG, TargetPlatform::Commodore)
Insert(result.tapes, Tape::PRG, TargetPlatform::Commodore, file_name)
} catch(...) {}
}
}
@@ -143,7 +195,7 @@ static Media GetMediaAndPlatforms(const std::string &file_name, TargetPlatform::
Format( "rom",
result.cartridges,
Cartridge::BinaryDump,
TargetPlatform::AcornElectron | TargetPlatform::ColecoVision | TargetPlatform::MSX) // ROM
TargetPlatform::AcornElectron | TargetPlatform::Coleco | TargetPlatform::MSX) // ROM
Format("sg", result.cartridges, Cartridge::BinaryDump, TargetPlatform::Sega) // SG
Format("sms", result.cartridges, Cartridge::BinaryDump, TargetPlatform::Sega) // SMS
Format("ssd", result.disks, Disk::DiskImageHolder<Storage::Disk::SSD>, TargetPlatform::Acorn) // SSD
@@ -151,14 +203,16 @@ static Media GetMediaAndPlatforms(const std::string &file_name, TargetPlatform::
Format("stx", result.disks, Disk::DiskImageHolder<Storage::Disk::STX>, TargetPlatform::AtariST) // STX
Format("tap", result.tapes, Tape::CommodoreTAP, TargetPlatform::Commodore) // TAP (Commodore)
Format("tap", result.tapes, Tape::OricTAP, TargetPlatform::Oric) // TAP (Oric)
Format("tap", result.tapes, Tape::ZXSpectrumTAP, TargetPlatform::ZXSpectrum) // TAP (ZX Spectrum)
Format("tsx", result.tapes, Tape::TZX, TargetPlatform::MSX) // TSX
Format("tzx", result.tapes, Tape::TZX, TargetPlatform::ZX8081) // TZX
Format("tzx", result.tapes, Tape::TZX, TargetPlatform::ZX8081 | TargetPlatform::ZXSpectrum) // TZX
Format("uef", result.tapes, Tape::UEF, TargetPlatform::Acorn) // UEF (tape)
Format("woz", result.disks, Disk::DiskImageHolder<Storage::Disk::WOZ>, TargetPlatform::DiskII) // WOZ
#undef Format
#undef Insert
#undef TryInsert
#undef InsertInstance
return result;
}
@@ -170,34 +224,59 @@ Media Analyser::Static::GetMedia(const std::string &file_name) {
TargetList Analyser::Static::GetTargets(const std::string &file_name) {
TargetList targets;
const std::string extension = get_extension(file_name);
// Check whether the file directly identifies a target; if so then just return that.
#define Format(ext, class) \
if(extension == ext) { \
try { \
auto target = Storage::State::class::load(file_name); \
if(target) { \
targets.push_back(std::move(target)); \
return targets; \
} \
} catch(...) {} \
}
Format("sna", SNA);
Format("szx", SZX);
Format("z80", Z80);
#undef TryInsert
// Otherwise:
//
// Collect all disks, tapes ROMs, etc as can be extrapolated from this file, forming the
// union of all platforms this file might be a target for.
TargetPlatform::IntType potential_platforms = 0;
Media media = GetMediaAndPlatforms(file_name, potential_platforms);
// Hand off to platform-specific determination of whether these things are actually compatible and,
// if so, how to load them.
#define Append(x) {\
auto new_targets = x::GetTargets(media, file_name, potential_platforms);\
std::move(new_targets.begin(), new_targets.end(), std::back_inserter(targets));\
}
if(potential_platforms & TargetPlatform::Acorn) Append(Acorn);
if(potential_platforms & TargetPlatform::AmstradCPC) Append(AmstradCPC);
if(potential_platforms & TargetPlatform::AppleII) Append(AppleII);
if(potential_platforms & TargetPlatform::Atari2600) Append(Atari2600);
if(potential_platforms & TargetPlatform::AtariST) Append(AtariST);
if(potential_platforms & TargetPlatform::ColecoVision) Append(Coleco);
if(potential_platforms & TargetPlatform::Commodore) Append(Commodore);
if(potential_platforms & TargetPlatform::DiskII) Append(DiskII);
if(potential_platforms & TargetPlatform::Macintosh) Append(Macintosh);
if(potential_platforms & TargetPlatform::MSX) Append(MSX);
if(potential_platforms & TargetPlatform::Oric) Append(Oric);
if(potential_platforms & TargetPlatform::Sega) Append(Sega);
if(potential_platforms & TargetPlatform::ZX8081) Append(ZX8081);
#undef Append
// Hand off to platform-specific determination of whether these
// things are actually compatible and, if so, how to load them.
#define Append(x) if(potential_platforms & TargetPlatform::x) {\
auto new_targets = x::GetTargets(media, file_name, potential_platforms);\
std::move(new_targets.begin(), new_targets.end(), std::back_inserter(targets));\
}
Append(Acorn);
Append(AmstradCPC);
Append(AppleII);
Append(AppleIIgs);
Append(Amiga);
Append(Atari2600);
Append(AtariST);
Append(Coleco);
Append(Commodore);
Append(DiskII);
Append(Enterprise);
Append(Macintosh);
Append(MSX);
Append(Oric);
Append(Sega);
Append(ZX8081);
Append(ZXSpectrum);
#undef Append
// Reset any tapes to their initial position
// Reset any tapes to their initial position.
for(const auto &target : targets) {
for(auto &tape : target->media.tapes) {
tape->reset();

View File

@@ -15,6 +15,7 @@
#include "../../Storage/Disk/Disk.hpp"
#include "../../Storage/MassStorage/MassStorageDevice.hpp"
#include "../../Storage/Tape/Tape.hpp"
#include "../../Reflection/Struct.hpp"
#include <memory>
#include <string>
@@ -23,8 +24,10 @@
namespace Analyser {
namespace Static {
struct State;
/*!
A list of disks, tapes and cartridges.
A list of disks, tapes and cartridges, and possibly a state snapshot.
*/
struct Media {
std::vector<std::shared_ptr<Storage::Disk::Disk>> disks;
@@ -35,18 +38,32 @@ struct Media {
bool empty() const {
return disks.empty() && tapes.empty() && cartridges.empty() && mass_storage_devices.empty();
}
Media &operator +=(const Media &rhs) {
#define append(name) name.insert(name.end(), rhs.name.begin(), rhs.name.end());
append(disks);
append(tapes);
append(cartridges);
append(mass_storage_devices);
#undef append
return *this;
}
};
/*!
A list of disks, tapes and cartridges plus information about the machine to which to attach them and its configuration,
and instructions on how to launch the software attached, plus a measure of confidence in this target's correctness.
Describes a machine and possibly its state; conventionally subclassed to add other machine-specific configuration fields and any
necessary instructions on how to launch any software provided, plus a measure of confidence in this target's correctness.
*/
struct Target {
Target(Machine machine) : machine(machine) {}
virtual ~Target() {}
// This field is entirely optional.
std::unique_ptr<Reflection::Struct> state;
Machine machine;
Media media;
float confidence;
float confidence = 0.0f;
};
typedef std::vector<std::unique_ptr<Target>> TargetList;

View File

@@ -28,13 +28,13 @@ static std::vector<Storage::Data::ZX8081::File> GetFiles(const std::shared_ptr<S
return files;
}
Analyser::Static::TargetList Analyser::Static::ZX8081::GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms) {
Analyser::Static::TargetList Analyser::Static::ZX8081::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType potential_platforms) {
TargetList destination;
if(!media.tapes.empty()) {
std::vector<Storage::Data::ZX8081::File> files = GetFiles(media.tapes.front());
media.tapes.front()->reset();
if(!files.empty()) {
Target *target = new Target;
Target *const target = new Target;
destination.push_back(std::unique_ptr<::Analyser::Static::Target>(target));
target->machine = Machine::ZX8081;

View File

@@ -9,6 +9,8 @@
#ifndef Analyser_Static_ZX8081_Target_h
#define Analyser_Static_ZX8081_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
#include <string>
@@ -16,17 +18,26 @@ namespace Analyser {
namespace Static {
namespace ZX8081 {
struct Target: public ::Analyser::Static::Target {
enum class MemoryModel {
struct Target: public ::Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(MemoryModel,
Unexpanded,
SixteenKB,
SixtyFourKB
};
);
MemoryModel memory_model = MemoryModel::Unexpanded;
bool is_ZX81 = false;
bool ZX80_uses_ZX81_ROM = false;
std::string loading_command;
Target(): Analyser::Static::Target(Machine::ZX8081) {
if(needs_declare()) {
DeclareField(memory_model);
DeclareField(is_ZX81);
DeclareField(ZX80_uses_ZX81_ROM);
AnnounceEnum(MemoryModel);
}
}
};
}

View File

@@ -0,0 +1,95 @@
//
// StaticAnalyser.cpp
// Clock Signal
//
// Created by Thomas Harte on 17/03/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#include "StaticAnalyser.hpp"
#include "../../../Storage/Disk/Encodings/MFM/Parser.hpp"
#include "../../../Storage/Tape/Parsers/Spectrum.hpp"
#include "Target.hpp"
namespace {
bool IsSpectrumTape(const std::shared_ptr<Storage::Tape::Tape> &tape) {
using Parser = Storage::Tape::ZXSpectrum::Parser;
Parser parser(Parser::MachineType::ZXSpectrum);
while(true) {
const auto block = parser.find_block(tape);
if(!block) break;
// Check for a Spectrum header block.
if(block->type == 0x00) {
return true;
}
}
return false;
}
bool IsSpectrumDisk(const std::shared_ptr<Storage::Disk::Disk> &disk) {
Storage::Encodings::MFM::Parser parser(true, disk);
// Get logical sector 1; the Spectrum appears to support various physical
// sectors as sector 1.
Storage::Encodings::MFM::Sector *boot_sector = nullptr;
uint8_t sector_mask = 0;
while(!boot_sector) {
boot_sector = parser.get_sector(0, 0, sector_mask + 1);
sector_mask += 0x40;
if(!sector_mask) break;
}
if(!boot_sector) return false;
// Test that the contents of the boot sector sum to 3, modulo 256.
uint8_t byte_sum = 0;
for(auto byte: boot_sector->samples[0]) {
byte_sum += byte;
}
return byte_sum == 3;
}
}
Analyser::Static::TargetList Analyser::Static::ZXSpectrum::GetTargets(const Media &media, const std::string &, TargetPlatform::IntType) {
TargetList destination;
auto target = std::make_unique<Target>();
target->confidence = 0.5;
if(!media.tapes.empty()) {
bool has_spectrum_tape = false;
for(auto &tape: media.tapes) {
has_spectrum_tape |= IsSpectrumTape(tape);
}
if(has_spectrum_tape) {
target->media.tapes = media.tapes;
}
}
if(!media.disks.empty()) {
bool has_spectrum_disk = false;
for(auto &disk: media.disks) {
has_spectrum_disk |= IsSpectrumDisk(disk);
}
if(has_spectrum_disk) {
target->media.disks = media.disks;
target->model = Target::Model::Plus3;
}
}
// If any media survived, add the target.
if(!target->media.empty()) {
target->should_hold_enter = true; // To force entry into the 'loader' and thereby load the media.
destination.push_back(std::move(target));
}
return destination;
}

View File

@@ -0,0 +1,26 @@
//
// StaticAnalyser.hpp
// Clock Signal
//
// Created by Thomas Harte on 17/03/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef Analyser_Static_ZXSpectrum_StaticAnalyser_hpp
#define Analyser_Static_ZXSpectrum_StaticAnalyser_hpp
#include "../StaticAnalyser.hpp"
#include "../../../Storage/TargetPlatforms.hpp"
#include <string>
namespace Analyser {
namespace Static {
namespace ZXSpectrum {
TargetList GetTargets(const Media &media, const std::string &file_name, TargetPlatform::IntType potential_platforms);
}
}
}
#endif /* StaticAnalyser_hpp */

View File

@@ -0,0 +1,45 @@
//
// Target.hpp
// Clock Signal
//
// Created by Thomas Harte on 18/03/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef Analyser_Static_ZXSpectrum_Target_h
#define Analyser_Static_ZXSpectrum_Target_h
#include "../../../Reflection/Enum.hpp"
#include "../../../Reflection/Struct.hpp"
#include "../StaticAnalyser.hpp"
namespace Analyser {
namespace Static {
namespace ZXSpectrum {
struct Target: public ::Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(Model,
SixteenK,
FortyEightK,
OneTwoEightK,
Plus2,
Plus2a,
Plus3,
);
Model model = Model::Plus2;
bool should_hold_enter = false;
Target(): Analyser::Static::Target(Machine::ZXSpectrum) {
if(needs_declare()) {
DeclareField(model);
AnnounceEnum(Model);
}
}
};
}
}
}
#endif /* Target_h */

View File

@@ -10,7 +10,10 @@
#define ClockReceiver_hpp
#include "ForceInline.hpp"
#include <algorithm>
#include <cstdint>
#include <limits>
/*
Informal pattern for all classes that run from a clock cycle:
@@ -136,8 +139,11 @@ template <class T> class WrappedInt {
forceinline constexpr bool operator !() const { return !length_; }
// bool operator () is not supported because it offers an implicit cast to int, which is prone silently to permit misuse
/// @returns The underlying int, cast to an integral type of your choosing.
template<typename Type = IntType> forceinline constexpr Type as() const { return Type(length_); }
/// @returns The underlying int, converted to an integral type of your choosing, clamped to that int's range.
template<typename Type = IntType> forceinline constexpr Type as() const {
const auto clamped = std::clamp(length_, IntType(std::numeric_limits<Type>::min()), IntType(std::numeric_limits<Type>::max()));
return Type(clamped);
}
/// @returns The underlying int, in its native form.
forceinline constexpr IntType as_integral() const { return length_; }
@@ -176,7 +182,9 @@ class Cycles: public WrappedInt<Cycles> {
public:
forceinline constexpr Cycles(IntType l) noexcept : WrappedInt<Cycles>(l) {}
forceinline constexpr Cycles() noexcept : WrappedInt<Cycles>() {}
forceinline constexpr Cycles(const Cycles &cycles) noexcept : WrappedInt<Cycles>(cycles.length_) {}
forceinline static constexpr Cycles max() {
return Cycles(std::numeric_limits<IntType>::max());
}
private:
friend WrappedInt;
@@ -196,9 +204,11 @@ class HalfCycles: public WrappedInt<HalfCycles> {
public:
forceinline constexpr HalfCycles(IntType l) noexcept : WrappedInt<HalfCycles>(l) {}
forceinline constexpr HalfCycles() noexcept : WrappedInt<HalfCycles>() {}
forceinline static constexpr HalfCycles max() {
return HalfCycles(std::numeric_limits<IntType>::max());
}
forceinline constexpr HalfCycles(const Cycles &cycles) noexcept : WrappedInt<HalfCycles>(cycles.as_integral() * 2) {}
forceinline constexpr HalfCycles(const HalfCycles &half_cycles) noexcept : WrappedInt<HalfCycles>(half_cycles.length_) {}
/// @returns The number of whole cycles completely covered by this span of half cycles.
forceinline constexpr Cycles cycles() const {
@@ -207,7 +217,7 @@ class HalfCycles: public WrappedInt<HalfCycles> {
/*!
Severs from @c this the effect of dividing by @c divisor; @c this will end up with
the value of @c this modulo @c divisor and @c divided by @c divisor is returned.
the value of @c this modulo @c divisor . @c this divided by @c divisor is returned.
*/
forceinline Cycles divide_cycles(const Cycles &divisor) {
const HalfCycles half_divisor = HalfCycles(divisor);
@@ -216,6 +226,15 @@ class HalfCycles: public WrappedInt<HalfCycles> {
return result;
}
/*!
Equivalent to @c divide_cycles(Cycles(1)) but faster.
*/
forceinline Cycles divide_cycles() {
const Cycles result(length_ >> 1);
length_ &= 1;
return result;
}
private:
friend WrappedInt;
void fill(Cycles &result) {

View File

@@ -67,7 +67,7 @@ class Source {
}
/// @returns the current preferred clocking strategy.
virtual Preference preferred_clocking() = 0;
virtual Preference preferred_clocking() const = 0;
private:
Observer *observer_ = nullptr;

View File

@@ -49,7 +49,7 @@ template <typename TimeUnit> class DeferredQueue {
@returns The amount of time until the next enqueued action will occur,
or TimeUnit(-1) if the queue is empty.
*/
TimeUnit time_until_next_action() {
TimeUnit time_until_next_action() const {
if(pending_actions_.empty()) return TimeUnit(-1);
return pending_actions_.front().delay;
}
@@ -95,7 +95,7 @@ template <typename TimeUnit> class DeferredQueue {
template <typename TimeUnit> class DeferredQueuePerformer: public DeferredQueue<TimeUnit> {
public:
/// Constructs a DeferredQueue that will call target(period) in between deferred actions.
DeferredQueuePerformer(std::function<void(TimeUnit)> &&target) : target_(std::move(target)) {}
constexpr DeferredQueuePerformer(std::function<void(TimeUnit)> &&target) : target_(std::move(target)) {}
/*!
Runs for @c length units of time.

View File

@@ -0,0 +1,48 @@
//
// DeferredValue.hpp
// Clock Signal
//
// Created by Thomas Harte on 07/08/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef DeferredValue_h
#define DeferredValue_h
/*!
Provides storage for a single deferred value: one with a current value and a certain number
of future values.
*/
template <int DeferredDepth, typename ValueT> class DeferredValue {
private:
static_assert(sizeof(ValueT) <= 4);
constexpr int elements_per_uint32 = sizeof(uint32_t) / sizeof(ValueT);
constexpr int unit_shift = sizeof(ValueT) * 8;
constexpr int insert_shift = (DeferredDepth & (elements_per_uint32 - 1)) * unit_shift;
constexpr uint32_t insert_mask = ~(0xffff'ffff << insert_shift);
std::array<uint32_t, (DeferredDepth + elements_per_uint32 - 1) / elements_per_uint32> backlog;
public:
/// @returns the current value.
ValueT value() const {
return uint8_t(backlog[0]);
}
/// Advances to the next enqueued value.
void advance() {
for(size_t c = 0; c < backlog.size() - 1; c--) {
backlog[c] = (backlog[c] >> unit_shift) | (backlog[c+1] << (32 - unit_shift));
}
backlog[backlog.size() - 1] >>= unit_shift;
}
/// Inserts a new value, replacing whatever is currently at the end of the queue.
void insert(ValueT value) {
backlog[DeferredDepth / elements_per_uint32] =
(backlog[DeferredDepth / elements_per_uint32] & insert_mask) | (value << insert_shift);
}
};
#endif /* DeferredValue_h */

View File

@@ -9,7 +9,9 @@
#ifndef JustInTime_h
#define JustInTime_h
#include "ClockReceiver.hpp"
#include "../Concurrency/AsyncTaskQueue.hpp"
#include "ClockingHintSource.hpp"
#include "ForceInline.hpp"
/*!
@@ -21,44 +23,150 @@
Machines that accumulate HalfCycle time but supply to a Cycle-counted device may supply a
separate @c TargetTimeScale at template declaration.
If the held object implements get_next_sequence_point() then it'll be used to flush implicitly
as and when sequence points are hit. Callers can use will_flush() to predict these.
If the held object is a subclass of ClockingHint::Source, this template will register as an
observer and potentially stop clocking or stop delaying clocking until just-in-time references
as directed.
TODO: incorporate and codify AsyncJustInTimeActor.
*/
template <class T, int multiplier = 1, int divider = 1, class LocalTimeScale = HalfCycles, class TargetTimeScale = LocalTimeScale> class JustInTimeActor {
template <class T, class LocalTimeScale = HalfCycles, int multiplier = 1, int divider = 1> class JustInTimeActor:
public ClockingHint::Observer {
private:
/*!
A std::unique_ptr deleter which causes an update_sequence_point to occur on the actor supplied
to it at construction if it implements get_next_sequence_point(). Otherwise destruction is a no-op.
**Does not delete the object.**
This is used by the -> operators below, which provide a unique pointer to the enclosed object and
update their sequence points upon its destruction — i.e. after the caller has made whatever call
or calls as were relevant to the enclosed object.
*/
class SequencePointAwareDeleter {
public:
explicit SequencePointAwareDeleter(JustInTimeActor<T, LocalTimeScale, multiplier, divider> *actor) noexcept
: actor_(actor) {}
forceinline void operator ()(const T *const) const {
if constexpr (has_sequence_points<T>::value) {
actor_->update_sequence_point();
}
}
private:
JustInTimeActor<T, LocalTimeScale, multiplier, divider> *const actor_;
};
// This block of SFINAE determines whether objects of type T accepts Cycles or HalfCycles.
using HalfRunFor = void (T::*const)(HalfCycles);
static uint8_t half_sig(...);
static uint16_t half_sig(HalfRunFor);
using TargetTimeScale =
std::conditional_t<
sizeof(half_sig(&T::run_for)) == sizeof(uint16_t),
HalfCycles,
Cycles>;
public:
/// Constructs a new JustInTimeActor using the same construction arguments as the included object.
template<typename... Args> JustInTimeActor(Args&&... args) : object_(std::forward<Args>(args)...) {}
template<typename... Args> JustInTimeActor(Args&&... args) : object_(std::forward<Args>(args)...) {
if constexpr (std::is_base_of<ClockingHint::Source, T>::value) {
object_.set_clocking_hint_observer(this);
}
}
/// Adds time to the actor.
forceinline void operator += (const LocalTimeScale &rhs) {
///
/// @returns @c true if adding time caused a flush; @c false otherwise.
forceinline bool operator += (LocalTimeScale rhs) {
if constexpr (std::is_base_of<ClockingHint::Source, T>::value) {
if(clocking_preference_ == ClockingHint::Preference::None) {
return false;
}
}
if constexpr (multiplier != 1) {
time_since_update_ += rhs * multiplier;
} else {
time_since_update_ += rhs;
}
is_flushed_ = false;
if constexpr (std::is_base_of<ClockingHint::Source, T>::value) {
if (clocking_preference_ == ClockingHint::Preference::RealTime) {
flush();
return true;
}
}
if constexpr (has_sequence_points<T>::value) {
time_until_event_ -= rhs * multiplier;
if(time_until_event_ <= LocalTimeScale(0)) {
time_overrun_ = time_until_event_ / divider;
flush();
update_sequence_point();
return true;
}
}
return false;
}
/// Flushes all accumulated time and returns a pointer to the included object.
forceinline T *operator->() {
///
/// If this object provides sequence points, checks for changes to the next
/// sequence point upon deletion of the pointer.
[[nodiscard]] forceinline auto operator->() {
flush();
return &object_;
return std::unique_ptr<T, SequencePointAwareDeleter>(&object_, SequencePointAwareDeleter(this));
}
/// Acts exactly as per the standard ->, but preserves constness.
forceinline const T *operator->() const {
auto non_const_this = const_cast<JustInTimeActor<T, multiplier, divider, LocalTimeScale, TargetTimeScale> *>(this);
///
/// Despite being const, this will flush the object and, if relevant, update the next sequence point.
[[nodiscard]] forceinline auto operator -> () const {
auto non_const_this = const_cast<JustInTimeActor<T, LocalTimeScale, multiplier, divider> *>(this);
non_const_this->flush();
return std::unique_ptr<const T, SequencePointAwareDeleter>(&object_, SequencePointAwareDeleter(non_const_this));
}
/// @returns a pointer to the included object, without flushing time.
[[nodiscard]] forceinline T *last_valid() {
return &object_;
}
/// Returns a pointer to the included object without flushing time.
forceinline T *last_valid() {
/// @returns a const pointer to the included object, without flushing time.
[[nodiscard]] forceinline const T *last_valid() const {
return &object_;
}
/// @returns the amount of time since the object was last flushed, in the target time scale.
[[nodiscard]] forceinline TargetTimeScale time_since_flush() const {
if constexpr (divider == 1) {
return time_since_update_;
}
return TargetTimeScale(time_since_update_.as_integral() / divider);
}
/// @returns the amount of time since the object was last flushed, plus the local time scale @c offset,
/// converted to the target time scale.
[[nodiscard]] forceinline TargetTimeScale time_since_flush(LocalTimeScale offset) const {
if constexpr (divider == 1) {
return time_since_update_ + offset;
}
return TargetTimeScale((time_since_update_ + offset).as_integral() / divider);
}
/// Flushes all accumulated time.
///
/// This does not affect this actor's record of when the next sequence point will occur.
forceinline void flush() {
if(!is_flushed_) {
is_flushed_ = true;
did_flush_ = is_flushed_ = true;
if constexpr (divider == 1) {
const auto duration = time_since_update_.template flush<TargetTimeScale>();
object_.run_for(duration);
@@ -70,56 +178,96 @@ template <class T, int multiplier = 1, int divider = 1, class LocalTimeScale = H
}
}
private:
T object_;
LocalTimeScale time_since_update_;
bool is_flushed_ = true;
};
/// Indicates whether a flush has occurred since the last call to did_flush().
[[nodiscard]] forceinline bool did_flush() {
const bool did_flush = did_flush_;
did_flush_ = false;
return did_flush;
}
/*!
A RealTimeActor presents the same interface as a JustInTimeActor but doesn't defer work.
Time added will be performed immediately.
/// @returns a number in the range [-max, 0] indicating the offset of the most recent sequence
/// point from the final time at the end of the += that triggered the sequence point.
[[nodiscard]] forceinline LocalTimeScale last_sequence_point_overrun() {
return time_overrun_;
}
Its primary purpose is to allow consumers to remain flexible in their scheduling.
*/
template <class T, int multiplier = 1, int divider = 1, class LocalTimeScale = HalfCycles, class TargetTimeScale = LocalTimeScale> class RealTimeActor {
public:
template<typename... Args> RealTimeActor(Args&&... args) : object_(std::forward<Args>(args)...) {}
/// @returns the number of cycles until the next sequence-point-based flush, if the embedded object
/// supports sequence points; @c LocalTimeScale() otherwise.
[[nodiscard]] LocalTimeScale cycles_until_implicit_flush() const {
return time_until_event_ / divider;
}
forceinline void operator += (const LocalTimeScale &rhs) {
/// Indicates whether a sequence-point-caused flush will occur if the specified period is added.
[[nodiscard]] forceinline bool will_flush(LocalTimeScale rhs) const {
if constexpr (!has_sequence_points<T>::value) {
return false;
}
return rhs >= time_until_event_;
}
/// Indicates the amount of time, in the local time scale, until the first local slot that falls wholly
/// after @c duration, if that delay were to occur in @c offset units of time from now.
[[nodiscard]] forceinline LocalTimeScale back_map(TargetTimeScale duration, TargetTimeScale offset) const {
// A 1:1 mapping is easy.
if constexpr (multiplier == 1 && divider == 1) {
object_.run_for(TargetTimeScale(rhs));
return;
return duration;
}
if constexpr (multiplier == 1) {
accumulated_time_ += rhs;
} else {
accumulated_time_ += rhs * multiplier;
}
// Work out when this query is placed, and the time to which it relates
const auto base = time_since_update_ + offset * divider;
const auto target = base + duration * divider;
if constexpr (divider == 1) {
const auto duration = accumulated_time_.template flush<TargetTimeScale>();
object_.run_for(duration);
} else {
const auto duration = accumulated_time_.template divide<TargetTimeScale>(LocalTimeScale(divider));
if(duration > TargetTimeScale(0))
object_.run_for(duration);
// Figure out the number of whole input steps that is required to get
// past target, and subtract the number of whole input steps necessary
// to get to base.
const auto steps_to_base = base.as_integral() / multiplier;
const auto steps_to_target = (target.as_integral() + divider - 1) / multiplier;
return LocalTimeScale(steps_to_target - steps_to_base);
}
/// Updates this template's record of the next sequence point.
void update_sequence_point() {
if constexpr (has_sequence_points<T>::value) {
// Keep a fast path where no conversions will be applied; if conversions are
// going to be applied then do a direct max -> max translation rather than
// allowing the arithmetic to overflow.
if constexpr (divider == 1 && std::is_same_v<LocalTimeScale, TargetTimeScale>) {
time_until_event_ = object_.get_next_sequence_point();
} else {
const auto time = object_.get_next_sequence_point();
if(time == TargetTimeScale::max()) {
time_until_event_ = LocalTimeScale::max();
} else {
time_until_event_ = time * divider;
}
}
assert(time_until_event_ > LocalTimeScale(0));
}
}
forceinline T *operator->() { return &object_; }
forceinline const T *operator->() const { return &object_; }
forceinline T *last_valid() { return &object_; }
forceinline void flush() {}
/// @returns A cached copy of the object's clocking preference.
ClockingHint::Preference clocking_preference() const {
return clocking_preference_;
}
private:
T object_;
LocalTimeScale accumulated_time_;
LocalTimeScale time_since_update_, time_until_event_, time_overrun_;
bool is_flushed_ = true;
bool did_flush_ = false;
template <typename S, typename = void> struct has_sequence_points : std::false_type {};
template <typename S> struct has_sequence_points<S, decltype(void(std::declval<S &>().get_next_sequence_point()))> : std::true_type {};
ClockingHint::Preference clocking_preference_ = ClockingHint::Preference::JustInTime;
void set_component_prefers_clocking(ClockingHint::Source *, ClockingHint::Preference clocking) {
clocking_preference_ = clocking;
}
};
/*!
A AsyncJustInTimeActor acts like a JustInTimeActor but additionally contains an AsyncTaskQueue.
An AsyncJustInTimeActor acts like a JustInTimeActor but additionally contains an AsyncTaskQueue.
Any time the amount of accumulated time crosses a threshold provided at construction time,
the object will be updated on the AsyncTaskQueue.
*/

View File

@@ -0,0 +1,155 @@
//
// VSyncPredictor.hpp
// Clock Signal
//
// Created by Thomas Harte on 14/06/2020.
// Copyright © 2020 Thomas Harte. All rights reserved.
//
#ifndef VSyncPredictor_hpp
#define VSyncPredictor_hpp
#include "TimeTypes.hpp"
#include <cassert>
#include <cmath>
#include <cstdio>
namespace Time {
/*!
For platforms that provide no avenue into vsync tracking other than block-until-sync,
this class tracks: (i) how long frame draw takes; (ii) the apparent frame period; and
(iii) optionally, timer jitter; in order to suggest when you should next start drawing.
*/
class VSyncPredictor {
public:
/*!
Announces to the predictor that the work of producing an output frame has begun.
*/
void begin_redraw() {
redraw_begin_time_ = nanos_now();
}
/*!
Announces to the predictor that the work of producing an output frame has ended;
the predictor will use the amount of time between each begin/end pair to modify
its expectations as to how long it takes to draw a frame.
*/
void end_redraw() {
redraw_period_.post(nanos_now() - redraw_begin_time_);
}
/*!
Informs the predictor that a block-on-vsync has just ended, i.e. that the moment this
machine calls retrace is now. The predictor uses these notifications to estimate output
frame rate.
*/
void announce_vsync() {
const auto now = nanos_now();
if(last_vsync_) {
last_vsync_ += frame_duration_;
vsync_jitter_.post(last_vsync_ - now);
last_vsync_ = (last_vsync_ + now) >> 1;
} else {
last_vsync_ = now;
}
}
/*!
Sets the frame rate for the target display.
*/
void set_frame_rate(float rate) {
frame_duration_ = Nanos(1'000'000'000.0f / rate);
}
/*!
@returns The time this class currently believes a whole frame occupies.
*/
Time::Nanos frame_duration() {
return frame_duration_;
}
/*!
Adds a record of how much jitter was experienced in scheduling; these values will be
factored into the @c suggested_draw_time if supplied.
A positive number means the timer occurred late. A negative number means it occurred early.
*/
void add_timer_jitter(Time::Nanos jitter) {
timer_jitter_.post(jitter);
}
/*!
Announces to the vsync predictor that output is now paused. This ends frame period
calculations until the next announce_vsync() restarts frame-length counting.
*/
void pause() {
last_vsync_ = 0;
}
/*!
@return The time at which redrawing should begin, given the predicted frame period, how
long it appears to take to draw a frame and how much jitter there is in scheduling
(if those figures are being supplied).
*/
Nanos suggested_draw_time() {
const auto mean = redraw_period_.mean() + timer_jitter_.mean() + vsync_jitter_.mean();
const auto variance = redraw_period_.variance() + timer_jitter_.variance() + vsync_jitter_.variance();
// Permit three standard deviations from the mean, to cover 99.9% of cases.
const auto period = mean + Nanos(3.0f * sqrt(float(variance)));
return last_vsync_ + frame_duration_ - period;
}
private:
class VarianceCollector {
public:
VarianceCollector(Time::Nanos default_value) {
sum_ = default_value * 128;
for(int c = 0; c < 128; ++c) {
history_[c] = default_value;
}
}
void post(Time::Nanos value) {
sum_ -= history_[write_pointer_];
sum_ += value;
history_[write_pointer_] = value;
write_pointer_ = (write_pointer_ + 1) & 127;
}
Time::Nanos mean() {
return sum_ / 128;
}
Time::Nanos variance() {
// I haven't yet come up with a better solution that calculating this
// in whole every time, given the way that the mean mutates.
Time::Nanos variance = 0;
for(int c = 0; c < 128; ++c) {
const auto difference = ((history_[c] * 128) - sum_) / 128;
variance += (difference * difference);
}
return variance / 128;
}
private:
Time::Nanos sum_;
Time::Nanos history_[128];
size_t write_pointer_ = 0;
};
Nanos redraw_begin_time_ = 0;
Nanos last_vsync_ = 0;
Nanos frame_duration_ = 1'000'000'000 / 60;
VarianceCollector vsync_jitter_{0};
VarianceCollector redraw_period_{1'000'000'000 / 60}; // A less convincing first guess.
VarianceCollector timer_jitter_{0}; // Seed at 0 in case this feature isn't used by the owner.
};
}
#endif /* VSyncPredictor_hpp */

View File

@@ -276,7 +276,10 @@ void WD1770::posit_event(int new_event_type) {
goto test_type1_type;
begin_type1_spin_up:
if((command_&0x08) || get_drive().get_motor_on()) goto test_type1_type;
if((command_&0x08) || get_drive().get_motor_on()) {
set_motor_on(true);
goto test_type1_type;
}
SPIN_UP();
test_type1_type:
@@ -387,7 +390,10 @@ void WD1770::posit_event(int new_event_type) {
distance_into_section_ = 0;
if((command_&0x08) && has_motor_on_line()) goto test_type2_delay;
if(!has_motor_on_line() && !has_head_load_line()) goto test_type2_delay;
if(!has_motor_on_line() && !has_head_load_line()) {
if(has_motor_on_line()) set_motor_on(true);
goto test_type2_delay;
}
if(has_motor_on_line()) goto begin_type2_spin_up;
goto begin_type2_load_head;
@@ -498,7 +504,7 @@ void WD1770::posit_event(int new_event_type) {
if(get_crc_generator().get_value()) {
LOG("CRC error; terminating");
update_status([this] (Status &status) {
update_status([] (Status &status) {
status.crc_error = true;
});
goto wait_for_command;
@@ -816,19 +822,19 @@ void WD1770::update_status(std::function<void(Status &)> updater) {
if(status_.busy != old_status.busy) update_clocking_observer();
}
void WD1770::set_head_load_request(bool head_load) {}
void WD1770::set_motor_on(bool motor_on) {}
void WD1770::set_head_load_request(bool) {}
void WD1770::set_motor_on(bool) {}
void WD1770::set_head_loaded(bool head_loaded) {
head_is_loaded_ = head_loaded;
if(head_loaded) posit_event(int(Event1770::HeadLoad));
}
bool WD1770::get_head_loaded() {
bool WD1770::get_head_loaded() const {
return head_is_loaded_;
}
ClockingHint::Preference WD1770::preferred_clocking() {
ClockingHint::Preference WD1770::preferred_clocking() const {
if(status_.busy) return ClockingHint::Preference::RealTime;
return Storage::Disk::MFMController::preferred_clocking();
}

View File

@@ -31,6 +31,7 @@ class WD1770: public Storage::Disk::MFMController {
@param p The type of controller to emulate.
*/
WD1770(Personality p);
virtual ~WD1770() {}
/// Sets the value of the double-density input; when @c is_double_density is @c true, reads and writes double-density format data.
using Storage::Disk::MFMController::set_is_double_density;
@@ -62,18 +63,18 @@ class WD1770: public Storage::Disk::MFMController {
};
/// @returns The current value of the IRQ line output.
inline bool get_interrupt_request_line() { return status_.interrupt_request; }
inline bool get_interrupt_request_line() const { return status_.interrupt_request; }
/// @returns The current value of the DRQ line output.
inline bool get_data_request_line() { return status_.data_request; }
inline bool get_data_request_line() const { return status_.data_request; }
class Delegate {
public:
virtual void wd1770_did_change_output(WD1770 *wd1770) = 0;
};
inline void set_delegate(Delegate *delegate) { delegate_ = delegate; }
inline void set_delegate(Delegate *delegate) { delegate_ = delegate; }
ClockingHint::Preference preferred_clocking() final;
ClockingHint::Preference preferred_clocking() const final;
protected:
virtual void set_head_load_request(bool head_load);
@@ -81,12 +82,12 @@ class WD1770: public Storage::Disk::MFMController {
void set_head_loaded(bool head_loaded);
/// @returns The last value posted to @c set_head_loaded.
bool get_head_loaded();
bool get_head_loaded() const;
private:
Personality personality_;
inline bool has_motor_on_line() { return (personality_ != P1793 ) && (personality_ != P1773); }
inline bool has_head_load_line() { return (personality_ == P1793 ); }
const Personality personality_;
bool has_motor_on_line() const { return (personality_ != P1793 ) && (personality_ != P1773); }
bool has_head_load_line() const { return (personality_ == P1793 ); }
struct Status {
bool write_protect = false;

View File

@@ -18,9 +18,14 @@ NCR5380::NCR5380(SCSI::Bus &bus, int clock_rate) :
clock_rate_(clock_rate) {
device_id_ = bus_.add_device();
bus_.add_observer(this);
// TODO: use clock rate and expected phase. This implementation currently
// provides only CPU-driven polling behaviour.
(void)clock_rate_;
(void)expected_phase_;
}
void NCR5380::write(int address, uint8_t value, bool dma_acknowledge) {
void NCR5380::write(int address, uint8_t value, bool) {
switch(address & 7) {
case 0:
// LOG("[SCSI 0] Set current SCSI bus state to " << PADHEX(2) << int(value));
@@ -128,7 +133,7 @@ void NCR5380::write(int address, uint8_t value, bool dma_acknowledge) {
}
}
uint8_t NCR5380::read(int address, bool dma_acknowledge) {
uint8_t NCR5380::read(int address, bool) {
switch(address & 7) {
case 0:
// LOG("[SCSI 0] Get current SCSI bus state: " << PADHEX(2) << (bus_.get_state() & 0xff));
@@ -258,6 +263,7 @@ void NCR5380::scsi_bus_did_change(SCSI::Bus *, SCSI::BusState new_state, double
case ExecutionState::WaitingForBusy:
if(!(new_state & SCSI::Line::Busy) || time_since_change < SCSI::DeskewDelay) return;
state_ = ExecutionState::WatchingBusy;
[[fallthrough]];
case ExecutionState::WatchingBusy:
if(!(new_state & SCSI::Line::Busy)) {

View File

@@ -10,8 +10,6 @@
#define _522_hpp
#include <cstdint>
#include <typeinfo>
#include <cstdio>
#include "Implementation/6522Storage.hpp"
@@ -37,22 +35,24 @@ enum Line {
class PortHandler {
public:
/// Requests the current input value of @c port from the port handler.
uint8_t get_port_input(Port port) { return 0xff; }
uint8_t get_port_input([[maybe_unused]] Port port) {
return 0xff;
}
/// Sets the current output value of @c port and provides @c direction_mask, indicating which pins are marked as output.
void set_port_output(Port port, uint8_t value, uint8_t direction_mask) {}
void set_port_output([[maybe_unused]] Port port, [[maybe_unused]] uint8_t value, [[maybe_unused]] uint8_t direction_mask) {}
/// Sets the current logical output level for line @c line on port @c port.
void set_control_line_output(Port port, Line line, bool value) {}
void set_control_line_output([[maybe_unused]] Port port, [[maybe_unused]] Line line, [[maybe_unused]] bool value) {}
/// Sets the current logical value of the interrupt line.
void set_interrupt_status(bool status) {}
void set_interrupt_status([[maybe_unused]] bool status) {}
/// Provides a measure of time elapsed between other calls.
void run_for(HalfCycles duration) {}
void run_for([[maybe_unused]] HalfCycles duration) {}
/// Receives passed-on flush() calls from the 6522.
void flush() {}
void flush() {}
};
/*!
@@ -88,9 +88,9 @@ class IRQDelegatePortHandler: public PortHandler {
Consumers should derive their own curiously-recurring-template-pattern subclass,
implementing bus communications as required.
*/
template <class T> class MOS6522: public MOS6522Storage {
template <class BusHandlerT> class MOS6522: public MOS6522Storage {
public:
MOS6522(T &bus_handler) noexcept : bus_handler_(bus_handler) {}
MOS6522(BusHandlerT &bus_handler) noexcept : bus_handler_(bus_handler) {}
MOS6522(const MOS6522 &) = delete;
/*! Sets a register value. */
@@ -100,7 +100,7 @@ template <class T> class MOS6522: public MOS6522Storage {
uint8_t read(int address);
/*! @returns the bus handler. */
T &bus_handler();
BusHandlerT &bus_handler();
/// Sets the input value of line @c line on port @c port.
void set_control_line_input(Port port, Line line, bool value);
@@ -112,7 +112,7 @@ template <class T> class MOS6522: public MOS6522Storage {
void run_for(const Cycles cycles);
/// @returns @c true if the IRQ line is currently active; @c false otherwise.
bool get_interrupt_line();
bool get_interrupt_line() const;
/// Updates the port handler to the current time and then requests that it flush.
void flush();
@@ -123,18 +123,19 @@ template <class T> class MOS6522: public MOS6522Storage {
void shift_in();
void shift_out();
T &bus_handler_;
BusHandlerT &bus_handler_;
HalfCycles time_since_bus_handler_call_;
void access(int address);
uint8_t get_port_input(Port port, uint8_t output_mask, uint8_t output);
uint8_t get_port_input(Port port, uint8_t output_mask, uint8_t output, uint8_t timer_mask);
inline void reevaluate_interrupts();
/// Sets the current intended output value for the port and line;
/// if this affects the visible output, it will be passed to the handler.
void set_control_line_output(Port port, Line line, LineState value);
void evaluate_cb2_output();
void evaluate_port_b_output();
};
}

View File

@@ -8,6 +8,10 @@
#include "../../../Outputs/Log.hpp"
// As-yet unimplemented (incomplete list):
//
// PB6 count-down mode for timer 2.
namespace MOS {
namespace MOS6522 {
@@ -34,18 +38,18 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
address &= 0xf;
access(address);
switch(address) {
case 0x0: // Write Port B.
case 0x0: // Write Port B. ('ORB')
// Store locally and communicate outwards.
registers_.output[1] = value;
bus_handler_.run_for(time_since_bus_handler_call_.flush<HalfCycles>());
bus_handler_.set_port_output(Port::B, value, registers_.data_direction[1]);
evaluate_port_b_output();
registers_.interrupt_flags &= ~(InterruptFlag::CB1ActiveEdge | ((registers_.peripheral_control&0x20) ? 0 : InterruptFlag::CB2ActiveEdge));
reevaluate_interrupts();
break;
case 0xf:
case 0x1: // Write Port A.
case 0x1: // Write Port A. ('ORA')
registers_.output[0] = value;
bus_handler_.run_for(time_since_bus_handler_call_.flush<HalfCycles>());
@@ -59,36 +63,52 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
reevaluate_interrupts();
break;
case 0x2: // Port B direction.
case 0x2: // Port B direction ('DDRB').
registers_.data_direction[1] = value;
break;
case 0x3: // Port A direction.
case 0x3: // Port A direction ('DDRA').
registers_.data_direction[0] = value;
break;
// Timer 1
case 0x6: case 0x4: registers_.timer_latch[0] = (registers_.timer_latch[0]&0xff00) | value; break;
case 0x5: case 0x7:
registers_.timer_latch[0] = (registers_.timer_latch[0]&0x00ff) | static_cast<uint16_t>(value << 8);
registers_.interrupt_flags &= ~InterruptFlag::Timer1;
if(address == 0x05) {
registers_.next_timer[0] = registers_.timer_latch[0];
timer_is_running_[0] = true;
case 0x6: case 0x4: // ('T1L-L' and 'T1C-L')
registers_.timer_latch[0] = (registers_.timer_latch[0]&0xff00) | value;
break;
case 0x7: // Timer 1 latch, high ('T1L-H').
registers_.timer_latch[0] = (registers_.timer_latch[0]&0x00ff) | uint16_t(value << 8);
break;
case 0x5: // Timer 1 counter, high ('T1C-H').
// Fill latch.
registers_.timer_latch[0] = (registers_.timer_latch[0]&0x00ff) | uint16_t(value << 8);
// Restart timer.
registers_.next_timer[0] = registers_.timer_latch[0];
timer_is_running_[0] = true;
// If PB7 output mode is active, set it low.
if(timer1_is_controlling_pb7()) {
registers_.timer_port_b_output &= 0x7f;
evaluate_port_b_output();
}
// Clear existing interrupt flag.
registers_.interrupt_flags &= ~InterruptFlag::Timer1;
reevaluate_interrupts();
break;
// Timer 2
case 0x8: registers_.timer_latch[1] = value; break;
case 0x9:
case 0x8: // ('T2C-L')
registers_.timer_latch[1] = value;
break;
case 0x9: // ('T2C-H')
registers_.interrupt_flags &= ~InterruptFlag::Timer2;
registers_.next_timer[1] = registers_.timer_latch[1] | static_cast<uint16_t>(value << 8);
registers_.next_timer[1] = registers_.timer_latch[1] | uint16_t(value << 8);
timer_is_running_[1] = true;
reevaluate_interrupts();
break;
// Shift
case 0xa:
case 0xa: // ('SR')
registers_.shift = value;
shift_bits_remaining_ = 8;
registers_.interrupt_flags &= ~InterruptFlag::ShiftRegister;
@@ -96,11 +116,18 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
break;
// Control
case 0xb:
case 0xb: // Auxiliary control ('ACR').
registers_.auxiliary_control = value;
evaluate_cb2_output();
// This is a bit of a guess: reset the timer-based PB7 output to its default high level
// any timer that timer-linked PB7 output is disabled.
if(!timer1_is_controlling_pb7()) {
registers_.timer_port_b_output |= 0x80;
}
evaluate_port_b_output();
break;
case 0xc: {
case 0xc: { // Peripheral control ('PCR').
// const auto old_peripheral_control = registers_.peripheral_control;
registers_.peripheral_control = value;
@@ -141,11 +168,11 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
} break;
// Interrupt control
case 0xd:
case 0xd: // Interrupt flag regiser ('IFR').
registers_.interrupt_flags &= ~value;
reevaluate_interrupts();
break;
case 0xe:
case 0xe: // Interrupt enable register ('IER').
if(value&0x80)
registers_.interrupt_enable |= value;
else
@@ -159,54 +186,55 @@ template <typename T> uint8_t MOS6522<T>::read(int address) {
address &= 0xf;
access(address);
switch(address) {
case 0x0:
case 0x0: // Read Port B ('IRB').
registers_.interrupt_flags &= ~(InterruptFlag::CB1ActiveEdge | InterruptFlag::CB2ActiveEdge);
reevaluate_interrupts();
return get_port_input(Port::B, registers_.data_direction[1], registers_.output[1]);
return get_port_input(Port::B, registers_.data_direction[1], registers_.output[1], registers_.auxiliary_control & 0x80);
case 0xf:
case 0x1:
case 0x1: // Read Port A ('IRA').
registers_.interrupt_flags &= ~(InterruptFlag::CA1ActiveEdge | InterruptFlag::CA2ActiveEdge);
reevaluate_interrupts();
return get_port_input(Port::A, registers_.data_direction[0], registers_.output[0]);
return get_port_input(Port::A, registers_.data_direction[0], registers_.output[0], 0);
case 0x2: return registers_.data_direction[1];
case 0x3: return registers_.data_direction[0];
case 0x2: return registers_.data_direction[1]; // Port B direction ('DDRB').
case 0x3: return registers_.data_direction[0]; // Port A direction ('DDRA').
// Timer 1
case 0x4:
case 0x4: // Timer 1 low-order latches ('T1L-L').
registers_.interrupt_flags &= ~InterruptFlag::Timer1;
reevaluate_interrupts();
return registers_.timer[0] & 0x00ff;
case 0x5: return registers_.timer[0] >> 8;
case 0x6: return registers_.timer_latch[0] & 0x00ff;
case 0x7: return registers_.timer_latch[0] >> 8;
case 0x5: return registers_.timer[0] >> 8; // Timer 1 high-order counter ('T1C-H')
case 0x6: return registers_.timer_latch[0] & 0x00ff; // Timer 1 low-order latches ('T1L-L').
case 0x7: return registers_.timer_latch[0] >> 8; // Timer 1 high-order latches ('T1L-H').
// Timer 2
case 0x8:
case 0x8: // Timer 2 low-order counter ('T2C-L').
registers_.interrupt_flags &= ~InterruptFlag::Timer2;
reevaluate_interrupts();
return registers_.timer[1] & 0x00ff;
case 0x9: return registers_.timer[1] >> 8;
case 0x9: return registers_.timer[1] >> 8; // Timer 2 high-order counter ('T2C-H').
case 0xa:
case 0xa: // Shift register ('SR').
shift_bits_remaining_ = 8;
registers_.interrupt_flags &= ~InterruptFlag::ShiftRegister;
reevaluate_interrupts();
return registers_.shift;
case 0xb: return registers_.auxiliary_control;
case 0xc: return registers_.peripheral_control;
case 0xb: return registers_.auxiliary_control; // Auxiliary control ('ACR').
case 0xc: return registers_.peripheral_control; // Peripheral control ('PCR').
case 0xd: return registers_.interrupt_flags | (get_interrupt_line() ? 0x80 : 0x00);
case 0xe: return registers_.interrupt_enable | 0x80;
case 0xd: return registers_.interrupt_flags | (get_interrupt_line() ? 0x80 : 0x00); // Interrupt flag register ('IFR').
case 0xe: return registers_.interrupt_enable | 0x80; // Interrupt enable register ('IER').
}
return 0xff;
}
template <typename T> uint8_t MOS6522<T>::get_port_input(Port port, uint8_t output_mask, uint8_t output) {
template <typename T> uint8_t MOS6522<T>::get_port_input(Port port, uint8_t output_mask, uint8_t output, uint8_t timer_mask) {
bus_handler_.run_for(time_since_bus_handler_call_.flush<HalfCycles>());
const uint8_t input = bus_handler_.get_port_input(port);
output = (output & ~timer_mask) | (registers_.timer_port_b_output & timer_mask);
return (input & ~output_mask) | (output & output_mask);
}
@@ -276,16 +304,19 @@ template <typename T> void MOS6522<T>::do_phase2() {
registers_.timer_needs_reload = false;
registers_.timer[0] = registers_.timer_latch[0];
} else {
registers_.timer[0] --;
-- registers_.timer[0];
}
registers_.timer[1] --;
// Count down timer 2 if it is in timed interrupt mode (i.e. auxiliary control bit 5 is clear).
registers_.timer[1] -= timer2_clock_decrement();
// TODO: can eliminate conditional branches here.
if(registers_.next_timer[0] >= 0) {
registers_.timer[0] = static_cast<uint16_t>(registers_.next_timer[0]);
registers_.timer[0] = uint16_t(registers_.next_timer[0]);
registers_.next_timer[0] = -1;
}
if(registers_.next_timer[1] >= 0) {
registers_.timer[1] = static_cast<uint16_t>(registers_.next_timer[1]);
registers_.timer[1] = uint16_t(registers_.next_timer[1]);
registers_.next_timer[1] = -1;
}
@@ -330,20 +361,29 @@ template <typename T> void MOS6522<T>::do_phase1() {
reevaluate_interrupts();
// Determine whether to reload.
if(registers_.auxiliary_control&0x40)
if(timer1_is_continuous())
registers_.timer_needs_reload = true;
else
timer_is_running_[0] = false;
// Determine whether to toggle PB7.
if(registers_.auxiliary_control&0x80) {
registers_.output[1] ^= 0x80;
if(timer1_is_controlling_pb7()) {
registers_.timer_port_b_output ^= 0x80;
bus_handler_.run_for(time_since_bus_handler_call_.flush<HalfCycles>());
bus_handler_.set_port_output(Port::B, registers_.output[1], registers_.data_direction[1]);
evaluate_port_b_output();
}
}
}
template <typename T> void MOS6522<T>::evaluate_port_b_output() {
// Apply current timer-linked PB7 output if any atop the stated output.
const uint8_t timer_control_bit = registers_.auxiliary_control & 0x80;
bus_handler_.set_port_output(
Port::B,
(registers_.output[1] & (0xff ^ timer_control_bit)) | timer_control_bit,
registers_.data_direction[1] | timer_control_bit);
}
/*! Runs for a specified number of half cycles. */
template <typename T> void MOS6522<T>::run_for(const HalfCycles half_cycles) {
auto number_of_half_cycles = half_cycles.as_integral();
@@ -383,9 +423,9 @@ template <typename T> void MOS6522<T>::run_for(const Cycles cycles) {
}
/*! @returns @c true if the IRQ line is currently active; @c false otherwise. */
template <typename T> bool MOS6522<T>::get_interrupt_line() {
template <typename T> bool MOS6522<T>::get_interrupt_line() const {
uint8_t interrupt_status = registers_.interrupt_flags & registers_.interrupt_enable & 0x7f;
return !!interrupt_status;
return interrupt_status;
}
template <typename T> void MOS6522<T>::evaluate_cb2_output() {
@@ -438,10 +478,11 @@ template <typename T> void MOS6522<T>::shift_in() {
}
template <typename T> void MOS6522<T>::shift_out() {
// When shifting out, the shift register rotates rather than strictly shifts.
// TODO: is that true for all modes?
if(shift_mode() == ShiftMode::OutUnderT2FreeRunning || shift_bits_remaining_) {
registers_.shift = uint8_t((registers_.shift << 1) | (registers_.shift >> 7));
const bool is_free_running = shift_mode() == ShiftMode::OutUnderT2FreeRunning;
if(is_free_running || shift_bits_remaining_) {
// Recirculate bits only if in free-running mode (?)
const uint8_t incoming_bit = (registers_.shift >> 7) * is_free_running;
registers_.shift = uint8_t(registers_.shift << 1) | incoming_bit;
evaluate_cb2_output();
--shift_bits_remaining_;

View File

@@ -34,7 +34,9 @@ class MOS6522Storage {
uint8_t peripheral_control = 0;
uint8_t interrupt_flags = 0;
uint8_t interrupt_enable = 0;
bool timer_needs_reload = false;
uint8_t timer_port_b_output = 0xff;
} registers_;
// Control state.
@@ -79,12 +81,30 @@ class MOS6522Storage {
OutUnderPhase2 = 6,
OutUnderCB1 = 7
};
ShiftMode shift_mode() const {
return ShiftMode((registers_.auxiliary_control >> 2) & 7);
bool timer1_is_controlling_pb7() const {
return registers_.auxiliary_control & 0x80;
}
bool timer1_is_continuous() const {
return registers_.auxiliary_control & 0x40;
}
bool is_shifting_out() const {
return registers_.auxiliary_control & 0x10;
}
int timer2_clock_decrement() const {
return 1 ^ ((registers_.auxiliary_control >> 5)&1);
}
int timer2_pb6_decrement() const {
return (registers_.auxiliary_control >> 5)&1;
}
ShiftMode shift_mode() const {
return ShiftMode((registers_.auxiliary_control >> 2) & 7);
}
bool portb_is_latched() const {
return registers_.auxiliary_control & 0x02;
}
bool port1_is_latched() const {
return registers_.auxiliary_control & 0x01;
}
};
}

View File

@@ -14,6 +14,6 @@ void IRQDelegatePortHandler::set_interrupt_delegate(Delegate *delegate) {
delegate_ = delegate;
}
void IRQDelegatePortHandler::set_interrupt_status(bool new_status) {
void IRQDelegatePortHandler::set_interrupt_status(bool) {
if(delegate_) delegate_->mos6522_did_change_interrupt_status(this);
}

94
Components/6526/6526.hpp Normal file
View File

@@ -0,0 +1,94 @@
//
// 6526.h
// Clock Signal
//
// Created by Thomas Harte on 18/07/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef _526_h
#define _526_h
#include <cstdint>
#include "Implementation/6526Storage.hpp"
#include "../Serial/Line.hpp"
namespace MOS {
namespace MOS6526 {
enum Port {
A = 0,
B = 1
};
struct PortHandler {
/// Requests the current input value of @c port from the port handler.
uint8_t get_port_input([[maybe_unused]] Port port) {
return 0xff;
}
/// Sets the current output value of @c port; any bits marked as input will be supplied as 1s.
void set_port_output([[maybe_unused]] Port port, [[maybe_unused]] uint8_t value) {}
};
enum class Personality {
// The 6526, used in machines such as the C64, has a BCD time-of-day clock.
P6526,
// The 8250, used in the Amiga, provides a binary time-of-day clock.
P8250,
};
template <typename PortHandlerT, Personality personality> class MOS6526:
private MOS6526Storage,
private Serial::Line<true>::ReadDelegate
{
public:
MOS6526(PortHandlerT &port_handler) noexcept : port_handler_(port_handler) {
serial_input.set_read_delegate(this);
}
MOS6526(const MOS6526 &) = delete;
/// Writes @c value to the register at @c address. Only the low two bits of the address are decoded.
void write(int address, uint8_t value);
/// Fetches the value of the register @c address. Only the low two bits of the address are decoded.
uint8_t read(int address);
/// Pulses Phi2 to advance by the specified number of half cycles.
void run_for(const HalfCycles half_cycles);
/// Pulses the TOD input the specified number of times.
void advance_tod(int count);
/// @returns @c true if the interrupt output is active, @c false otherwise.
bool get_interrupt_line();
/// Sets the current state of the CNT input.
void set_cnt_input(bool active);
/// Provides both the serial input bit and an additional source of CNT.
Serial::Line<true> serial_input;
/// Sets the current state of the FLG input.
void set_flag_input(bool low);
private:
PortHandlerT &port_handler_;
TODStorage<personality == Personality::P8250> tod_;
template <int port> void set_port_output();
template <int port> uint8_t get_port_input();
void update_interrupts();
void posit_interrupt(uint8_t mask);
void advance_counters(int);
bool serial_line_did_produce_bit(Serial::Line<true> *line, int bit) final;
};
}
}
#include "Implementation/6526Implementation.hpp"
#endif /* _526_h */

View File

@@ -0,0 +1,244 @@
//
// 6526Implementation.hpp
// Clock Signal
//
// Created by Thomas Harte on 18/07/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef _526Implementation_h
#define _526Implementation_h
#include <cassert>
#include <cstdio>
namespace MOS {
namespace MOS6526 {
enum Interrupts: uint8_t {
TimerA = 1 << 0,
TimerB = 1 << 1,
Alarm = 1 << 2,
SerialPort = 1 << 3,
Flag = 1 << 4,
};
template <typename BusHandlerT, Personality personality>
template <int port> void MOS6526<BusHandlerT, personality>::set_port_output() {
const uint8_t output = output_[port] | (~data_direction_[port]);
port_handler_.set_port_output(Port(port), output);
}
template <typename BusHandlerT, Personality personality>
template <int port> uint8_t MOS6526<BusHandlerT, personality>::get_port_input() {
// Avoid bothering the port handler if there's no input active.
const uint8_t input_mask = ~data_direction_[port];
const uint8_t input = input_mask ? port_handler_.get_port_input(Port(port)) : 0x00;
return (input & input_mask) | (output_[port] & data_direction_[port]);
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::posit_interrupt(uint8_t mask) {
if(!mask) {
return;
}
interrupt_state_ |= mask;
update_interrupts();
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::update_interrupts() {
if(interrupt_state_ & interrupt_control_) {
pending_ |= InterruptInOne;
}
}
template <typename BusHandlerT, Personality personality>
bool MOS6526<BusHandlerT, personality>::get_interrupt_line() {
return interrupt_state_ & 0x80;
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::set_cnt_input(bool active) {
cnt_edge_ = active && !cnt_state_;
cnt_state_ = active;
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::set_flag_input(bool low) {
if(low && !flag_state_) {
posit_interrupt(Interrupts::Flag);
}
flag_state_ = low;
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::write(int address, uint8_t value) {
address &= 0xf;
switch(address) {
// Port output.
case 0:
output_[0] = value;
set_port_output<0>();
break;
case 1:
output_[1] = value;
set_port_output<1>();
break;
// Port direction.
case 2:
data_direction_[0] = value;
set_port_output<0>();
break;
case 3:
data_direction_[1] = value;
set_port_output<1>();
break;
// Counters; writes set the reload values.
case 4: counter_[0].template set_reload<0, personality == Personality::P8250>(value); break;
case 5: counter_[0].template set_reload<8, personality == Personality::P8250>(value); break;
case 6: counter_[1].template set_reload<0, personality == Personality::P8250>(value); break;
case 7: counter_[1].template set_reload<8, personality == Personality::P8250>(value); break;
// Time-of-day clock.
case 8: tod_.template write<0>(value); break;
case 9: tod_.template write<1>(value); break;
case 10: tod_.template write<2>(value); break;
case 11: tod_.template write<3>(value); break;
// Interrupt control.
case 13: {
if(value & 0x80) {
interrupt_control_ |= value & 0x7f;
} else {
interrupt_control_ &= ~(value & 0x7f);
}
update_interrupts();
} break;
// Control. Posted to both the counters and the clock as it affects both.
case 14:
counter_[0].template set_control<false>(value);
tod_.template set_control<false>(value);
if(shifter_is_output_ != bool(value & 0x40)) {
shifter_is_output_ = value & 0x40;
shift_bits_ = 0;
}
break;
case 15:
counter_[1].template set_control<true>(value);
tod_.template set_control<true>(value);
break;
// Shift control.
case 12:
printf("TODO: write to shift register\n");
break;
default:
printf("Unhandled 6526 write: %02x to %d\n", value, address);
assert(false);
break;
}
}
template <typename BusHandlerT, Personality personality>
uint8_t MOS6526<BusHandlerT, personality>::read(int address) {
address &= 0xf;
switch(address) {
case 0: return get_port_input<0>();
case 1: return get_port_input<1>();
case 2: case 3:
return data_direction_[address - 2];
// Counters; reads obtain the current values.
case 4: return uint8_t(counter_[0].value >> 0);
case 5: return uint8_t(counter_[0].value >> 8);
case 6: return uint8_t(counter_[1].value >> 0);
case 7: return uint8_t(counter_[1].value >> 8);
// Interrupt state.
case 13: {
const uint8_t result = interrupt_state_;
interrupt_state_ = 0;
pending_ &= ~(InterruptNow | InterruptInOne);
update_interrupts();
return result;
} break;
case 14: case 15:
return counter_[address - 14].control;
// Time-of-day clock.
case 8: return tod_.template read<0>();
case 9: return tod_.template read<1>();
case 10: return tod_.template read<2>();
case 11: return tod_.template read<3>();
// Shift register.
case 12: return shift_data_;
default:
printf("Unhandled 6526 read from %d\n", address);
assert(false);
break;
}
return 0xff;
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::run_for(const HalfCycles half_cycles) {
half_divider_ += half_cycles;
int sub = half_divider_.divide_cycles().template as<int>();
while(sub--) {
pending_ <<= 1;
if(pending_ & InterruptNow) {
interrupt_state_ |= 0x80;
}
pending_ &= PendingClearMask;
// TODO: use CNT potentially to clock timer A, elimiante conditional above.
const bool timer1_did_reload = counter_[0].template advance<false>(false, cnt_state_, cnt_edge_);
const bool timer1_carry = timer1_did_reload && (counter_[1].control & 0x60) == 0x40;
const bool timer2_did_reload = counter_[1].template advance<true>(timer1_carry, cnt_state_, cnt_edge_);
posit_interrupt((timer1_did_reload ? Interrupts::TimerA : 0x00) | (timer2_did_reload ? Interrupts::TimerB : 0x00));
cnt_edge_ = false;
}
}
template <typename BusHandlerT, Personality personality>
void MOS6526<BusHandlerT, personality>::advance_tod(int count) {
if(!count) return;
if(tod_.advance(count)) {
posit_interrupt(Interrupts::Alarm);
}
}
template <typename BusHandlerT, Personality personality>
bool MOS6526<BusHandlerT, personality>::serial_line_did_produce_bit(Serial::Line<true> *, int bit) {
// TODO: post CNT change; might affect timer.
if(!shifter_is_output_) {
shift_register_ = uint8_t((shift_register_ << 1) | bit);
++shift_bits_;
if(shift_bits_ == 8) {
shift_bits_ = 0;
shift_data_ = shift_register_;
posit_interrupt(Interrupts::SerialPort);
}
}
return true;
}
}
}
#endif /* _526Implementation_h */

View File

@@ -0,0 +1,339 @@
//
// 6526Storage.hpp
// Clock Signal
//
// Created by Thomas Harte on 18/07/2021.
// Copyright © 2021 Thomas Harte. All rights reserved.
//
#ifndef _526Storage_h
#define _526Storage_h
#include <array>
#include "../../../ClockReceiver/ClockReceiver.hpp"
namespace MOS {
namespace MOS6526 {
class TODBase {
public:
template <bool is_timer2> void set_control(uint8_t value) {
if constexpr (is_timer2) {
write_alarm = value & 0x80;
} else {
is_50Hz = value & 0x80;
}
}
protected:
bool write_alarm = false, is_50Hz = false;
};
template <bool is_8250> class TODStorage {};
template <> class TODStorage<false>: public TODBase {
private:
bool increment_ = true, latched_ = false;
int divider_ = 0;
std::array<uint8_t, 4> value_;
std::array<uint8_t, 4> latch_;
std::array<uint8_t, 4> alarm_;
static constexpr uint8_t masks[4] = {0xf, 0x3f, 0x3f, 0x1f};
void bcd_increment(uint8_t &value) {
++value;
if((value&0x0f) > 0x09) value += 0x06;
}
public:
template <int byte> void write(uint8_t v) {
if(write_alarm) {
alarm_[byte] = v & masks[byte];
} else {
value_[byte] = v & masks[byte];
if constexpr (byte == 0) {
increment_ = true;
}
if constexpr (byte == 3) {
increment_ = false;
}
}
}
template <int byte> uint8_t read() {
if(latched_) {
const uint8_t result = latch_[byte];
if constexpr (byte == 0) {
latched_ = false;
}
return result;
}
if constexpr (byte == 3) {
latched_ = true;
latch_ = value_;
}
return value_[byte];
}
bool advance(int count) {
if(!increment_) {
return false;
}
while(count--) {
// Increment the pre-10ths divider.
++divider_;
if(divider_ < 5) continue;
if(divider_ < 6 && !is_50Hz) continue;
divider_ = 0;
// Increments 10ths of a second. One BCD digit.
++value_[0];
if(value_[0] < 10) {
continue;
}
// Increment seconds. Actual BCD needed from here onwards.
bcd_increment(value_[1]);
if(value_[1] != 60) {
continue;
}
value_[1] = 0;
// Increment minutes.
bcd_increment(value_[2]);
if(value_[2] != 60) {
continue;
}
value_[2] = 0;
// TODO: increment hours, keeping AM/PM separate?
}
return false; // TODO: test against alarm.
}
};
template <> class TODStorage<true>: public TODBase {
private:
uint32_t increment_mask_ = uint32_t(~0);
uint32_t latch_ = 0;
uint32_t value_ = 0;
uint32_t alarm_ = 0xff'ffff;
public:
template <int byte> void write(uint8_t v) {
if constexpr (byte == 3) {
return;
}
constexpr int shift = byte << 3;
// Write to either the alarm or the current value as directed;
// writing to any part of the current value other than the LSB
// pauses incrementing until the LSB is written.
const uint32_t mask = uint32_t(~(0xff << shift));
if(write_alarm) {
alarm_ = (alarm_ & mask) | uint32_t(v << shift);
} else {
value_ = (value_ & mask) | uint32_t(v << shift);
increment_mask_ = (byte == 0) ? uint32_t(~0) : 0;
}
}
template <int byte> uint8_t read() {
if constexpr (byte == 3) {
return 0xff; // Assumed. Just a guess.
}
constexpr int shift = byte << 3;
if constexpr (byte == 2) {
latch_ = value_ | 0xff00'0000;
}
const uint32_t source = latch_ ? latch_ : value_;
const uint8_t result = uint8_t((source >> shift) & 0xff);
if constexpr (byte == 0) {
latch_ = 0;
}
return result;
}
bool advance(int count) {
// The 8250 uses a simple binary counter to replace the
// 6526's time-of-day clock. So this is easy.
const uint32_t distance_to_alarm = (alarm_ - value_) & 0xff'ffff;
const auto increment = uint32_t(count) & increment_mask_;
value_ = (value_ + increment) & 0xff'ffff;
return distance_to_alarm <= increment;
}
};
struct MOS6526Storage {
bool cnt_state_ = false; // Inactive by default.
bool cnt_edge_ = false;
bool flag_state_ = false;
HalfCycles half_divider_;
uint8_t output_[2] = {0, 0};
uint8_t data_direction_[2] = {0, 0};
uint8_t interrupt_control_ = 0;
uint8_t interrupt_state_ = 0;
uint8_t shift_data_ = 0;
uint8_t shift_register_ = 0;
int shift_bits_ = 0;
bool shifter_is_output_ = false;
struct Counter {
uint16_t reload = 0;
uint16_t value = 0;
uint8_t control = 0;
template <int shift, bool is_8250> void set_reload(uint8_t v) {
reload = (reload & (0xff00 >> shift)) | uint16_t(v << shift);
if constexpr (shift == 8) {
// This seems to be a special 8250 feature per the Amiga
// Hardware Reference Manual; cf. Appendix F.
if(is_8250) {
control |= 1;
pending |= ReloadInOne;
} else {
if(!(control&1)) {
pending |= ReloadInOne;
}
}
}
// If this write has hit during a reload cycle, reload.
if(pending & ReloadNow) {
value = reload;
}
}
template <bool is_counter_2> void set_control(uint8_t v) {
control = v;
if(v&2) {
printf("UNIMPLEMENTED: PB strobe\n");
}
}
template <bool is_counter_2> bool advance(bool chained_input, bool cnt_state, bool cnt_edge) {
// TODO: remove most of the conditionals here in favour of bit shuffling.
pending = (pending & PendingClearMask) << 1;
//
// Apply feeder states inputs: anything that
// will take effect in the future.
//
// Schedule a force reload if requested.
if(control & 0x10) {
pending |= ReloadInOne;
control &= ~0x10;
}
// Keep a history of the one-shot bit.
if(control & 0x08) {
pending |= OneShotInOne;
}
// Determine whether an input clock is applicable.
if constexpr(is_counter_2) {
switch(control&0x60) {
case 0x00: // Count Phi2 pulses.
pending |= TestInputNow;
break;
case 0x20: // Count negative CNTs, with an extra cycle of delay.
pending |= cnt_edge ? TestInputInOne : 0;
break;
case 0x40: // Count timer A reloads.
pending |= chained_input ? TestInputNow : 0;
break;
case 0x60: // Count timer A transitions when CNT is low.
pending |= chained_input && cnt_state ? TestInputNow : 0;
break;
}
} else {
if(!(control&0x20)) {
pending |= TestInputNow;
} else if (cnt_edge) {
pending |= TestInputInOne;
}
}
if(pending&TestInputNow && control&1) {
pending |= ApplyClockInTwo;
}
//
// Perform a timer tick and decide whether a reload is prompted.
//
if(pending & ApplyClockNow) {
--value;
}
const bool should_reload = !value && (pending & ApplyClockInOne);
// Schedule a reload if so ordered.
if(should_reload) {
pending |= ReloadNow; // Combine this decision with a deferred
// input from the force-reoad test above.
// If this was one-shot, stop.
if(pending&(OneShotInOne | OneShotNow)) {
control &= ~1;
pending &= ~(ApplyClockInOne|ApplyClockInTwo); // Cancel scheduled ticks.
}
}
// Reload if scheduled.
if(pending & ReloadNow) {
value = reload;
pending &= ~ApplyClockInOne; // Skip next decrement.
}
return should_reload;
}
private:
int pending = 0;
static constexpr int ReloadInOne = 1 << 0;
static constexpr int ReloadNow = 1 << 1;
static constexpr int OneShotInOne = 1 << 2;
static constexpr int OneShotNow = 1 << 3;
static constexpr int ApplyClockInTwo = 1 << 4;
static constexpr int ApplyClockInOne = 1 << 5;
static constexpr int ApplyClockNow = 1 << 6;
static constexpr int TestInputInOne = 1 << 7;
static constexpr int TestInputNow = 1 << 8;
static constexpr int PendingClearMask = ~(ReloadNow | OneShotNow | ApplyClockNow);
bool active_ = false;
} counter_[2];
static constexpr int InterruptInOne = 1 << 0;
static constexpr int InterruptNow = 1 << 1;
static constexpr int PendingClearMask = ~(InterruptNow);
int pending_ = 0;
};
}
}
#endif /* _526Storage_h */

View File

@@ -51,7 +51,7 @@ template <class T> class MOS6532 {
case 0x04: case 0x05: case 0x06: case 0x07:
if(address & 0x10) {
timer_.writtenShift = timer_.activeShift = (decodedAddress - 0x04) * 3 + (decodedAddress / 0x07); // i.e. 0, 3, 6, 10
timer_.value = (static_cast<unsigned int>(value) << timer_.activeShift) ;
timer_.value = (unsigned(value) << timer_.activeShift) ;
timer_.interrupt_enabled = !!(address&0x08);
interrupt_status_ &= ~InterruptFlag::Timer;
evaluate_interrupts();
@@ -79,7 +79,7 @@ template <class T> class MOS6532 {
// Timer and interrupt control
case 0x04: case 0x06: {
uint8_t value = static_cast<uint8_t>(timer_.value >> timer_.activeShift);
uint8_t value = uint8_t(timer_.value >> timer_.activeShift);
timer_.interrupt_enabled = !!(address&0x08);
interrupt_status_ &= ~InterruptFlag::Timer;
evaluate_interrupts();
@@ -107,7 +107,7 @@ template <class T> class MOS6532 {
}
inline void run_for(const Cycles cycles) {
unsigned int number_of_cycles = static_cast<unsigned int>(cycles.as_integral());
unsigned int number_of_cycles = unsigned(cycles.as_integral());
// permit counting _to_ zero; counting _through_ zero initiates the other behaviour
if(timer_.value >= number_of_cycles) {
@@ -122,7 +122,7 @@ template <class T> class MOS6532 {
}
MOS6532() {
timer_.value = static_cast<unsigned int>((rand() & 0xff) << 10);
timer_.value = unsigned((rand() & 0xff) << 10);
}
inline void set_port_did_change(int port) {
@@ -142,7 +142,7 @@ template <class T> class MOS6532 {
}
}
inline bool get_inerrupt_line() {
inline bool get_inerrupt_line() const {
return interrupt_line_;
}
@@ -173,9 +173,11 @@ template <class T> class MOS6532 {
bool interrupt_line_ = false;
// expected to be overridden
uint8_t get_port_input(int port) { return 0xff; }
void set_port_output(int port, uint8_t value, uint8_t output_mask) {}
void set_irq_line(bool new_value) {}
void set_port_output([[maybe_unused]] int port, [[maybe_unused]] uint8_t value, [[maybe_unused]] uint8_t output_mask) {}
uint8_t get_port_input([[maybe_unused]] int port) {
return 0xff;
}
void set_irq_line(bool) {}
inline void evaluate_interrupts() {
interrupt_line_ =

View File

@@ -98,7 +98,7 @@ static uint8_t noise_pattern[] = {
#define shift(r) shift_registers_[r] = (shift_registers_[r] << 1) | (((shift_registers_[r]^0x80)&control_registers_[r]) >> 7)
#define increment(r) shift_registers_[r] = (shift_registers_[r]+1)%8191
#define update(r, m, up) counters_[r]++; if((counters_[r] >> m) == 0x80) { up(r); counters_[r] = static_cast<unsigned int>(control_registers_[r]&0x7f) << m; }
#define update(r, m, up) counters_[r]++; if((counters_[r] >> m) == 0x80) { up(r); counters_[r] = unsigned(control_registers_[r]&0x7f) << m; }
// Note on slightly askew test: as far as I can make out, if the value in the register is 0x7f then what's supposed to happen
// is that the 0x7f is loaded, on the next clocked cycle the Vic spots a 0x7f, pumps the output, reloads, etc. No increment
// ever occurs. It's conditional. I don't really want two conditionals if I can avoid it so I'm incrementing regardless and
@@ -114,7 +114,7 @@ void AudioGenerator::get_samples(std::size_t number_of_samples, int16_t *target)
// this sums the output of all three sounds channels plus a DC offset for volume;
// TODO: what's the real ratio of this stuff?
target[c] = static_cast<int16_t>(
target[c] = int16_t(
(shift_registers_[0]&1) +
(shift_registers_[1]&1) +
(shift_registers_[2]&1) +
@@ -133,7 +133,7 @@ void AudioGenerator::skip_samples(std::size_t number_of_samples) {
}
void AudioGenerator::set_sample_volume_range(std::int16_t range) {
range_multiplier_ = static_cast<int16_t>(range / 64);
range_multiplier_ = int16_t(range / 64);
}
#undef shift

View File

@@ -43,7 +43,7 @@ class AudioGenerator: public ::Outputs::Speaker::SampleSource {
};
struct BusHandler {
void perform_read(uint16_t address, uint8_t *pixel_data, uint8_t *colour_data) {
void perform_read([[maybe_unused]] uint16_t address, [[maybe_unused]] uint8_t *pixel_data, [[maybe_unused]] uint8_t *colour_data) {
*pixel_data = 0xff;
*colour_data = 0xff;
}
@@ -81,13 +81,14 @@ template <class BusHandler> class MOS6560 {
}
void set_clock_rate(double clock_rate) {
speaker_.set_input_rate(static_cast<float>(clock_rate / 4.0));
speaker_.set_input_rate(float(clock_rate / 4.0));
}
void set_scan_target(Outputs::Display::ScanTarget *scan_target) { crt_.set_scan_target(scan_target); }
Outputs::Display::ScanStatus get_scaled_scan_status() const { return crt_.get_scaled_scan_status() / 4.0f; }
void set_display_type(Outputs::Display::DisplayType display_type) { crt_.set_display_type(display_type); }
Outputs::Speaker::Speaker *get_speaker() { return &speaker_; }
Outputs::Display::DisplayType get_display_type() const { return crt_.get_display_type(); }
Outputs::Speaker::Speaker *get_speaker() { return &speaker_; }
void set_high_frequency_cutoff(float cutoff) {
speaker_.set_high_frequency_cutoff(cutoff);
@@ -234,7 +235,7 @@ template <class BusHandler> class MOS6560 {
if(column_counter_&1) {
fetch_address = registers_.character_cell_start_address + (character_code_*(registers_.tall_characters ? 16 : 8)) + current_character_row_;
} else {
fetch_address = static_cast<uint16_t>(registers_.video_matrix_start_address + video_matrix_address_counter_);
fetch_address = uint16_t(registers_.video_matrix_start_address + video_matrix_address_counter_);
video_matrix_address_counter_++;
if(
(current_character_row_ == 15) ||
@@ -370,7 +371,7 @@ template <class BusHandler> class MOS6560 {
case 0x2:
registers_.number_of_columns = value & 0x7f;
registers_.video_matrix_start_address = static_cast<uint16_t>((registers_.video_matrix_start_address & 0x3c00) | ((value & 0x80) << 2));
registers_.video_matrix_start_address = uint16_t((registers_.video_matrix_start_address & 0x3c00) | ((value & 0x80) << 2));
break;
case 0x3:
@@ -379,8 +380,8 @@ template <class BusHandler> class MOS6560 {
break;
case 0x5:
registers_.character_cell_start_address = static_cast<uint16_t>((value & 0x0f) << 10);
registers_.video_matrix_start_address = static_cast<uint16_t>((registers_.video_matrix_start_address & 0x0200) | ((value & 0xf0) << 6));
registers_.character_cell_start_address = uint16_t((value & 0x0f) << 10);
registers_.video_matrix_start_address = uint16_t((registers_.video_matrix_start_address & 0x0200) | ((value & 0xf0) << 6));
break;
case 0xa:
@@ -419,11 +420,11 @@ template <class BusHandler> class MOS6560 {
/*
Reads from a 6560 register.
*/
uint8_t read(int address) {
uint8_t read(int address) const {
address &= 0xf;
switch(address) {
default: return registers_.direct_values[address];
case 0x03: return static_cast<uint8_t>(raster_value() << 7) | (registers_.direct_values[3] & 0x7f);
case 0x03: return uint8_t(raster_value() << 7) | (registers_.direct_values[3] & 0x7f);
case 0x04: return (raster_value() >> 1) & 0xff;
}
}
@@ -434,7 +435,7 @@ template <class BusHandler> class MOS6560 {
Concurrency::DeferringAsyncTaskQueue audio_queue_;
AudioGenerator audio_generator_;
Outputs::Speaker::LowpassSpeaker<AudioGenerator> speaker_;
Outputs::Speaker::PullLowpass<AudioGenerator> speaker_;
Cycles cycles_since_speaker_update_;
void update_audio() {
@@ -444,28 +445,28 @@ template <class BusHandler> class MOS6560 {
// register state
struct {
bool interlaced = false, tall_characters = false;
uint8_t first_column_location, first_row_location;
uint8_t number_of_columns, number_of_rows;
uint16_t character_cell_start_address, video_matrix_start_address;
uint16_t backgroundColour, borderColour, auxiliary_colour;
uint8_t first_column_location = 0, first_row_location = 0;
uint8_t number_of_columns = 0, number_of_rows = 0;
uint16_t character_cell_start_address = 0, video_matrix_start_address = 0;
uint16_t backgroundColour = 0, borderColour = 0, auxiliary_colour = 0;
bool invertedCells = false;
uint8_t direct_values[16];
uint8_t direct_values[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
} registers_;
// output state
enum State {
Sync, ColourBurst, Border, Pixels
} this_state_, output_state_;
int cycles_in_state_;
} this_state_ = State::Sync, output_state_ = State::Sync;
int cycles_in_state_ = 0;
// counters that cover an entire field
int horizontal_counter_ = 0, vertical_counter_ = 0;
const int lines_this_field() {
int lines_this_field() const {
// Necessary knowledge here: only the NTSC 6560 supports interlaced video.
return registers_.interlaced ? (is_odd_frame_ ? 262 : 263) : timing_.lines_per_progressive_field;
}
const int raster_value() {
int raster_value() const {
const int bonus_line = (horizontal_counter_ + timing_.line_counter_increment_offset) / timing_.cycles_per_line;
const int line = vertical_counter_ + bonus_line;
const int final_line = lines_this_field();
@@ -480,29 +481,29 @@ template <class BusHandler> class MOS6560 {
}
// Cf. http://www.sleepingelephant.com/ipw-web/bulletin/bb/viewtopic.php?f=14&t=7237&start=15#p80737
}
bool is_odd_frame() {
bool is_odd_frame() const {
return is_odd_frame_ || !registers_.interlaced;
}
// latches dictating start and length of drawing
bool vertical_drawing_latch_ = false, horizontal_drawing_latch_ = false;
int rows_this_field_, columns_this_line_;
int rows_this_field_ = 0, columns_this_line_ = 0;
// current drawing position counter
int pixel_line_cycle_, column_counter_;
int current_row_;
uint16_t current_character_row_;
uint16_t video_matrix_address_counter_, base_video_matrix_address_counter_;
int pixel_line_cycle_ = 0, column_counter_ = 0;
int current_row_ = 0;
uint16_t current_character_row_ = 0;
uint16_t video_matrix_address_counter_ = 0, base_video_matrix_address_counter_ = 0;
// data latched from the bus
uint8_t character_code_, character_colour_, character_value_;
uint8_t character_code_ = 0, character_colour_ = 0, character_value_ = 0;
bool is_odd_frame_ = false, is_odd_line_ = false;
// lookup table from 6560 colour index to appropriate PAL/NTSC value
uint16_t colours_[16];
uint16_t colours_[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
uint16_t *pixel_pointer;
uint16_t *pixel_pointer = nullptr;
void output_border(int number_of_cycles) {
uint16_t *colour_pointer = reinterpret_cast<uint16_t *>(crt_.begin_data(1));
if(colour_pointer) *colour_pointer = registers_.borderColour;
@@ -510,13 +511,13 @@ template <class BusHandler> class MOS6560 {
}
struct {
int cycles_per_line;
int line_counter_increment_offset;
int final_line_increment_position;
int lines_per_progressive_field;
bool supports_interlacing;
int cycles_per_line = 0;
int line_counter_increment_offset = 0;
int final_line_increment_position = 0;
int lines_per_progressive_field = 0;
bool supports_interlacing = 0;
} timing_;
OutputMode output_mode_;
OutputMode output_mode_ = OutputMode::NTSC;
};
}

View File

@@ -167,8 +167,8 @@ template <class T> class CRTC6845 {
private:
inline void perform_bus_cycle_phase1() {
// Skew theory of operation: keep a history of the last three states, and apply whichever is selected.
character_is_visible_shifter_ = (character_is_visible_shifter_ << 1) | static_cast<unsigned int>(character_is_visible_);
bus_state_.display_enable = (static_cast<int>(character_is_visible_shifter_) & display_skew_mask_) && line_is_visible_;
character_is_visible_shifter_ = (character_is_visible_shifter_ << 1) | unsigned(character_is_visible_);
bus_state_.display_enable = (int(character_is_visible_shifter_) & display_skew_mask_) && line_is_visible_;
bus_handler_.perform_bus_cycle_phase1(bus_state_);
}
@@ -240,7 +240,7 @@ template <class T> class CRTC6845 {
inline void do_end_of_frame() {
line_counter_ = 0;
line_is_visible_ = true;
line_address_ = static_cast<uint16_t>((registers_[12] << 8) | registers_[13]);
line_address_ = uint16_t((registers_[12] << 8) | registers_[13]);
bus_state_.refresh_address = line_address_;
}

View File

@@ -120,7 +120,7 @@ void ACIA::consider_transmission() {
}
}
ClockingHint::Preference ACIA::preferred_clocking() {
ClockingHint::Preference ACIA::preferred_clocking() const {
// Real-time clocking is required if a transmission is ongoing; this is a courtesy for whomever
// is on the receiving end.
if(transmit.transmission_data_time_remaining() > 0) return ClockingHint::Preference::RealTime;
@@ -129,8 +129,8 @@ ClockingHint::Preference ACIA::preferred_clocking() {
// because it's unclear when the interrupt might come.
if(bits_incoming_ && receive_interrupt_enabled_) return ClockingHint::Preference::RealTime;
// No clocking required then.
return ClockingHint::Preference::None;
// Real-time clocking not required then.
return ClockingHint::Preference::JustInTime;
}
bool ACIA::get_interrupt_line() const {
@@ -148,7 +148,7 @@ uint8_t ACIA::parity(uint8_t value) {
return value ^ (parity_ == Parity::Even);
}
bool ACIA::serial_line_did_produce_bit(Serial::Line *line, int bit) {
bool ACIA::serial_line_did_produce_bit(Serial::Line<false> *, int bit) {
// Shift this bit into the 11-bit input register; this is big enough to hold
// the largest transmission symbol.
++bits_received_;

View File

@@ -18,7 +18,7 @@
namespace Motorola {
namespace ACIA {
class ACIA: public ClockingHint::Source, private Serial::Line::ReadDelegate {
class ACIA: public ClockingHint::Source, private Serial::Line<false>::ReadDelegate {
public:
static constexpr const HalfCycles SameAsTransmit = HalfCycles(0);
@@ -77,16 +77,16 @@ class ACIA: public ClockingHint::Source, private Serial::Line::ReadDelegate {
void reset();
// Input lines.
Serial::Line receive;
Serial::Line clear_to_send;
Serial::Line data_carrier_detect;
Serial::Line<false> receive;
Serial::Line<false> clear_to_send;
Serial::Line<false> data_carrier_detect;
// Output lines.
Serial::Line transmit;
Serial::Line request_to_send;
Serial::Line<false> transmit;
Serial::Line<false> request_to_send;
// ClockingHint::Source.
ClockingHint::Preference preferred_clocking() final;
ClockingHint::Preference preferred_clocking() const final;
struct InterruptDelegate {
virtual void acia6850_did_change_interrupt_status(ACIA *acia) = 0;
@@ -118,7 +118,7 @@ class ACIA: public ClockingHint::Source, private Serial::Line::ReadDelegate {
HalfCycles transmit_clock_rate_;
HalfCycles receive_clock_rate_;
bool serial_line_did_produce_bit(Serial::Line *line, int bit) final;
bool serial_line_did_produce_bit(Serial::Line<false> *line, int bit) final;
bool interrupt_line_ = false;
void update_interrupt_line();

View File

@@ -20,7 +20,7 @@
using namespace Motorola::MFP68901;
ClockingHint::Preference MFP68901::preferred_clocking() {
ClockingHint::Preference MFP68901::preferred_clocking() const {
// Rule applied: if any timer is actively running and permitted to produce an
// interrupt, request real-time running.
return
@@ -208,7 +208,7 @@ void MFP68901::run_for(HalfCycles time) {
}
HalfCycles MFP68901::get_next_sequence_point() {
return HalfCycles(-1);
return HalfCycles::max();
}
// MARK: - Timers

View File

@@ -76,7 +76,7 @@ class MFP68901: public ClockingHint::Source {
void set_interrupt_delegate(InterruptDelegate *delegate);
// ClockingHint::Source.
ClockingHint::Preference preferred_clocking() final;
ClockingHint::Preference preferred_clocking() const final;
private:
// MARK: - Timers

View File

@@ -9,13 +9,15 @@
#ifndef i8255_hpp
#define i8255_hpp
#include <cstdint>
namespace Intel {
namespace i8255 {
class PortHandler {
public:
void set_value(int port, uint8_t value) {}
uint8_t get_value(int port) { return 0xff; }
void set_value([[maybe_unused]] int port, [[maybe_unused]] uint8_t value) {}
uint8_t get_value([[maybe_unused]] int port) { return 0xff; }
};
// TODO: Modes 1 and 2.

View File

@@ -79,10 +79,14 @@ namespace {
i8272::i8272(BusHandler &bus_handler, Cycles clock_rate) :
Storage::Disk::MFMController(clock_rate),
bus_handler_(bus_handler) {
posit_event(static_cast<int>(Event8272::CommandByte));
posit_event(int(Event8272::CommandByte));
// TODO: implement DMA, etc. I have a vague intention to implement the IBM PC
// one day, that should help to force that stuff.
(void)bus_handler_;
}
ClockingHint::Preference i8272::preferred_clocking() {
ClockingHint::Preference i8272::preferred_clocking() const {
const auto mfm_controller_preferred_clocking = Storage::Disk::MFMController::preferred_clocking();
if(mfm_controller_preferred_clocking != ClockingHint::Preference::None) return mfm_controller_preferred_clocking;
return is_sleeping_ ? ClockingHint::Preference::None : ClockingHint::Preference::JustInTime;
@@ -97,7 +101,7 @@ void i8272::run_for(Cycles cycles) {
if(delay_time_ > 0) {
if(cycles.as_integral() >= delay_time_) {
delay_time_ = 0;
posit_event(static_cast<int>(Event8272::Timer));
posit_event(int(Event8272::Timer));
} else {
delay_time_ -= cycles.as_integral();
}
@@ -114,7 +118,7 @@ void i8272::run_for(Cycles cycles) {
while(steps--) {
// Perform a step.
int direction = (drives_[c].target_head_position < drives_[c].head_position) ? -1 : 1;
LOG("Target " << PADDEC(0) << drives_[c].target_head_position << " versus believed " << static_cast<int>(drives_[c].head_position));
LOG("Target " << PADDEC(0) << drives_[c].target_head_position << " versus believed " << int(drives_[c].head_position));
select_drive(c);
get_drive().step(Storage::Disk::HeadPosition(direction));
if(drives_[c].target_head_position >= 0) drives_[c].head_position += direction;
@@ -156,7 +160,7 @@ void i8272::run_for(Cycles cycles) {
// check for busy plus ready disabled
if(is_executing_ && !get_drive().get_is_ready()) {
posit_event(static_cast<int>(Event8272::NoLongerReady));
posit_event(int(Event8272::NoLongerReady));
}
is_sleeping_ = !delay_time_ && !drives_seeking_ && !head_timers_running_;
@@ -177,7 +181,7 @@ void i8272::write(int address, uint8_t value) {
} else {
// accumulate latest byte in the command byte sequence
command_.push_back(value);
posit_event(static_cast<int>(Event8272::CommandByte));
posit_event(int(Event8272::CommandByte));
}
}
@@ -186,7 +190,7 @@ uint8_t i8272::read(int address) {
if(result_stack_.empty()) return 0xff;
uint8_t result = result_stack_.back();
result_stack_.pop_back();
if(result_stack_.empty()) posit_event(static_cast<int>(Event8272::ResultEmpty));
if(result_stack_.empty()) posit_event(int(Event8272::ResultEmpty));
return result;
} else {
@@ -198,16 +202,16 @@ uint8_t i8272::read(int address) {
#define END_SECTION() }
#define MS_TO_CYCLES(x) x * 8000
#define WAIT_FOR_EVENT(mask) resume_point_ = __LINE__; interesting_event_mask_ = static_cast<int>(mask); return; case __LINE__:
#define WAIT_FOR_TIME(ms) resume_point_ = __LINE__; interesting_event_mask_ = static_cast<int>(Event8272::Timer); delay_time_ = MS_TO_CYCLES(ms); is_sleeping_ = false; update_clocking_observer(); case __LINE__: if(delay_time_) return;
#define WAIT_FOR_EVENT(mask) resume_point_ = __LINE__; interesting_event_mask_ = int(mask); return; case __LINE__:
#define WAIT_FOR_TIME(ms) resume_point_ = __LINE__; interesting_event_mask_ = int(Event8272::Timer); delay_time_ = MS_TO_CYCLES(ms); is_sleeping_ = false; update_clocking_observer(); case __LINE__: if(delay_time_) return;
#define PASTE(x, y) x##y
#define CONCAT(x, y) PASTE(x, y)
#define FIND_HEADER() \
set_data_mode(DataMode::Scanning); \
CONCAT(find_header, __LINE__): WAIT_FOR_EVENT(static_cast<int>(Event::Token) | static_cast<int>(Event::IndexHole)); \
if(event_type == static_cast<int>(Event::IndexHole)) { index_hole_limit_--; } \
CONCAT(find_header, __LINE__): WAIT_FOR_EVENT(int(Event::Token) | int(Event::IndexHole)); \
if(event_type == int(Event::IndexHole)) { index_hole_limit_--; } \
else if(get_latest_token().type == Token::ID) goto CONCAT(header_found, __LINE__); \
\
if(index_hole_limit_) goto CONCAT(find_header, __LINE__); \
@@ -215,8 +219,8 @@ uint8_t i8272::read(int address) {
#define FIND_DATA() \
set_data_mode(DataMode::Scanning); \
CONCAT(find_data, __LINE__): WAIT_FOR_EVENT(static_cast<int>(Event::Token) | static_cast<int>(Event::IndexHole)); \
if(event_type == static_cast<int>(Event::Token)) { \
CONCAT(find_data, __LINE__): WAIT_FOR_EVENT(int(Event::Token) | int(Event::IndexHole)); \
if(event_type == int(Event::Token)) { \
if(get_latest_token().type == Token::Byte || get_latest_token().type == Token::Sync) goto CONCAT(find_data, __LINE__); \
}
@@ -264,8 +268,8 @@ uint8_t i8272::read(int address) {
}
void i8272::posit_event(int event_type) {
if(event_type == static_cast<int>(Event::IndexHole)) index_hole_count_++;
if(event_type == static_cast<int>(Event8272::NoLongerReady)) {
if(event_type == int(Event::IndexHole)) index_hole_count_++;
if(event_type == int(Event8272::NoLongerReady)) {
SetNotReady();
goto abort;
}
@@ -425,12 +429,12 @@ void i8272::posit_event(int event_type) {
// Performs the read data or read deleted data command.
read_data:
LOG(PADHEX(2) << "Read [deleted] data ["
<< static_cast<int>(command_[2]) << " "
<< static_cast<int>(command_[3]) << " "
<< static_cast<int>(command_[4]) << " "
<< static_cast<int>(command_[5]) << " ... "
<< static_cast<int>(command_[6]) << " "
<< static_cast<int>(command_[8]) << "]");
<< int(command_[2]) << " "
<< int(command_[3]) << " "
<< int(command_[4]) << " "
<< int(command_[5]) << " ... "
<< int(command_[6]) << " "
<< int(command_[8]) << "]");
read_next_data:
goto read_write_find_header;
@@ -439,7 +443,7 @@ void i8272::posit_event(int event_type) {
read_data_found_header:
FIND_DATA();
ClearControlMark();
if(event_type == static_cast<int>(Event::Token)) {
if(event_type == int(Event::Token)) {
if(get_latest_token().type != Token::Data && get_latest_token().type != Token::DeletedData) {
// Something other than a data mark came next, impliedly an ID or index mark.
SetMissingAddressMark();
@@ -470,24 +474,24 @@ void i8272::posit_event(int event_type) {
//
// TODO: consider DTL.
read_data_get_byte:
WAIT_FOR_EVENT(static_cast<int>(Event::Token) | static_cast<int>(Event::IndexHole));
if(event_type == static_cast<int>(Event::Token)) {
WAIT_FOR_EVENT(int(Event::Token) | int(Event::IndexHole));
if(event_type == int(Event::Token)) {
result_stack_.push_back(get_latest_token().byte_value);
distance_into_section_++;
SetDataRequest();
SetDataDirectionToProcessor();
WAIT_FOR_EVENT(static_cast<int>(Event8272::ResultEmpty) | static_cast<int>(Event::Token) | static_cast<int>(Event::IndexHole));
WAIT_FOR_EVENT(int(Event8272::ResultEmpty) | int(Event::Token) | int(Event::IndexHole));
}
switch(event_type) {
case static_cast<int>(Event8272::ResultEmpty): // The caller read the byte in time; proceed as normal.
case int(Event8272::ResultEmpty): // The caller read the byte in time; proceed as normal.
ResetDataRequest();
if(distance_into_section_ < (128 << size_)) goto read_data_get_byte;
break;
case static_cast<int>(Event::Token): // The caller hasn't read the old byte yet and a new one has arrived
case int(Event::Token): // The caller hasn't read the old byte yet and a new one has arrived
SetOverrun();
goto abort;
break;
case static_cast<int>(Event::IndexHole):
case int(Event::IndexHole):
SetEndOfCylinder();
goto abort;
break;
@@ -515,12 +519,12 @@ void i8272::posit_event(int event_type) {
write_data:
LOG(PADHEX(2) << "Write [deleted] data ["
<< static_cast<int>(command_[2]) << " "
<< static_cast<int>(command_[3]) << " "
<< static_cast<int>(command_[4]) << " "
<< static_cast<int>(command_[5]) << " ... "
<< static_cast<int>(command_[6]) << " "
<< static_cast<int>(command_[8]) << "]");
<< int(command_[2]) << " "
<< int(command_[3]) << " "
<< int(command_[4]) << " "
<< int(command_[5]) << " ... "
<< int(command_[6]) << " "
<< int(command_[8]) << "]");
if(get_drive().get_is_read_only()) {
SetNotWriteable();
@@ -571,7 +575,7 @@ void i8272::posit_event(int event_type) {
// Performs the read ID command.
read_id:
// Establishes the drive and head being addressed, and whether in double density mode.
LOG(PADHEX(2) << "Read ID [" << static_cast<int>(command_[0]) << " " << static_cast<int>(command_[1]) << "]");
LOG(PADHEX(2) << "Read ID [" << int(command_[0]) << " " << int(command_[1]) << "]");
// Sets a maximum index hole limit of 2 then waits either until it finds a header mark or sees too many index holes.
// If a header mark is found, reads in the following bytes that produce a header. Otherwise branches to data not found.
@@ -594,10 +598,10 @@ void i8272::posit_event(int event_type) {
// Performs read track.
read_track:
LOG(PADHEX(2) << "Read track ["
<< static_cast<int>(command_[2]) << " "
<< static_cast<int>(command_[3]) << " "
<< static_cast<int>(command_[4]) << " "
<< static_cast<int>(command_[5]) << "]");
<< int(command_[2]) << " "
<< int(command_[3]) << " "
<< int(command_[4]) << " "
<< int(command_[5]) << "]");
// Wait for the index hole.
WAIT_FOR_EVENT(Event::IndexHole);
@@ -627,7 +631,7 @@ void i8272::posit_event(int event_type) {
distance_into_section_++;
SetDataRequest();
// TODO: other possible exit conditions; find a way to merge with the read_data version of this.
WAIT_FOR_EVENT(static_cast<int>(Event8272::ResultEmpty));
WAIT_FOR_EVENT(int(Event8272::ResultEmpty));
ResetDataRequest();
if(distance_into_section_ < (128 << header_[2])) goto read_track_get_byte;
@@ -664,13 +668,13 @@ void i8272::posit_event(int event_type) {
expects_input_ = true;
distance_into_section_ = 0;
format_track_write_header:
WAIT_FOR_EVENT(static_cast<int>(Event::DataWritten) | static_cast<int>(Event::IndexHole));
WAIT_FOR_EVENT(int(Event::DataWritten) | int(Event::IndexHole));
switch(event_type) {
case static_cast<int>(Event::IndexHole):
case int(Event::IndexHole):
SetOverrun();
goto abort;
break;
case static_cast<int>(Event::DataWritten):
case int(Event::DataWritten):
header_[distance_into_section_] = input_;
write_byte(input_);
has_input_ = false;
@@ -683,10 +687,10 @@ void i8272::posit_event(int event_type) {
}
LOG(PADHEX(2) << "W:"
<< static_cast<int>(header_[0]) << " "
<< static_cast<int>(header_[1]) << " "
<< static_cast<int>(header_[2]) << " "
<< static_cast<int>(header_[3]) << ", "
<< int(header_[0]) << " "
<< int(header_[1]) << " "
<< int(header_[2]) << " "
<< int(header_[3]) << ", "
<< get_crc_generator().get_value());
write_crc();
@@ -706,8 +710,8 @@ void i8272::posit_event(int event_type) {
// Otherwise, pad out to the index hole.
format_track_pad:
write_byte(get_is_double_density() ? 0x4e : 0xff);
WAIT_FOR_EVENT(static_cast<int>(Event::DataWritten) | static_cast<int>(Event::IndexHole));
if(event_type != static_cast<int>(Event::IndexHole)) goto format_track_pad;
WAIT_FOR_EVENT(int(Event::DataWritten) | int(Event::IndexHole));
if(event_type != int(Event::IndexHole)) goto format_track_pad;
end_writing();
@@ -758,7 +762,7 @@ void i8272::posit_event(int event_type) {
// up in run_for understands to mean 'keep going until track 0 is active').
if(command_.size() > 2) {
drives_[drive].target_head_position = command_[2];
LOG(PADHEX(2) << "Seek to " << static_cast<int>(command_[2]));
LOG(PADHEX(2) << "Seek to " << int(command_[2]));
} else {
drives_[drive].target_head_position = -1;
drives_[drive].head_position = 0;
@@ -789,7 +793,7 @@ void i8272::posit_event(int event_type) {
// If a drive was found, return its results. Otherwise return a single 0x80.
if(found_drive != -1) {
drives_[found_drive].phase = Drive::NotSeeking;
status_[0] = static_cast<uint8_t>(found_drive);
status_[0] = uint8_t(found_drive);
main_status_ &= ~(1 << found_drive);
SetSeekEnd();
@@ -819,7 +823,7 @@ void i8272::posit_event(int event_type) {
int drive = command_[1] & 3;
select_drive(drive);
result_stack_= {
static_cast<uint8_t>(
uint8_t(
(command_[1] & 7) | // drive and head number
0x08 | // single sided
(get_drive().get_is_track_zero() ? 0x10 : 0x00) |
@@ -853,9 +857,9 @@ void i8272::posit_event(int event_type) {
// Posts whatever is in result_stack_ as a result phase. Be aware that it is a stack, so the
// last thing in it will be returned first.
post_result:
LOGNBR(PADHEX(2) << "Result to " << static_cast<int>(command_[0] & 0x1f) << ", main " << static_cast<int>(main_status_) << "; ");
LOGNBR(PADHEX(2) << "Result to " << int(command_[0] & 0x1f) << ", main " << int(main_status_) << "; ");
for(std::size_t c = 0; c < result_stack_.size(); c++) {
LOGNBR(" " << static_cast<int>(result_stack_[result_stack_.size() - 1 - c]));
LOGNBR(" " << int(result_stack_[result_stack_.size() - 1 - c]));
}
LOGNBR(std::endl);
@@ -880,13 +884,13 @@ bool i8272::seek_is_satisfied(int drive) {
(drives_[drive].target_head_position == -1 && get_drive().get_is_track_zero());
}
void i8272::set_dma_acknowledge(bool dack) {
void i8272::set_dma_acknowledge(bool) {
}
void i8272::set_terminal_count(bool tc) {
void i8272::set_terminal_count(bool) {
}
void i8272::set_data_input(uint8_t value) {
void i8272::set_data_input(uint8_t) {
}
uint8_t i8272::get_data_output() {

View File

@@ -20,8 +20,9 @@ namespace i8272 {
class BusHandler {
public:
virtual void set_dma_data_request(bool drq) {}
virtual void set_interrupt(bool irq) {}
virtual ~BusHandler() {}
virtual void set_dma_data_request([[maybe_unused]] bool drq) {}
virtual void set_interrupt([[maybe_unused]] bool irq) {}
};
class i8272 : public Storage::Disk::MFMController {
@@ -39,13 +40,13 @@ class i8272 : public Storage::Disk::MFMController {
void set_dma_acknowledge(bool dack);
void set_terminal_count(bool tc);
ClockingHint::Preference preferred_clocking() final;
ClockingHint::Preference preferred_clocking() const final;
protected:
virtual void select_drive(int number) = 0;
private:
// The bus handler, for interrupt and DMA-driven usage.
// The bus handler, for interrupt and DMA-driven usage. [TODO]
BusHandler &bus_handler_;
std::unique_ptr<BusHandler> allocated_bus_handler_;
@@ -68,7 +69,7 @@ class i8272 : public Storage::Disk::MFMController {
NoLongerReady = (1 << 6)
};
void posit_event(int type) final;
int interesting_event_mask_ = static_cast<int>(Event8272::CommandByte);
int interesting_event_mask_ = int(Event8272::CommandByte);
int resume_point_ = 0;
bool is_access_command_ = false;

View File

@@ -8,6 +8,11 @@
#include "z8530.hpp"
#ifndef NDEBUG
#define NDEBUG
#endif
#define LOG_PREFIX "[SCC] "
#include "../../Outputs/Log.hpp"
using namespace Zilog::SCC;
@@ -16,7 +21,7 @@ void z8530::reset() {
// TODO.
}
bool z8530::get_interrupt_line() {
bool z8530::get_interrupt_line() const {
return
(master_interrupt_control_ & 0x8) &&
(
@@ -25,22 +30,30 @@ bool z8530::get_interrupt_line() {
);
}
/*
Per the standard defined in the header file, this implementation follows
an addressing convention of:
A0 = A/B (i.e. channel select)
A1 = C/D (i.e. control or data)
*/
std::uint8_t z8530::read(int address) {
if(address & 2) {
// Read data register for channel
return 0x00;
// Read data register for channel.
return channels_[address & 1].read(true, pointer_);
} else {
// Read control register for channel.
uint8_t result = 0;
switch(pointer_) {
default:
result = channels_[address & 1].read(address & 2, pointer_);
result = channels_[address & 1].read(false, pointer_);
break;
case 2: // Handled non-symmetrically between channels.
if(address & 1) {
LOG("[SCC] Unimplemented: register 2 status bits");
LOG("Unimplemented: register 2 status bits");
} else {
result = interrupt_vector_;
@@ -63,7 +76,11 @@ std::uint8_t z8530::read(int address) {
break;
}
// Cf. the two-step control register selection process in ::write. Since this
// definitely wasn't a *write* to register 0, it follows that the next selected
// control register will be 0.
pointer_ = 0;
update_delegate();
return result;
}
@@ -73,24 +90,31 @@ std::uint8_t z8530::read(int address) {
void z8530::write(int address, std::uint8_t value) {
if(address & 2) {
// Write data register for channel.
// Write data register for channel. This is completely independent
// of whatever is going on over in the control realm.
channels_[address & 1].write(true, pointer_, value);
} else {
// Write control register for channel.
// Write control register for channel; there's a two-step sequence
// here for the programmer. Initially the selected register
// (i.e. `pointer_`) is zero. That register includes a field to
// set the next selected register. After any other register has
// been written to, register 0 is selected again.
// Most registers are per channel, but a couple are shared; sever
// them here.
// Most registers are per channel, but a couple are shared;
// sever them here, send the rest to the appropriate chnanel.
switch(pointer_) {
default:
channels_[address & 1].write(address & 2, pointer_, value);
channels_[address & 1].write(false, pointer_, value);
break;
case 2: // Interrupt vector register; shared between both channels.
case 2: // Interrupt vector register; used only by Channel B.
// So there's only one of these.
interrupt_vector_ = value;
LOG("[SCC] Interrupt vector set to " << PADHEX(2) << int(value));
LOG("Interrupt vector set to " << PADHEX(2) << int(value));
break;
case 9: // Master interrupt and reset register; also shared between both channels.
LOG("[SCC] Master interrupt and reset register: " << PADHEX(2) << int(value));
case 9: // Master interrupt and reset register; there is also only one of these.
LOG("Master interrupt and reset register: " << PADHEX(2) << int(value));
master_interrupt_control_ = value;
break;
}
@@ -105,7 +129,8 @@ void z8530::write(int address, std::uint8_t value) {
pointer_ = value & 7;
// If the command part of the byte is a 'point high', also set the
// top bit of the pointer.
// top bit of the pointer. Channels themselves therefore need not
// (/should not) respond to the point high command.
if(((value >> 3)&7) == 1) {
pointer_ |= 8;
}
@@ -126,16 +151,79 @@ uint8_t z8530::Channel::read(bool data, uint8_t pointer) {
if(data) {
return data_;
} else {
LOG("Control read from register " << int(pointer));
// Otherwise, this is a control read...
switch(pointer) {
default:
LOG("[SCC] Unrecognised control read from register " << int(pointer));
return 0x00;
case 0:
case 0x0: // Read Register 0; see p.37 (PDF p.45).
// b0: Rx character available.
// b1: zero count.
// b2: Tx buffer empty.
// b3: DCD.
// b4: sync/hunt.
// b5: CTS.
// b6: Tx underrun/EOM.
// b7: break/abort.
return dcd_ ? 0x8 : 0x0;
case 0xf:
case 0x1: // Read Register 1; see p.37 (PDF p.45).
// b0: all sent.
// b1: residue code 0.
// b2: residue code 1.
// b3: residue code 2.
// b4: parity error.
// b5: Rx overrun error.
// b6: CRC/framing error.
// b7: end of frame (SDLC).
return 0x01;
case 0x2: // Read Register 2; see p.37 (PDF p.45).
// Interrupt vector — modified by status information in B channel.
return 0x00;
case 0x3: // Read Register 3; see p.37 (PDF p.45).
// B channel: all bits are 0.
// A channel:
// b0: Channel B ext/status IP.
// b1: Channel B Tx IP.
// b2: Channel B Rx IP.
// b3: Channel A ext/status IP.
// b4: Channel A Tx IP.
// b5: Channel A Rx IP.
// b6, b7: 0.
return 0x00;
case 0xa: // Read Register 10; see p.37 (PDF p.45).
// b0: 0
// b1: On loop.
// b2: 0
// b3: 0
// b4: Loop sending.
// b5: 0
// b6: Two clocks missing.
// b7: One clock missing.
return 0x00;
case 0xc: // Read Register 12; see p.37 (PDF p.45).
// Lower byte of time constant.
return 0x00;
case 0xd: // Read Register 13; see p.38 (PDF p.46).
// Upper byte of time constant.
return 0x00;
case 0xf: // Read Register 15; see p.38 (PDF p.46).
// External interrupt status:
// b0: 0
// b1: Zero count.
// b2: 0
// b3: DCD.
// b4: Sync/hunt.
// b5: CTS.
// b6: Tx underrun/EOM.
// b7: Break/abort.
return external_interrupt_status_;
}
}
@@ -148,9 +236,10 @@ void z8530::Channel::write(bool data, uint8_t pointer, uint8_t value) {
data_ = value;
return;
} else {
LOG("Control write: " << PADHEX(2) << int(value) << " to register " << int(pointer));
switch(pointer) {
default:
LOG("[SCC] Unrecognised control write: " << PADHEX(2) << int(value) << " to register " << int(pointer));
LOG("Unrecognised control write: " << PADHEX(2) << int(value) << " to register " << int(pointer));
break;
case 0x0: // Write register 0 — CRC reset and other functions.
@@ -158,13 +247,13 @@ void z8530::Channel::write(bool data, uint8_t pointer, uint8_t value) {
switch(value >> 6) {
default: /* Do nothing. */ break;
case 1:
LOG("[SCC] TODO: reset Rx CRC checker.");
LOG("TODO: reset Rx CRC checker.");
break;
case 2:
LOG("[SCC] TODO: reset Tx CRC checker.");
LOG("TODO: reset Tx CRC checker.");
break;
case 3:
LOG("[SCC] TODO: reset Tx underrun/EOM latch.");
LOG("TODO: reset Tx underrun/EOM latch.");
break;
}
@@ -172,32 +261,84 @@ void z8530::Channel::write(bool data, uint8_t pointer, uint8_t value) {
switch((value >> 3)&7) {
default: /* Do nothing. */ break;
case 2:
// LOG("[SCC] reset ext/status interrupts.");
// LOG("reset ext/status interrupts.");
external_status_interrupt_ = false;
external_interrupt_status_ = 0;
break;
case 3:
LOG("[SCC] TODO: send abort (SDLC).");
LOG("TODO: send abort (SDLC).");
break;
case 4:
LOG("[SCC] TODO: enable interrupt on next Rx character.");
LOG("TODO: enable interrupt on next Rx character.");
break;
case 5:
LOG("[SCC] TODO: reset Tx interrupt pending.");
LOG("TODO: reset Tx interrupt pending.");
break;
case 6:
LOG("[SCC] TODO: reset error.");
LOG("TODO: reset error.");
break;
case 7:
LOG("[SCC] TODO: reset highest IUS.");
LOG("TODO: reset highest IUS.");
break;
}
break;
case 0x1: // Write register 1 — Transmit/Receive Interrupt and Data Transfer Mode Definition.
interrupt_mask_ = value;
/*
b7 = 0 => Wait/Request output is inactive; 1 => output is informative.
b6 = Wait/request output is for...
0 => wait: floating when inactive, low if CPU is attempting to transfer data the SCC isn't yet ready for.
1 => request: high if inactive, low if SCC is ready to transfer data.
b5 = 1 => wait/request is relative to read buffer; 0 => relative to write buffer.
b4/b3:
00 = disable receive interrupt
01 = interrupt on first character or special condition
10 = interrupt on all characters and special conditions
11 = interrupt only upon special conditions.
b2 = 1 => parity error is a special condition; 0 => it isn't.
b1 = 1 => transmit buffer empty interrupt is enabled; 0 => it isn't.
b0 = 1 => external interrupt is enabled; 0 => it isn't.
*/
LOG("Interrupt mask: " << PADHEX(2) << int(value));
break;
case 0x2: // Write register 2 - interrupt vector.
break;
case 0x3: { // Write register 3 — Receive Parameters and Control.
// Get bit count.
int receive_bit_count = 8;
switch(value >> 6) {
default: receive_bit_count = 5; break;
case 1: receive_bit_count = 7; break;
case 2: receive_bit_count = 6; break;
case 3: receive_bit_count = 8; break;
}
LOG("Receive bit count: " << receive_bit_count);
(void)receive_bit_count;
/*
b7,b6:
00 = 5 receive bits per character
01 = 7 bits
10 = 6 bits
11 = 8 bits
b5 = 1 => DCD and CTS outputs are set automatically; 0 => they're inputs to read register 0.
(DCD is ignored in local loopback; CTS is ignored in both auto echo and local loopback).
b4: enter hunt mode (if set to 1, presumably?)
b3 = 1 => enable receiver CRC generation; 0 => don't.
b2: address search mode (SDLC)
b1: sync character load inhibit.
b0: Rx enable.
*/
} break;
case 0x4: // Write register 4 — Transmit/Receive Miscellaneous Parameters and Modes.
// Bits 0 and 1 select parity mode.
if(!(value&1)) {
@@ -236,6 +377,23 @@ void z8530::Channel::write(bool data, uint8_t pointer, uint8_t value) {
}
break;
case 0x5:
// b7: DTR
// b6/b5:
// 00 = Tx 5 bits (or less) per character
// 01 = Tx 7 bits per character
// 10 = Tx 6 bits per character
// 11 = Tx 8 bits per character
// b4: send break.
// b3: Tx enable.
// b2: SDLC (if 0) / CRC-16 (if 1)
// b1: RTS
// b0: Tx CRC enable.
break;
case 0x6:
break;
case 0xf: // Write register 15 — External/Status Interrupt Control.
external_interrupt_mask_ = value;
break;
@@ -253,12 +411,17 @@ void z8530::Channel::set_dcd(bool level) {
}
}
bool z8530::Channel::get_interrupt_line() {
bool z8530::Channel::get_interrupt_line() const {
return
(interrupt_mask_ & 1) && external_status_interrupt_;
// TODO: other potential causes of an interrupt.
}
/*!
Evaluates the new level of the interrupt line and notifies the delegate if
both: (i) there is one; and (ii) the interrupt line has changed since last
the delegate was notified.
*/
void z8530::update_delegate() {
const bool interrupt_line = get_interrupt_line();
if(interrupt_line != previous_interrupt_line_) {

View File

@@ -30,16 +30,33 @@ class z8530 {
A/B = A0
C/D = A1
*/
/// Performs a read from the SCC; see above for conventions as to 'address'.
std::uint8_t read(int address);
/// Performs a write to the SCC; see above for conventions as to 'address'.
void write(int address, std::uint8_t value);
/// Resets the SCC.
void reset();
bool get_interrupt_line();
/// @returns The current value of the status output: @c true for active; @c false for inactive.
bool get_interrupt_line() const;
struct Delegate {
virtual void did_change_interrupt_status(z8530 *, bool new_status) = 0;
/*!
Communicates that @c scc now has the interrupt line status @c new_status.
*/
virtual void did_change_interrupt_status(z8530 *scc, bool new_status) = 0;
};
/*!
Sets the delegate for this SCC. If this is a new delegate it is sent
an immediate did_change_interrupt_status message, to get it
up to speed.
*/
void set_delegate(Delegate *delegate) {
if(delegate_ == delegate) return;
delegate_ = delegate;
delegate_->did_change_interrupt_status(this, get_interrupt_line());
}
/*
@@ -53,7 +70,7 @@ class z8530 {
uint8_t read(bool data, uint8_t pointer);
void write(bool data, uint8_t pointer, uint8_t value);
void set_dcd(bool level);
bool get_interrupt_line();
bool get_interrupt_line() const;
private:
uint8_t data_ = 0xff;

View File

@@ -33,7 +33,7 @@ struct ReverseTable {
ReverseTable() {
for(int c = 0; c < 256; ++c) {
map[c] = static_cast<uint8_t>(
map[c] = uint8_t(
((c & 0x80) >> 7) |
((c & 0x40) >> 5) |
((c & 0x20) >> 3) |
@@ -129,6 +129,10 @@ void TMS9918::set_display_type(Outputs::Display::DisplayType display_type) {
crt_.set_display_type(display_type);
}
Outputs::Display::DisplayType TMS9918::get_display_type() const {
return crt_.get_display_type();
}
void Base::LineBuffer::reset_sprite_collection() {
sprites_stopped = false;
active_sprite_slot = 0;
@@ -140,7 +144,7 @@ void Base::LineBuffer::reset_sprite_collection() {
void Base::posit_sprite(LineBuffer &buffer, int sprite_number, int sprite_position, int screen_row) {
if(!(status_ & StatusSpriteOverflow)) {
status_ = static_cast<uint8_t>((status_ & ~0x1f) | (sprite_number & 0x1f));
status_ = uint8_t((status_ & ~0x1f) | (sprite_number & 0x1f));
}
if(buffer.sprites_stopped)
return;
@@ -186,7 +190,9 @@ void TMS9918::run_for(const HalfCycles cycles) {
int read_cycles_pool = int_cycles;
while(write_cycles_pool || read_cycles_pool) {
#ifndef NDEBUG
LineBufferPointer backup = read_pointer_;
#endif
if(write_cycles_pool) {
// Determine how much writing to do.
@@ -325,8 +331,10 @@ void TMS9918::run_for(const HalfCycles cycles) {
}
#ifndef NDEBUG
assert(backup.row == read_pointer_.row && backup.column == read_pointer_.column);
backup = write_pointer_;
#endif
if(read_cycles_pool) {
@@ -527,7 +535,7 @@ void TMS9918::write(int address, uint8_t value) {
// The RAM pointer is always set on a second write, regardless of
// whether the caller is intending to enqueue a VDP operation.
ram_pointer_ = (ram_pointer_ & 0x00ff) | static_cast<uint16_t>(value << 8);
ram_pointer_ = (ram_pointer_ & 0x00ff) | uint16_t(value << 8);
write_phase_ = false;
if(value & 0x80) {
@@ -661,7 +669,7 @@ uint8_t TMS9918::get_current_line() {
}
}
return static_cast<uint8_t>(source_row);
return uint8_t(source_row);
}
uint8_t TMS9918::get_latched_horizontal_counter() {
@@ -700,9 +708,9 @@ HalfCycles Base::half_cycles_before_internal_cycles(int internal_cycles) {
return HalfCycles(((internal_cycles << 2) + (2 - cycles_error_)) / 3);
}
HalfCycles TMS9918::get_time_until_interrupt() {
if(!generate_interrupts_ && !enable_line_interrupts_) return HalfCycles(-1);
if(get_interrupt_line()) return HalfCycles(0);
HalfCycles TMS9918::get_next_sequence_point() {
if(!generate_interrupts_ && !enable_line_interrupts_) return HalfCycles::max();
if(get_interrupt_line()) return HalfCycles::max();
// Calculate the amount of time until the next end-of-frame interrupt.
const int frame_length = 342 * mode_timing_.total_lines;
@@ -742,7 +750,7 @@ HalfCycles TMS9918::get_time_until_interrupt() {
if(next_line_interrupt_row == -1) {
return generate_interrupts_ ?
half_cycles_before_internal_cycles(time_until_frame_interrupt) :
HalfCycles(-1);
HalfCycles::max();
}
// Figure out the number of internal cycles until the next line interrupt, which is the amount

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