// // ZXSpectrum.cpp // Clock Signal // // Created by Thomas Harte on 17/03/2021. // Copyright © 2021 Thomas Harte. All rights reserved. // #include "ZXSpectrum.hpp" #define LOG_PREFIX "[Spectrum] " #include "../../MachineTypes.hpp" #include "../../../Processors/Z80/Z80.hpp" #include "../../../Components/AudioToggle/AudioToggle.hpp" #include "../../../Components/AY38910/AY38910.hpp" #include "../../../Outputs/Log.hpp" #include "../../../Outputs/Speaker/Implementation/CompoundSource.hpp" #include "../../../Outputs/Speaker/Implementation/LowpassSpeaker.hpp" #include "../../../Outputs/Speaker/Implementation/SampleSource.hpp" #include "../../../Analyser/Static/ZXSpectrum/Target.hpp" #include namespace { const unsigned int ClockRate = 3'500'000; } namespace Sinclair { namespace ZXSpectrum { using Model = Analyser::Static::ZXSpectrum::Target::Model; template class ConcreteMachine: public Machine, public MachineTypes::ScanProducer, public MachineTypes::TimedMachine, public CPU::Z80::BusHandler { public: ConcreteMachine(const Analyser::Static::ZXSpectrum::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) : z80_(*this), ay_(GI::AY38910::Personality::AY38910, audio_queue_), audio_toggle_(audio_queue_), mixer_(ay_, audio_toggle_), speaker_(mixer_) { set_clock_rate(ClockRate); // With only the +2a and +3 currently supported, the +3 ROM is always // the one required. const auto roms = rom_fetcher({ {"ZXSpectrum", "the +2a/+3 ROM", "plus3.rom", 64 * 1024, 0x96e3c17a} }); if(!roms[0]) throw ROMMachine::Error::MissingROMs; memcpy(rom_.data(), roms[0]->data(), std::min(rom_.size(), roms[0]->size())); // Set up initial memory map. update_memory_map(); // TODO: insert media. (void)target; } // MARK: - TimedMachine void run_for(const Cycles cycles) override { z80_.run_for(cycles); } // MARK: - ScanProducer void set_scan_target(Outputs::Display::ScanTarget *scan_target) final { (void)scan_target; } Outputs::Display::ScanStatus get_scaled_scan_status() const final { // TODO. return Outputs::Display::ScanStatus(); } // MARK: - BusHandler forceinline HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) { // Ignore all but terminal cycles. // TODO: I doubt this is correct for timing. if(!cycle.is_terminal()) return HalfCycles(0); uint16_t address = cycle.address ? *cycle.address : 0x0000; using PartialMachineCycle = CPU::Z80::PartialMachineCycle; switch(cycle.operation) { default: break; case PartialMachineCycle::ReadOpcode: case PartialMachineCycle::Read: *cycle.value = read_pointers_[address >> 14][address]; break; case PartialMachineCycle::Write: write_pointers_[address >> 14][address] = *cycle.value; break; case PartialMachineCycle::Output: if(!(address&1)) { // TODO: port FE. } switch(address) { default: break; case 0x1ffd: port1ffd_ = *cycle.value; update_memory_map(); break; case 0x7ffd: disable_paging_ |= *cycle.value & 0x20; port7ffd_ = *cycle.value; update_memory_map(); break; } break; case PartialMachineCycle::Input: if(!(address&1)) { // TODO: port FE. } break; } return HalfCycles(0); } private: CPU::Z80::Processor z80_; // MARK: - Memory. std::array rom_; std::array ram_; std::array scratch_; const uint8_t *read_pointers_[4]; uint8_t *write_pointers_[4]; uint8_t port1ffd_ = 0; uint8_t port7ffd_ = 0; bool disable_paging_ = false; void update_memory_map() { // If paging is permanently disabled, don't react. if(disable_paging_) { return; } if(port1ffd_ & 1) { // "Special paging mode", i.e. one of four fixed // RAM configurations, port 7ffd doesn't matter. switch(port1ffd_ & 0x6) { default: case 0x00: set_memory(0, &ram_[0 * 16384], &ram_[0 * 16384]); set_memory(1, &ram_[1 * 16384], &ram_[1 * 16384]); set_memory(2, &ram_[2 * 16384], &ram_[2 * 16384]); set_memory(3, &ram_[3 * 16384], &ram_[3 * 16384]); break; case 0x02: set_memory(0, &ram_[4 * 16384], &ram_[4 * 16384]); set_memory(1, &ram_[5 * 16384], &ram_[5 * 16384]); set_memory(2, &ram_[6 * 16384], &ram_[6 * 16384]); set_memory(3, &ram_[7 * 16384], &ram_[7 * 16384]); break; case 0x04: set_memory(0, &ram_[4 * 16384], &ram_[4 * 16384]); set_memory(1, &ram_[5 * 16384], &ram_[5 * 16384]); set_memory(2, &ram_[6 * 16384], &ram_[6 * 16384]); set_memory(3, &ram_[3 * 16384], &ram_[3 * 16384]); break; case 0x06: set_memory(0, &ram_[4 * 16384], &ram_[4 * 16384]); set_memory(1, &ram_[7 * 16384], &ram_[7 * 16384]); set_memory(2, &ram_[6 * 16384], &ram_[6 * 16384]); set_memory(3, &ram_[3 * 16384], &ram_[3 * 16384]); break; } return; } // Apply standard 128kb-esque mapping (albeit with extra ROM to pick from). const auto rom = &rom_[ (((port1ffd_ >> 1) & 2) | ((port7ffd_ >> 4) & 1)) * 16384]; set_memory(0, rom, nullptr); set_memory(1, &ram_[5 * 16384], &ram_[5 * 16384]); set_memory(2, &ram_[2 * 16384], &ram_[2 * 16384]); const auto high_ram = &ram_[(port7ffd_ & 7) * 16384]; set_memory(3, high_ram, high_ram); } void set_memory(int bank, const uint8_t *read, uint8_t *write) { read_pointers_[bank] = read - bank*16384; write_pointers_[bank] = (write ? write : scratch_.data()) - bank*16384; } // MARK: - Audio. Concurrency::DeferringAsyncTaskQueue audio_queue_; GI::AY38910::AY38910 ay_; Audio::Toggle audio_toggle_; Outputs::Speaker::CompoundSource, Audio::Toggle> mixer_; Outputs::Speaker::LowpassSpeaker, Audio::Toggle>> speaker_; }; } } using namespace Sinclair::ZXSpectrum; Machine *Machine::ZXSpectrum(const Analyser::Static::Target *target, const ROMMachine::ROMFetcher &rom_fetcher) { const auto zx_target = dynamic_cast(target); switch(zx_target->model) { case Model::Plus2a: return new ConcreteMachine(*zx_target, rom_fetcher); case Model::Plus3: return new ConcreteMachine(*zx_target, rom_fetcher); } return nullptr; } Machine::~Machine() {}