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111 lines
2.3 KiB
C++
111 lines
2.3 KiB
C++
//
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// PerformImplementation.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 05/10/2023.
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// Copyright © 2023 Thomas Harte. All rights reserved.
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//
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#ifndef PerformImplementation_h
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#define PerformImplementation_h
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namespace InstructionSet::x86 {
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namespace Primitive {
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void aaa(CPU::RegisterPair16 &ax, Status &status) {
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/*
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IF ((AL AND 0FH) > 9) OR (AF = 1)
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THEN
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AL ← (AL + 6);
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AH ← AH + 1;
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AF ← 1;
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CF ← 1;
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ELSE
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AF ← 0;
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CF ← 0;
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FI;
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AL ← AL AND 0FH;
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*/
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/*
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The AF and CF flags are set to 1 if the adjustment results in a decimal carry;
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otherwise they are cleared to 0. The OF, SF, ZF, and PF flags are undefined.
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*/
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if((ax.halves.low & 0x0f) > 9 || status.auxiliary_carry) {
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ax.halves.low += 6;
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++ax.halves.high;
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status.auxiliary_carry = status.carry = 1;
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} else {
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status.auxiliary_carry = status.carry = 0;
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}
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}
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void aad(CPU::RegisterPair16 &ax, uint8_t imm, Status &status) {
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/*
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tempAL ← AL;
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tempAH ← AH;
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AL ← (tempAL + (tempAH * imm8)) AND FFH; (* imm8 is set to 0AH for the AAD mnemonic *)
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AH ← 0
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*/
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/*
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The SF, ZF, and PF flags are set according to the result;
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the OF, AF, and CF flags are undefined.
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*/
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ax.halves.low = ax.halves.low + (ax.halves.high * imm);
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ax.halves.high = 0;
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status.sign = ax.halves.low & 0x80;
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status.parity = status.zero = ax.halves.low;
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}
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}
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template <
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Model model,
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Operation operation,
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DataSize data_size,
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typename FlowControllerT
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> void perform(
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CPU::RegisterPair16 &destination,
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CPU::RegisterPair16 &source,
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Status &status,
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FlowControllerT &flow_controller
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) {
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switch(operation) {
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case Operation::AAA: Primitive::aaa(destination, status); break;
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case Operation::AAD: Primitive::aad(destination, source.halves.low, status); break;
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}
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(void)flow_controller;
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}
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/*template <
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Model model,
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typename InstructionT,
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typename FlowControllerT,
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typename DataPointerResolverT,
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typename RegistersT,
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typename MemoryT,
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typename IOT,
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Operation operation
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> void perform(
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const InstructionT &instruction,
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Status &status,
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FlowControllerT &flow_controller,
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DataPointerResolverT &resolver,
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RegistersT ®isters,
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MemoryT &memory,
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IOT &io
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) {
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switch((operation != Operation::Invalid) ? operation : instruction.operation) {
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default:
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assert(false);
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return;
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}
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}*/
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}
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#endif /* PerformImplementation_h */
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