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412 lines
13 KiB
C++
412 lines
13 KiB
C++
//
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// Video.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 18/03/2021.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#ifndef Video_hpp
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#define Video_hpp
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#include "../../../Outputs/CRT/CRT.hpp"
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#include "../../../ClockReceiver/ClockReceiver.hpp"
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#include <algorithm>
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namespace Sinclair {
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namespace ZXSpectrum {
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enum class VideoTiming {
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FortyEightK,
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OneTwoEightK,
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Plus3,
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};
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/*
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Timing notes:
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As of the +2a/+3:
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311 lines, 228 cycles/line
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Delays begin at 14361, follow the pattern 1, 0, 7, 6, 5, 4, 3, 2; run for 129 cycles/line.
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Possibly delays only affect actual reads and writes; documentation is unclear.
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Unknowns, to me, presently:
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How long the interrupt line held for.
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So...
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Probably two bytes of video and attribute are fetched in each 8-cycle block,
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with 16 such blocks therefore providing the whole visible display, an island
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within 28.5 blocks horizontally.
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14364 is 228*63, so I I guess almost 63 lines run from the start of vertical
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blank through to the top of the display, implying 56 lines on to vertical blank.
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*/
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template <VideoTiming timing> class Video {
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private:
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struct Timings {
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// Number of cycles per line. Will be 224 or 228.
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int cycles_per_line;
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// Number of lines comprising a whole frame. Will be 311 or 312.
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int lines_per_frame;
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// Number of cycles before first pixel fetch that contention starts to be applied.
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int contention_leadin;
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// Period in a line for which contention is applied.
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int contention_duration;
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// Number of cycles after first pixel fetch at which interrupt is first signalled.
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int interrupt_time;
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// Contention to apply, in half-cycles, as a function of number of half cycles since
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// contention began.
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int delays[16];
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};
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static constexpr Timings get_timings() {
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// Amstrad gate array timings, classic statement:
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//
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// Contention begins 14361 cycles "after interrupt" and follows the pattern [1, 0, 7, 6 5 4, 3, 2].
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// The first four bytes of video are fetched at 14365–14368 cycles, in the order [pixels, attribute, pixels, attribute].
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//
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// For my purposes:
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//
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// Video fetching always begins at 0. Since there are 311*228 = 70908 cycles per frame, and the interrupt
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// should "occur" (I assume: begin) 14365 before that, it should actually begin at 70908 - 14365 = 56543.
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//
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// Contention begins four cycles before the first video fetch, so it begins at 70904. I don't currently
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// know whether the four cycles is true across all models, so it's given here as convention_leadin.
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//
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// ... except that empirically that all seems to be two cycles off. So maybe I misunderstand what the
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// contention patterns are supposed to indicate relative to MREQ? It's frustrating that all documentation
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// I can find is vaguely in terms of contention patterns, and what they mean isn't well-defined in terms
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// of regular Z80 signalling.
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constexpr Timings result = {
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.cycles_per_line = 228 * 2,
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.lines_per_frame = 311,
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// i.e. video fetching begins five cycles after the start of the
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// contended memory pattern below; that should put a clear two
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// cycles between a Z80 access and the first video fetch.
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.contention_leadin = 5 * 2,
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.contention_duration = 129 * 2,
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// i.e. interrupt is first signalled 14368 cycles before the first video fetch.
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.interrupt_time = (228*311 - 14368) * 2,
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.delays = {
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2, 1,
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0, 0,
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14, 13,
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12, 11,
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10, 9,
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8, 7,
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6, 5,
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4, 3,
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}
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};
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return result;
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}
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// TODO: how long is the interrupt line held for?
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static constexpr int interrupt_duration = 48;
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public:
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void run_for(HalfCycles duration) {
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constexpr auto timings = get_timings();
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constexpr int sync_line = (timings.interrupt_time / timings.cycles_per_line) + 1;
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constexpr int sync_position = 166 * 2;
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constexpr int sync_length = 17 * 2;
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constexpr int burst_position = sync_position + 40;
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constexpr int burst_length = 17;
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int cycles_remaining = duration.as<int>();
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while(cycles_remaining) {
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int line = time_into_frame_ / timings.cycles_per_line;
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int offset = time_into_frame_ % timings.cycles_per_line;
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const int cycles_this_line = std::min(cycles_remaining, timings.cycles_per_line - offset);
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const int end_offset = offset + cycles_this_line;
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if(!offset) {
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is_alternate_line_ ^= true;
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if(!line) {
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flash_counter_ = (flash_counter_ + 1) & 31;
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flash_mask_ = uint8_t(flash_counter_ >> 4);
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}
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}
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if(line >= sync_line && line < sync_line + 3) {
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// Output sync line.
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crt_.output_sync(cycles_this_line);
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} else {
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if(line >= 192) {
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// Output plain border line.
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if(offset < sync_position) {
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const int border_duration = std::min(sync_position, end_offset) - offset;
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output_border(border_duration);
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offset += border_duration;
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}
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} else {
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// Output pixel line.
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if(offset < 256) {
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const int pixel_duration = std::min(256, end_offset) - offset;
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if(!offset) {
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pixel_target_ = crt_.begin_data(256);
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attribute_address_ = ((line >> 3) << 5) + 6144;
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pixel_address_ = ((line & 0x07) << 8) | ((line & 0x38) << 2) | ((line & 0xc0) << 5);
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}
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if(pixel_target_) {
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const int start_column = offset >> 4;
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const int end_column = (offset + pixel_duration) >> 4;
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for(int column = start_column; column < end_column; column++) {
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last_fetches_[0] = memory_[pixel_address_];
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last_fetches_[1] = memory_[attribute_address_];
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last_fetches_[2] = memory_[pixel_address_+1];
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last_fetches_[3] = memory_[attribute_address_+1];
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set_last_contended_area_access(last_fetches_[3]);
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pixel_address_ += 2;
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attribute_address_ += 2;
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constexpr uint8_t masks[] = {0, 0xff};
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#define Output(n) \
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{ \
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const uint8_t pixels = \
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uint8_t(last_fetches_[n] ^ masks[flash_mask_ & (last_fetches_[n+1] >> 7)]); \
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\
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const uint8_t colours[2] = { \
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palette[(last_fetches_[n+1] & 0x78) >> 3], \
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palette[((last_fetches_[n+1] & 0x40) >> 3) | (last_fetches_[n+1] & 0x07)], \
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}; \
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\
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pixel_target_[0] = colours[(pixels >> 7) & 1]; \
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pixel_target_[1] = colours[(pixels >> 6) & 1]; \
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pixel_target_[2] = colours[(pixels >> 5) & 1]; \
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pixel_target_[3] = colours[(pixels >> 4) & 1]; \
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pixel_target_[4] = colours[(pixels >> 3) & 1]; \
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pixel_target_[5] = colours[(pixels >> 2) & 1]; \
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pixel_target_[6] = colours[(pixels >> 1) & 1]; \
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pixel_target_[7] = colours[(pixels >> 0) & 1]; \
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pixel_target_ += 8; \
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}
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Output(0);
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Output(2);
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#undef Output
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}
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}
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offset += pixel_duration;
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if(offset == 256) {
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crt_.output_data(256);
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pixel_target_ = nullptr;
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}
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}
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if(offset >= 256 && offset < sync_position && end_offset > offset) {
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const int border_duration = std::min(sync_position, end_offset) - offset;
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output_border(border_duration);
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offset += border_duration;
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}
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}
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// Output the common tail to border and pixel lines: sync, blank, colour burst, border.
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if(offset >= sync_position && offset < sync_position + sync_length && end_offset > offset) {
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const int sync_duration = std::min(sync_position + sync_length, end_offset) - offset;
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crt_.output_sync(sync_duration);
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offset += sync_duration;
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}
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if(offset >= sync_position + sync_length && offset < burst_position && end_offset > offset) {
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const int blank_duration = std::min(burst_position, end_offset) - offset;
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crt_.output_blank(blank_duration);
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offset += blank_duration;
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}
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if(offset >= burst_position && offset < burst_position+burst_length && end_offset > offset) {
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const int burst_duration = std::min(burst_position + burst_length, end_offset) - offset;
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crt_.output_colour_burst(burst_duration, 116, is_alternate_line_);
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offset += burst_duration;
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// The colour burst phase above is an empirical guess. I need to research further.
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}
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if(offset >= burst_position+burst_length && end_offset > offset) {
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const int border_duration = end_offset - offset;
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output_border(border_duration);
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}
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}
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cycles_remaining -= cycles_this_line;
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time_into_frame_ = (time_into_frame_ + cycles_this_line) % (timings.cycles_per_line * timings.lines_per_frame);
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}
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}
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private:
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void output_border(int duration) {
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uint8_t *const colour_pointer = crt_.begin_data(1);
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if(colour_pointer) *colour_pointer = border_colour_;
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crt_.output_level(duration);
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}
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public:
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Video() :
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crt_(227 * 2, 2, Outputs::Display::Type::PAL50, Outputs::Display::InputDataType::Red2Green2Blue2)
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{
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// Show only the centre 80% of the TV frame.
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crt_.set_display_type(Outputs::Display::DisplayType::RGB);
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crt_.set_visible_area(Outputs::Display::Rect(0.1f, 0.1f, 0.8f, 0.8f));
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}
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void set_video_source(const uint8_t *source) {
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memory_ = source;
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}
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/*!
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@returns The amount of time until the next change in the interrupt line, that being the only internally-observeable output.
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*/
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HalfCycles get_next_sequence_point() {
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constexpr auto timings = get_timings();
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// Is the frame still ahead of this interrupt?
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if(time_into_frame_ < timings.interrupt_time) {
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return HalfCycles(timings.interrupt_time - time_into_frame_);
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}
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// If not, is it within this interrupt?
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if(time_into_frame_ < timings.interrupt_time + interrupt_duration) {
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return HalfCycles(timings.interrupt_time + interrupt_duration - time_into_frame_);
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}
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// If not, it'll be in the next batch.
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return timings.interrupt_time + timings.cycles_per_line * timings.lines_per_frame - time_into_frame_;
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}
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/*!
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@returns The current state of the interrupt output.
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*/
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bool get_interrupt_line() const {
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constexpr auto timings = get_timings();
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return time_into_frame_ >= timings.interrupt_time && time_into_frame_ < timings.interrupt_time + interrupt_duration;
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}
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/*!
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@returns How many cycles the [ULA/gate array] would delay the CPU for if it were to recognise that contention
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needs to be applied in @c offset half-cycles from now.
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*/
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int access_delay(HalfCycles offset) const {
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constexpr auto timings = get_timings();
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const int delay_time = (time_into_frame_ + offset.as<int>() + timings.contention_leadin) % (timings.cycles_per_line * timings.lines_per_frame);
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// Check for a time within the no-contention window.
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if(delay_time >= (191*timings.cycles_per_line + timings.contention_duration)) {
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return 0;
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}
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const int time_into_line = delay_time % timings.cycles_per_line;
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if(time_into_line >= timings.contention_duration) {
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return 0;
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}
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return timings.delays[time_into_line & 15];
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}
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/*!
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@returns Whatever the ULA or gate array would expose via the floating bus, this cycle.
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*/
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uint8_t get_floating_value() const {
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constexpr auto timings = get_timings();
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const int line = time_into_frame_ / timings.cycles_per_line;
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if(line >= 192) return 0xff;
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const int time_into_line = time_into_frame_ % timings.cycles_per_line;
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if(time_into_line >= 256 || (time_into_line&8)) {
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return last_contended_access_;
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}
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// The +2a and +3 always return the low bit as set.
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if constexpr (timing == VideoTiming::Plus3) {
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return last_fetches_[(time_into_line >> 1) & 3] | 1;
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}
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return last_fetches_[(time_into_line >> 1) & 3];
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}
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/*!
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Relevant to the +2a and +3 only, sets the most recent value read from or
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written to contended memory. This is what will be returned if the floating
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bus is accessed when the gate array isn't currently reading.
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*/
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void set_last_contended_area_access([[maybe_unused]] uint8_t value) {
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if constexpr (timing == VideoTiming::Plus3) {
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last_contended_access_ = value | 1;
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}
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}
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/*!
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Sets the current border colour.
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*/
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void set_border_colour(uint8_t colour) {
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border_colour_ = palette[colour];
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}
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/// Sets the scan target.
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void set_scan_target(Outputs::Display::ScanTarget *scan_target) {
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crt_.set_scan_target(scan_target);
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}
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/// Gets the current scan status.
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Outputs::Display::ScanStatus get_scaled_scan_status() const {
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return crt_.get_scaled_scan_status();
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}
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/*! Sets the type of display the CRT will request. */
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void set_display_type(Outputs::Display::DisplayType type) {
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crt_.set_display_type(type);
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}
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private:
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int time_into_frame_ = 0;
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Outputs::CRT::CRT crt_;
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const uint8_t *memory_ = nullptr;
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uint8_t border_colour_ = 0;
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uint8_t *pixel_target_ = nullptr;
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int attribute_address_ = 0;
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int pixel_address_ = 0;
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uint8_t flash_mask_ = 0;
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int flash_counter_ = 0;
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bool is_alternate_line_ = false;
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uint8_t last_fetches_[4] = {0xff, 0xff, 0xff, 0xff};
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uint8_t last_contended_access_ = 0xff;
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#define RGB(r, g, b) (r << 4) | (g << 2) | b
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static constexpr uint8_t palette[] = {
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RGB(0, 0, 0), RGB(0, 0, 2), RGB(2, 0, 0), RGB(2, 0, 2),
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RGB(0, 2, 0), RGB(0, 2, 2), RGB(2, 2, 0), RGB(2, 2, 2),
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RGB(0, 0, 0), RGB(0, 0, 3), RGB(3, 0, 0), RGB(3, 0, 3),
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RGB(0, 3, 0), RGB(0, 3, 3), RGB(3, 3, 0), RGB(3, 3, 3),
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};
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#undef RGB
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};
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}
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}
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#endif /* Video_hpp */
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