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158 lines
3.6 KiB
C++
158 lines
3.6 KiB
C++
//
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// ColecoVision.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 23/02/2018.
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// Copyright © 2018 Thomas Harte. All rights reserved.
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//
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#include "ColecoVision.hpp"
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#include "../../Processors/Z80/Z80.hpp"
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#include "../../Components/9918/9918.hpp"
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#include "../CRTMachine.hpp"
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#include "../../ClockReceiver/ForceInline.hpp"
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namespace Coleco {
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namespace Vision {
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class ConcreteMachine:
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public Machine,
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public CPU::Z80::BusHandler,
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public CRTMachine::Machine {
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public:
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ConcreteMachine() : z80_(*this) {
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set_clock_rate(3579545);
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}
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void setup_output(float aspect_ratio) override {
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vdp_.reset(new TI::TMS9918(TI::TMS9918::TMS9918A));
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get_crt()->set_output_device(Outputs::CRT::OutputDevice::Television);
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}
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void close_output() override {
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vdp_.reset();
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}
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Outputs::CRT::CRT *get_crt() override {
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return vdp_->get_crt();
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}
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Outputs::Speaker::Speaker *get_speaker() override {
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return nullptr;
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}
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void run_for(const Cycles cycles) override {
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z80_.run_for(cycles);
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}
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// Obtains the system ROMs.
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bool set_rom_fetcher(const std::function<std::vector<std::unique_ptr<std::vector<uint8_t>>>(const std::string &machine, const std::vector<std::string> &names)> &roms_with_names) override {
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auto roms = roms_with_names(
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"ColecoVision",
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{
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"coleco.rom"
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});
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if(!roms[0]) return false;
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bios_ = *roms[0];
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bios_.resize(8192);
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return true;
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}
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// MARK: Z80::BusHandler
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forceinline HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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if(time_until_interrupt_ > 0) {
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time_until_interrupt_ -= cycle.length;
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if(time_until_interrupt_ <= HalfCycles(0)) {
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z80_.set_non_maskable_interrupt_line(true, time_until_interrupt_);
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}
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}
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uint16_t address = cycle.address ? *cycle.address : 0x0000;
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switch(cycle.operation) {
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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case CPU::Z80::PartialMachineCycle::Read:
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if(address < 0x2000) {
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*cycle.value = bios_[address];
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} else if(address >= 0x6000 && address < 0x8000) {
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*cycle.value = ram_[address & 1023];
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} else {
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*cycle.value = 0xff;
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}
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break;
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case CPU::Z80::PartialMachineCycle::Write:
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if(address >= 0x6000 && address < 0x8000) {
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ram_[address & 1023] = *cycle.value;
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}
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break;
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case CPU::Z80::PartialMachineCycle::Input:
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switch((address >> 5) & 7) {
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case 5:
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vdp_->run_for(time_since_vdp_update_.flush());
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*cycle.value = vdp_->get_register(address);
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z80_.set_non_maskable_interrupt_line(vdp_->get_interrupt_line());
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time_until_interrupt_ = vdp_->get_time_until_interrupt();
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break;
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default:
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*cycle.value = 0xff;
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break;
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}
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break;
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case CPU::Z80::PartialMachineCycle::Output:
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switch((address >> 5) & 7) {
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case 5:
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vdp_->run_for(time_since_vdp_update_.flush());
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vdp_->set_register(address, *cycle.value);
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z80_.set_non_maskable_interrupt_line(vdp_->get_interrupt_line());
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time_until_interrupt_ = vdp_->get_time_until_interrupt();
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break;
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default: break;
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}
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break;
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default:
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break;
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}
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time_since_vdp_update_ += cycle.length;
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return HalfCycles(0);
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}
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void flush() {
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vdp_->run_for(time_since_vdp_update_.flush());
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}
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private:
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CPU::Z80::Processor<ConcreteMachine, false, false> z80_;
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std::unique_ptr<TI::TMS9918> vdp_;
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std::vector<uint8_t> bios_;
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uint8_t ram_[1024];
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HalfCycles time_since_vdp_update_;
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HalfCycles time_until_interrupt_;
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};
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}
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}
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using namespace Coleco::Vision;
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Machine *Machine::ColecoVision() {
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return new ConcreteMachine;
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}
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Machine::~Machine() {}
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