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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-05 06:05:27 +00:00
CLK/Components
2021-11-24 17:15:48 -05:00
..
1770 WD1770: switch motor on even if spin-up is disabled. 2021-06-21 23:26:55 -04:00
5380
6522 Eliminate unused #includes. 2021-07-18 11:35:57 -04:00
6526 Avoid unnecessary get_port_input calls. 2021-11-24 17:15:48 -05:00
6532
6560 Splits the lowpass filter into push and pull variants. 2021-11-21 15:37:29 -05:00
6845
6850 Introduce the principle that a Serial::Line can be two-wire — clock + data. 2021-11-06 16:54:20 -07:00
8255
8272
8530 Ensures no double definition of NDEBUG. 2021-03-07 12:52:54 -05:00
9918 Correct no-interrupt signal. 2021-06-04 22:38:07 -04:00
68901 Switches to correct non-value sentinel. 2021-04-20 21:56:58 -04:00
AppleClock Establishes valid initial BRAM. 2021-09-10 19:56:20 -04:00
AudioToggle
AY38910 Adds SZX support. 2021-04-26 20:47:28 -04:00
DiskII Walk back slightly. 2021-10-14 18:02:58 -07:00
KonamiSCC
OPx
Serial Add header for assert. 2021-11-24 16:28:18 -05:00
SN76489