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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-19 23:32:28 +00:00
CLK/OSBindings/Mac/Clock SignalTests/Bridges
2017-07-27 21:19:16 -04:00
..
C1540Bridge.h
C1540Bridge.mm The 1540 is now a ClockReceiver. 2017-07-24 22:32:41 -04:00
Clock SignalTests-Bridging-Header.h
DigitalPhaseLockedLoopBridge.h Fixed the DigitalPhaseLockedLoopBridge bridge, once again fixing tests. 2017-07-16 20:55:57 -04:00
DigitalPhaseLockedLoopBridge.mm Converted the DPLL and disk controller classes to be ClockReceivers. 2017-07-24 21:04:47 -04:00
MOS6522Bridge.h
MOS6522Bridge.mm Corrected test. 2017-07-24 22:33:49 -04:00
MOS6532Bridge.h
MOS6532Bridge.mm The 6532 is now a ClockReceiver. 2017-07-24 21:57:24 -04:00
TestMachine6502.h Discovered legitimate uses of the jam opcode so reinstated it. Corrected illegitimate uses. 2017-07-25 22:48:44 -04:00
TestMachine6502.mm Corrected timestamp return, and its testing by the 6502 timing tests. 2017-07-27 21:19:16 -04:00
TestMachine.h Attempted to bring a common hierarchy to the Z80 and 6502 test machines, particularly with a view to eliminating the special-case Jam stuff on the 6502. 2017-06-03 21:22:16 -04:00
TestMachine.mm Attempted to bring a common hierarchy to the Z80 and 6502 test machines, particularly with a view to eliminating the special-case Jam stuff on the 6502. 2017-06-03 21:22:16 -04:00
TestMachine+ForSubclassEyesOnly.h Attempted to bring a common hierarchy to the Z80 and 6502 test machines, particularly with a view to eliminating the special-case Jam stuff on the 6502. 2017-06-03 21:22:16 -04:00
TestMachineZ80.h Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests. 2017-07-27 20:17:13 -04:00
TestMachineZ80.mm Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests. 2017-07-27 20:17:13 -04:00