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236 lines
6.4 KiB
C++
236 lines
6.4 KiB
C++
//
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// Z80Storage.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 01/09/2017.
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// Copyright 2017 Thomas Harte. All rights reserved.
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//
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/*!
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A repository for all the internal state of a CPU::Z80::Processor; extracted into a separate base
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class in order to remove it from visibility within the main Z80.hpp.
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*/
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class ProcessorStorage {
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protected:
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struct MicroOp {
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enum Type {
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BusOperation,
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DecodeOperation,
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DecodeOperationNoRChange,
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MoveToNextProgram,
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Increment8NoFlags,
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Increment8,
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Increment16,
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Decrement8,
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Decrement16,
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Move8,
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Move16,
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IncrementPC,
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AssembleAF,
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DisassembleAF,
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And,
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Or,
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Xor,
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TestNZ,
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TestZ,
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TestNC,
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TestC,
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TestPO,
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TestPE,
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TestP,
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TestM,
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ADD16, ADC16, SBC16,
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CP8, SUB8, SBC8, ADD8, ADC8,
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NEG,
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ExDEHL, ExAFAFDash, EXX,
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EI, DI, IM,
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LDI, LDIR, LDD, LDDR,
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CPI, CPIR, CPD, CPDR,
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INI, INIR, IND, INDR,
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OUTI, OUTD, OUT_R,
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RLA, RLCA, RRA, RRCA,
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RLC, RRC, RL, RR,
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SLA, SRA, SLL, SRL,
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RLD, RRD,
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SetInstructionPage,
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CalculateIndexAddress,
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BeginNMI,
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BeginIRQ,
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BeginIRQMode0,
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RETN,
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JumpTo66,
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HALT,
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/// Decrements BC; if BC is 0 then moves to the next instruction. Otherwise allows this instruction to finish.
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DJNZ,
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DAA,
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CPL,
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SCF,
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CCF,
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/// Resets the bit in @c source implied by @c operation_ .
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RES,
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/// Tests the bit in @c source implied by @c operation_ .
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BIT,
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/// Sets the bit in @c source implied by @c operation_ .
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SET,
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/// Sets @c memptr_ to the target address implied by @c operation_ .
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CalculateRSTDestination,
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/// Resets subtract and carry, sets sign, zero, five and three according to the value of @c a_ and sets parity to the value of @c IFF2 .
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SetAFlags,
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/// Resets subtract and carry, sets sign, zero, five and three according to the value of @c operation and sets parity the same as sign.
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SetInFlags,
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/// Sets @c memptr_ to @c bc_.full+1 .
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SetOutFlags,
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/// Sets @c temp8_ to 0.
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SetZero,
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/// A no-op; used in instruction lists to indicate where an index calculation should go if this is an I[X/Y]+d operation.
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IndexedPlaceHolder,
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/// Sets @c memptr_ to (a_ << 8) + ((source_ + 1) & 0xff)
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SetAddrAMemptr,
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/// Resets: IFF1, IFF2, interrupt mode, the PC, I and R; sets all flags, the SP to 0xffff and a_ to 0xff.
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Reset
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};
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Type type;
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void *source = nullptr;
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void *destination = nullptr;
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PartialMachineCycle machine_cycle;
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};
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struct InstructionPage {
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std::vector<MicroOp *> instructions;
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std::vector<MicroOp> all_operations;
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std::vector<MicroOp> fetch_decode_execute;
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MicroOp *fetch_decode_execute_data = nullptr;
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uint8_t r_step;
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bool is_indexed;
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InstructionPage() : r_step(1), is_indexed(false) {}
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};
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ProcessorStorage();
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void install_default_instruction_set();
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uint8_t a_;
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RegisterPair16 bc_, de_, hl_;
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RegisterPair16 afDash_, bcDash_, deDash_, hlDash_;
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RegisterPair16 ix_, iy_, pc_, sp_;
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RegisterPair16 ir_, refresh_addr_;
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bool iff1_ = false, iff2_ = false;
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int interrupt_mode_ = 0;
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uint16_t pc_increment_ = 1;
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uint8_t sign_result_; // the sign flag is set if the value in sign_result_ is negative
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uint8_t zero_result_; // the zero flag is set if the value in zero_result_ is zero
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uint8_t half_carry_result_; // the half-carry flag is set if bit 4 of half_carry_result_ is set
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uint8_t bit53_result_; // the bit 3 and 5 flags are set if the corresponding bits of bit53_result_ are set
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uint8_t parity_overflow_result_; // the parity/overflow flag is set if the corresponding bit of parity_overflow_result_ is set
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uint8_t subtract_flag_; // contains a copy of the subtract flag in isolation
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uint8_t carry_result_; // the carry flag is set if bit 0 of carry_result_ is set
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uint8_t halt_mask_ = 0xff;
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unsigned int flag_adjustment_history_ = 0; // a shifting record of whether each opcode set any flags; it turns out
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// that knowledge of what the last opcode did is necessary to get bits 5 & 3
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// correct for SCF and CCF.
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HalfCycles number_of_cycles_;
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enum Interrupt: uint8_t {
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IRQ = 0x01,
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NMI = 0x02,
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Reset = 0x04,
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PowerOn = 0x08
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};
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uint8_t request_status_ = Interrupt::PowerOn;
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uint8_t last_request_status_ = Interrupt::PowerOn;
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bool irq_line_ = false, nmi_line_ = false;
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bool bus_request_line_ = false;
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bool wait_line_ = false;
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uint8_t operation_;
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RegisterPair16 temp16_, memptr_;
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uint8_t temp8_;
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const MicroOp *scheduled_program_counter_ = nullptr;
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std::vector<MicroOp> conditional_call_untaken_program_;
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std::vector<MicroOp> reset_program_;
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std::vector<MicroOp> irq_program_[3];
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std::vector<MicroOp> nmi_program_;
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InstructionPage *current_instruction_page_;
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InstructionPage base_page_;
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InstructionPage ed_page_;
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InstructionPage fd_page_;
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InstructionPage dd_page_;
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InstructionPage cb_page_;
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InstructionPage fdcb_page_;
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InstructionPage ddcb_page_;
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/*!
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Gets the flags register.
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@see set_flags
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@returns The current value of the flags register.
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*/
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uint8_t get_flags() const {
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return
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(sign_result_ & Flag::Sign) |
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(zero_result_ ? 0 : Flag::Zero) |
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(bit53_result_ & (Flag::Bit5 | Flag::Bit3)) |
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(half_carry_result_ & Flag::HalfCarry) |
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(parity_overflow_result_ & Flag::Parity) |
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subtract_flag_ |
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(carry_result_ & Flag::Carry);
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}
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/*!
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Sets the flags register.
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@see set_flags
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@param flags The new value of the flags register.
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*/
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void set_flags(uint8_t flags) {
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sign_result_ = flags;
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zero_result_ = (flags & Flag::Zero) ^ Flag::Zero;
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bit53_result_ = flags;
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half_carry_result_ = flags;
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parity_overflow_result_ = flags;
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subtract_flag_ = flags & Flag::Subtract;
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carry_result_ = flags;
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}
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typedef MicroOp InstructionTable[256][30];
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virtual void assemble_page(InstructionPage &target, InstructionTable &table, bool add_offsets) = 0;
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virtual void copy_program(const MicroOp *source, std::vector<MicroOp> &destination) = 0;
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void assemble_fetch_decode_execute(InstructionPage &target, int length);
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void assemble_ed_page(InstructionPage &target);
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void assemble_cb_page(InstructionPage &target, RegisterPair16 &index, bool add_offsets);
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void assemble_base_page(InstructionPage &target, RegisterPair16 &index, bool add_offsets, InstructionPage &cb_page);
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// Allos state objects to capture and apply state.
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friend class State;
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};
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