Thomas Harte 46fff8e8a2 Ensured bit 8 is uniquely from the latched video byte, not an OR of that with the refresh address.		2017-07-06 22:48:48 -04:00
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Video.cpp	Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate.	2017-06-12 18:55:04 -04:00
Video.hpp	Added comments.	2017-06-06 18:01:33 -04:00
ZX8081.cpp	Ensured bit 8 is uniquely from the latched video byte, not an OR of that with the refresh address.	2017-07-06 22:48:48 -04:00
ZX8081.hpp	Added a block on the tape motor for a short period after each time the ROM routine is intercepted for a substituted byte read. To reduce the collision between fast tape and real tape loading.	2017-07-06 22:33:54 -04:00