6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-09-29 00:56:21 +00:00
Code Issues Projects Releases Wiki Activity
4709ae80cb
CLK/Components/AY38910
History
Thomas Harte 7fbb455836 Per the CPC test I'm checking, 0s should be returned for non-retained bits, not 1s.
2017-08-07 19:07:12 -04:00
..
AY38910.cpp Per the CPC test I'm checking, 0s should be returned for non-retained bits, not 1s. 2017-08-07 19:07:12 -04:00
AY38910.hpp The port input/output flags are now honoured; reading a port that is set as an output returns the current output value. 2017-08-07 19:01:18 -04:00