Thomas Harte 6ec4e4e3d7 Merge branch 'master' into Memptr		2017-07-25 23:01:34 -04:00
..
AllSuiteA
Atari ROMs
BCDTest
Bridges	Merge branch 'master' into Memptr	2017-07-25 23:01:34 -04:00
FUSE
Klaus Dormann
Wolfgang Lorenz 6502 test suite
Zexall
6502InterruptTests.swift
6502TimingTests.swift	Fixed 6502 timing tests.	2017-07-25 23:00:39 -04:00
6522Tests.swift
6532Tests.swift
AllSuiteATests.swift
ArrayBuilderTests.mm
AtariStaticAnalyserTests.mm
BCDTest.swift	Completed fixture of the 6502 BCD test.	2017-07-25 22:55:45 -04:00
C1540Tests.swift
CRCTests.mm
DPLLTests.swift	Fixed the DigitalPhaseLockedLoopBridge bridge, once again fixing tests.	2017-07-16 20:55:57 -04:00
FUSETests.swift
Info.plist
KlausDormannTests.swift
PCMPatchedTrackTests.mm
PCMSegmentEventSourceTests.mm
PCMTrackTests.mm
TIATests.mm	The TIA is now a ClockReceiver.	2017-07-24 21:48:34 -04:00
TimeTests.mm
WolfgangLorenzTests.swift
Z80InterruptTests.swift	Introduced an NMI/wait interrupt timing test, and adjusted the Z80 to conform to information posted by Wilf Rigter.	2017-06-22 21:09:26 -04:00
Z80MachineCycleTests.swift	Fixed LD H, (HL) and LD L, (HL) by ensuring that whatever the subclass does goes to a temporary place before updating the address. Corrected the LD (IX+d), n machine cycle test for my new best-guess timing. This should leave only interrupt timing as currently amiss.	2017-06-20 22:25:00 -04:00
Z80MemptrTests.swift	Added test for EX (SP), rp, which passes.	2017-07-22 17:17:32 -04:00
ZexallTests.swift