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142 lines
4.9 KiB
C++
142 lines
4.9 KiB
C++
//
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// 68000Implementation.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 10/03/2019.
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// Copyright © 2019 Thomas Harte. All rights reserved.
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//
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template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>::run_for(HalfCycles duration) {
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// TODO: obey the 'cycles' count.
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while(true) {
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// Check whether the current list of bus steps is exhausted; if so then
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// seek out another one from the current program (if any), and if there
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// are no more to do, revert to scheduling something else (after checking
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// for interrupts).
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if(active_step_->action == BusStep::Action::ScheduleNextProgram) {
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if(active_micro_op_) {
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switch(active_micro_op_->action) {
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case MicroOp::Action::None: break;
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case MicroOp::Action::PerformOperation:
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switch(active_program_->operation) {
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case Operation::ABCD: {
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// Pull out the two halves, for simplicity.
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const uint8_t source = active_program_->source->halves.low.halves.low;
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const uint8_t destination = active_program_->destination->halves.low.halves.low;
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// Perform the BCD add by evaluating the two nibbles separately.
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int result = (destination & 0xf) + (source & 0xf) + (extend_flag_ ? 1 : 0);
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if(result > 0x9) result += 0x06;
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result += (destination & 0xf0) + (source & 0xf0);
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if(result > 0x90) result += 0x60;
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// Set all flags essentially as if this were normal addition.
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zero_flag_ |= result & 0xff;
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extend_flag_ = carry_flag_ = result & ~0xff;
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negative_flag_ = result & 0x80;
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overflow_flag_ = ~(source ^ destination) & (destination ^ result) & 0x80;
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// Store the result.
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active_program_->destination->halves.low.halves.low = uint8_t(result);
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} break;
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case Operation::SBCD: {
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// Pull out the two halves, for simplicity.
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const uint8_t source = active_program_->source->halves.low.halves.low;
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const uint8_t destination = active_program_->destination->halves.low.halves.low;
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// Perform the BCD add by evaluating the two nibbles separately.
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int result = (destination & 0xf) - (source & 0xf) - (extend_flag_ ? 1 : 0);
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if(result > 0x9) result -= 0x06;
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result += (destination & 0xf0) - (source & 0xf0);
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if(result > 0x90) result -= 0x60;
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// Set all flags essentially as if this were normal addition.
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zero_flag_ |= result & 0xff;
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extend_flag_ = carry_flag_ = result & ~0xff;
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negative_flag_ = result & 0x80;
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overflow_flag_ = (source ^ destination) & (destination ^ result) & 0x80;
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// Store the result.
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active_program_->destination->halves.low.halves.low = uint8_t(result);
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} break;
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default:
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std::cerr << "Should do something with program operation " << int(active_program_->operation) << std::endl;
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break;
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}
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break;
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case MicroOp::Action::PredecrementSourceAndDestination1:
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-- active_program_->source->full;
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-- active_program_->destination->full;
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break;
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case MicroOp::Action::PredecrementSourceAndDestination2:
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active_program_->source->full -= 2;
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active_program_->destination->full -= 2;
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break;
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case MicroOp::Action::PredecrementSourceAndDestination4:
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active_program_->source->full -= 4;
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active_program_->destination->full -= 4;
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break;
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}
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}
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if(active_micro_op_) {
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++active_micro_op_;
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active_step_ = active_micro_op_->bus_program;
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}
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if(!active_step_ || !active_micro_op_) {
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const uint16_t next_instruction = prefetch_queue_[0].full;
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if(!instructions[next_instruction].micro_operations) {
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std::cerr << "68000 Abilities exhausted; should schedule an instruction or something?" << std::endl;
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return;
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}
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active_program_ = &instructions[next_instruction];
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active_micro_op_ = active_program_->micro_operations;
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active_step_ = active_micro_op_->bus_program;
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}
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}
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// The bus step list is not exhausted, so perform the microcycle.
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// Check for DTack if this isn't being treated implicitly.
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if(!dtack_is_implicit) {
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if(active_step_->microcycle.operation & (Microcycle::UpperData | Microcycle::LowerData) && !dtack_) {
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// TODO: perform wait state.
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continue;
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}
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}
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// TODO: synchronous bus.
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// Perform the microcycle.
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bus_handler_.perform_bus_operation(active_step_->microcycle, is_supervisor_);
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// Perform the post-hoc action.
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switch(active_step_->action) {
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default:
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std::cerr << "Unimplemented 68000 bus step action: " << int(active_step_->action) << std::endl;
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return;
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break;
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case BusStep::Action::None: break;
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case BusStep::Action::IncrementEffectiveAddress: effective_address_ += 2; break;
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case BusStep::Action::IncrementProgramCounter: program_counter_.full += 2; break;
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case BusStep::Action::AdvancePrefetch:
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prefetch_queue_[0] = prefetch_queue_[1];
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break;
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}
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// Move to the next program step.
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++active_step_;
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}
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}
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