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207 lines
10 KiB
C++
207 lines
10 KiB
C++
//
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// Resolver.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 05/11/2023.
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// Copyright © 2023 Thomas Harte. All rights reserved.
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//
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#pragma once
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#include "../AccessType.hpp"
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namespace InstructionSet::x86 {
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/// Obtain a pointer to the value desribed by @c source, which is one of those named by @c pointer, using @c instruction and @c context
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/// for offsets, registers and memory contents.
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///
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/// If @c source is Source::None then @c none is returned.
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///
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/// If @c source is Source::Immediate then the appropriate portion of @c instrucion's operand
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/// is copied to @c *immediate and @c immediate is returned.
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template <typename IntT, AccessType access, typename InstructionT, typename ContextT>
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typename Accessor<IntT, access>::type resolve(
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InstructionT &instruction,
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Source source,
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DataPointer pointer,
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ContextT &context,
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IntT *none = nullptr,
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IntT *immediate = nullptr
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);
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/// Calculates the absolute address for @c pointer given the registers and memory provided in @c context and taking any
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/// referenced offset from @c instruction.
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template <Source source, typename IntT, AccessType access, typename InstructionT, typename ContextT>
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uint32_t address(
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InstructionT &instruction,
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DataPointer pointer,
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ContextT &context
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) {
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if constexpr (source == Source::DirectAddress) {
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return instruction.offset();
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}
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uint32_t address;
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uint16_t zero = 0;
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address = resolve<uint16_t, AccessType::Read>(instruction, pointer.index(), pointer, context, &zero);
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if constexpr (is_32bit(ContextT::model)) {
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address <<= pointer.scale();
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}
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address += instruction.offset();
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if constexpr (source == Source::IndirectNoBase) {
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return address;
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}
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return address + resolve<uint16_t, AccessType::Read>(instruction, pointer.base(), pointer, context);
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}
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/// @returns a pointer to the contents of the register identified by the combination of @c IntT and @c Source if any;
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/// @c nullptr otherwise. @c access is currently unused but is intended to provide the hook upon which updates to
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/// segment registers can be tracked for protected modes.
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template <typename IntT, AccessType access, Source source, typename ContextT>
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IntT *register_(ContextT &context) {
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static constexpr bool supports_dword = is_32bit(ContextT::model);
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switch(source) {
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case Source::eAX:
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// Slightly contorted if chain here and below:
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//
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// (i) does the `constexpr` version of a `switch`; and
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// (i) ensures .eax() etc aren't called on @c registers for 16-bit processors, so they need not implement 32-bit storage.
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if constexpr (supports_dword && std::is_same_v<IntT, uint32_t>) { return &context.registers.eax(); }
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else if constexpr (std::is_same_v<IntT, uint16_t>) { return &context.registers.ax(); }
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else if constexpr (std::is_same_v<IntT, uint8_t>) { return &context.registers.al(); }
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else { return nullptr; }
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case Source::eCX:
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if constexpr (supports_dword && std::is_same_v<IntT, uint32_t>) { return &context.registers.ecx(); }
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else if constexpr (std::is_same_v<IntT, uint16_t>) { return &context.registers.cx(); }
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else if constexpr (std::is_same_v<IntT, uint8_t>) { return &context.registers.cl(); }
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else { return nullptr; }
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case Source::eDX:
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if constexpr (supports_dword && std::is_same_v<IntT, uint32_t>) { return &context.registers.edx(); }
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else if constexpr (std::is_same_v<IntT, uint16_t>) { return &context.registers.dx(); }
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else if constexpr (std::is_same_v<IntT, uint8_t>) { return &context.registers.dl(); }
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else if constexpr (std::is_same_v<IntT, uint32_t>) { return nullptr; }
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case Source::eBX:
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if constexpr (supports_dword && std::is_same_v<IntT, uint32_t>) { return &context.registers.ebx(); }
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else if constexpr (std::is_same_v<IntT, uint16_t>) { return &context.registers.bx(); }
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else if constexpr (std::is_same_v<IntT, uint8_t>) { return &context.registers.bl(); }
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else if constexpr (std::is_same_v<IntT, uint32_t>) { return nullptr; }
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case Source::eSPorAH:
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if constexpr (supports_dword && std::is_same_v<IntT, uint32_t>) { return &context.registers.esp(); }
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else if constexpr (std::is_same_v<IntT, uint16_t>) { return &context.registers.sp(); }
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else if constexpr (std::is_same_v<IntT, uint8_t>) { return &context.registers.ah(); }
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else { return nullptr; }
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case Source::eBPorCH:
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if constexpr (supports_dword && std::is_same_v<IntT, uint32_t>) { return &context.registers.ebp(); }
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else if constexpr (std::is_same_v<IntT, uint16_t>) { return &context.registers.bp(); }
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else if constexpr (std::is_same_v<IntT, uint8_t>) { return &context.registers.ch(); }
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else { return nullptr; }
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case Source::eSIorDH:
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if constexpr (supports_dword && std::is_same_v<IntT, uint32_t>) { return &context.registers.esi(); }
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else if constexpr (std::is_same_v<IntT, uint16_t>) { return &context.registers.si(); }
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else if constexpr (std::is_same_v<IntT, uint8_t>) { return &context.registers.dh(); }
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else { return nullptr; }
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case Source::eDIorBH:
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if constexpr (supports_dword && std::is_same_v<IntT, uint32_t>) { return &context.registers.edi(); }
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else if constexpr (std::is_same_v<IntT, uint16_t>) { return &context.registers.di(); }
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else if constexpr (std::is_same_v<IntT, uint8_t>) { return &context.registers.bh(); }
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else { return nullptr; }
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// Segment registers are always 16-bit.
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case Source::ES: if constexpr (std::is_same_v<IntT, uint16_t>) return &context.registers.es(); else return nullptr;
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case Source::CS: if constexpr (std::is_same_v<IntT, uint16_t>) return &context.registers.cs(); else return nullptr;
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case Source::SS: if constexpr (std::is_same_v<IntT, uint16_t>) return &context.registers.ss(); else return nullptr;
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case Source::DS: if constexpr (std::is_same_v<IntT, uint16_t>) return &context.registers.ds(); else return nullptr;
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// 16-bit models don't have FS and GS.
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case Source::FS: if constexpr (is_32bit(ContextT::model) && std::is_same_v<IntT, uint16_t>) return &context.registers.fs(); else return nullptr;
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case Source::GS: if constexpr (is_32bit(ContextT::model) && std::is_same_v<IntT, uint16_t>) return &context.registers.gs(); else return nullptr;
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default: return nullptr;
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}
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}
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///Obtains the address described by @c pointer from @c instruction given the registers and memory as described by @c context.
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template <typename IntT, AccessType access, typename InstructionT, typename ContextT>
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uint32_t address(
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InstructionT &instruction,
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DataPointer pointer,
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ContextT &context
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) {
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// TODO: at least on the 8086 this isn't how register 'addresses' are resolved; instead whatever was the last computed address
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// remains in the address register and is returned. Find out what other x86s do and make a decision.
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switch(pointer.source()) {
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default: return 0;
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case Source::eAX: return *register_<IntT, access, Source::eAX>(context);
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case Source::eCX: return *register_<IntT, access, Source::eCX>(context);
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case Source::eDX: return *register_<IntT, access, Source::eDX>(context);
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case Source::eBX: return *register_<IntT, access, Source::eBX>(context);
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case Source::eSPorAH: return *register_<IntT, access, Source::eSPorAH>(context);
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case Source::eBPorCH: return *register_<IntT, access, Source::eBPorCH>(context);
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case Source::eSIorDH: return *register_<IntT, access, Source::eSIorDH>(context);
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case Source::eDIorBH: return *register_<IntT, access, Source::eDIorBH>(context);
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case Source::Indirect: return address<Source::Indirect, IntT, access>(instruction, pointer, context);
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case Source::IndirectNoBase: return address<Source::IndirectNoBase, IntT, access>(instruction, pointer, context);
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case Source::DirectAddress: return address<Source::DirectAddress, IntT, access>(instruction, pointer, context);
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}
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}
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// See forward declaration, above, for details.
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template <typename IntT, AccessType access, typename InstructionT, typename ContextT>
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typename Accessor<IntT, access>::type resolve(
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InstructionT &instruction,
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Source source,
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DataPointer pointer,
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ContextT &context,
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IntT *none,
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IntT *immediate
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) {
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// Rules:
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//
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// * if this is a memory access, set target_address and break;
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// * otherwise return the appropriate value.
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uint32_t target_address = 0;
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switch(source) {
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// Defer all register accesses to the register-specific lookup.
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case Source::eAX: return *register_<IntT, access, Source::eAX>(context);
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case Source::eCX: return *register_<IntT, access, Source::eCX>(context);
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case Source::eDX: return *register_<IntT, access, Source::eDX>(context);
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case Source::eBX: return *register_<IntT, access, Source::eBX>(context);
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case Source::eSPorAH: return *register_<IntT, access, Source::eSPorAH>(context);
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case Source::eBPorCH: return *register_<IntT, access, Source::eBPorCH>(context);
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case Source::eSIorDH: return *register_<IntT, access, Source::eSIorDH>(context);
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case Source::eDIorBH: return *register_<IntT, access, Source::eDIorBH>(context);
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case Source::ES: return *register_<IntT, access, Source::ES>(context);
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case Source::CS: return *register_<IntT, access, Source::CS>(context);
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case Source::SS: return *register_<IntT, access, Source::SS>(context);
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case Source::DS: return *register_<IntT, access, Source::DS>(context);
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case Source::FS: return *register_<IntT, access, Source::FS>(context);
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case Source::GS: return *register_<IntT, access, Source::GS>(context);
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case Source::None: return *none;
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case Source::Immediate:
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*immediate = IntT(instruction.operand());
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return *immediate;
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case Source::Indirect:
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target_address = address<Source::Indirect, IntT, access>(instruction, pointer, context);
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break;
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case Source::IndirectNoBase:
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target_address = address<Source::IndirectNoBase, IntT, access>(instruction, pointer, context);
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break;
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case Source::DirectAddress:
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target_address = address<Source::DirectAddress, IntT, access>(instruction, pointer, context);
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break;
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}
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// If execution has reached here then a memory fetch is required.
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// Do it and exit.
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//
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// TODO: support 32-bit addresses.
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return context.memory.template access<IntT, access>(instruction.data_segment(), uint16_t(target_address));
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}
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}
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