This website requires JavaScript.
Explore
Mirrors
Help
Sign In
6502
/
CLK
Watch
1
Star
0
Fork
0
You've already forked CLK
mirror of
https://github.com/TomHarte/CLK.git
synced
2025-02-01 09:33:20 +00:00
Code
Issues
Projects
Releases
Wiki
Activity
CLK
/
Components
History
Thomas Harte
7baad61746
Attempts a full implementation of asynchronous write mode.
2019-07-15 17:11:12 -04:00
..
1770
…
6522
Solidifies belief that the shift register bit is cleared on read/write.
2019-07-08 16:45:15 -04:00
6532
…
6560
…
6845
…
8255
…
8272
…
8530
Corrects Macintosh aspect ratio (and framing).
2019-06-13 18:41:38 -04:00
9918
…
AudioToggle
…
AY38910
Implements proper AY IO output behaviour.
2019-03-05 20:20:26 -05:00
DiskII
Attempts a full implementation of asynchronous write mode.
2019-07-15 17:11:12 -04:00
KonamiSCC
…
SN76489
…
