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274 lines
9.4 KiB
C++
274 lines
9.4 KiB
C++
//
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// Chipset.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 22/07/2021.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#include "Chipset.hpp"
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//#define NDEBUG
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#define LOG_PREFIX "[Amiga chipset] "
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#include "../../Outputs/Log.hpp"
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#include <cassert>
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using namespace Amiga;
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Chipset::Chipset(uint16_t *ram, size_t size) :
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blitter_(ram, size) {
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}
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void Chipset::run_for(HalfCycles length) {
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// Update raster position.
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// TODO: actual graphics, why not?
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x_ += length.as<int>();
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y_ = (y_ + x_ / (227 + (y_&1))) % 262;
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x_ %= 227;
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}
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void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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using Microcycle = CPU::MC68000::Microcycle;
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#define RW(address) (address & 0xffe) | ((cycle.operation & Microcycle::Read) << 12)
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#define Read(address) address | (Microcycle::Read << 12)
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#define Write(address) address
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#define ApplySetClear(target) { \
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const uint16_t value = cycle.value16(); \
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if(value & 0x8000) { \
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target |= (value & 0x7fff); \
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} else { \
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target &= ~(value & 0x7fff); \
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} \
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}
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switch(RW(*cycle.address)) {
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default:
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LOG("Unimplemented chipset " << (cycle.operation & Microcycle::Read ? "read" : "write") << " " << PADHEX(6) << *cycle.address);
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assert(false);
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break;
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// Position polling.
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case Read(0x004): {
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const uint16_t position = uint16_t(y_ >> 8);
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LOG("Read vertical position high " << PADHEX(4) << position);
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cycle.set_value16(position);
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} break;
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case Read(0x006): {
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const uint16_t position = uint16_t((x_ << 8) | (y_ & 0xff));
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LOG("Read vertical position low " << PADHEX(4) << position);
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cycle.set_value16(position);
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} break;
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case Write(0x02a):
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LOG("TODO: write vertical position high " << PADHEX(4) << cycle.value16());
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break;
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case Write(0x02c):
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LOG("TODO: write vertical position low " << PADHEX(4) << cycle.value16());
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break;
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// Disk DMA.
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case Write(0x020): case Write(0x022): case Write(0x024):
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case Write(0x026):
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LOG("TODO: disk DMA; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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// Refresh.
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case Write(0x028):
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LOG("TODO (maybe): refresh; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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// Serial port.
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case Write(0x030):
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LOG("TODO: serial data: " << PADHEX(4) << cycle.value16());
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break;
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case Write(0x032):
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LOG("TODO: serial control: " << PADHEX(4) << cycle.value16());
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break;
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// DMA management.
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case Read(0x002):
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LOG("DMA control and status read");
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cycle.set_value16(dma_control_ | blitter_.get_status());
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break;
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case Write(0x096):
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ApplySetClear(dma_control_);
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LOG("DMA control modified by " << PADHEX(4) << cycle.value16() << "; is now " << std::bitset<16>{dma_control_});
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break;
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// Interrupts.
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case Write(0x09a):
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ApplySetClear(interrupt_enable_);
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update_interrupts();
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LOG("Interrupt enable mask modified by " << PADHEX(4) << cycle.value16() << "; is now " << std::bitset<16>{interrupt_enable_});
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break;
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case Write(0x09c):
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ApplySetClear(interrupt_requests_);
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update_interrupts();
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LOG("Interrupt request modified by " << PADHEX(4) << cycle.value16() << "; is now " << std::bitset<16>{interrupt_requests_});
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break;
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// Display management.
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case Write(0x08e): {
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const uint16_t value = cycle.value16();
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display_window_start_[0] = value & 0xff;
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display_window_start_[1] = value >> 8;
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LOG("Display window start set to " << std::dec << display_window_start_[0] << ", " << display_window_start_[1]);
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} break;
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case Write(0x090): {
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const uint16_t value = cycle.value16();
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display_window_stop_[0] = 0x100 | (value & 0xff);
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display_window_stop_[1] = value >> 8;
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display_window_stop_[1] |= ((value >> 7) & 0x100) ^ 0x100;
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LOG("Display window stop set to " << std::dec << display_window_stop_[0] << ", " << display_window_stop_[1]);
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} break;
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case Write(0x092):
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fetch_window_[0] = uint16_t((cycle.value16() & 0xfc) << 1);
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LOG("Fetch window start set to " << std::dec << fetch_window_[0]);
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break;
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case Write(0x094):
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fetch_window_[1] = uint16_t((cycle.value16() & 0xfc) << 1);
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LOG("Fetch window stop set to " << std::dec << fetch_window_[1]);
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break;
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// Bitplanes.
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case Write(0x100):
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case Write(0x102):
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case Write(0x104):
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case Write(0x106):
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LOG("TODO: Bitplane control; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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case Write(0x108):
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case Write(0x10a):
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LOG("TODO: Bitplane modulo; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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case Write(0x110):
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case Write(0x112):
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case Write(0x114):
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case Write(0x116):
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case Write(0x118):
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case Write(0x11a):
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LOG("TODO: Bitplane data; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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case Read(0x110): case Read(0x112): case Read(0x114): case Read(0x116):
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case Read(0x118): case Read(0x11a):
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cycle.set_value16(0xffff);
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break;
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// Blitter.
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case Write(0x040): blitter_.set_control(0, cycle.value16()); break;
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case Write(0x042): blitter_.set_control(1, cycle.value16()); break;
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case Write(0x044): blitter_.set_first_word_mask(cycle.value16()); break;
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case Write(0x046): blitter_.set_last_word_mask(cycle.value16()); break;
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case Write(0x048): blitter_.set_pointer(2, 16, cycle.value16()); break;
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case Write(0x04a): blitter_.set_pointer(2, 0, cycle.value16()); break;
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case Write(0x04c): blitter_.set_pointer(1, 16, cycle.value16()); break;
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case Write(0x04e): blitter_.set_pointer(1, 0, cycle.value16()); break;
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case Write(0x050): blitter_.set_pointer(0, 16, cycle.value16()); break;
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case Write(0x052): blitter_.set_pointer(0, 0, cycle.value16()); break;
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case Write(0x054): blitter_.set_pointer(3, 16, cycle.value16()); break;
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case Write(0x056): blitter_.set_pointer(3, 0, cycle.value16()); break;
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case Write(0x058): blitter_.set_size(cycle.value16()); break;
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case Write(0x05a): blitter_.set_minterms(cycle.value16()); break;
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case Write(0x05c): blitter_.set_vertical_size(cycle.value16()); break;
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case Write(0x05e): blitter_.set_horizontal_size(cycle.value16()); break;
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case Write(0x060): blitter_.set_modulo(2, cycle.value16()); break;
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case Write(0x062): blitter_.set_modulo(1, cycle.value16()); break;
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case Write(0x064): blitter_.set_modulo(0, cycle.value16()); break;
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case Write(0x066): blitter_.set_modulo(3, cycle.value16()); break;
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case Write(0x070): blitter_.set_data(2, cycle.value16()); break;
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case Write(0x072): blitter_.set_data(1, cycle.value16()); break;
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case Write(0x074): blitter_.set_data(0, cycle.value16()); break;
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// Copper.
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case Write(0x02e):
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LOG("TODO: coprocessor control " << PADHEX(4) << cycle.value16());
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break;
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case Write(0x080):
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LOG("TODO: coprocessor first location register high " << PADHEX(4) << cycle.value16());
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break;
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case Write(0x082):
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LOG("TODO: coprocessor first location register low " << PADHEX(4) << cycle.value16());
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break;
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case Write(0x084):
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LOG("TODO: coprocessor second location register high " << PADHEX(4) << cycle.value16());
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break;
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case Write(0x086):
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LOG("TODO: coprocessor second location register low " << PADHEX(4) << cycle.value16());
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break;
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case Write(0x088): case Read(0x088):
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LOG("TODO: coprocessor restart at first location");
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break;
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case Write(0x08a): case Read(0x08a):
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LOG("TODO: coprocessor restart at second location");
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break;
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case Write(0x08c):
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LOG("TODO: coprocessor instruction fetch identity " << PADHEX(4) << cycle.value16());
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break;
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// Sprites.
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#define Sprite(index, pointer, position) \
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case Write(pointer + 0): sprites_[index].set_pointer(16, cycle.value16()); break; \
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case Write(pointer + 2): sprites_[index].set_pointer(0, cycle.value16()); break; \
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case Write(position + 0): sprites_[index].set_start_position(cycle.value16()); break; \
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case Write(position + 2): sprites_[index].set_stop_and_control(cycle.value16()); break; \
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case Write(position + 4): sprites_[index].set_image_data(0, cycle.value16()); break; \
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case Write(position + 6): sprites_[index].set_image_data(1, cycle.value16()); break;
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Sprite(0, 0x120, 0x140);
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Sprite(1, 0x124, 0x148);
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Sprite(2, 0x128, 0x150);
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Sprite(3, 0x12c, 0x158);
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Sprite(4, 0x130, 0x160);
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Sprite(5, 0x134, 0x168);
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Sprite(6, 0x138, 0x170);
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Sprite(7, 0x13c, 0x178);
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#undef Sprite
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// Colour palette.
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case Write(0x180): case Write(0x182): case Write(0x184): case Write(0x186):
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case Write(0x188): case Write(0x18a): case Write(0x18c): case Write(0x18e):
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case Write(0x190): case Write(0x192): case Write(0x194): case Write(0x196):
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case Write(0x198): case Write(0x19a): case Write(0x19c): case Write(0x19e):
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case Write(0x1a0): case Write(0x1a2): case Write(0x1a4): case Write(0x1a6):
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case Write(0x1a8): case Write(0x1aa): case Write(0x1ac): case Write(0x1ae):
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case Write(0x1b0): case Write(0x1b2): case Write(0x1b4): case Write(0x1b6):
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case Write(0x1b8): case Write(0x1ba): case Write(0x1bc): case Write(0x1be):
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LOG("TODO: colour palette; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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break;
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}
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#undef ApplySetClear
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#undef Write
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#undef Read
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#undef RW
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}
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void Chipset::Sprite::set_pointer(int shift, uint16_t value) {
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LOG("Sprite pointer with shift " << shift << " to " << PADHEX(4) << value);
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}
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void Chipset::Sprite::set_start_position(uint16_t value) {
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LOG("Sprite start position " << PADHEX(4) << value);
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}
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void Chipset::Sprite::set_stop_and_control(uint16_t value) {
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LOG("Sprite stop and control " << PADHEX(4) << value);
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}
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void Chipset::Sprite::set_image_data(int slot, uint16_t value) {
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LOG("Sprite image data " << slot << " to " << PADHEX(4) << value);
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}
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