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CLK
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8bfaa487ce
CLK
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Processors
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Z80
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Thomas Harte
8bfaa487ce
Improved logging of bus operations and corrected placement of the OUT step in that repetition group; was otherwise outputting the wrong side of the B adjustment and therefore to the wrong port (if interpreted as 16 bit).
2017-05-29 17:13:24 -04:00
..
Z80.cpp
First tentative steps towards adding a Z80 implementation.
2017-05-14 17:46:41 -04:00
Z80.hpp
Improved logging of bus operations and corrected placement of the OUT step in that repetition group; was otherwise outputting the wrong side of the B adjustment and therefore to the wrong port (if interpreted as 16 bit).
2017-05-29 17:13:24 -04:00
Z80AllRAM.cpp
Corrected simple logging error. Which mysteriously moves me all the way up to 117 failures (!)
2017-05-29 16:35:00 -04:00
Z80AllRAM.hpp
Made an attempt to log bus activity for comparison with FUSE results.
2017-05-22 19:49:38 -04:00