This website requires JavaScript.
Explore
Mirrors
Help
Sign In
6502
/
CLK
Watch
1
Star
0
Fork
0
You've already forked CLK
mirror of
https://github.com/TomHarte/CLK.git
synced
2024-12-27 16:31:31 +00:00
Code
Issues
Projects
Releases
Wiki
Activity
b82bef95f3
CLK
/
Machines
/
ZX8081
History
Thomas Harte
b82bef95f3
Decided to follow through on
Cycles
and
HalfCycles
as complete integer-alikes. Which means giving them the interesting range of operators. Also killed the implicit conversion to int as likely to lead to type confusion.
2017-07-24 20:10:05 -04:00
..
Typer.cpp
Factored out the table-lookup approach to being a typer, and adjusted so as definitely to limit myself to positive offset table lookups.
2017-07-21 21:18:51 -04:00
Video.cpp
Decided to follow through on
Cycles
and
HalfCycles
as complete integer-alikes. Which means giving them the interesting range of operators. Also killed the implicit conversion to int as likely to lead to type confusion.
2017-07-24 20:10:05 -04:00
Video.hpp
Converted the ZX80/81 video component into a ClockReceiver. As it happens, it's most convenient to take the half-cycle bus here.
2017-07-22 23:02:28 -04:00
ZX8081.cpp
Decided to follow through on
Cycles
and
HalfCycles
as complete integer-alikes. Which means giving them the interesting range of operators. Also killed the implicit conversion to int as likely to lead to type confusion.
2017-07-24 20:10:05 -04:00
ZX8081.hpp
Decided to follow through on
Cycles
and
HalfCycles
as complete integer-alikes. Which means giving them the interesting range of operators. Also killed the implicit conversion to int as likely to lead to type confusion.
2017-07-24 20:10:05 -04:00