Thomas Harte b9dbb6bcf8 Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate.		2017-06-12 18:55:04 -04:00
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6502	Eliminated the function call inherent to every decode, and also moved the fixed table of operations into a non-templated base class.	2017-06-03 22:19:35 -04:00
Z80	Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate.	2017-06-12 18:55:04 -04:00
AllRAMProcessor.cpp	Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs.	2017-06-03 21:54:42 -04:00
AllRAMProcessor.hpp	Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs.	2017-06-03 21:54:42 -04:00
RegisterSizes.hpp	Noodled around with initial state.	2017-05-29 19:25:08 -04:00