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mirror of https://github.com/TomHarte/CLK.git synced 2024-06-29 00:29:34 +00:00
CLK/Processors
Thomas Harte bf5ed98f35 Generalise 65c02 behaviour.
Partly to convince myself:
1. this change alters behaviour of `CycleAddXToAddressLowRead`
2. which affects only `AbsoluteXw` and the 65c02-specific `JMP (abs, x)`;
3. `AbsoluteXw` is then used only by `AbsoluteXWrite` and `AbsoluteXReadModifyWrite`;
4. `AbsoluteXWrite` is used for abs, x addressing by `SHY`, `STA` and `STZ`;
5. `AbsoluteXReadModifyWrite` is used for `ASL`, `ASO`, `ROL`, `RLA`, `LSR`, `LSE`, `ROR`, `RRA`, `DEC`, `DCP`, `INC` and `INS`.

... though many of the latter are replaced by instance of `FastAbsoluteXReadModifyWrite` for the 65c02 which don't include a dummy
access at all if the page boundary is crossed so the issue is moot.
2023-12-20 22:02:14 -05:00
..
6502 Generalise 65c02 behaviour. 2023-12-20 22:02:14 -05:00
6502Esque Use simplified control lines when appropriate. 2023-08-17 15:32:02 -04:00
65816 Merge branch 'master' into 65816StackAgain 2023-08-19 15:55:45 -04:00
68000 Enable further compile-time optimisations. 2023-11-28 13:50:53 -05:00
Z80 Eliminate various other errant spaces. 2023-05-16 16:40:09 -04:00
AllRAMProcessor.cpp Ups the 65816 test machine to a full 16mb RAM. 2020-10-11 21:18:01 -04:00
AllRAMProcessor.hpp Ups the 65816 test machine to a full 16mb RAM. 2020-10-11 21:18:01 -04:00