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136 lines
2.0 KiB
C++
136 lines
2.0 KiB
C++
//
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// Instruction.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 1/15/21.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#ifndef InstructionSets_M50740_Instruction_h
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#define InstructionSets_M50740_Instruction_h
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#include <cstdint>
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namespace InstructionSet {
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namespace M50740 {
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enum class AddressingMode {
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Implied,
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Accumulator,
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Immediate,
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Absolute,
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AbsoluteX,
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AbsoluteY,
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ZeroPage,
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ZeroPageX,
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ZeroPageY,
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XIndirect,
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IndirectY,
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Relative,
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AbsoluteIndirect,
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ZeroPageIndirect,
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SpecialPage,
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ImmediateZeroPage,
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Bit0Accumulator, Bit1Accumulator, Bit2Accumulator, Bit3Accumulator,
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Bit4Accumulator, Bit5Accumulator, Bit6Accumulator, Bit37ccumulator,
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Bit0ZeroPage, Bit1ZeroPage, Bit2ZeroPage, Bit3ZeroPage,
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Bit4ZeroPage, Bit5ZeroPage, Bit6ZeroPage, Bit7ZeroPage,
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Bit0AccumulatorRelative, Bit1AccumulatorRelative, Bit2AccumulatorRelative, Bit3AccumulatorRelative,
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Bit4AccumulatorRelative, Bit5AccumulatorRelative, Bit6AccumulatorRelative, Bit7AccumulatorRelative,
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Bit0ZeroPageRelative, Bit1ZeroPageRelative, Bit2ZeroPageRelative, Bit3ZeroPageRelative,
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Bit4ZeroPageRelative, Bit5ZeroPageRelative, Bit6ZeroPageRelative, Bit7ZeroPageRelative,
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};
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enum class Operation: uint8_t {
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Invalid,
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ADC,
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AND,
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ASL,
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BBC,
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BBS,
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BCC,
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BCS,
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BEQ,
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BIT,
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BMI,
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BNE,
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BPL,
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BRA,
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BRK,
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BVC,
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BVS,
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CLB,
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CLC,
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CLD,
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CLI,
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CLT,
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CLV,
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CMP,
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COM,
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CPX,
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CPY,
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DEC,
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DEX,
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DEY,
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EOR,
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FST,
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INC,
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INX,
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INY,
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JMP,
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JSR,
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LDA,
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LDM,
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LDX,
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LDY,
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LSR,
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NOP,
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ORA,
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PHA,
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PHP,
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PLA,
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PLP,
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ROL,
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ROR,
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RRF,
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RTI,
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RTS,
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SBC,
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SEB,
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SEC,
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SED,
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SEI,
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SET,
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SLW,
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STA,
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STP,
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STX,
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STY,
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TAX,
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TAY,
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TST,
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TSX,
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TXS,
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TYA
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};
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struct Instruction {
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Operation operation = Operation::Invalid;
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AddressingMode addressing_mode = AddressingMode::Implied;
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Instruction(Operation operation, AddressingMode addressing_mode) : operation(operation), addressing_mode(addressing_mode) {}
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Instruction(Operation operation) : operation(operation) {}
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Instruction() {}
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};
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}
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}
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#endif /* InstructionSets_M50740_Instruction_h */
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