Thomas Harte ed564cb810 Implements the main four cartridge banking schemes. ... Slightly proof of concept for now.		2018-01-04 22:18:18 -05:00
..
AllSuiteA
Atari ROMs
BCDTest
Bridges	Corrects Xcode tests.	2018-01-01 16:04:13 -05:00
FUSE	After hitting my head against the wall of trying to use [NS]Scanner as a parser some more, have given up and transcoded the two tests files to JSON.	2017-05-25 18:20:13 -04:00
Klaus Dormann
MSX ROMs	Introduces failing tests of the MSX static analyser.	2018-01-01 16:38:26 -05:00
Wolfgang Lorenz 6502 test suite
Zexall
6502InterruptTests.swift
6502TimingTests.swift	Corrected timestamp return, and its testing by the 6502 timing tests.	2017-07-27 21:19:16 -04:00
6522Tests.swift
6532Tests.swift
AllSuiteATests.swift
ArrayBuilderTests.mm
AtariStaticAnalyserTests.mm
BCDTest.swift	Completed fixture of the 6502 BCD test.	2017-07-25 22:55:45 -04:00
C1540Tests.swift	Corrects Xcode tests.	2018-01-01 16:04:13 -05:00
CRCTests.mm
DPLLTests.swift	Fixed the DigitalPhaseLockedLoopBridge bridge, once again fixing tests.	2017-07-16 20:55:57 -04:00
FUSETests.swift	Removes usages of deprecated initialiser.	2017-10-05 18:10:47 -04:00
Info.plist
KlausDormannTests.swift
MSXStaticAnalyserTests.mm	Implements the main four cartridge banking schemes.	2018-01-04 22:18:18 -05:00
PCMPatchedTrackTests.mm	Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.	2017-08-21 21:56:42 -04:00
PCMSegmentEventSourceTests.mm
PCMTrackTests.mm
TIATests.mm	The TIA is now a ClockReceiver.	2017-07-24 21:48:34 -04:00
TimeTests.mm
WolfgangLorenzTests.swift	Eliminates a large number of instance of end-of-line tabs.	2017-11-07 22:51:06 -05:00
Z80InterruptTests.swift	Suspected my mode 1 interrupt timing might be off. Reminded myself of the sources. Persuaded myself that it wasn't. Added appropriate comments.	2017-08-23 22:25:31 -04:00
Z80MachineCycleTests.swift	Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.	2017-07-27 20:17:13 -04:00
Z80MemptrTests.swift	Eliminates a variety of end-of-line spaces.	2017-11-07 22:54:22 -05:00
ZexallTests.swift	Reinstated manual-by-stealth secondary usage of the Zexall test as a benchmarking tool.	2017-06-04 15:46:35 -04:00