1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-02 16:04:59 +00:00
CLK/OSBindings/Mac/Clock SignalTests/dingusdev PowerPC tests/ppcdisasmtest.csv

16 KiB

1# Test data for PowerPC disassembler supplied as comma-separated values
2# Data format:
3# instruction address (hex), instruction code (hex), expected disassembly: opcode, [operands...]
4# (lines starting with a hash sign (#) will be treated as comments and ignored)
5# unconditional branches
60xFFF03008,0x48000355,bl,0xFFF0335C
70xFFF03000,0x4280035C,b,0xFFF0335C
80xFFF03000,0x48000802,ba,0x00000800
90xFFF03000,0x48000803,bla,0x00000800
10# bcctr variants with simplified mnemonics
110xFFF03000,0x4E800420,bctr
120xFFF03000,0x4E800421,bctrl
130xFFF03000,0x4C820420,bnectr
140xFFF03000,0x4C820421,bnectrl
150xFFF03000,0x4C960420,bnectr,cr5
160xFFF03000,0x4C920421,bnectrl,cr4
170xFFF03000,0x4D980420,bltctr,cr6
180xFFF03000,0x4C9D0420,blectr,cr7
190xFFF03000,0x4D820420,beqctr
200xFFF03000,0x4D960420,beqctr,cr5
210xFFF03000,0x4CA80420,bgectr+,cr2
220xFFF03000,0x4C980421,bgectrl,cr6
230xFFF03000,0x4D810420,bgtctr
240xFFF03000,0x4D850420,bgtctr,cr1
250xFFF03000,0x4D8B0421,bsoctrl,cr2
260xFFF03000,0x4C830420,bnsctr
270xFFF03000,0x4C930420,bnsctr,cr4
28# bclr variants with simplified mnemonics
290xFFF03000,0x4E800020,blr
300xFFF03000,0x4E800021,blrl
310xFFF03000,0x4D800020,bltlr
320xFFF03000,0x4D840020,bltlr,cr1
330xFFF03000,0x4C810021,blelrl
340xFFF03000,0x4C8D0020,blelr,cr3
350xFFF03000,0x4DA20020,beqlr+
360xFFF03000,0x4DBE0021,beqlrl+,cr7
370xFFF03000,0x4CA80020,bgelr+,cr2
380xFFF03000,0x4DB90020,bgtlr+,cr6
390xFFF03000,0x4C8A0021,bnelrl,cr2
400xFFF03000,0x4D930020,bsolr,cr4
410xFFF03000,0x4C8F0021,bnslrl,cr3
420xFFF03000,0x4E000020,bdnzlr
430xFFF03000,0x4E200020,bdnzlr+
440xFFF03000,0x4E400020,bdzlr
450xFFF03000,0x4E400021,bdzlrl
460xFFF03000,0x4E600020,bdzlr+
470xFFF03000,0x4C000020,bdnzflr,lt
480xFFF03000,0x4C040020,bdnzflr,4*cr1+lt
490xFFF03000,0x4C5D0021,bdzflrl,4*cr7+gt
500xFFF03000,0x4D020020,bdnztlr,eq
510xFFF03000,0x4D530021,bdztlrl,4*cr4+so
52# conditional branches with simplified mnemonics, primary opcode 0x10
530xFFF0011C,0x409E2EE4,bne,cr7,0xFFF03000
540xFFF00100,0x40A60098,bne+,cr1,0xFFF00198
550xFFF00100,0x41820018,beq,0xFFF00118
560xFFF03004,0x41200054,bdnzt+,lt,0xFFF03058
570xFFF03004,0x40000054,bdnzf,lt,0xFFF03058
580xFFF03000,0x4106FFF4,bdnzt,4*cr1+eq,0xFFF02FF4
590xFFF03000,0x4001558F,bdnzfla,gt,0x0000558C
60# indexed load/store instructions, primary opcode 0x1F
610xFFF00100,0x7D49F02E,lwzx,r10,r9,r30
620xFFF00100,0x7C00002E,lwzx,r0,0,r0
630xFFF00100,0x7C20082E,lwzx,r1,0,r1
640xFFF00100,0x7FAB806E,lwzux,r29,r11,r16
650xFFF00100,0x7C0820AE,lbzx,r0,r8,r4
660xFFF00100,0x7F47E8EE,lbzux,r26,r7,r29
670xFFF00100,0x7C01612E,stwx,r0,r1,r12
680xFFF00100,0x7FC3996E,stwux,r30,r3,r19
690xFFF00100,0x7D2C09AE,stbx,r9,r12,r1
700xFFF00100,0x7C8531EE,stbux,r4,r5,r6
710xFFF00100,0x7C94DA2E,lhzx,r4,r20,r27
720xFFF00100,0x7C833A6E,lhzux,r4,r3,r7
730xFFF00100,0x7D8F62AE,lhax,r12,r15,r12
740xFFF00100,0x7C98DAEE,lhaux,r4,r24,r27
750xFFF00100,0x7C0C0B2E,sthx,r0,r12,r1
760xFFF00100,0x7C032B6E,sthux,r0,r3,r5
77# arithmetic instructions with immediate operand
780xFFF00100,0x1F00A81A,mulli,r24,r0,-0x57E6
790xFFF00100,0x1D8A4CCC,mulli,r12,r10,0x4CCC
800xFFF00100,0x207CFEE0,subfic,r3,r28,-0x120
810xFFF00100,0x20894E75,subfic,r4,r9,0x4E75
820xFFF00100,0x38BE0000,addi,r5,r30,0x0
830xFFF00100,0x3A2EFFF0,addi,r17,r14,-0x10
840xFFF00100,0x307F005E,addic,r3,r31,0x5E
850xFFF00100,0x30C4FFFF,addic,r6,r4,-0x1
860xFFF00100,0x34803012,addic.,r4,r0,0x3012
870xFFF00100,0x3E1F4A47,addis,r16,r31,0x4A47
880xFFF00100,0x3F3CFFF6,addis,r25,r28,-0xA
89# subtracts and friends, primary opcode 0x1F
900xFFF00100,0x7C03E810,subfc,r0,r3,r29
910xFFF00100,0x7CE03011,subfc.,r7,r0,r6
920xFFF00100,0x7CC47C10,subfco,r6,r4,r15
930xFFF00100,0x7CC46C11,subfco.,r6,r4,r13
940xFFF00100,0x7D800850,subf,r12,r0,r1
950xFFF00100,0x7C966851,subf.,r4,r22,r13
960xFFF00100,0x7C7B8C50,subfo,r3,r27,r17
970xFFF00100,0x7D283C51,subfo.,r9,r8,r7
980xFFF00100,0x7CE400D0,neg,r7,r4
990xFFF00100,0x7CC900D1,neg.,r6,r9
1000xFFF00100,0x7C6B04D0,nego,r3,r11
1010xFFF00100,0x7FC004D1,nego.,r30,r0
1020xFFF00100,0x7D266110,subfe,r9,r6,r12
1030xFFF00100,0x7C693111,subfe.,r3,r9,r6
1040xFFF00100,0x7C642D10,subfeo,r3,r4,r5
1050xFFF00100,0x7C843511,subfeo.,r4,r4,r6
1060xFFF00100,0x7D6B0190,subfze,r11,r11
1070xFFF00100,0x7C430191,subfze.,r2,r3
1080xFFF00100,0x7C640590,subfzeo,r3,r4
1090xFFF00100,0x7C850591,subfzeo.,r4,r5
1100xFFF00100,0x7C4301D0,subfme,r2,r3
1110xFFF00100,0x7C4301D1,subfme.,r2,r3
1120xFFF00100,0x7D2A1A10,doz,r9,r10,r3
1130xFFF00100,0x7C642A11,doz.,r3,r4,r5
1140xFFF00100,0x7C851E10,dozo,r4,r5,r3
1150xFFF00100,0x7CA41E11,dozo.,r5,r4,r3
1160xFFF00100,0x7C1E02D0,abs,r0,r30
1170xFFF00100,0x7C3E02D1,abs.,r1,r30
1180xFFF00100,0x7FC306D0,abso,r30,r3
1190xFFF00100,0x7FC706D1,abso.,r30,r7
1200xFFF00100,0x7CE703D0,nabs,r7,r7
1210xFFF00100,0x7D0703D1,nabs.,r8,r7
1220xFFF00100,0x7D0907D0,nabso,r8,r9
1230xFFF00100,0x7D0A07D1,nabso.,r8,r10
124# additions, primary opcode 0x1F
1250xFFF00100,0x7C830014,addc,r4,r3,r0
1260xFFF00100,0x7FB8F015,addc.,r29,r24,r30
1270xFFF00100,0x7CDB0414,addco,r6,r27,r0
1280xFFF00100,0x7C880415,addco.,r4,r8,r0
1290xFFF00100,0x7D6BC914,adde,r11,r11,r25
1300xFFF00100,0x7D296115,adde.,r9,r9,r12
1310xFFF00100,0x7C842514,addeo,r4,r4,r4
1320xFFF00100,0x7C843515,addeo.,r4,r4,r6
1330xFFF00100,0x7CE80194,addze,r7,r8
1340xFFF00100,0x7C800195,addze.,r4,r0
1350xFFF00100,0x7C000594,addzeo,r0,r0
1360xFFF00100,0x7C000595,addzeo.,r0,r0
1370xFFF00100,0x7F9C01D4,addme,r28,r28
1380xFFF00100,0x7D0801D5,addme.,r8,r8
1390xFFF00100,0x7D0805D4,addmeo,r8,r8
1400xFFF00100,0x7D0805D5,addmeo.,r8,r8
1410xFFF00100,0x7F03EA14,add,r24,r3,r29
1420xFFF00100,0x7ED6E215,add.,r22,r22,r28
1430xFFF00100,0x7D040614,addo,r8,r4,r0
1440xFFF00100,0x7DE40615,addo.,r15,r4,r0
145# integer multiplications & divisions, primary opcode 0x1F
1460xFFF00100,0x7C8C5016,mulhwu,r4,r12,r10
1470xFFF00100,0x7CA72017,mulhwu.,r5,r7,r4
1480xFFF00100,0x7CA72096,mulhw,r5,r7,r4
1490xFFF00100,0x7CA72097,mulhw.,r5,r7,r4
1500xFFF00100,0x7C9000D6,mul,r4,r16,r0
1510xFFF00100,0x7CA428D7,mul.,r5,r4,r5
1520xFFF00100,0x7E1104D6,mulo,r16,r17,r0
1530xFFF00100,0x7E1104D7,mulo.,r16,r17,r0
1540xFFF00100,0x7D0039D6,mullw,r8,r0,r7
1550xFFF00100,0x7C1DF1D7,mullw.,r0,r29,r30
1560xFFF00100,0x7CE725D6,mullwo,r7,r7,r4
1570xFFF00100,0x7CE725D7,mullwo.,r7,r7,r4
1580xFFF00100,0x7FEB2296,div,r31,r11,r4
1590xFFF00100,0x7C064297,div.,r0,r6,r8
1600xFFF00100,0x7DE70696,divo,r15,r7,r0
1610xFFF00100,0x7DE70697,divo.,r15,r7,r0
1620xFFF00100,0x7CA03AD6,divs,r5,r0,r7
1630xFFF00100,0x7C642AD7,divs.,r3,r4,r5
1640xFFF00100,0x7F0106D6,divso,r24,r1,r0
1650xFFF00100,0x7F0106D7,divso.,r24,r1,r0
1660xFFF00100,0x7F7C1B96,divwu,r27,r28,r3
1670xFFF00100,0x7C7B1B97,divwu.,r3,r27,r3
1680xFFF00100,0x7CE62796,divwuo,r7,r6,r4
1690xFFF00100,0x7CE62797,divwuo.,r7,r6,r4
1700xFFF00100,0x7C042BD6,divw,r0,r4,r5
1710xFFF00100,0x7C042BD7,divw.,r0,r4,r5
1720xFFF00100,0x7CA627D6,divwo,r5,r6,r4
1730xFFF00100,0x7CA627D7,divwo.,r5,r6,r4
174# move to condition register, primary opcode 0x1F
1750xFFF00100,0x7D818120,mtcrf,0x18,r12
1760xFFF00100,0x7D838120,mtcrf,0x38,r12
1770xFFF00100,0x7D080120,mtcrf,0x80,r8
1780xFFF00100,0x7E007120,mtcrf,0x07,r16
1790xFFF00100,0x7C2FF120,mtcr,r1
180# logical operations with the condition register
1810xFFF00100,0x4C422A02,crand,eq,eq,4*cr1+gt
1820xFFF00100,0x4FCAF902,crandc,4*cr7+eq,4*cr2+eq,4*cr7+so
1830xFFF00100,0x4E756242,creqv,4*cr4+so,4*cr5+gt,4*cr3+lt
1840xFFF00100,0x4F58C9C2,crnand,4*cr6+eq,4*cr6+lt,4*cr6+gt
1850xFFF00100,0x4C411382,cror,eq,gt,eq
1860xFFF00100,0x4C402342,crorc,eq,lt,4*cr1+lt
1870xFFF00100,0x4C003982,crxor,lt,lt,4*cr1+so
188# rotation instructions and their simplified mnemonics
189#0xFFF00100,0x5084442E,rlwimi,r4,r4,8,16,23
1900xFFF00100,0x54DF0FBC,clrlslwi,r31,r6,31,1
1910xFFF00100,0x54DFF042,clrlslwi,r31,r6,31,30
1920xFFF00100,0x54DF087C,clrlslwi,r31,r6,2,1
1930xFFF00100,0x54A30FBC,clrlslwi,r3,r5,31,1
1940xFFF00100,0x547AE884,clrlslwi,r26,r3,31,29
1950xFFF00100,0x5485007E,clrlwi,r5,r4,1
1960xFFF00100,0x572007FF,clrlwi.,r0,r25,31
1970xFFF00100,0x5404003C,clrrwi,r4,r0,1
1980xFFF00100,0x54000001,clrrwi.,r0,r0,31
1990xFFF00100,0x558C083A,extlwi,r12,r12,30,1
2000xFFF00100,0x55CEF839,extlwi.,r14,r14,29,31
2010xFFF00100,0x558CF83A,extlwi,r12,r12,30,31
2020xFFF00100,0x5486657F,extrwi.,r6,r4,11,1
2030xFFF00100,0x5400EFFE,extrwi,r0,r0,1,28
2040xFFF00100,0x5583FFFE,extrwi,r3,r12,1,30
2050xFFF00100,0x509E0FFE,inslwi,r30,r4,1,31
2060xFFF00100,0x5068F87F,inslwi.,r8,r3,31,1
2070xFFF00100,0x50A5402E,insrwi,r5,r5,24,0
2080xFFF00100,0x5084442E,insrwi,r4,r4,8,16
2090xFFF00100,0x514407FE,insrwi,r4,r10,1,31
2100xFFF00100,0x5C8B183E,rotlw,r11,r4,r3
2110xFFF00100,0x5EB5883F,rotlw.,r21,r21,r17
2120xFFF00100,0x55C4083E,rotlwi,r4,r14,1
2130xFFF00100,0x56BF783E,rotlwi,r31,r21,15
2140xFFF00100,0x56BF803E,rotrwi,r31,r21,16
2150xFFF00100,0x55C4F83F,rotrwi.,r4,r14,1
2160xFFF00100,0x574B083C,slwi,r11,r26,1
2170xFFF00100,0x55C4C00F,slwi.,r4,r14,24
2180xFFF00100,0x55E4F800,slwi,r4,r15,31
2190xFFF00100,0x5480F87E,srwi,r0,r4,1
2200xFFF00100,0x54060FFE,srwi,r6,r0,31
221# shift instructions, primary opcode 0x1F
2220xFFF00100,0x7C695830,slw,r9,r3,r11
2230xFFF00100,0x7C00F831,slw.,r0,r0,r31
2240xFFF00100,0x7FC4FC30,srw,r4,r30,r31
2250xFFF00100,0x7CE92C31,srw.,r9,r7,r5
2260xFFF00100,0x7D235E30,sraw,r3,r9,r11
2270xFFF00100,0x7D290631,sraw.,r9,r9,r0
2280xFFF00100,0x7C65FE70,srawi,r5,r3,0x1F
2290xFFF00100,0x7D6B1E70,srawi,r11,r11,0x3
2300xFFF00100,0x7C090E71,srawi.,r9,r0,0x1
231# logical instructions, primary opcode 0x1F
2320xFFF00100,0x7FC32838,and,r3,r30,r5
2330xFFF00100,0x7C672039,and.,r7,r3,r4
2340xFFF00100,0x7D281878,andc,r8,r9,r3
2350xFFF00100,0x7DCE0079,andc.,r14,r14,r0
2360xFFF00100,0x7C8328F8,nor,r3,r4,r5
2370xFFF00100,0x7D4948F9,nor.,r9,r10,r9
2380xFFF00100,0x7ED53A38,eqv,r21,r22,r7
2390xFFF00100,0x7C622239,eqv.,r2,r3,r4
2400xFFF00100,0x7D645278,xor,r4,r11,r10
2410xFFF00100,0x7C600279,xor.,r0,r3,r0
2420xFFF00100,0x7C841B38,orc,r4,r4,r3
2430xFFF00100,0x7C841B39,orc.,r4,r4,r3
2440xFFF00100,0x7DE42378,or,r4,r15,r4
2450xFFF00100,0x7C632379,or.,r3,r3,r4
2460xFFF00100,0x7C6023B8,nand,r0,r3,r4
2470xFFF00100,0x7F8B63B9,nand.,r11,r28,r12
248# logical immediate instructions
2490xFFF00100,0x60009BA5,ori,r0,r0,0x9BA5
2500xFFF00100,0x6744AAAA,oris,r4,r26,0xAAAA
2510xFFF00100,0x6B24002D,xori,r4,r25,0x2D
2520xFFF00100,0x6C602003,xoris,r0,r3,0x2003
2530xFFF00100,0x70410022,andi.,r1,r2,0x22
2540xFFF00100,0x7541029E,andis.,r1,r10,0x29E
255# synchronization instructions
2560xFFF00100,0x7FEF2E2C,lhbrx,r31,r15,r5
2570xFFF00100,0x7C604C2C,lwbrx,r3,0,r9
2580xFFF00100,0x7D201828,lwarx,r9,0,r3
2590xFFF00100,0x7D20192D,stwcx.,r9,0,r3
2600xFFF00100,0x7EA1E12D,stwcx.,r21,r1,r28
2610xFFF00100,0x7FAB052C,stwbrx,r29,r11,r0
2620xFFF03000,0x4C00012C,isync
2630xFFF00100,0x7C0004AC,sync
2640xFFF00100,0x7C0006AC,eieio
2650xFFF00100,0x7C05272C,sthbrx,r0,r5,r4
266# trap instructions
2670xFFF00100,0x7F800008,tw,28,r0,r0
2680xFFF00100,0x0C000000,twi,0,r0,0x0
269# integer load and stores
2700xFFF00100,0x80BF0808,lwz,r5,0x808(r31)
2710xFFF00100,0x80A2FFB8,lwz,r5,-0x48(r2)
2720xFFF00100,0x80002F3C,lwz,r0,0x2F3C
2730xFFF00100,0x8506003C,lwzu,r8,0x3C(r6)
2740xFFF00100,0x8403FFF8,lwzu,r0,-0x8(r3)
2750xFFF00100,0x88FD00FA,lbz,r7,0xFA(r29)
2760xFFF00100,0x889EFFF4,lbz,r4,-0xC(r30)
2770xFFF00100,0x8D480001,lbzu,r10,0x1(r8)
2780xFFF00100,0x8FC3FFFF,lbzu,r30,-0x1(r3)
2790xFFF00100,0x90600AFC,stw,r3,0xAFC
2800xFFF00100,0x9000F620,stw,r0,-0x9E0
2810xFFF00100,0x9146696E,stw,r10,0x696E(r6)
2820xFFF00100,0x9317FFF0,stw,r24,-0x10(r23)
2830xFFF00100,0x94050020,stwu,r0,0x20(r5)
2840xFFF00100,0x9421FFA0,stwu,r1,-0x60(r1)
2850xFFF00100,0x981F00FA,stb,r0,0xFA(r31)
2860xFFF00100,0x98829882,stb,r4,-0x677E(r2)
2870xFFF00100,0x9EFC000A,stbu,r23,0xA(r28)
2880xFFF00100,0x9FAEFFFC,stbu,r29,-0x4(r14)
2890xFFF00100,0xA22E6010,lhz,r17,0x6010(r14)
2900xFFF00100,0xA0C6FFF8,lhz,r6,-0x8(r6)
2910xFFF00100,0xA43C6010,lhzu,r1,0x6010(r28)
2920xFFF00100,0xA7BFFFFE,lhzu,r29,-0x2(r31)
2930xFFF00100,0xA820265F,lha,r1,0x265F
2940xFFF00100,0xA8B5201F,lha,r5,0x201F(r21)
2950xFFF00100,0xAAFEFE82,lha,r23,-0x17E(r30)
2960xFFF00100,0xAC08003C,lhau,r0,0x3C(r8)
2970xFFF00100,0xAC90FFFE,lhau,r4,-0x2(r16)
2980xFFF00100,0xB3E40012,sth,r31,0x12(r4)
2990xFFF00100,0xB02EFFFB,sth,r1,-0x5(r14)
3000xFFF00100,0xB4B81EF4,sthu,r5,0x1EF4(r24)
3010xFFF00100,0xB774FFFE,sthu,r27,-0x2(r20)
3020xFFF00100,0xBB61006C,lmw,r27,0x6C(r1)
3030xFFF00100,0xBB41FFE8,lmw,r26,-0x18(r1)
3040xFFF00100,0xBC410008,stmw,r2,0x8(r1)
3050xFFF00100,0xBFC1FFF8,stmw,r30,-0x8(r1)
306# floating point load and stores
3070xFFF00100,0x7C0BF5AE,stfdx,f0,r11,r30
3080xFFF00100,0x7C0525EE,stfdux,f0,r5,r4
3090xFFF00100,0x7D89FD2E,stfsx,f12,r9,r31
3100xFFF00100,0x7D59FD6E,stfsux,f10,r25,r31
3110xFFF00100,0xC80100C8,lfd,f0,0xC8(r1)
3120xFFF00100,0xCC1F0008,lfdu,f0,0x8(r31)
3130xFFF00100,0xC1628398,lfs,f11,-0x7C68(r2)
3140xFFF00100,0xC5BE0004,lfsu,f13,0x4(r30)
3150xFFF00100,0xDBC1FFF0,stfd,f30,-0x10(r1)
3160xFFF00100,0xD8010860,stfd,f0,0x860(r1)
3170xFFF00100,0xDC180008,stfdu,f0,0x8(r24)
3180xFFF00100,0xD01E0110,stfs,f0,0x110(r30)
3190xFFF00100,0xD58B0004,stfsu,f12,0x4(r11)
3200xFFF00100,0x7C1C5CAE,lfdx,f0,r28,r11
3210xFFF00100,0x7CAA7CEE,lfdux,f5,r10,r15
3220xFFF00100,0x7FEF2C6E,lfsux,f31,r15,r5
3230xFFF00100,0x7C09DC2E,lfsx,f0,r9,r27
3240xFFF00100,0x7C43242E,lfsx,f2,r3,r4
3250xFFF00100,0x7C43246E,lfsux,f2,r3,r4
3260xFFF00100,0x7D491CAE,lfdx,f10,r9,r3
3270xFFF00100,0x7C4324EE,lfdux,f2,r3,r4
3280xFFF00100,0x7C43252E,stfsx,f2,r3,r4
3290xFFF00100,0x7C43256E,stfsux,f2,r3,r4
3300xFFF00100,0x7C4325AE,stfdx,f2,r3,r4
3310xFFF00100,0x7C4325EE,stfdux,f2,r3,r4
332# floating point operations
3330xFFF00100,0xFC03282A,fadd,f0,f3,f5
3340xFFF00100,0xFDAD682B,fadd.,f13,f13,f13
3350xFFF00100,0xFC0D6028,fsub,f0,f13,f12
3360xFFF00100,0xFC2107F2,fmul,f1,f1,f31
3370xFFF00100,0xFF2C07F3,fmul.,f25,f12,f31
3380xFFF00100,0xFC0D0024,fdiv,f0,f13,f0
3390xFFF00100,0xFC2B0025,fdiv.,f1,f11,f0
3400xFFF00100,0xFD8952FC,fnmsub,f12,f9,f11,f10
3410xFFF00100,0xEDA66278,fmsubs,f13,f6,f9,f12
3420xFFF00100,0xEDA66279,fmsubs.,f13,f6,f9,f12
3430xFFF00100,0xEC00637C,fnmsubs,f0,f0,f13,f12
3440xFFF00100,0xFE0820AF,fsel.,f16,f8,f2,f4
3450xFFF00100,0xFDA06050,fneg,f13,f12
3460xFFF00100,0xFD80EA10,fabs,f12,f29
3470xFFF00100,0xFD600110,fnabs,f11,f0
3480xFFF00100,0xFD002034,frsqrte,f8,f4
3490xFFF00100,0x7FF957AE,stfiwx,f31,r25,r10
3500xFFF00100,0xFC40F818,frsp,f2,f31
3510xFFF00100,0xFC201019,frsp.,f1,f2
3520xFFF00100,0xFDA0F81E,fctiwz,f13,f31
3530xFFF00100,0xFCA0501D,fctiw.,f5,f10
3540xFFF00100,0xFD9C0080,mcrfs,cr3,cr7
3550xFFF00100,0xFDFE058E,mtfsf,255,f0
3560xFFF00100,0xFF80F10C,mtfsfi,cr7,15
3570xFFF00100,0xFF80F10D,mtfsfi.,cr7,15
3580xFFF00100,0xFC406890,fmr,f2,f13
3590xFFF00100,0xFC20E891,fmr.,f1,f29
360# compare instructions
3610xFFF00100,0x7C15A000,cmpw,r21,r20
3620xFFF00100,0x7FBFB800,cmp,cr7,r31,r23
3630xFFF00100,0x7C053040,cmplw,r5,r6
3640xFFF00100,0x7F804840,cmplw,cr7,r0,r9
3650xFFF00100,0x2F800000,cmpwi,cr7,r0,0x0
3660xFFF00100,0x298E0022,cmplwi,cr3,r14,0x22
3670xFFF00100,0xFE17C840,fcmpo,cr4,f23,f25
3680xFFF00100,0xFF0C6800,fcmpu,cr6,f12,f13
369# misc instructions
3700xFFF00100,0x7D290034,cntlzw,r9,r9
3710xFFF00100,0x7FFF0035,cntlzw.,r31,r31
3720xFFF00100,0x7C00D7AC,icbi,0,r26
3730xFFF00100,0x7D604828,lwarx,r11,0,r9
3740xFFF00100,0x7CBC04AA,lswi,r5,r28,0x20
3750xFFF00100,0x7FEF2C2A,lswx,r31,r15,r5
3760xFFF00100,0x7E000400,mcrxr,cr4
3770xFFF00100,0xFDC0008C,mtfsb0,14
3780xFFF00100,0xFFE0004C,mtfsb1,31
3790xFFF00100,0xFFE0048F,mffs.,f31
3800xFFF00100,0x7C2000A6,mfmsr,r1
3810xFFF00100,0x7C000124,mtmsr,r0
3820xFFF00100,0x7FEF01A4,mtsr,15,r31
3830xFFF00100,0x7C6021E4,mtsrin,r3,r4
3840xFFF00100,0x7CA305AA,stswi,r5,r3,0x20
3850xFFF00100,0x7D453D2A,stswx,r10,r5,r7
3860xFFF00100,0x7C0002E4,tlbia
3870xFFF00100,0x7C004A64,tlbie,r9
388# various simplified (extended) mnemonics
3890xFFF00100,0x60000000,nop
3900xFFF00100,0x7C7C1B78,mr,r28,r3
3910xFFF00100,0x7C7C1B78,mr,r28,r3
3920xFFF00100,0x7DAA6B79,mr.,r10,r13
3930xFFF00100,0x38000000,li,r0,0x0
3940xFFF00100,0x3860FFCE,li,r3,-0x32
395# invalid opcodes/instruction forms
3960xFFF00100,0x7D49F02F,dc.l,0x7D49F02F
3970xFFF00100,0x7F800009,dc.l,0x7F800009
3980xFFF00100,0x7C6B0CD0,dc.l,0x7C6B0CD0
3990xFFF00100,0x7C642D90,dc.l,0x7C642D90
400# POWER/PPC601 specific instructions
4010xFFF00100,0x7C440426,clcs,r2,r4
4020xFFF00100,0x24000800,dozi,r0,r0,0x800
4030xFFF00100,0x7C00003A,maskg,r0,r0,r0
4040xFFF00100,0x7E3EE43A,maskir,r30,r17,r28
4050xFFF00100,0x58411800,rlmi,r1,r2,r3,0,0
4060xFFF00100,0x58411801,rlmi.,r1,r2,r3,0,0
4070xFFF00100,0x7C430C32,rrib,r3,r2,r1
4080xFFF00100,0x7C430C33,rrib.,r3,r2,r1
4090xFFF00100,0x7C410132,sle,r1,r2,r0
4100xFFF00100,0x7C410133,sle.,r1,r2,r0
4110xFFF00100,0x7C4101B2,sleq,r1,r2,r0
4120xFFF00100,0x7C4101B3,sleq.,r1,r2,r0
4130xFFF00100,0x7C811970,sliq,r1,r4,0x3
4140xFFF00100,0x7C4101F0,slliq,r1,r2,0x0
4150xFFF00100,0x7C4101F1,slliq.,r1,r2,0x0
4160xFFF00100,0x7C1021B0,sllq,r16,r0,r4
4170xFFF00100,0x7C1021B1,sllq.,r16,r0,r4
4180xFFF00100,0x7C410532,sre,r1,r2,r0
4190xFFF00100,0x7C410533,sre.,r1,r2,r0
4200xFFF00100,0x7C4105B2,sreq,r1,r2,r0
4210xFFF00100,0x7C4105B3,sreq.,r1,r2,r0
4220xFFF00100,0x7E042570,sriq,r4,r16,0x4
4230xFFF00100,0x7E042571,sriq.,r4,r16,0x4