Thomas Harte fab6908129 Corrects the all-RAM Z80 to declare that it needs the wait line to be implemented.		2017-08-26 23:18:11 -04:00
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6502	Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.	2017-08-21 21:56:42 -04:00
Z80	Corrects the all-RAM Z80 to declare that it needs the wait line to be implemented.	2017-08-26 23:18:11 -04:00
AllRAMProcessor.cpp	Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.	2017-07-27 20:17:13 -04:00
AllRAMProcessor.hpp	Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.	2017-07-27 20:17:13 -04:00
RegisterSizes.hpp	Noodled around with initial state.	2017-05-29 19:25:08 -04:00