Removing NEG and INV, and adding LDD and SVD. Also cleaned up INR and DCR.

This commit is contained in:
Russell-S-Harper 2018-09-08 06:41:37 -04:00
parent 794550eee5
commit 495eb811c8
3 changed files with 76 additions and 83 deletions

View File

@ -116,7 +116,15 @@ _SET .( ; SET r aabbcc.dd 1r dd cc bb aa Rr <- aabbcc.dd - set register
_1 RTS ; done
.)
_PSH .( ; PSH r 2r RS <- Rr - push onto stack
_LDD .( ; LDD r xxyy 2r yy xx Rr <- (xxyy) - load register directly from address
RTS
.)
_SVD .( ; SVD r xxyy 3r yy xx (xxyy) <- Rr - save register directly to address
RTS
.)
_PSH .( ; PSH r 4r RS <- Rr - push onto stack
LDY _RSI ; get register stack index
CPY #_RSS ; compare against limit
BCC _1 ; still room, all okay
@ -137,7 +145,7 @@ _1 LDA _R0,X ; transfer four bytes over
RTS
.)
_POP .( ; POP r 3r Rr <- RS - pop from stack
_POP .( ; POP r 5r Rr <- RS - pop from stack
LDY _RSI ; get register stack index
BNE _1 ; all good, something can be popped off the stack
BRK ; next pop will cause a stack underflow, abort and call exception handler (TODO)
@ -157,7 +165,7 @@ _1 DEY ; transfer four bytes over
RTS
.)
_EXC .( ; EXC r 4r Rr <-> RS - exchange Rr with stack
_EXC .( ; EXC r 6r Rr <-> RS - exchange Rr with stack
LDY _RSI ; RS to I0
LDA _RS-1,Y
STA _I0+3
@ -186,23 +194,27 @@ _EXC .( ; EXC r 4r Rr <-> RS - exchange Rr with stack
RTS
.)
_ADDI0X .( ; add I0 to register indexed by X
_ADPI0X .( ; add value pointed by I0 to register indexed by X
LDA _R0+3,X
AND #_MSK_O ; check for existing overflow condition
BEQ _1
EOR #_MSK_O
BNE _2 ; existing overflow, skip decrement operation
_1 CLC ; adding RD
LDA _I0
LDY #0
LDA (_I0),Y
ADC _R0,X
STA _R0,X
LDA _I0+1
INY
LDA (_I0),Y
ADC _R0+1,X
STA _R0+1,X
LDA _I0+2
INY
LDA (_I0),Y
ADC _R0+2,X
STA _R0+2,X
LDA _I0+3
INY
LDA (_I0),Y
ADC _R0+3,X
STA _R0+3,X
AND #_MSK_O ; check for overflow
@ -219,34 +231,20 @@ _3 LDA _F ; clear overflow
_4 RTS
.)
_INR .( ; INR r 5r Rr <- Rr + 1.0 - increment register
LDA #0 ; set I0 to plus one
_INR .( ; INR r 7r Rr <- Rr + 1.0 - increment register
LDA #<PLS_1 ; set I0 to reference plus one
STA _I0
LDA #_PLS_1
LDA #>PLS_1
STA _I0+1
LDA #0
STA _I0+2
STA _I0+3
BEQ _ADDI0X
BEQ _ADPI0X
.)
_DCR .( ; DCR r 6r Rr <- Rr - 1.0 - decrement register
LDA #0 ; set I0 to minus one
_DCR .( ; DCR r 8r Rr <- Rr - 1.0 - decrement register
LDA #<MNS_1 ; set I0 to reference minus one
STA _I0
LDA #_MNS_1
LDA #>MNS_1
STA _I0+1
LDA #$FF
STA _I0+2
STA _I0+3
BNE _ADDI0X
.)
_NEG .( ; NEG r 7r Rr <- -Rr - negate register
RTS
.)
_INV .( ; INV r 8r Rr <- 1.0 / Rr - multiplicative inverse of register
RTS
BNE _ADPI0X
.)
_TST .( ; TST r 9r F <- Rr <=> 0.0 - test register
@ -936,8 +934,12 @@ _END_CMN_CD
FN_0X .WORD _ESC-1, _RTN-1, _BRS-1, _BRA-1, _BRE-1, _BRG-1, _BRL-1, _BRZ-1,
.WORD _BRP-1, _BRN-1, _BRO-1, _BRU-1, _CPR-1, _LDI-1, _SVI-1, _CMR-1
FN_XR .WORD _SET-1, _POP-1, _PSH-1, _EXC-1, _INR-1, _DCR-1, _NEG-1,
.WORD _INV-1, _TST-1, _ADD-1, _SUB-1, _MUL-1, _DIV-1, _MOD-1
FN_XR .WORD _SET-1, _LDD-1, _SVD-1, _PSH-1, _POP-1, _EXC-1, _INR-1,
.WORD _DCR-1, _TST-1, _ADD-1, _SUB-1, _MUL-1, _DIV-1, _MOD-1
; numerical constants
PLS_1 .BYTE $00, $04, $00, $00
MNS_1 .BYTE $00, $fc, $ff, $ff
_END_CMN_DT

View File

@ -15,13 +15,13 @@
; Instructions
; SET r aabbcc.dd 1r dd cc bb aa Rr <- aabbccdd - set register
; PSH r 2r RS <- Rr - push onto stack
; POP r 3r Rr <- RS - pop from stack
; EXC r 4r Rr <-> RS - exchange Rr with stack
; INR r 5r Rr <- Rr + 1.0 - increment register
; DCR r 6r Rr <- Rr - 1.0 - decrement register
; NEG r 7r Rr <- -Rr - negate register
; INV r 8r Rr <- 1.0 / Rr - multiplicative inverse of register
; LDD r xxyy 2r yy xx Rr <- (xxyy) - load register directly from address
; SVD r xxyy 3r yy xx (xxyy) <- Rr - save register directly to address
; PSH r 4r RS <- Rr - push onto stack
; POP r 5r Rr <- RS - pop from stack
; EXC r 6r Rr <-> RS - exchange Rr with stack
; INR r 7r Rr <- Rr + 1.0 - increment register
; DCR r 8r Rr <- Rr - 1.0 - decrement register
; TST r 9r F <- Rr <=> 0.0 - test register
; ADD r pq ar pq Rr <- Rp + Rq - addition
; SUB r pq br pq Rr <- Rp - Rq - subtraction
@ -29,7 +29,6 @@
; DIV r pq dr pq Rr <- Rp / Rq - division
; MOD r pq er pq Rr <- Rp % Rq - modulus
; EXT z ... fz ... - system and user defined functions
; ESC 00 - escape back into regular assembler
; RTN 01 - return from subroutine
; BRS xxyy 02 yy xx PC <- PC + xxyy - branch to subroutine
@ -60,46 +59,46 @@ _R8 = _R7 + 4
_R9 = _R8 + 4
; 32 bytes in page zero for internal registers
_I0 = $e0 ; workspace for ADD, SUB, MUL, DIV, MOD, EXC, LDI, SVI
_I0 = $e0 ; workspace
_I1 = _I0 + 4
_I2 = _I1 + 4
_I3 = _I2 + 4
_I4 = _I3 + 4
_I5 = _I4 + 4
_I6 = _I5 + 4 ; register I6 maintains common status
_I7 = _I6 + 4 ; register I7 saves/restores processor status
_I6 = _I5 + 4 ; register I6 maintains common status
_I7 = _I6 + 4 ; register I7 saves/restores processor status
; register I6 maintains common status
; (dd cc bb aa) aa: index for register stack RS / ccbb: program counter PC / dd: flags F UONPZLGE
_RSI = _I6 ; register stack index
_PCL = _RSI + 1 ; program counter low
_PCH = _PCL + 1 ; program counter high
_F = _PCH + 1 ; flags
_PC = _PCL ; program counter
_RSI = _I6 ; register stack index
_PCL = _RSI + 1 ; program counter low
_PCH = _PCL + 1 ; program counter high
_F = _PCH + 1 ; flags
_PC = _PCL ; program counter
; bits for flags
_F_E = 1 ; if Rp = Rq (after CMP)
_F_G = 2 ; if Rp > Rq (after CMP)
_F_L = 4 ; if Rp < Rq (after CMP)
_F_Z = 8 ; if Rr = 0.0 (after TST)
_F_P = 16 ; if Rr > 0.0 (after TST)
_F_N = 32 ; if Rr < 0.0 (after TST)
_F_O = 64 ; if overflow (after arithmetic operations)
_F_U = 128 ; if underflow (after arithmetic operations)
_F_E = 1 ; if Rp = Rq (after CMP)
_F_G = 2 ; if Rp > Rq (after CMP)
_F_L = 4 ; if Rp < Rq (after CMP)
_F_Z = 8 ; if Rr = 0.0 (after TST)
_F_P = 16 ; if Rr > 0.0 (after TST)
_F_N = 32 ; if Rr < 0.0 (after TST)
_F_O = 64 ; if overflow (after arithmetic operations)
_F_U = 128 ; if underflow (after arithmetic operations)
; register I7 saves/restores processor status
; (dd cc bb aa) aa: accumulator, bb: index X, cc: index Y, dd: processor status
_ACC = _I7 ; saved accumulator to restore
_IDX = _ACC + 1 ; saved index X to restore
_IDY = _IDX + 1 ; saved index Y to restore
_PS = _IDY + 1 ; saved processor status to restore
_ACC = _I7 ; saved accumulator to restore
_IDX = _ACC + 1 ; saved index X to restore
_IDY = _IDX + 1 ; saved index Y to restore
_PS = _IDY + 1 ; saved processor status to restore
; 224 bytes of page two
_RS = $200 ; register stack
_RSS = (FN_FX - _RS) ; register stack size
_RS = $200 ; register stack
_RSS = (FN_FX - _RS) ; register stack size
; last 32 bytes of page two
FN_FX = $2e0 ; list of system and user functions
FN_FX = $2e0 ; list of system and user functions
; function constants
_ESC_C = $00
@ -120,13 +119,13 @@ _SVI_C = $0e
_CMR_C = $0f
_SET_C = $10
_PSH_C = $20
_POP_C = $30
_EXC_C = $40
_INR_C = $50
_DCR_C = $60
_NEG_C = $70
_INV_C = $80
_LDD_C = $20
_SVD_C = $30
_PSH_C = $40
_POP_C = $50
_EXC_C = $60
_INR_C = $70
_DCR_C = $80
_TST_C = $90
_ADD_C = $a0
_SUB_C = $b0
@ -136,16 +135,8 @@ _MOD_C = $e0
_EXT_C = $f0
; common constants
_MAX_V = $3f ; i.e. the $3f part of $3fffffff
; plus and minus 1 for increment and decrement
_PLS_1 = %00000100 ; i.e. the $04 part of $00000400
_MNS_1 = %11111100 ; i.e. the $fc part of $fffffc00
_MSK_O = %11000000 ; mask for overflow
_MSK_R = %00111100 ; mask for registers
; mask for TST
_MSK_T = (_F_Z + _F_P + _F_N)^$ff
_MSK_O = %11000000 ; mask for overflow
_MSK_R = %00111100 ; mask for registers
_MSK_T = (_F_Z + _F_P + _F_N)^$ff ; mask for TST
#endif /* __COMMON_H */

View File

@ -57,13 +57,13 @@
#define SVI(p, q) .BYTE _SVI_C, p * 16 + q
#define CMR(p, q) .BYTE _CMR_C, p * 16 + q
#define SET(r, v) .BYTE _SET_C + r, _SET_V(#v)
#define LDD(r, a) .BYTE _LDD_C + r, <(a), >(a)
#define SVD(r, a) .BYTE _SVD_C + r, <(a), >(a)
#define PSH(r) .BYTE _PSH_C + r
#define POP(r) .BYTE _POP_C + r
#define EXC(r) .BYTE _EXC_C + r
#define INR(r) .BYTE _INR_C + r
#define DCR(r) .BYTE _DCR_C + r
#define NEG(r) .BYTE _NEG_C + r
#define INV(r) .BYTE _INV_C + r
#define TST(r) .BYTE _TST_C + r
#define ADD(r, p, q) .BYTE _ADD_C + r, p * 16 + q
#define SUB(r, p, q) .BYTE _SUB_C + r, p * 16 + q