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https://github.com/Russell-S-Harper/COMMON.git
synced 2024-11-19 06:32:00 +00:00
Removing NEG and INV, and adding LDD and SVD. Also cleaned up INR and DCR.
This commit is contained in:
Russell-S-Harper
parent
794550eee5
commit
495eb811c8
@ -116,7 +116,15 @@ _SET .( ; SET r aabbcc.dd 1r dd cc bb aa Rr <- aabbcc.dd - set register
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_1 RTS ; done
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.)
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_PSH .( ; PSH r 2r RS <- Rr - push onto stack
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_LDD .( ; LDD r xxyy 2r yy xx Rr <- (xxyy) - load register directly from address
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RTS
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.)
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_SVD .( ; SVD r xxyy 3r yy xx (xxyy) <- Rr - save register directly to address
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RTS
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.)
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_PSH .( ; PSH r 4r RS <- Rr - push onto stack
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LDY _RSI ; get register stack index
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CPY #_RSS ; compare against limit
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BCC _1 ; still room, all okay
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@ -137,7 +145,7 @@ _1 LDA _R0,X ; transfer four bytes over
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RTS
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.)
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_POP .( ; POP r 3r Rr <- RS - pop from stack
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_POP .( ; POP r 5r Rr <- RS - pop from stack
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LDY _RSI ; get register stack index
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BNE _1 ; all good, something can be popped off the stack
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BRK ; next pop will cause a stack underflow, abort and call exception handler (TODO)
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@ -157,7 +165,7 @@ _1 DEY ; transfer four bytes over
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RTS
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.)
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_EXC .( ; EXC r 4r Rr <-> RS - exchange Rr with stack
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_EXC .( ; EXC r 6r Rr <-> RS - exchange Rr with stack
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LDY _RSI ; RS to I0
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LDA _RS-1,Y
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STA _I0+3
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@ -186,23 +194,27 @@ _EXC .( ; EXC r 4r Rr <-> RS - exchange Rr with stack
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RTS
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.)
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_ADDI0X .( ; add I0 to register indexed by X
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_ADPI0X .( ; add value pointed by I0 to register indexed by X
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LDA _R0+3,X
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AND #_MSK_O ; check for existing overflow condition
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BEQ _1
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EOR #_MSK_O
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BNE _2 ; existing overflow, skip decrement operation
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_1 CLC ; adding RD
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LDA _I0
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LDY #0
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LDA (_I0),Y
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ADC _R0,X
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STA _R0,X
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LDA _I0+1
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INY
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LDA (_I0),Y
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ADC _R0+1,X
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STA _R0+1,X
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LDA _I0+2
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INY
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LDA (_I0),Y
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ADC _R0+2,X
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STA _R0+2,X
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LDA _I0+3
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INY
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LDA (_I0),Y
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ADC _R0+3,X
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STA _R0+3,X
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AND #_MSK_O ; check for overflow
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@ -219,34 +231,20 @@ _3 LDA _F ; clear overflow
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_4 RTS
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.)
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_INR .( ; INR r 5r Rr <- Rr + 1.0 - increment register
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LDA #0 ; set I0 to plus one
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_INR .( ; INR r 7r Rr <- Rr + 1.0 - increment register
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LDA #<PLS_1 ; set I0 to reference plus one
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STA _I0
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LDA #_PLS_1
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LDA #>PLS_1
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STA _I0+1
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LDA #0
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STA _I0+2
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STA _I0+3
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BEQ _ADDI0X
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BEQ _ADPI0X
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.)
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_DCR .( ; DCR r 6r Rr <- Rr - 1.0 - decrement register
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LDA #0 ; set I0 to minus one
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_DCR .( ; DCR r 8r Rr <- Rr - 1.0 - decrement register
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LDA #<MNS_1 ; set I0 to reference minus one
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STA _I0
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LDA #_MNS_1
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LDA #>MNS_1
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STA _I0+1
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LDA #$FF
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STA _I0+2
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STA _I0+3
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BNE _ADDI0X
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.)
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_NEG .( ; NEG r 7r Rr <- -Rr - negate register
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RTS
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.)
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_INV .( ; INV r 8r Rr <- 1.0 / Rr - multiplicative inverse of register
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RTS
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BNE _ADPI0X
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.)
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_TST .( ; TST r 9r F <- Rr <=> 0.0 - test register
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@ -936,8 +934,12 @@ _END_CMN_CD
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FN_0X .WORD _ESC-1, _RTN-1, _BRS-1, _BRA-1, _BRE-1, _BRG-1, _BRL-1, _BRZ-1,
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.WORD _BRP-1, _BRN-1, _BRO-1, _BRU-1, _CPR-1, _LDI-1, _SVI-1, _CMR-1
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FN_XR .WORD _SET-1, _POP-1, _PSH-1, _EXC-1, _INR-1, _DCR-1, _NEG-1,
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.WORD _INV-1, _TST-1, _ADD-1, _SUB-1, _MUL-1, _DIV-1, _MOD-1
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FN_XR .WORD _SET-1, _LDD-1, _SVD-1, _PSH-1, _POP-1, _EXC-1, _INR-1,
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.WORD _DCR-1, _TST-1, _ADD-1, _SUB-1, _MUL-1, _DIV-1, _MOD-1
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; numerical constants
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PLS_1 .BYTE $00, $04, $00, $00
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MNS_1 .BYTE $00, $fc, $ff, $ff
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_END_CMN_DT
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@ -15,13 +15,13 @@
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; Instructions
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; SET r aabbcc.dd 1r dd cc bb aa Rr <- aabbccdd - set register
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; PSH r 2r RS <- Rr - push onto stack
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; POP r 3r Rr <- RS - pop from stack
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; EXC r 4r Rr <-> RS - exchange Rr with stack
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; INR r 5r Rr <- Rr + 1.0 - increment register
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; DCR r 6r Rr <- Rr - 1.0 - decrement register
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; NEG r 7r Rr <- -Rr - negate register
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; INV r 8r Rr <- 1.0 / Rr - multiplicative inverse of register
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; LDD r xxyy 2r yy xx Rr <- (xxyy) - load register directly from address
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; SVD r xxyy 3r yy xx (xxyy) <- Rr - save register directly to address
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; PSH r 4r RS <- Rr - push onto stack
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; POP r 5r Rr <- RS - pop from stack
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; EXC r 6r Rr <-> RS - exchange Rr with stack
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; INR r 7r Rr <- Rr + 1.0 - increment register
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; DCR r 8r Rr <- Rr - 1.0 - decrement register
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; TST r 9r F <- Rr <=> 0.0 - test register
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; ADD r pq ar pq Rr <- Rp + Rq - addition
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; SUB r pq br pq Rr <- Rp - Rq - subtraction
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@ -29,7 +29,6 @@
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; DIV r pq dr pq Rr <- Rp / Rq - division
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; MOD r pq er pq Rr <- Rp % Rq - modulus
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; EXT z ... fz ... - system and user defined functions
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; ESC 00 - escape back into regular assembler
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; RTN 01 - return from subroutine
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; BRS xxyy 02 yy xx PC <- PC + xxyy - branch to subroutine
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@ -60,46 +59,46 @@ _R8 = _R7 + 4
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_R9 = _R8 + 4
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; 32 bytes in page zero for internal registers
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_I0 = $e0 ; workspace for ADD, SUB, MUL, DIV, MOD, EXC, LDI, SVI
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_I0 = $e0 ; workspace
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_I1 = _I0 + 4
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_I2 = _I1 + 4
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_I3 = _I2 + 4
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_I4 = _I3 + 4
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_I5 = _I4 + 4
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_I6 = _I5 + 4 ; register I6 maintains common status
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_I7 = _I6 + 4 ; register I7 saves/restores processor status
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_I6 = _I5 + 4 ; register I6 maintains common status
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_I7 = _I6 + 4 ; register I7 saves/restores processor status
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; register I6 maintains common status
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; (dd cc bb aa) aa: index for register stack RS / ccbb: program counter PC / dd: flags F UONPZLGE
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_RSI = _I6 ; register stack index
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_PCL = _RSI + 1 ; program counter low
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_PCH = _PCL + 1 ; program counter high
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_F = _PCH + 1 ; flags
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_PC = _PCL ; program counter
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_RSI = _I6 ; register stack index
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_PCL = _RSI + 1 ; program counter low
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_PCH = _PCL + 1 ; program counter high
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_F = _PCH + 1 ; flags
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_PC = _PCL ; program counter
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; bits for flags
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_F_E = 1 ; if Rp = Rq (after CMP)
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_F_G = 2 ; if Rp > Rq (after CMP)
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_F_L = 4 ; if Rp < Rq (after CMP)
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_F_Z = 8 ; if Rr = 0.0 (after TST)
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_F_P = 16 ; if Rr > 0.0 (after TST)
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_F_N = 32 ; if Rr < 0.0 (after TST)
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_F_O = 64 ; if overflow (after arithmetic operations)
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_F_U = 128 ; if underflow (after arithmetic operations)
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_F_E = 1 ; if Rp = Rq (after CMP)
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_F_G = 2 ; if Rp > Rq (after CMP)
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_F_L = 4 ; if Rp < Rq (after CMP)
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_F_Z = 8 ; if Rr = 0.0 (after TST)
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_F_P = 16 ; if Rr > 0.0 (after TST)
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_F_N = 32 ; if Rr < 0.0 (after TST)
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_F_O = 64 ; if overflow (after arithmetic operations)
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_F_U = 128 ; if underflow (after arithmetic operations)
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; register I7 saves/restores processor status
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; (dd cc bb aa) aa: accumulator, bb: index X, cc: index Y, dd: processor status
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_ACC = _I7 ; saved accumulator to restore
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_IDX = _ACC + 1 ; saved index X to restore
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_IDY = _IDX + 1 ; saved index Y to restore
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_PS = _IDY + 1 ; saved processor status to restore
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_ACC = _I7 ; saved accumulator to restore
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_IDX = _ACC + 1 ; saved index X to restore
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_IDY = _IDX + 1 ; saved index Y to restore
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_PS = _IDY + 1 ; saved processor status to restore
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; 224 bytes of page two
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_RS = $200 ; register stack
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_RSS = (FN_FX - _RS) ; register stack size
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_RS = $200 ; register stack
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_RSS = (FN_FX - _RS) ; register stack size
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; last 32 bytes of page two
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FN_FX = $2e0 ; list of system and user functions
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FN_FX = $2e0 ; list of system and user functions
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; function constants
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_ESC_C = $00
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@ -120,13 +119,13 @@ _SVI_C = $0e
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_CMR_C = $0f
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_SET_C = $10
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_PSH_C = $20
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_POP_C = $30
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_EXC_C = $40
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_INR_C = $50
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_DCR_C = $60
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_NEG_C = $70
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_INV_C = $80
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_LDD_C = $20
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_SVD_C = $30
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_PSH_C = $40
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_POP_C = $50
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_EXC_C = $60
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_INR_C = $70
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_DCR_C = $80
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_TST_C = $90
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_ADD_C = $a0
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_SUB_C = $b0
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@ -136,16 +135,8 @@ _MOD_C = $e0
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_EXT_C = $f0
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; common constants
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_MAX_V = $3f ; i.e. the $3f part of $3fffffff
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; plus and minus 1 for increment and decrement
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_PLS_1 = %00000100 ; i.e. the $04 part of $00000400
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_MNS_1 = %11111100 ; i.e. the $fc part of $fffffc00
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_MSK_O = %11000000 ; mask for overflow
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_MSK_R = %00111100 ; mask for registers
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; mask for TST
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_MSK_T = (_F_Z + _F_P + _F_N)^$ff
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_MSK_O = %11000000 ; mask for overflow
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_MSK_R = %00111100 ; mask for registers
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_MSK_T = (_F_Z + _F_P + _F_N)^$ff ; mask for TST
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#endif /* __COMMON_H */
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@ -57,13 +57,13 @@
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#define SVI(p, q) .BYTE _SVI_C, p * 16 + q
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#define CMR(p, q) .BYTE _CMR_C, p * 16 + q
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#define SET(r, v) .BYTE _SET_C + r, _SET_V(#v)
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#define LDD(r, a) .BYTE _LDD_C + r, <(a), >(a)
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#define SVD(r, a) .BYTE _SVD_C + r, <(a), >(a)
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#define PSH(r) .BYTE _PSH_C + r
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#define POP(r) .BYTE _POP_C + r
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#define EXC(r) .BYTE _EXC_C + r
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#define INR(r) .BYTE _INR_C + r
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#define DCR(r) .BYTE _DCR_C + r
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#define NEG(r) .BYTE _NEG_C + r
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#define INV(r) .BYTE _INV_C + r
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#define TST(r) .BYTE _TST_C + r
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#define ADD(r, p, q) .BYTE _ADD_C + r, p * 16 + q
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#define SUB(r, p, q) .BYTE _SUB_C + r, p * 16 + q
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