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https://github.com/Russell-S-Harper/COMMON.git
synced 2025-01-13 01:30:23 +00:00
Adding LDI and SVI instructions.
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Russell-S-Harper
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commit
800c51a6e1
@ -269,7 +269,7 @@ _HEX .( ; HEX r 9r Rr <- hex(Rr) - convert Rr from decimal ######.### to hex
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RTS
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.)
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_GETPQ .( ; sets X as p register and Y as q register, checks for overflow in the operands, advances PC
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_GETPQ .( ; sets X as p register and Y as q register, advances PC
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LDY #0
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LDA (_PC),Y ; get source registers
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LSR
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@ -281,6 +281,14 @@ _GETPQ .( ; sets X as p register and Y as q register, checks for overflow in th
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ASL
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AND #_MSK_R ; q register
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TAY
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_2 INC _PCL ; advance PC
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BNE _3
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INC _PCH
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_3 RTS
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.)
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_GETPQF .( ; sets X as p register and Y as q register, advances PC, checks for overflow in the operands
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JSR _GETPQ
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LDA _R0+3,X
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AND #_MSK_O ; check for existing overflow condition
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BEQ _1 ; sign and overflow are both clear
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@ -293,10 +301,7 @@ _1 LDA _R0+3,Y
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EOR #_MSK_O
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BEQ _2 ; sign and overflow are both set
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BRK ; an operand is in an overflow condition, abort and call exception handler (TODO)
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_2 INC _PCL ; advance PC
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BNE _3
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INC _PCH
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_3 RTS
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_2 RTS
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.)
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_ZERI0 .( ; clears I0
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@ -348,7 +353,7 @@ _2 RTS
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_ADD .( ; ADD r pq ar pq Rr <- Rp + Rq - addition
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TXA
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PHA ; save r register for later
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JSR _GETPQ
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JSR _GETPQF
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CLC ; set I0 to Rp + Rq
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LDA _R0,X
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ADC _R0,Y
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@ -368,7 +373,7 @@ _ADD .( ; ADD r pq ar pq Rr <- Rp + Rq - addition
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_SUB .( ; SUB r pq br pq Rr <- Rp - Rq - subtraction
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TXA
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PHA ; save r register for later
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JSR _GETPQ
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JSR _GETPQF
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SEC ; set I0 to Rp - Rq
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LDA _R0,X
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SBC _R0,Y
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@ -460,6 +465,18 @@ _CPXI0 .( ; copy four bytes at X index to I0, returns MSB in A
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RTS
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.)
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_CPYI1 .( ; copy four bytes at Y index to I1, returns MSB in A
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LDA _R0,Y
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STA _I1
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LDA _R0+1,Y
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STA _I1+1
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LDA _R0+2,Y
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STA _I1+2
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LDA _R0+3,Y
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STA _I1+3
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RTS
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.)
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_RDXFI0 .( ; using X index, round quad-word, transfer to I0, set overflow in I0, set or clear the underflow flag
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JSR _BKRRD ; banker's rounding
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INX ; skip extra fraction
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@ -491,7 +508,7 @@ _3 RTS
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_MUL .( ; MUL r pq cr pq Rr <- Rp * Rq - multiplication
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TXA ; adapted from http://www.6502.org/source/integers/32muldiv.htm
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PHA ; save r register for later
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JSR _GETPQ
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JSR _GETPQF
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LDA _R0,X ; check for zero argument
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ORA _R0+1,X
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ORA _R0+2,X
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@ -509,14 +526,7 @@ _2 LDA _R0+3,X
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AND #_MSK_O ; save sign of product
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PHA
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JSR _CPXI0 ; transfer p to I0
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LDA _R0,Y ; transfer q to I1
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STA _I1
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LDA _R0+1,Y
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STA _I1+1
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LDA _R0+2,Y
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STA _I1+2
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LDA _R0+3,Y
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STA _I1+3
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JSR _CPYI1 ; transfer q to I1
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LDX #_I0-_R0
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JSR _ABSX ; set to absolute value
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LDX #_I1-_R0
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@ -577,8 +587,8 @@ _ZERQX .( ; zero quad-word (64 bits) at X
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RTS
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.)
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_INTDM .( ; initialize for DIV and MOD, returns sign of result in A
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JSR _GETPQ
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_INIDM .( ; initialize for DIV and MOD, returns sign of result in A
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JSR _GETPQF
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LDA _R0,X ; check for zero argument
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ORA _R0+1,X
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ORA _R0+2,X
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@ -704,7 +714,7 @@ _SHDDM .( ; shift down for DIV and MOD
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_DIV .( ; DIV r pq dr pq Rr <- Rp / Rq - division
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TXA
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PHA ; save r register for later
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JSR _INTDM ; initialize
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JSR _INIDM ; initialize
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PHA ; save sign of result
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LDX #_I0-_R0 ; absolute value of register p saved in I0
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JSR _ABSX
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@ -737,7 +747,7 @@ _6 JMP _RETI0X ; pull X, transfer I0 to r register, let it handle the return
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_MOD .( ; MOD r pq er pq Rr <- Rp % Rq - modulus
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TXA
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PHA ; save r register for later
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JSR _INTDM ; initialize
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JSR _INIDM ; initialize
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PHA ; save sign of result
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LDX #_I0-_R0 ; absolute value of register p saved in I0
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JSR _ABSX
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@ -845,14 +855,70 @@ _BRU .( ; BRU xxyy 0b yy xx PC <- PC + xxyy - branch if underflow (after arith
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.)
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_CPR .( ; CPR pq 0c pq Rp <- Rq - copy register
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JSR _GETPQ
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LDA _R0,Y ; transfer q to p
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STA _R0,X
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LDA _R0+1,Y
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STA _R0+1,X
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LDA _R0+2,Y
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STA _R0+2,X
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LDA _R0+3,Y
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STA _R0+3,X
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RTS
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.)
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_INILS .( ; common initialization for LDI and SVI
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JSR _CPYI1 ; copy q to I1
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CLC ; shift to get an address
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ROR _I1+3
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ROR _I1+2
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ROR _I1+1
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CLC
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ROR _I1+3
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ROR _I1+2
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ROR _I1+1
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RTS
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.)
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_LDI .( ; LDI pq 0d pq Rp <- (Rq:bbcc) - load indirect from memory
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JSR _GETPQ
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JSR _INILS
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LDY #0 ; transfer
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LDA (_I1+1),Y
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STA _R0,X
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INY
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LDA (_I1+1),Y
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STA _R0+1,X
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INY
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LDA (_I1+1),Y
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STA _R0+2,X
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INY
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LDA (_I1+1),Y
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STA _R0+3,X
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RTS
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.)
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_SVI .( ; SVI pq 0e pq (Rp:bbcc) <- Rq - save indirect to memory
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JSR _GETPQ
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TXA ; swap X and Y
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PHA ; X on stack
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TYA
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TAX ; X becomes Y
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PLA
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TAY ; pull Y (was X)
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JSR _INILS
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LDY #0 ; transfer
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LDA _R0,X
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STA (_I1+1),Y
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INY
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LDA _R0+1,X
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STA (_I1+1),Y
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INY
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LDA _R0+2,X
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STA (_I1+1),Y
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INY
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LDA _R0+3,X
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STA (_I1+1),Y
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RTS
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.)
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@ -59,7 +59,7 @@ _R8 = _R7 + 4
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_R9 = _R8 + 4
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; 32 bytes in page zero for internal registers
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_I0 = $e0 ; workspace for ADD, SUB, MUL, DIV, MOD, EXC
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_I0 = $e0 ; workspace for ADD, SUB, MUL, DIV, MOD, EXC, LDI, SVI
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_I1 = _I0 + 4
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_I2 = _I1 + 4
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_I3 = _I2 + 4
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@ -5,10 +5,11 @@
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HDR(DEMO)
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CMN
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SET(R0, 1048575.999)
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SET(R1, 3 * 5 * 5)
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MOD(R2, R0, R1)
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SUB(R3, R0, R2)
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SET(R0, $b8 + 28)
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SET(R2, -999999.999)
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SET(R7, 1048575.999)
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LDI(R1, R0)
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SVI(R0, R2)
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ESC
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BRK
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