Russell-S-Harper
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4aa6d42809
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First draft of I/O interface.
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2021-12-11 15:06:16 -05:00 |
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Russell-S-Harper
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6dd9389955
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Simplifying code section
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2021-07-07 21:19:07 -04:00 |
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Russell-S-Harper
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fe780a8328
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Revising comments
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2021-02-26 07:15:23 -05:00 |
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Russell-S-Harper
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b1a019a1c4
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Normalzing Nakefiles
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2020-09-26 03:40:56 -04:00 |
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Russell-S-Harper
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de6306742d
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Updating comments.
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2019-12-01 09:14:16 -05:00 |
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Russell-S-Harper
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2bbd304ec7
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Added access of DATA section for LDI and SVI.
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2019-07-07 13:25:47 -04:00 |
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Russell-S-Harper
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5b78dcbd82
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Bounds checking for LDI/SVI.
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2019-05-02 17:04:37 -04:00 |
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Russell-S-Harper
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02a9fd15d4
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Cleaning up sections.
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2019-04-30 17:21:49 -04:00 |
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Russell-S-Harper
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aa37831b23
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Adding handling for different section types.
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2019-04-29 21:32:06 -04:00 |
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Russell-S-Harper
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9a8cb12c8e
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Revising comments.
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2019-04-26 20:38:14 -04:00 |
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Russell-S-Harper
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99fc2c9feb
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Added CODE and DATA type headers, and using offsets for LDI and SVI. Not bothering with multitasking and context switching for now.
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2019-04-26 20:37:50 -04:00 |
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Russell-S-Harper
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8576353b73
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Adding definition for memory map and status flags.
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2019-03-31 18:36:58 -04:00 |
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Russell-S-Harper
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48686fe17c
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Revising process information definitions.
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2019-03-30 09:31:51 -04:00 |
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Russell-S-Harper
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6f9818441f
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Added process information definitions.
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2019-03-29 22:22:15 -04:00 |
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Russell-S-Harper
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7e3d87425d
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Bracketing macro JIC.
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2019-03-02 18:59:18 -05:00 |
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Russell-S-Harper
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fbd04e7195
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Reformatted
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2019-02-05 11:32:40 -05:00 |
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Russell-S-Harper
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a8200233d6
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Simplifying macros.
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2019-01-31 18:59:01 -05:00 |
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Russell-S-Harper
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9045e06439
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Adding I9 for context switching.
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2018-10-30 03:38:42 -04:00 |
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Russell-S-Harper
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c3b51fe912
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Cleaning up definitions, and preparing for multitasking.
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2018-10-04 21:03:55 -04:00 |
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Russell-S-Harper
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65267903c1
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Added comment regarding context switching.
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2018-09-19 22:24:23 -04:00 |
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Russell-S-Harper
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f7ee11763b
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Added BRS and RTN instructions.
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2018-09-17 20:35:19 -04:00 |
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Russell-S-Harper
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7ac0d7e04a
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Adding CMR instruction.
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2018-09-14 06:24:35 -04:00 |
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Russell-S-Harper
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1c9358c7ee
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Fixing typos.
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2018-09-11 20:48:56 -04:00 |
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Russell-S-Harper
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00302885d0
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Adding all branch instructions (except BRS).
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2018-09-11 20:40:28 -04:00 |
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Russell-S-Harper
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2d076b503c
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Adding SVD.
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2018-09-11 19:26:08 -04:00 |
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Russell-S-Harper
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13c375b242
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Added code for LDD. Removed some hard coded constants.
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2018-09-08 11:00:19 -04:00 |
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Russell-S-Harper
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495eb811c8
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Removing NEG and INV, and adding LDD and SVD. Also cleaned up INR and DCR.
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2018-09-08 06:41:37 -04:00 |
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Russell-S-Harper
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794550eee5
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Replacing DEC and HEX with NEG and INV.
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2018-09-01 10:40:57 -04:00 |
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Russell-S-Harper
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800c51a6e1
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Adding LDI and SVI instructions.
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2018-08-30 16:37:37 -04:00 |
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Russell-S-Harper
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3af579e5bb
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Forcing regular 6502 instructions.
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2018-08-27 20:27:00 -04:00 |
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Russell-S-Harper
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8f0a6ed542
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Revised MOD to prevent overflow.
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2018-08-24 23:40:47 -04:00 |
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Russell-S-Harper
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18b7c46878
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Revised comments.
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2018-08-21 09:33:12 -04:00 |
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Russell-S-Harper
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8bbb5016cd
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Was using up too many S registers, so moved internal functions to use new registers I0 - I7, added IEEE rounding to MUL and DIV, refactored to reduce size, and trimmed trailing spaces.
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2018-08-21 09:14:16 -04:00 |
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Russell-S-Harper
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6dc8517120
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Added MOD instruction. Some refactoring.
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2018-08-19 10:01:59 -04:00 |
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Russell-S-Harper
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4c38ba57de
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Setting result to largest value for true overflow.
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2018-08-17 22:57:44 -04:00 |
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Russell-S-Harper
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6aad24a207
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Adding DIV instruction.
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2018-08-15 07:38:49 -04:00 |
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Russell-S-Harper
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248de8197a
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Correcting typo.
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2018-08-14 10:37:18 -04:00 |
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Russell-S-Harper
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ae0e509335
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Adding MUL instruction.
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2018-08-14 10:19:39 -04:00 |
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Russell-S-Harper
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61b9ce0b66
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Adding EOL to files.
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2018-08-13 21:23:05 -04:00 |
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Russell-S-Harper
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370363bdf9
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Revising preprocessor commands.
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2018-08-13 21:18:13 -04:00 |
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Russell-S-Harper
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c2ea029887
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Revised comments.
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2018-08-13 21:11:03 -04:00 |
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Russell-S-Harper
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3f7ed92537
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Added ADD and SUB instructions. Also uncovered an issue with how negative numbers were represented.
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2018-08-13 21:01:18 -04:00 |
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Russell-S-Harper
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d47c2615ab
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Rounding of _SET_V result.
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2018-08-13 08:49:48 -04:00 |
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Russell-S-Harper
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45b2efb2ca
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Adding TST instruction.
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2018-08-07 21:36:06 -04:00 |
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Russell-S-Harper
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c630c4ef6e
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Formatting.
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2018-08-07 20:28:59 -04:00 |
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Russell-S-Harper
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bb3b6cd683
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Assigning PSH before POP.
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2018-08-07 20:19:52 -04:00 |
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Russell-S-Harper
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fe7bfb12e6
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Adding protection for PSH and POP.
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2018-08-07 20:14:24 -04:00 |
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Russell-S-Harper
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a3069872b1
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Revised comments.
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2018-08-07 09:40:29 -04:00 |
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Russell-S-Harper
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41e1ff48d2
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Revising INR and DCR to use common routines.
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2018-08-07 09:30:11 -04:00 |
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Russell-S-Harper
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b96f42daaa
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Renamed common-post-process to xa-pre-process.
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2018-08-07 07:03:21 -04:00 |