15 Commits

Author	SHA1	Message	Date
Russell-S-Harper	00302885d0	Adding all branch instructions (except BRS).	2018-09-11 20:40:28 -04:00
Russell-S-Harper	2d076b503c	Adding SVD.	2018-09-11 19:26:08 -04:00
Russell-S-Harper	13c375b242	Added code for LDD. Removed some hard coded constants.	2018-09-08 11:00:19 -04:00
Russell-S-Harper	794550eee5	Replacing DEC and HEX with NEG and INV.	2018-09-01 10:40:57 -04:00
Russell-S-Harper	800c51a6e1	Adding LDI and SVI instructions.	2018-08-30 16:37:37 -04:00
Russell-S-Harper	3af579e5bb	Forcing regular 6502 instructions.	2018-08-27 20:27:00 -04:00
Russell-S-Harper	8f0a6ed542	Revised MOD to prevent overflow.	2018-08-24 23:40:47 -04:00
Russell-S-Harper	8bbb5016cd	Was using up too many S registers, so moved internal functions to use new registers I0 - I7, added IEEE rounding to MUL and DIV, refactored to reduce size, and trimmed trailing spaces.	2018-08-21 09:14:16 -04:00
Russell-S-Harper	6dc8517120	Added MOD instruction. Some refactoring.	2018-08-19 10:01:59 -04:00
Russell-S-Harper	6aad24a207	Adding DIV instruction.	2018-08-15 07:38:49 -04:00
Russell-S-Harper	ae0e509335	Adding MUL instruction.	2018-08-14 10:19:39 -04:00
Russell-S-Harper	61b9ce0b66	Adding EOL to files.	2018-08-13 21:23:05 -04:00
Russell-S-Harper	3f7ed92537	Added ADD and SUB instructions. Also uncovered an issue with how negative numbers were represented.	2018-08-13 21:01:18 -04:00
Russell-S-Harper	45b2efb2ca	Adding TST instruction.	2018-08-07 21:36:06 -04:00
Russell-S-Harper	6cfab34cfa	Add files via upload	2018-08-06 22:14:36 -04:00