mirror of
https://github.com/Russell-S-Harper/COMMON.git
synced 2024-07-09 21:29:27 +00:00
391 lines
6.8 KiB
NASM
391 lines
6.8 KiB
NASM
#include "rom.h"
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#include "common.h"
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; ROM code header
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.WORD CMN_CD, _END_CMN_CD - CMN_CD
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; beginning of ROM code
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* = CMN_CD
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_CMN .( ; common function interpreter
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JSR _SAV ; save registers
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PLA
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STA _PCL ; set program counter from return address
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PLA
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STA _PCH
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INC _PCL ; advance the program counter
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BNE _1
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INC _PCH
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_1 JSR _2 ; interpret and execute one common instruction
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JMP _1
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_2 LDY #0
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LDA (_PC),Y ; get operand
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INC _PCL ; advance the program counter
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BNE _3
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INC _PCH
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_3 TAX ; save operand for later
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AND #$F0
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BEQ _4 ; go to 0X instructions
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CMP #$F0 ; check for FX functions
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BEQ _5 ; go to FX instructions
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LSR ; get offset to XR instructions
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LSR
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LSR
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TAY
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DEY
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DEY
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LDA FN_XR+1,Y ; push high address
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PHA
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LDA FN_XR,Y ; push low address
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PHA
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TXA ; restore operand
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AND #$F ; mask to get register
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ASL ; shift to get offset to register
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ASL
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TAX ; back to index
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RTS ; "return" to routine
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_4 TXA ; get operand
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ASL ; shift to get offset to 0X instructions
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TAY
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LDA FN_0X+1,Y ; push high address
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PHA
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LDA FN_0X,Y ; push low address
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PHA
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TXA ; restore operand
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RTS ; "return" to routine
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_5 TXA ; get operand
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AND #$F ; mask to get index
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ASL ; shift to get offset to FX instructions
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TAY
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LDA FN_FX+1,Y ; push high address
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PHA
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LDA FN_FX,Y ; push low address
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PHA
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TXA ; restore operand
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RTS ; "return" to routine
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.)
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_INI .( ; initialize common
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; copy system functions (TODO)
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; load program (TODO)
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LDA #0 ; clear RSI
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STA _RSI
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JMP (_PC) ; go to last loaded block
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.)
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_SAV .( ; save the registers prior to entering common
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STA _ACC
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STX _IDX
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STY _IDY
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PHP
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PLA
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STA _PS
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CLD
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RTS
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.)
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_RES .( ; restore the registers prior to leaving common
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LDA _PS
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PHA
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LDA _ACC
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LDX _IDX
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LDY _IDY
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PLP
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RTS
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.)
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_SET .( ; SET r aabbcc.dd 1r dd cc bb aa Rr <- aabbcc.dd - set register
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LDY #0
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LDA (_PC),Y ; transfer four bytes over
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STA _R0,X
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INY
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LDA (_PC),Y
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STA _R0+1,X
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INY
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LDA (_PC),Y
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STA _R0+2,X
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INY
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LDA (_PC),Y
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STA _R0+3,X
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LDA #4 ; update program counter
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CLC
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ADC _PCL
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STA _PCL
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BCC _1
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INC _PCH
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_1 RTS ; done
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.)
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_POP .( ; POP r 2r Rr <- RS - pop from stack
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LDY _RSI ; get register stack index
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DEY ; transfer four bytes over
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LDA _RS,Y
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STA _R0+3,X
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DEY
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LDA _RS,Y
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STA _R0+2,X
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DEY
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LDA _RS,Y
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STA _R0+1,X
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DEY
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LDA _RS,Y
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STA _R0,X
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STY _RSI ; update register stack index
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RTS
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.)
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_PSH .( ; PSH r 3r RS <- Rr - push onto stack
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LDY _RSI ; get register stack index
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LDA _R0,X ; transfer four bytes over
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STA _RS,Y
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INY
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LDA _R0+1,X
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STA _RS,Y
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INY
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LDA _R0+2,X
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STA _RS,Y
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INY
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LDA _R0+3,X
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STA _RS,Y
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INY
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STY _RSI ; update register stack index
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RTS
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.)
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_EXC .( ; EXC r 4r Rr <-> RS - exchange Rr with stack
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LDY _RSI ; RS to RD
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LDA _RS-1,Y
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STA _RD+3
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LDA _RS-2,Y
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STA _RD+2
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LDA _RS-3,Y
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STA _RD+1
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LDA _RS-4,Y
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STA _RD
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LDA _R0,X ; copy Rr to RS
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STA _RS-4,Y
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LDA _R0+1,X
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STA _RS-3,Y
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LDA _R0+2,X
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STA _RS-2,Y
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LDA _R0+3,X
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STA _RS-1,Y
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LDA _RD ; copy RD to Rr
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STA _R0,X
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LDA _RD+1
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STA _R0+1,X
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LDA _RD+2
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STA _R0+2,X
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LDA _RD+3
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STA _R0+3,X
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RTS
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.)
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_INR .( ; INR r 5r Rr <- Rr + 1.0 - increment register
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LDA _R0+3,X
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AND #_MSK_O ; check for existing overflow condition
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BEQ _4
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EOR #_MSK_O
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BEQ _4
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BNE _3 ; existing overflow, skip increment operation
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_4 LDA #_PLS_1 ; adding plus one
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CLC
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ADC _R0+1,X
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STA _R0+1,X
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BCC _1
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LDA #0
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ADC _R0+2,X
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STA _R0+2,X
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BCC _1
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LDA #0
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ADC _R0+3,X
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STA _R0+3,X
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_1 LDA _R0+3,X
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AND #_MSK_O ; check for overflow
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BEQ _2
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EOR #_MSK_O
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BEQ _2
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_3 LDA _F ; set overflow
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ORA #_F_O
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STA _F
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BNE _5
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_2 LDA _F ; clear overflow
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AND #_F_O^$FF
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STA _F
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_5 RTS
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.)
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_DCR .( ; DCR r 6r Rr <- Rr - 1.0 - decrement register
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LDA _R0+3,X
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AND #_MSK_U ; check for existing underflow condition
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BEQ _4
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EOR #_MSK_U
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BEQ _4
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BNE _3 ; existing underflow, skip decrement operation
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_4 LDA #_MNS_1 ; adding minus one
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CLC
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ADC _R0+1,X
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STA _R0+1,X
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LDA #$FF
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ADC _R0+2,X
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STA _R0+2,X
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LDA #$FF
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ADC _R0+3,X
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STA _R0+3,X
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_1 LDA _R0+3,X
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AND #_MSK_U ; check for underflow
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BEQ _2
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EOR #_MSK_U
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BEQ _2
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_3 LDA _F ; set underflow
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ORA #_F_U
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STA _F
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BNE _5
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_2 LDA _F ; clear underflow
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AND #_F_U^$FF
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STA _F
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_5 RTS
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.)
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_TST .( ; TST r 7r F <- Rr <=> 0.0 - test register
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RTS
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.)
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_DEC .( ; DEC r 8r Rr <- dec(Rr) - convert Rr from hex aabbcc.dd to decimal ######.##
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RTS
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.)
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_HEX .( ; HEX r 9r Rr <- hex(Rr) - convert Rr from decimal ######.## to hex aabbcc.dd
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RTS
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.)
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_ADD .( ; ADD r pq ar pq Rr <- Rp + Rq - addition
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RTS
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.)
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_SUB .( ; SUB r pq br pq Rr <- Rp - Rq - subtraction
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RTS
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.)
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_MUL .( ; MUL r pq cr pq Rr <- Rp * Rq - multiplication
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RTS
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.)
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_DIV .( ; DIV r pq dr pq Rr <- Rp / Rq - division
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RTS
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.)
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_MOD .( ; MOD r pq er pq Rr <- Rp % Rq - modulus
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RTS
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.)
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_ESC .( ; ESC 00 - escape back into regular assembler
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PLA ; discard the COMMON _1 return address
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PLA
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JSR _RES ; restore the registers
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JMP (_PC) ; get back in the code
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.)
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_RTN .( ; RTN 01 - return from subroutine
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RTS
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.)
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_BRS .( ; BRS xxyy 02 yy xx PC <- PC + xxyy - branch to subroutine
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RTS
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.)
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_BRA .( ; BRA xxyy 03 yy xx PC <- PC + xxyy - branch always
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RTS
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.)
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_BRE .( ; BRE xxyy 04 yy xx PC <- PC + xxyy - branch if Rp = Rq (after CMP)
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LDA #_F_E
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BNE _BRX
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.)
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_BRG .( ; BRG xxyy 05 yy xx PC <- PC + xxyy - branch if Rp > Rq (after CMP)
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LDA #_F_G
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BNE _BRX
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.)
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_BRL .( ; BRL xxyy 06 yy xx PC <- PC + xxyy - branch if Rp < Rq (after CMP)
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LDA #_F_L
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BNE _BRX
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.)
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_BRZ .( ; BRZ xxyy 07 yy xx PC <- PC + xxyy - branch if Rr = 0.0 (after TST)
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LDA #_F_Z
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BNE _BRX
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.)
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_BRP .( ; BRP xxyy 08 yy xx PC <- PC + xxyy - branch if Rr > 0.0 (after TST)
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LDA #_F_P
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BNE _BRX
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.)
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_BRN .( ; BRN xxyy 09 yy xx PC <- PC + xxyy - branch if Rr < 0.0 (after TST)
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LDA #_F_N
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BNE _BRX
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.)
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_BRO .( ; BRO xxyy 0a yy xx PC <- PC + xxyy - branch if overflow (after arithmetic operations)
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LDA #_F_O
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BNE _BRX
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.)
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_BRU .( ; BRU xxyy 0b yy xx PC <- PC + xxyy - branch if underflow (after arithmetic operations)
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LDA #_F_U
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BNE _BRX ; (TODO) this line can probably be removed
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.)
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_BRX .( ; generic branch testing
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AND _F ; check the bit
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BNE _BRA ; if set, branch
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INC _PCL ; not set, advance the program counter
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BNE _1
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INC _PCH
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_1 RTS
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.)
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_CPR .( ; CPR pq 0c pq Rp <- Rq - copy register
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RTS
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.)
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_LDI .( ; LDI pq 0d pq Rp <- (Rq:bbcc) - load indirect from memory
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RTS
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.)
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_SVI .( ; SVI pq 0e pq (Rp:bbcc) <- Rq - save indirect to memory
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RTS
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.)
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_CMR .( ; CMR pq 0f pq F <- Rp <=> Rq - compare registers
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RTS
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.)
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_END_CMN_CD
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; ROM data header
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.WORD CMN_DT, _END_CMN_DT - CMN_DT
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; beginning of ROM data
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* = CMN_DT
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FN_0X .WORD _ESC-1, _RTN-1, _BRS-1, _BRA-1, _BRE-1, _BRG-1, _BRL-1, _BRZ-1,
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.WORD _BRP-1, _BRN-1, _BRO-1, _BRU-1, _CPR-1, _LDI-1, _SVI-1, _CMR-1
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FN_XR .WORD _SET-1, _POP-1, _PSH-1, _EXC-1, _INR-1, _DCR-1, _TST-1,
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.WORD _DEC-1, _HEX-1, _ADD-1, _SUB-1, _MUL-1, _DIV-1, _MOD-1
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_END_CMN_DT
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; 6502 addresses
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.WORD ADDR, 6
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; 6502 NMI, Reset and IRQ
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* = $FFFA
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ADDR .WORD 0, _INI, 0
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