2017-06-04 20:38:34 +00:00
|
|
|
#include "stdafx.h"
|
|
|
|
#include "Z80.h"
|
|
|
|
|
|
|
|
// based on http://www.z80.info/decoding.htm
|
2017-08-30 22:17:34 +00:00
|
|
|
|
2017-09-07 00:04:09 +00:00
|
|
|
EightBit::Z80::Z80(Bus& bus, InputOutput& ports)
|
|
|
|
: IntelProcessor(bus),
|
2017-11-10 22:41:50 +00:00
|
|
|
m_ports(ports) {
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-05 14:48:15 +00:00
|
|
|
EightBit::register16_t& EightBit::Z80::AF() {
|
|
|
|
return m_accumulatorFlags[m_accumulatorFlagsSet];
|
|
|
|
}
|
|
|
|
|
|
|
|
EightBit::register16_t& EightBit::Z80::BC() {
|
|
|
|
return m_registers[m_registerSet][BC_IDX];
|
|
|
|
}
|
|
|
|
|
|
|
|
EightBit::register16_t& EightBit::Z80::DE() {
|
|
|
|
return m_registers[m_registerSet][DE_IDX];
|
|
|
|
}
|
|
|
|
|
|
|
|
EightBit::register16_t& EightBit::Z80::HL() {
|
|
|
|
return m_registers[m_registerSet][HL_IDX];
|
|
|
|
}
|
|
|
|
|
2017-06-05 21:39:15 +00:00
|
|
|
void EightBit::Z80::reset() {
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-09-01 15:01:40 +00:00
|
|
|
IntelProcessor::reset();
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-12-10 21:41:48 +00:00
|
|
|
raise(M1());
|
|
|
|
|
2017-09-01 15:01:40 +00:00
|
|
|
di();
|
2017-06-04 20:38:34 +00:00
|
|
|
IM() = 0;
|
|
|
|
|
2017-09-01 15:01:40 +00:00
|
|
|
REFRESH() = 0;
|
|
|
|
IV() = 0xff;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
|
|
|
exxAF();
|
|
|
|
exx();
|
|
|
|
|
|
|
|
AF().word = 0xffff;
|
|
|
|
|
|
|
|
BC().word = 0xffff;
|
|
|
|
DE().word = 0xffff;
|
|
|
|
HL().word = 0xffff;
|
|
|
|
|
|
|
|
IX().word = 0xffff;
|
|
|
|
IY().word = 0xffff;
|
|
|
|
|
2017-09-01 15:01:40 +00:00
|
|
|
m_prefixCB = m_prefixDD = m_prefixED = m_prefixFD = false;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-11 20:08:40 +00:00
|
|
|
void EightBit::Z80::di() {
|
2017-06-04 20:38:34 +00:00
|
|
|
IFF1() = IFF2() = false;
|
|
|
|
}
|
|
|
|
|
2017-06-11 20:08:40 +00:00
|
|
|
void EightBit::Z80::ei() {
|
2017-06-04 20:38:34 +00:00
|
|
|
IFF1() = IFF2() = true;
|
|
|
|
}
|
|
|
|
|
2017-07-22 09:05:35 +00:00
|
|
|
void EightBit::Z80::increment(uint8_t& f, uint8_t& operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF);
|
2017-07-22 09:05:35 +00:00
|
|
|
adjustSZXY<Z80>(f, ++operand);
|
|
|
|
setFlag(f, VF, operand == Bit7);
|
|
|
|
clearFlag(f, HC, lowNibble(operand));
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-07-22 09:05:35 +00:00
|
|
|
void EightBit::Z80::decrement(uint8_t& f, uint8_t& operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, NF);
|
2017-07-22 09:05:35 +00:00
|
|
|
clearFlag(f, HC, lowNibble(operand));
|
|
|
|
adjustSZXY<Z80>(f, --operand);
|
|
|
|
setFlag(f, VF, operand == Mask7);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
bool EightBit::Z80::jrConditionalFlag(uint8_t& f, const int flag) {
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (flag) {
|
|
|
|
case 0: // NZ
|
2017-06-26 22:22:32 +00:00
|
|
|
return jrConditional(!(f & ZF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 1: // Z
|
2017-06-26 22:22:32 +00:00
|
|
|
return jrConditional(f & ZF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 2: // NC
|
2017-06-26 22:22:32 +00:00
|
|
|
return jrConditional(!(f & CF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 3: // C
|
2017-06-26 22:22:32 +00:00
|
|
|
return jrConditional(f & CF);
|
2017-07-02 16:38:19 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-06-11 20:08:40 +00:00
|
|
|
throw std::logic_error("Unhandled JR conditional");
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
bool EightBit::Z80::jumpConditionalFlag(uint8_t& f, const int flag) {
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (flag) {
|
|
|
|
case 0: // NZ
|
2017-06-26 22:22:32 +00:00
|
|
|
return jumpConditional(!(f & ZF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 1: // Z
|
2017-06-26 22:22:32 +00:00
|
|
|
return jumpConditional(f & ZF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 2: // NC
|
2017-06-26 22:22:32 +00:00
|
|
|
return jumpConditional(!(f & CF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 3: // C
|
2017-06-26 22:22:32 +00:00
|
|
|
return jumpConditional(f & CF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 4: // PO
|
2017-06-26 22:22:32 +00:00
|
|
|
return jumpConditional(!(f & PF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 5: // PE
|
2017-06-26 22:22:32 +00:00
|
|
|
return jumpConditional(f & PF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 6: // P
|
2017-06-26 22:22:32 +00:00
|
|
|
return jumpConditional(!(f & SF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 7: // M
|
2017-06-26 22:22:32 +00:00
|
|
|
return jumpConditional(f & SF);
|
2017-07-02 16:38:19 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-06-11 20:08:40 +00:00
|
|
|
throw std::logic_error("Unhandled JP conditional");
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-05 21:39:15 +00:00
|
|
|
void EightBit::Z80::retn() {
|
2017-06-04 20:38:34 +00:00
|
|
|
ret();
|
|
|
|
IFF1() = IFF2();
|
|
|
|
}
|
|
|
|
|
2017-06-05 21:39:15 +00:00
|
|
|
void EightBit::Z80::reti() {
|
2017-06-04 20:38:34 +00:00
|
|
|
retn();
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
bool EightBit::Z80::returnConditionalFlag(uint8_t& f, const int flag) {
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (flag) {
|
|
|
|
case 0: // NZ
|
2017-06-26 22:22:32 +00:00
|
|
|
return returnConditional(!(f & ZF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 1: // Z
|
2017-06-26 22:22:32 +00:00
|
|
|
return returnConditional(f & ZF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 2: // NC
|
2017-06-26 22:22:32 +00:00
|
|
|
return returnConditional(!(f & CF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 3: // C
|
2017-06-26 22:22:32 +00:00
|
|
|
return returnConditional(f & CF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 4: // PO
|
2017-06-26 22:22:32 +00:00
|
|
|
return returnConditional(!(f & PF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 5: // PE
|
2017-06-26 22:22:32 +00:00
|
|
|
return returnConditional(f & PF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 6: // P
|
2017-06-26 22:22:32 +00:00
|
|
|
return returnConditional(!(f & SF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 7: // M
|
2017-06-26 22:22:32 +00:00
|
|
|
return returnConditional(f & SF);
|
2017-07-02 16:38:19 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-06-11 20:08:40 +00:00
|
|
|
throw std::logic_error("Unhandled RET conditional");
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
bool EightBit::Z80::callConditionalFlag(uint8_t& f, const int flag) {
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (flag) {
|
|
|
|
case 0: // NZ
|
2017-06-26 22:22:32 +00:00
|
|
|
return callConditional(!(f & ZF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 1: // Z
|
2017-06-26 22:22:32 +00:00
|
|
|
return callConditional(f & ZF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 2: // NC
|
2017-06-26 22:22:32 +00:00
|
|
|
return callConditional(!(f & CF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 3: // C
|
2017-06-26 22:22:32 +00:00
|
|
|
return callConditional(f & CF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 4: // PO
|
2017-06-26 22:22:32 +00:00
|
|
|
return callConditional(!(f & PF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 5: // PE
|
2017-06-26 22:22:32 +00:00
|
|
|
return callConditional(f & PF);
|
2017-06-04 20:38:34 +00:00
|
|
|
case 6: // P
|
2017-06-26 22:22:32 +00:00
|
|
|
return callConditional(!(f & SF));
|
2017-06-04 20:38:34 +00:00
|
|
|
case 7: // M
|
2017-06-26 22:22:32 +00:00
|
|
|
return callConditional(f & SF);
|
2017-07-02 16:38:19 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-06-11 20:08:40 +00:00
|
|
|
throw std::logic_error("Unhandled CALL conditional");
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::sbc(uint8_t& f, register16_t& operand, const register16_t value) {
|
2017-06-18 17:14:39 +00:00
|
|
|
|
2017-07-03 20:42:18 +00:00
|
|
|
MEMPTR() = operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-07-03 20:42:18 +00:00
|
|
|
const auto beforeNegative = MEMPTR().high & SF;
|
2017-06-26 22:22:32 +00:00
|
|
|
const auto valueNegative = value.high & SF;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-07-03 20:42:18 +00:00
|
|
|
const auto result = MEMPTR().word - value.word - (f & CF);
|
2017-06-04 20:38:34 +00:00
|
|
|
operand.word = result;
|
|
|
|
|
2017-06-26 22:22:32 +00:00
|
|
|
const auto afterNegative = operand.high & SF;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, SF, afterNegative);
|
|
|
|
clearFlag(f, ZF, operand.word);
|
2017-07-03 20:42:18 +00:00
|
|
|
adjustHalfCarrySub(f, MEMPTR().high, value.high, operand.high);
|
2017-06-18 17:14:39 +00:00
|
|
|
adjustOverflowSub(f, beforeNegative, valueNegative, afterNegative);
|
|
|
|
setFlag(f, NF);
|
|
|
|
setFlag(f, CF, result & Bit16);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand.high);
|
2017-07-03 20:42:18 +00:00
|
|
|
|
|
|
|
MEMPTR().word++;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::adc(uint8_t& f, register16_t& operand, const register16_t value) {
|
2017-06-18 17:14:39 +00:00
|
|
|
|
2017-07-03 20:42:18 +00:00
|
|
|
MEMPTR() = operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-07-03 20:42:18 +00:00
|
|
|
const auto beforeNegative = MEMPTR().high & SF;
|
2017-06-26 22:22:32 +00:00
|
|
|
const auto valueNegative = value.high & SF;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-07-03 20:42:18 +00:00
|
|
|
const auto result = MEMPTR().word + value.word + (f & CF);
|
2017-06-04 20:38:34 +00:00
|
|
|
operand.word = result;
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto afterNegative = operand.high & SF;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, SF, afterNegative);
|
2017-06-26 22:22:32 +00:00
|
|
|
clearFlag(f, ZF, operand.word);
|
2017-07-03 20:42:18 +00:00
|
|
|
adjustHalfCarryAdd(f, MEMPTR().high, value.high, operand.high);
|
2017-06-18 17:14:39 +00:00
|
|
|
adjustOverflowAdd(f, beforeNegative, valueNegative, afterNegative);
|
|
|
|
clearFlag(f, NF);
|
|
|
|
setFlag(f, CF, result & Bit16);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand.high);
|
2017-07-03 20:42:18 +00:00
|
|
|
|
|
|
|
MEMPTR().word++;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::add(uint8_t& f, register16_t& operand, const register16_t value) {
|
2017-06-18 17:14:39 +00:00
|
|
|
|
2017-07-03 20:42:18 +00:00
|
|
|
MEMPTR() = operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-07-03 20:42:18 +00:00
|
|
|
const auto result = MEMPTR().word + value.word;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
|
|
|
operand.word = result;
|
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF);
|
|
|
|
setFlag(f, CF, result & Bit16);
|
2017-07-03 20:42:18 +00:00
|
|
|
adjustHalfCarryAdd(f, MEMPTR().high, value.high, operand.high);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand.high);
|
2017-07-03 20:42:18 +00:00
|
|
|
|
|
|
|
MEMPTR().word++;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::add(uint8_t& f, uint8_t& operand, const uint8_t value, const int carry) {
|
2017-06-18 17:14:39 +00:00
|
|
|
|
2017-06-04 20:38:34 +00:00
|
|
|
register16_t result;
|
|
|
|
result.word = operand + value + carry;
|
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
adjustHalfCarryAdd(f, operand, value, result.low);
|
|
|
|
adjustOverflowAdd(f, operand, value, result.low);
|
2017-06-04 20:38:34 +00:00
|
|
|
|
|
|
|
operand = result.low;
|
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF);
|
|
|
|
setFlag(f, CF, result.word & Bit8);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustSZXY<Z80>(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::adc(uint8_t& f, uint8_t& operand, const uint8_t value) {
|
2017-06-26 22:22:32 +00:00
|
|
|
add(f, operand, value, f & CF);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::subtract(uint8_t& f, uint8_t& operand, const uint8_t value, const int carry) {
|
2017-06-18 17:14:39 +00:00
|
|
|
|
2017-06-04 20:38:34 +00:00
|
|
|
register16_t result;
|
|
|
|
result.word = operand - value - carry;
|
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
adjustHalfCarrySub(f, operand, value, result.low);
|
|
|
|
adjustOverflowSub(f, operand, value, result.low);
|
2017-06-04 20:38:34 +00:00
|
|
|
|
|
|
|
operand = result.low;
|
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, NF);
|
|
|
|
setFlag(f, CF, result.word & Bit8);
|
2017-06-26 22:22:32 +00:00
|
|
|
adjustSZ<Z80>(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::sub(uint8_t& f, uint8_t& operand, const uint8_t value, const int carry) {
|
2017-06-26 22:22:32 +00:00
|
|
|
subtract(f, operand, value, carry);
|
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::sbc(uint8_t& f, uint8_t& operand, const uint8_t value) {
|
2017-06-26 22:22:32 +00:00
|
|
|
sub(f, operand, value, f & CF);
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::andr(uint8_t& f, uint8_t& operand, const uint8_t value) {
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, HC);
|
|
|
|
clearFlag(f, CF | NF);
|
2017-06-29 11:19:22 +00:00
|
|
|
adjustSZPXY<Z80>(f, operand &= value);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::xorr(uint8_t& f, uint8_t& operand, const uint8_t value) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, HC | CF | NF);
|
2017-06-29 11:19:22 +00:00
|
|
|
adjustSZPXY<Z80>(f, operand ^= value);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::orr(uint8_t& f, uint8_t& operand, const uint8_t value) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, HC | CF | NF);
|
2017-06-29 11:19:22 +00:00
|
|
|
adjustSZPXY<Z80>(f, operand |= value);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::compare(uint8_t& f, uint8_t check, const uint8_t value) {
|
2017-06-26 22:22:32 +00:00
|
|
|
subtract(f, check, value);
|
|
|
|
adjustXY<Z80>(f, value);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::rlc(uint8_t& f, uint8_t operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-10-29 20:15:49 +00:00
|
|
|
const auto carry = operand & Bit7;
|
|
|
|
operand = (operand << 1) | (carry >> 7);
|
|
|
|
setFlag(f, CF, carry);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-15 21:21:26 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::rrc(uint8_t& f, uint8_t operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-10-29 20:15:49 +00:00
|
|
|
const auto carry = operand & Bit0;
|
|
|
|
operand = (operand >> 1) | (carry << 7);
|
|
|
|
setFlag(f, CF, carry);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-15 21:21:26 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::rl(uint8_t& f, uint8_t operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-29 11:19:22 +00:00
|
|
|
const auto carry = f & CF;
|
|
|
|
setFlag(f, CF, operand & Bit7);
|
|
|
|
operand = (operand << 1) | carry;
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-15 21:21:26 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::rr(uint8_t& f, uint8_t operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-29 11:19:22 +00:00
|
|
|
const auto carry = f & CF;
|
|
|
|
setFlag(f, CF, operand & Bit0);
|
|
|
|
operand = (operand >> 1) | (carry << 7);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-15 21:21:26 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
//
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::sla(uint8_t& f, uint8_t operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-29 11:19:22 +00:00
|
|
|
setFlag(f, CF, operand & Bit7);
|
|
|
|
operand <<= 1;
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-15 21:21:26 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::sra(uint8_t& f, uint8_t operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-29 11:19:22 +00:00
|
|
|
setFlag(f, CF, operand & Bit0);
|
2017-10-29 20:15:49 +00:00
|
|
|
operand = (operand >> 1) | (operand & Bit7);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-15 21:21:26 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::sll(uint8_t& f, uint8_t operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-29 11:19:22 +00:00
|
|
|
setFlag(f, CF, operand & Bit7);
|
|
|
|
operand = (operand << 1) | Bit0;
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-15 21:21:26 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::srl(uint8_t& f, uint8_t operand) {
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-29 11:19:22 +00:00
|
|
|
setFlag(f, CF, operand & Bit0);
|
|
|
|
operand = (operand >> 1) & ~Bit7;
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, ZF, operand);
|
2017-06-15 21:21:26 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-08-06 16:06:48 +00:00
|
|
|
uint8_t EightBit::Z80::bit(uint8_t& f, int n, uint8_t operand) {
|
2017-06-26 22:22:32 +00:00
|
|
|
setFlag(f, HC);
|
|
|
|
clearFlag(f, NF);
|
2017-07-02 16:38:19 +00:00
|
|
|
const auto discarded = operand & (1 << n);
|
2017-06-26 22:22:32 +00:00
|
|
|
adjustSZXY<Z80>(f, discarded);
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, PF, discarded);
|
2017-06-19 12:53:00 +00:00
|
|
|
return operand;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
uint8_t EightBit::Z80::res(int n, const uint8_t operand) {
|
2017-08-06 16:06:48 +00:00
|
|
|
return operand & ~(1 << n);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
uint8_t EightBit::Z80::set(int n, const uint8_t operand) {
|
2017-08-06 16:06:48 +00:00
|
|
|
return operand | (1 << n);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::neg(uint8_t& a, uint8_t& f) {
|
|
|
|
|
|
|
|
setFlag(f, PF, a == Bit7);
|
|
|
|
setFlag(f, CF, a);
|
|
|
|
setFlag(f, NF);
|
|
|
|
|
2017-06-26 22:22:32 +00:00
|
|
|
const auto original = a;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
a = (~a + 1); // two's complement
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
adjustHalfCarrySub(f, 0U, original, a);
|
|
|
|
adjustOverflowSub(f, 0U, original, a);
|
|
|
|
|
|
|
|
adjustSZXY<Z80>(f, a);
|
|
|
|
}
|
|
|
|
|
|
|
|
void EightBit::Z80::daa(uint8_t& a, uint8_t& f) {
|
2017-06-18 17:14:39 +00:00
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
auto updated = a;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto lowAdjust = (f & HC) || (lowNibble(a) > 9);
|
|
|
|
const auto highAdjust = (f & CF) || (a > 0x99);
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
if (f & NF) {
|
2017-06-04 20:38:34 +00:00
|
|
|
if (lowAdjust)
|
2017-06-28 14:39:31 +00:00
|
|
|
updated -= 6;
|
2017-06-04 20:38:34 +00:00
|
|
|
if (highAdjust)
|
2017-06-28 14:39:31 +00:00
|
|
|
updated -= 0x60;
|
2017-06-04 20:38:34 +00:00
|
|
|
} else {
|
|
|
|
if (lowAdjust)
|
2017-06-28 14:39:31 +00:00
|
|
|
updated += 6;
|
2017-06-04 20:38:34 +00:00
|
|
|
if (highAdjust)
|
2017-06-28 14:39:31 +00:00
|
|
|
updated += 0x60;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-07-20 11:17:03 +00:00
|
|
|
f = (f & (CF | NF)) | (a > 0x99 ? CF : 0) | ((a ^ updated) & HC);
|
2017-06-28 14:39:31 +00:00
|
|
|
a = updated;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustSZPXY<Z80>(f, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::cpl(uint8_t& a, uint8_t& f) {
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, HC | NF);
|
2017-06-29 11:19:22 +00:00
|
|
|
adjustXY<Z80>(f, a = ~a);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::scf(const uint8_t a, uint8_t& f) {
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, CF);
|
|
|
|
clearFlag(f, HC | NF);
|
2017-06-29 11:19:22 +00:00
|
|
|
adjustXY<Z80>(f, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::ccf(const uint8_t a, uint8_t& f) {
|
2017-06-29 11:19:22 +00:00
|
|
|
clearFlag(f, NF);
|
2017-06-26 22:22:32 +00:00
|
|
|
const auto carry = f & CF;
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, HC, carry);
|
|
|
|
clearFlag(f, CF, carry);
|
2017-06-28 14:39:31 +00:00
|
|
|
adjustXY<Z80>(f, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-05 21:39:15 +00:00
|
|
|
void EightBit::Z80::xhtl(register16_t& operand) {
|
2017-08-28 17:52:48 +00:00
|
|
|
MEMPTR().low = getByte(SP());
|
|
|
|
setByte(operand.low);
|
2017-06-04 20:38:34 +00:00
|
|
|
operand.low = MEMPTR().low;
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().ADDRESS().word++;
|
2017-08-28 17:52:48 +00:00
|
|
|
MEMPTR().high = getByte();
|
|
|
|
setByte(operand.high);
|
2017-06-04 20:38:34 +00:00
|
|
|
operand.high = MEMPTR().high;
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::blockCompare(const uint8_t a, uint8_t& f) {
|
2017-06-18 17:14:39 +00:00
|
|
|
|
2017-08-28 17:52:48 +00:00
|
|
|
const auto value = getByte(HL());
|
2017-06-19 12:53:00 +00:00
|
|
|
uint8_t result = a - value;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, PF, --BC().word);
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustSZ<Z80>(f, result);
|
2017-06-19 12:53:00 +00:00
|
|
|
adjustHalfCarrySub(f, a, value, result);
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, NF);
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-07-02 16:38:19 +00:00
|
|
|
result -= ((f & HC) >> 4);
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, YF, result & Bit1);
|
|
|
|
setFlag(f, XF, result & Bit3);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::cpi(const uint8_t a, uint8_t& f) {
|
2017-06-26 22:22:32 +00:00
|
|
|
blockCompare(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
HL().word++;
|
|
|
|
MEMPTR().word++;
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::cpd(const uint8_t a, uint8_t& f) {
|
2017-06-26 22:22:32 +00:00
|
|
|
blockCompare(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
HL().word--;
|
|
|
|
MEMPTR().word--;
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
bool EightBit::Z80::cpir(const uint8_t a, uint8_t& f) {
|
2017-06-26 22:22:32 +00:00
|
|
|
cpi(a, f);
|
2017-06-19 12:53:00 +00:00
|
|
|
MEMPTR() = PC();
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto again = (f & PF) && !(f & ZF); // See CPI
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(again))
|
2017-06-12 13:33:00 +00:00
|
|
|
MEMPTR().word--;
|
|
|
|
return again;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
bool EightBit::Z80::cpdr(const uint8_t a, uint8_t& f) {
|
2017-06-26 22:22:32 +00:00
|
|
|
cpd(a, f);
|
2017-06-19 12:53:00 +00:00
|
|
|
MEMPTR().word = PC().word - 1;
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto again = (f & PF) && !(f & ZF); // See CPD
|
2017-11-20 19:17:49 +00:00
|
|
|
if (UNLIKELY(!again))
|
2017-06-12 13:33:00 +00:00
|
|
|
MEMPTR().word--;
|
|
|
|
return again;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::blockLoad(const uint8_t a, uint8_t& f, const register16_t source, const register16_t destination) {
|
2017-08-28 17:52:48 +00:00
|
|
|
const auto value = getByte(source);
|
|
|
|
setByte(destination, value);
|
2017-08-06 16:06:48 +00:00
|
|
|
const auto xy = a + value;
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, XF, xy & 8);
|
|
|
|
setFlag(f, YF, xy & 2);
|
|
|
|
clearFlag(f, NF | HC);
|
|
|
|
setFlag(f, PF, --BC().word);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::ldd(const uint8_t a, uint8_t& f) {
|
2017-06-28 14:39:31 +00:00
|
|
|
blockLoad(a, f, HL(), DE());
|
2017-06-04 20:38:34 +00:00
|
|
|
HL().word--;
|
|
|
|
DE().word--;
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::ldi(const uint8_t a, uint8_t& f) {
|
2017-06-28 14:39:31 +00:00
|
|
|
blockLoad(a, f, HL(), DE());
|
2017-06-04 20:38:34 +00:00
|
|
|
HL().word++;
|
|
|
|
DE().word++;
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
bool EightBit::Z80::ldir(const uint8_t a, uint8_t& f) {
|
2017-06-28 14:39:31 +00:00
|
|
|
ldi(a, f);
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto again = (f & PF) != 0;
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(again)) // See LDI
|
2017-06-19 12:53:00 +00:00
|
|
|
MEMPTR().word = PC().word - 1;
|
2017-06-12 13:33:00 +00:00
|
|
|
return again;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
bool EightBit::Z80::lddr(const uint8_t a, uint8_t& f) {
|
2017-06-28 14:39:31 +00:00
|
|
|
ldd(a, f);
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto again = (f & PF) != 0;
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(again)) // See LDR
|
2017-06-19 12:53:00 +00:00
|
|
|
MEMPTR().word = PC().word - 1;
|
2017-06-12 13:33:00 +00:00
|
|
|
return again;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::ini(uint8_t& f) {
|
2017-09-07 00:04:09 +00:00
|
|
|
MEMPTR() = BUS().ADDRESS() = BC();
|
2017-06-07 21:54:55 +00:00
|
|
|
MEMPTR().word++;
|
2017-06-04 20:38:34 +00:00
|
|
|
readPort();
|
2017-09-07 00:04:09 +00:00
|
|
|
auto value = BUS().DATA();
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(HL().word++, value);
|
2017-07-22 09:05:35 +00:00
|
|
|
decrement(f, B());
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, NF);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::ind(uint8_t& f) {
|
2017-09-07 00:04:09 +00:00
|
|
|
MEMPTR() = BUS().ADDRESS() = BC();
|
2017-06-07 21:54:55 +00:00
|
|
|
MEMPTR().word--;
|
2017-06-04 20:38:34 +00:00
|
|
|
readPort();
|
2017-09-07 00:04:09 +00:00
|
|
|
auto value = BUS().DATA();
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(HL().word--, value);
|
2017-07-22 09:05:35 +00:00
|
|
|
decrement(f, B());
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, NF);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
bool EightBit::Z80::inir(uint8_t& f) {
|
|
|
|
ini(f);
|
|
|
|
return !(f & ZF); // See INI
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
bool EightBit::Z80::indr(uint8_t& f) {
|
|
|
|
ind(f);
|
|
|
|
return !(f & ZF); // See IND
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::blockOut(uint8_t& f) {
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto value = getByte();
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().ADDRESS() = BC();
|
2017-06-04 20:38:34 +00:00
|
|
|
writePort();
|
2017-07-22 09:05:35 +00:00
|
|
|
decrement(f, B());
|
2017-06-18 17:14:39 +00:00
|
|
|
setFlag(f, NF, value & Bit7);
|
2017-07-07 19:55:32 +00:00
|
|
|
setFlag(f, HC | CF, (L() + value) > 0xff);
|
|
|
|
adjustParity<Z80>(f, ((value + L()) & 7) ^ B());
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::outi(uint8_t& f) {
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().ADDRESS().word = HL().word++;
|
2017-06-28 14:39:31 +00:00
|
|
|
blockOut(f);
|
2017-06-04 20:38:34 +00:00
|
|
|
MEMPTR().word = BC().word + 1;
|
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::outd(uint8_t& f) {
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().ADDRESS().word = HL().word--;
|
2017-06-28 14:39:31 +00:00
|
|
|
blockOut(f);
|
2017-06-04 20:38:34 +00:00
|
|
|
MEMPTR().word = BC().word - 1;
|
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
bool EightBit::Z80::otir(uint8_t& f) {
|
|
|
|
outi(f);
|
|
|
|
return !(f & ZF); // See OUTI
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
bool EightBit::Z80::otdr(uint8_t& f) {
|
|
|
|
outd(f);
|
|
|
|
return !(f & ZF); // See OUTD
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::rrd(uint8_t& a, uint8_t& f) {
|
2017-06-12 13:33:00 +00:00
|
|
|
MEMPTR() = HL();
|
2017-08-06 16:06:48 +00:00
|
|
|
memptrReference();
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto memory = getByte();
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(promoteNibble(a) | highNibble(memory));
|
2017-06-19 12:53:00 +00:00
|
|
|
a = (a & 0xf0) | lowNibble(memory);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustSZPXY<Z80>(f, a);
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-06-28 14:39:31 +00:00
|
|
|
void EightBit::Z80::rld(uint8_t& a, uint8_t& f) {
|
2017-06-12 13:33:00 +00:00
|
|
|
MEMPTR() = HL();
|
2017-08-06 16:06:48 +00:00
|
|
|
memptrReference();
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto memory = getByte();
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(promoteNibble(memory) | lowNibble(a));
|
2017-06-19 12:53:00 +00:00
|
|
|
a = (a & 0xf0) | highNibble(memory);
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustSZPXY<Z80>(f, a);
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::writePort(const uint8_t port, const uint8_t data) {
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().ADDRESS().low = port;
|
|
|
|
BUS().ADDRESS().high = data;
|
|
|
|
MEMPTR() = BUS().ADDRESS();
|
|
|
|
BUS().placeDATA(data);
|
2017-06-28 14:39:31 +00:00
|
|
|
writePort();
|
|
|
|
MEMPTR().low++;
|
|
|
|
}
|
|
|
|
|
|
|
|
void EightBit::Z80::writePort() {
|
2017-09-07 00:04:09 +00:00
|
|
|
m_ports.write(BUS().ADDRESS().low, BUS().DATA());
|
2017-06-28 14:39:31 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::readPort(const uint8_t port, uint8_t& a) {
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().ADDRESS().low = port;
|
|
|
|
BUS().ADDRESS().high = a;
|
|
|
|
MEMPTR() = BUS().ADDRESS();
|
2017-06-28 14:39:31 +00:00
|
|
|
readPort();
|
2017-09-07 00:04:09 +00:00
|
|
|
a = BUS().DATA();
|
2017-06-28 14:39:31 +00:00
|
|
|
MEMPTR().low++;
|
|
|
|
}
|
|
|
|
|
|
|
|
void EightBit::Z80::readPort() {
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().placeDATA(m_ports.read(BUS().ADDRESS().low));
|
2017-06-28 14:39:31 +00:00
|
|
|
}
|
|
|
|
|
2017-06-05 21:39:15 +00:00
|
|
|
int EightBit::Z80::step() {
|
2017-06-04 20:38:34 +00:00
|
|
|
ExecutingInstruction.fire(*this);
|
2017-06-15 21:21:26 +00:00
|
|
|
m_displaced = m_prefixCB = m_prefixDD = m_prefixED = m_prefixFD = false;
|
2017-11-03 22:05:01 +00:00
|
|
|
resetCycles();
|
2017-12-03 00:57:47 +00:00
|
|
|
if (LIKELY(powered())) {
|
2017-12-10 21:41:48 +00:00
|
|
|
lower(M1());
|
|
|
|
if (UNLIKELY(lowered(NMI()))) {
|
|
|
|
raise(HALT());
|
|
|
|
raise(NMI());
|
|
|
|
IFF1() = false;
|
2017-12-03 00:57:47 +00:00
|
|
|
restart(0x66);
|
|
|
|
addCycles(13);
|
|
|
|
return cycles();
|
2017-12-04 21:59:38 +00:00
|
|
|
}
|
2017-12-10 21:41:48 +00:00
|
|
|
if (UNLIKELY(lowered(INT()))) {
|
|
|
|
raise(HALT());
|
|
|
|
raise(INT());
|
2017-12-04 21:59:38 +00:00
|
|
|
if (IFF1()) {
|
|
|
|
di();
|
|
|
|
switch (IM()) {
|
2017-12-04 23:41:49 +00:00
|
|
|
case 0: // i8080 equivalent
|
2017-12-04 21:59:38 +00:00
|
|
|
return execute(BUS().DATA());
|
|
|
|
case 1:
|
|
|
|
restart(7 << 3);
|
|
|
|
addCycles(13);
|
|
|
|
return cycles();
|
|
|
|
case 2:
|
2017-12-10 21:41:48 +00:00
|
|
|
MEMPTR().low = BUS().DATA();
|
|
|
|
MEMPTR().high = IV();
|
|
|
|
call();
|
2017-12-04 21:59:38 +00:00
|
|
|
addCycles(19);
|
|
|
|
return cycles();
|
|
|
|
default:
|
|
|
|
UNREACHABLE;
|
|
|
|
}
|
2017-12-03 00:57:47 +00:00
|
|
|
}
|
|
|
|
}
|
2017-12-10 21:41:48 +00:00
|
|
|
if (UNLIKELY(lowered(HALT())))
|
|
|
|
return execute(0); // NOP
|
2017-12-04 21:59:38 +00:00
|
|
|
return execute(fetchByte());
|
2017-12-03 00:57:47 +00:00
|
|
|
}
|
|
|
|
return cycles();
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
int EightBit::Z80::execute(const uint8_t opcode) {
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-12-10 21:41:48 +00:00
|
|
|
if (UNLIKELY(raised(M1())))
|
2017-06-04 20:38:34 +00:00
|
|
|
throw std::logic_error("M1 cannot be high");
|
|
|
|
|
2017-12-02 14:53:35 +00:00
|
|
|
if (LIKELY(!(m_prefixCB && m_displaced))) {
|
2017-06-29 11:19:22 +00:00
|
|
|
++REFRESH();
|
2017-12-10 21:41:48 +00:00
|
|
|
raise(M1());
|
2017-06-29 11:19:22 +00:00
|
|
|
}
|
|
|
|
|
2017-07-21 12:33:17 +00:00
|
|
|
const auto& decoded = getDecodedOpcode(opcode);
|
2017-06-26 22:22:32 +00:00
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto x = decoded.x;
|
|
|
|
const auto y = decoded.y;
|
|
|
|
const auto z = decoded.z;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto p = decoded.p;
|
|
|
|
const auto q = decoded.q;
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-06-29 20:25:58 +00:00
|
|
|
auto prefixed = m_prefixCB || m_prefixED;
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(!prefixed)) {
|
2017-06-04 20:38:34 +00:00
|
|
|
executeOther(x, y, z, p, q);
|
2017-06-29 20:25:58 +00:00
|
|
|
} else {
|
|
|
|
if (m_prefixCB)
|
|
|
|
executeCB(x, y, z);
|
|
|
|
else if (m_prefixED)
|
|
|
|
executeED(x, y, z, p, q);
|
2017-11-18 14:29:30 +00:00
|
|
|
else
|
|
|
|
UNREACHABLE;
|
2017-06-29 20:25:58 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
|
2017-11-20 19:17:49 +00:00
|
|
|
if (UNLIKELY(cycles() == 0))
|
2017-06-04 20:38:34 +00:00
|
|
|
throw std::logic_error("Unhandled opcode");
|
|
|
|
|
2017-11-03 22:05:01 +00:00
|
|
|
return cycles();
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::executeCB(const int x, const int y, const int z) {
|
2017-06-28 14:39:31 +00:00
|
|
|
auto& a = A();
|
2017-06-18 17:14:39 +00:00
|
|
|
auto& f = F();
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (x) {
|
2017-08-06 16:06:48 +00:00
|
|
|
case 0: { // rot[y] r[z]
|
2017-11-20 19:17:49 +00:00
|
|
|
auto operand = LIKELY(!m_displaced) ? R(z, a) : getByte(displacedAddress());
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (y) {
|
|
|
|
case 0:
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = rlc(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1:
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = rrc(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2:
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = rl(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3:
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = rr(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 4:
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = sla(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5:
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = sra(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6:
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = sll(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7:
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = srl(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-08-08 12:38:27 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-08-06 16:06:48 +00:00
|
|
|
adjustSZP<Z80>(f, operand);
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(!m_displaced)) {
|
2017-11-18 14:29:30 +00:00
|
|
|
R(z, a, operand);
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(z == 6))
|
2017-11-18 14:29:30 +00:00
|
|
|
addCycles(7);
|
|
|
|
} else {
|
2017-12-02 14:53:35 +00:00
|
|
|
if (LIKELY(z != 6))
|
2017-08-06 16:06:48 +00:00
|
|
|
R2(z, a, operand);
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(operand);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(15);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(8);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-08-06 16:06:48 +00:00
|
|
|
} case 1: // BIT y, r[z]
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(8);
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(!m_displaced)) {
|
2017-11-18 14:29:30 +00:00
|
|
|
const auto operand = bit(f, y, R(z, a));
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(z == 6)) {
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, MEMPTR().high);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
} else {
|
2017-06-22 15:57:38 +00:00
|
|
|
adjustXY<Z80>(f, operand);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-06-29 20:25:58 +00:00
|
|
|
} else {
|
2017-08-28 17:52:48 +00:00
|
|
|
bit(f, y, getByte(displacedAddress()));
|
2017-06-29 20:25:58 +00:00
|
|
|
adjustXY<Z80>(f, MEMPTR().high);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(12);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 2: // RES y, r[z]
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(8);
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(!m_displaced)) {
|
2017-08-06 16:06:48 +00:00
|
|
|
R(z, a, res(y, R(z, a)));
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(z == 6))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-06-29 20:25:58 +00:00
|
|
|
} else {
|
2017-08-28 17:52:48 +00:00
|
|
|
auto operand = getByte(displacedAddress());
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = res(y, operand);
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(operand);
|
2017-08-06 16:06:48 +00:00
|
|
|
R2(z, a, operand);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(15);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3: // SET y, r[z]
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(8);
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(!m_displaced)) {
|
2017-08-06 16:06:48 +00:00
|
|
|
R(z, a, set(y, R(z, a)));
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(z == 6))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-06-29 20:25:58 +00:00
|
|
|
} else {
|
2017-08-28 17:52:48 +00:00
|
|
|
auto operand = getByte(displacedAddress());
|
2017-08-06 16:06:48 +00:00
|
|
|
operand = set(y, operand);
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(operand);
|
2017-08-06 16:06:48 +00:00
|
|
|
R2(z, a, operand);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(15);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
2017-06-29 20:25:58 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::executeED(const int x, const int y, const int z, const int p, const int q) {
|
2017-06-28 14:39:31 +00:00
|
|
|
auto& a = A();
|
2017-06-18 17:14:39 +00:00
|
|
|
auto& f = F();
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (x) {
|
|
|
|
case 0:
|
|
|
|
case 3: // Invalid instruction, equivalent to NONI followed by NOP
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(8);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
switch (z) {
|
|
|
|
case 0: // Input from port with 16-bit address
|
2017-09-07 00:04:09 +00:00
|
|
|
MEMPTR() = BUS().ADDRESS() = BC();
|
2017-06-07 21:54:55 +00:00
|
|
|
MEMPTR().word++;
|
2017-06-04 20:38:34 +00:00
|
|
|
readPort();
|
2017-12-02 14:53:35 +00:00
|
|
|
if (LIKELY(y != 6)) // IN r[y],(C)
|
2017-09-07 00:04:09 +00:00
|
|
|
R(y, a, BUS().DATA());
|
|
|
|
adjustSZPXY<Z80>(f, BUS().DATA());
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(12);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // Output to port with 16-bit address
|
2017-09-07 00:04:09 +00:00
|
|
|
MEMPTR() = BUS().ADDRESS() = BC();
|
2017-06-07 21:54:55 +00:00
|
|
|
MEMPTR().word++;
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(y == 6)) // OUT (C),0
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().placeDATA(0);
|
2017-06-04 20:38:34 +00:00
|
|
|
else // OUT (C),r[y]
|
2017-09-07 00:04:09 +00:00
|
|
|
BUS().placeDATA(R(y, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
writePort();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(12);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // 16-bit add/subtract with carry
|
|
|
|
switch (q) {
|
|
|
|
case 0: // SBC HL, rp[p]
|
2017-07-03 20:42:18 +00:00
|
|
|
sbc(f, HL2(), RP(p));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // ADC HL, rp[p]
|
2017-07-03 20:42:18 +00:00
|
|
|
adc(f, HL2(), RP(p));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(15);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // Retrieve/store register pair from/to immediate address
|
|
|
|
switch (q) {
|
|
|
|
case 0: // LD (nn), rp[p]
|
2017-06-07 21:54:55 +00:00
|
|
|
fetchWord();
|
|
|
|
setWordViaMemptr(RP(p));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // LD rp[p], (nn)
|
2017-06-07 21:54:55 +00:00
|
|
|
fetchWord();
|
|
|
|
getWordViaMemptr(RP(p));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(20);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 4: // Negate accumulator
|
2017-06-28 14:39:31 +00:00
|
|
|
neg(a, f);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(8);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // Return from interrupt
|
|
|
|
switch (y) {
|
|
|
|
case 1:
|
|
|
|
reti(); // RETI
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
retn(); // RETN
|
|
|
|
break;
|
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(14);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // Set interrupt mode
|
|
|
|
switch (y) {
|
|
|
|
case 0:
|
|
|
|
case 4:
|
|
|
|
IM() = 0;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
case 6:
|
|
|
|
IM() = 1;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
case 7:
|
|
|
|
IM() = 2;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
case 5:
|
|
|
|
IM() = 0;
|
2017-06-29 09:18:07 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(8);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // Assorted ops
|
|
|
|
switch (y) {
|
|
|
|
case 0: // LD I,A
|
2017-06-28 14:39:31 +00:00
|
|
|
IV() = a;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(9);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // LD R,A
|
2017-06-28 14:39:31 +00:00
|
|
|
REFRESH() = a;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(9);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // LD A,I
|
2017-06-28 14:39:31 +00:00
|
|
|
a = IV();
|
|
|
|
adjustSZXY<Z80>(f, a);
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
2017-06-28 14:39:31 +00:00
|
|
|
setFlag(f, PF, IFF2());
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(9);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // LD A,R
|
2017-06-28 14:39:31 +00:00
|
|
|
a = REFRESH();
|
|
|
|
adjustSZXY<Z80>(f, a);
|
2017-06-18 17:14:39 +00:00
|
|
|
clearFlag(f, NF | HC);
|
|
|
|
setFlag(f, PF, IFF2());
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(9);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 4: // RRD
|
2017-06-28 14:39:31 +00:00
|
|
|
rrd(a, f);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(18);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // RLD
|
2017-06-28 14:39:31 +00:00
|
|
|
rld(a, f);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(18);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // NOP
|
|
|
|
case 7: // NOP
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
switch (z) {
|
|
|
|
case 0: // LD
|
|
|
|
switch (y) {
|
|
|
|
case 4: // LDI
|
2017-06-28 14:39:31 +00:00
|
|
|
ldi(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // LDD
|
2017-06-28 14:39:31 +00:00
|
|
|
ldd(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // LDIR
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(ldir(a, f))) {
|
2017-06-19 12:53:00 +00:00
|
|
|
PC().word -= 2;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
2017-06-14 21:33:02 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // LDDR
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(lddr(a, f))) {
|
2017-06-19 12:53:00 +00:00
|
|
|
PC().word -= 2;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
2017-06-14 21:33:02 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 1: // CP
|
|
|
|
switch (y) {
|
|
|
|
case 4: // CPI
|
2017-06-28 14:39:31 +00:00
|
|
|
cpi(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // CPD
|
2017-06-28 14:39:31 +00:00
|
|
|
cpd(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // CPIR
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(cpir(a, f))) {
|
2017-06-19 12:53:00 +00:00
|
|
|
PC().word -= 2;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
2017-06-14 21:33:02 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // CPDR
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(cpdr(a, f))) {
|
2017-06-19 12:53:00 +00:00
|
|
|
PC().word -= 2;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
2017-06-14 21:33:02 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 2: // IN
|
|
|
|
switch (y) {
|
|
|
|
case 4: // INI
|
2017-06-28 14:39:31 +00:00
|
|
|
ini(f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // IND
|
2017-06-28 14:39:31 +00:00
|
|
|
ind(f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // INIR
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(inir(f))) {
|
2017-06-19 12:53:00 +00:00
|
|
|
PC().word -= 2;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
2017-06-14 21:33:02 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // INDR
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(indr(f))) {
|
2017-06-19 12:53:00 +00:00
|
|
|
PC().word -= 2;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
2017-06-14 21:33:02 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3: // OUT
|
|
|
|
switch (y) {
|
|
|
|
case 4: // OUTI
|
2017-06-28 14:39:31 +00:00
|
|
|
outi(f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // OUTD
|
2017-06-28 14:39:31 +00:00
|
|
|
outd(f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // OTIR
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(otir(f))) {
|
2017-06-19 12:53:00 +00:00
|
|
|
PC().word -= 2;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
2017-06-14 21:33:02 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // OTDR
|
2017-11-20 19:17:49 +00:00
|
|
|
if (LIKELY(otdr(f))) {
|
2017-06-19 12:53:00 +00:00
|
|
|
PC().word -= 2;
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
2017-06-14 21:33:02 +00:00
|
|
|
}
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(16);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-11-18 14:29:30 +00:00
|
|
|
void EightBit::Z80::executeOther(const int x, const int y, const int z, const int p, const int q) {
|
2017-06-28 14:39:31 +00:00
|
|
|
auto& a = A();
|
2017-06-18 17:14:39 +00:00
|
|
|
auto& f = F();
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (x) {
|
|
|
|
case 0:
|
|
|
|
switch (z) {
|
|
|
|
case 0: // Relative jumps and assorted ops
|
|
|
|
switch (y) {
|
|
|
|
case 0: // NOP
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // EX AF AF'
|
|
|
|
exxAF();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // DJNZ d
|
2017-12-02 14:53:35 +00:00
|
|
|
if (LIKELY(jrConditional(--B())))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
|
|
|
addCycles(8);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // JR d
|
2017-06-11 20:08:40 +00:00
|
|
|
jr(fetchByte());
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(12);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-07-19 12:59:28 +00:00
|
|
|
case 4: // JR cc,d
|
|
|
|
case 5:
|
|
|
|
case 6:
|
|
|
|
case 7:
|
2017-06-26 22:22:32 +00:00
|
|
|
if (jrConditionalFlag(f, y - 4))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(5);
|
|
|
|
addCycles(5);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-07-19 12:59:28 +00:00
|
|
|
default:
|
2017-10-29 19:48:47 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 1: // 16-bit load immediate/add
|
|
|
|
switch (q) {
|
2017-06-07 21:54:55 +00:00
|
|
|
case 0: // LD rp,nn
|
2017-10-29 19:48:47 +00:00
|
|
|
fetchWord(RP(p));
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(10);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // ADD HL,rp
|
2017-07-03 20:42:18 +00:00
|
|
|
add(f, HL2(), RP(p));
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(11);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 2: // Indirect loading
|
|
|
|
switch (q) {
|
|
|
|
case 0:
|
|
|
|
switch (p) {
|
|
|
|
case 0: // LD (BC),A
|
2017-06-07 21:54:55 +00:00
|
|
|
MEMPTR() = BC();
|
2017-08-06 16:06:48 +00:00
|
|
|
memptrReference();
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(MEMPTR().high = a);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // LD (DE),A
|
2017-06-07 21:54:55 +00:00
|
|
|
MEMPTR() = DE();
|
2017-08-06 16:06:48 +00:00
|
|
|
memptrReference();
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(MEMPTR().high = a);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // LD (nn),HL
|
2017-06-07 21:54:55 +00:00
|
|
|
fetchWord();
|
2017-06-15 21:21:26 +00:00
|
|
|
setWordViaMemptr(HL2());
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(16);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // LD (nn),A
|
2017-06-07 21:54:55 +00:00
|
|
|
fetchWord();
|
2017-08-06 16:06:48 +00:00
|
|
|
memptrReference();
|
2017-08-28 17:52:48 +00:00
|
|
|
setByte(MEMPTR().high = a);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(13);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
switch (p) {
|
|
|
|
case 0: // LD A,(BC)
|
2017-06-07 21:54:55 +00:00
|
|
|
MEMPTR() = BC();
|
2017-08-06 16:06:48 +00:00
|
|
|
memptrReference();
|
2017-08-28 17:52:48 +00:00
|
|
|
a = getByte();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // LD A,(DE)
|
2017-06-07 21:54:55 +00:00
|
|
|
MEMPTR() = DE();
|
2017-08-06 16:06:48 +00:00
|
|
|
memptrReference();
|
2017-08-28 17:52:48 +00:00
|
|
|
a = getByte();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // LD HL,(nn)
|
2017-06-07 21:54:55 +00:00
|
|
|
fetchWord();
|
2017-06-15 21:21:26 +00:00
|
|
|
getWordViaMemptr(HL2());
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(16);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // LD A,(nn)
|
2017-06-07 21:54:55 +00:00
|
|
|
fetchWord();
|
2017-08-06 16:06:48 +00:00
|
|
|
memptrReference();
|
2017-08-28 17:52:48 +00:00
|
|
|
a = getByte();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(13);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3: // 16-bit INC/DEC
|
|
|
|
switch (q) {
|
|
|
|
case 0: // INC rp
|
|
|
|
++RP(p).word;
|
|
|
|
break;
|
|
|
|
case 1: // DEC rp
|
|
|
|
--RP(p).word;
|
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(6);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-08-06 16:06:48 +00:00
|
|
|
case 4: { // 8-bit INC
|
2017-11-20 19:17:49 +00:00
|
|
|
if (UNLIKELY(m_displaced && (y == 6)))
|
2017-08-06 16:06:48 +00:00
|
|
|
fetchDisplacement();
|
|
|
|
auto operand = R(y, a);
|
|
|
|
increment(f, operand);
|
|
|
|
R(y, a, operand);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-08-06 16:06:48 +00:00
|
|
|
} case 5: { // 8-bit DEC
|
2017-11-20 19:17:49 +00:00
|
|
|
if (UNLIKELY(m_displaced && (y == 6)))
|
2017-08-06 16:06:48 +00:00
|
|
|
fetchDisplacement();
|
|
|
|
auto operand = R(y, a);
|
|
|
|
decrement(f, operand);
|
|
|
|
R(y, a, operand);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(y == 6))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-08-06 16:06:48 +00:00
|
|
|
} case 6: // 8-bit load immediate
|
2017-12-02 10:34:37 +00:00
|
|
|
if (UNLIKELY(m_displaced && (y == 6)))
|
2017-08-06 16:06:48 +00:00
|
|
|
fetchDisplacement();
|
|
|
|
R(y, a, fetchByte()); // LD r,n
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(y == 6))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(3);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-08-06 16:06:48 +00:00
|
|
|
case 7: // Assorted operations on accumulator/flags
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (y) {
|
|
|
|
case 0:
|
2017-08-06 16:06:48 +00:00
|
|
|
a = rlc(f, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1:
|
2017-08-06 16:06:48 +00:00
|
|
|
a = rrc(f, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2:
|
2017-08-06 16:06:48 +00:00
|
|
|
a = rl(f, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3:
|
2017-08-06 16:06:48 +00:00
|
|
|
a = rr(f, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 4:
|
2017-06-28 14:39:31 +00:00
|
|
|
daa(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5:
|
2017-06-28 14:39:31 +00:00
|
|
|
cpl(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6:
|
2017-06-28 14:39:31 +00:00
|
|
|
scf(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7:
|
2017-06-28 14:39:31 +00:00
|
|
|
ccf(a, f);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 1: // 8-bit loading
|
2017-12-02 10:34:37 +00:00
|
|
|
if (UNLIKELY(z == 6 && y == 6)) { // Exception (replaces LD (HL), (HL))
|
2017-06-04 20:38:34 +00:00
|
|
|
halt();
|
|
|
|
} else {
|
|
|
|
bool normal = true;
|
2017-12-02 10:34:37 +00:00
|
|
|
if (UNLIKELY(m_displaced)) {
|
|
|
|
if (UNLIKELY(z == 6)) {
|
2017-08-06 16:06:48 +00:00
|
|
|
fetchDisplacement();
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (y) {
|
|
|
|
case 4:
|
2017-06-28 23:50:34 +00:00
|
|
|
H() = R(z, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
normal = false;
|
|
|
|
break;
|
|
|
|
case 5:
|
2017-06-28 23:50:34 +00:00
|
|
|
L() = R(z, a);
|
2017-06-04 20:38:34 +00:00
|
|
|
normal = false;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(y == 6)) {
|
2017-08-06 16:06:48 +00:00
|
|
|
fetchDisplacement();
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (z) {
|
|
|
|
case 4:
|
2017-08-06 16:06:48 +00:00
|
|
|
R(y, a, H());
|
2017-06-04 20:38:34 +00:00
|
|
|
normal = false;
|
|
|
|
break;
|
|
|
|
case 5:
|
2017-08-06 16:06:48 +00:00
|
|
|
R(y, a, L());
|
2017-06-04 20:38:34 +00:00
|
|
|
normal = false;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2017-12-02 14:53:35 +00:00
|
|
|
if (LIKELY(normal))
|
2017-08-06 16:06:48 +00:00
|
|
|
R(y, a, R(z, a));
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY((y == 6) || (z == 6))) // M operations
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(3);
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // Operate on accumulator and register/memory location
|
2017-12-02 10:34:37 +00:00
|
|
|
if (UNLIKELY(m_displaced && (z == 6)))
|
2017-08-06 16:06:48 +00:00
|
|
|
fetchDisplacement();
|
2017-06-04 20:38:34 +00:00
|
|
|
switch (y) {
|
|
|
|
case 0: // ADD A,r
|
2017-06-28 23:50:34 +00:00
|
|
|
add(f, a, R(z, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // ADC A,r
|
2017-06-28 23:50:34 +00:00
|
|
|
adc(f, a, R(z, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // SUB r
|
2017-06-28 23:50:34 +00:00
|
|
|
sub(f, a, R(z, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // SBC A,r
|
2017-06-28 23:50:34 +00:00
|
|
|
sbc(f, a, R(z, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 4: // AND r
|
2017-06-28 23:50:34 +00:00
|
|
|
andr(f, a, R(z, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // XOR r
|
2017-06-28 23:50:34 +00:00
|
|
|
xorr(f, a, R(z, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // OR r
|
2017-06-28 23:50:34 +00:00
|
|
|
orr(f, a, R(z, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // CP r
|
2017-06-28 23:50:34 +00:00
|
|
|
compare(f, a, R(z, a));
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-12-02 14:53:35 +00:00
|
|
|
if (UNLIKELY(z == 6))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(3);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
switch (z) {
|
|
|
|
case 0: // Conditional return
|
2017-06-26 22:22:32 +00:00
|
|
|
if (returnConditionalFlag(f, y))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(6);
|
|
|
|
addCycles(5);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // POP & various ops
|
|
|
|
switch (q) {
|
|
|
|
case 0: // POP rp2[p]
|
2017-06-07 21:54:55 +00:00
|
|
|
popWord(RP2(p));
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(10);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
switch (p) {
|
|
|
|
case 0: // RET
|
|
|
|
ret();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(10);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // EXX
|
|
|
|
exx();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // JP HL
|
2017-06-19 12:53:00 +00:00
|
|
|
PC() = HL2();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // LD SP,HL
|
2017-06-19 12:53:00 +00:00
|
|
|
SP() = HL2();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-06-29 20:25:58 +00:00
|
|
|
break;
|
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 2: // Conditional jump
|
2017-06-26 22:22:32 +00:00
|
|
|
jumpConditionalFlag(f, y);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(10);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // Assorted operations
|
|
|
|
switch (y) {
|
|
|
|
case 0: // JP nn
|
2017-06-07 21:54:55 +00:00
|
|
|
fetchWord();
|
2017-06-11 20:08:40 +00:00
|
|
|
jump();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(10);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // CB prefix
|
|
|
|
m_prefixCB = true;
|
2017-12-02 10:34:37 +00:00
|
|
|
if (UNLIKELY(m_displaced))
|
2017-08-06 16:06:48 +00:00
|
|
|
fetchDisplacement();
|
2017-12-10 21:41:48 +00:00
|
|
|
lower(M1());
|
2017-12-03 00:57:47 +00:00
|
|
|
execute(fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // OUT (n),A
|
2017-06-28 14:39:31 +00:00
|
|
|
writePort(fetchByte(), a);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(11);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // IN A,(n)
|
2017-06-28 14:39:31 +00:00
|
|
|
readPort(fetchByte(), a);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(11);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 4: // EX (SP),HL
|
2017-06-28 14:39:31 +00:00
|
|
|
xhtl(HL2());
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(19);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // EX DE,HL
|
|
|
|
std::swap(DE(), HL());
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // DI
|
2017-06-11 20:08:40 +00:00
|
|
|
di();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // EI
|
2017-06-11 20:08:40 +00:00
|
|
|
ei();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(4);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 4: // Conditional call: CALL cc[y], nn
|
2017-06-26 22:22:32 +00:00
|
|
|
if (callConditionalFlag(f, y))
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
|
|
|
addCycles(10);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // PUSH & various ops
|
|
|
|
switch (q) {
|
|
|
|
case 0: // PUSH rp2[p]
|
|
|
|
pushWord(RP2(p));
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(11);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
switch (p) {
|
|
|
|
case 0: // CALL nn
|
2017-06-07 21:54:55 +00:00
|
|
|
fetchWord();
|
|
|
|
call();
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(17);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // DD prefix
|
2017-06-15 21:21:26 +00:00
|
|
|
m_displaced = m_prefixDD = true;
|
2017-12-10 21:41:48 +00:00
|
|
|
lower(M1());
|
2017-12-03 00:57:47 +00:00
|
|
|
execute(fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // ED prefix
|
|
|
|
m_prefixED = true;
|
2017-12-10 21:41:48 +00:00
|
|
|
lower(M1());
|
2017-12-03 00:57:47 +00:00
|
|
|
execute(fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // FD prefix
|
2017-06-15 21:21:26 +00:00
|
|
|
m_displaced = m_prefixFD = true;
|
2017-12-10 21:41:48 +00:00
|
|
|
lower(M1());
|
2017-12-03 00:57:47 +00:00
|
|
|
execute(fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-06-29 20:25:58 +00:00
|
|
|
break;
|
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 6: // Operate on accumulator and immediate operand: alu[y] n
|
|
|
|
switch (y) {
|
|
|
|
case 0: // ADD A,n
|
2017-06-28 14:39:31 +00:00
|
|
|
add(f, a, fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 1: // ADC A,n
|
2017-06-28 14:39:31 +00:00
|
|
|
adc(f, a, fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 2: // SUB n
|
2017-06-28 14:39:31 +00:00
|
|
|
sub(f, a, fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 3: // SBC A,n
|
2017-06-28 14:39:31 +00:00
|
|
|
sbc(f, a, fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 4: // AND n
|
2017-06-28 14:39:31 +00:00
|
|
|
andr(f, a, fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 5: // XOR n
|
2017-06-28 14:39:31 +00:00
|
|
|
xorr(f, a, fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 6: // OR n
|
2017-06-28 14:39:31 +00:00
|
|
|
orr(f, a, fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // CP n
|
2017-06-28 14:39:31 +00:00
|
|
|
compare(f, a, fetchByte());
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(7);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
|
|
|
case 7: // Restart: RST y * 8
|
|
|
|
restart(y << 3);
|
2017-11-03 22:05:01 +00:00
|
|
|
addCycles(11);
|
2017-06-04 20:38:34 +00:00
|
|
|
break;
|
2017-06-28 14:39:31 +00:00
|
|
|
default:
|
2017-10-29 18:47:23 +00:00
|
|
|
UNREACHABLE;
|
2017-06-04 20:38:34 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2017-08-30 22:17:34 +00:00
|
|
|
}
|