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More cycle accuracy changes:

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1) implied instruction, pointless fetch
 2) branch pointless fetch when condition is met

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2019-01-05 17:23:50 +00:00
parent 3b7cec9c69
commit 143e9a9e68
2 changed files with 44 additions and 46 deletions
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21
M6502/inc/mos6502.h
View File

@ -50,7 +50,7 @@ namespace EightBit {
virtual void handleIRQ() final;
virtual void busWrite() final;
[[nodiscard]] virtual uint8_t busRead() final;
virtual uint8_t busRead() final;
virtual uint8_t sub(uint8_t operand, uint8_t data, int borrow = 0);
uint8_t sbc(uint8_t operand, uint8_t data);
@ -122,25 +122,10 @@ namespace EightBit {
auto overflow() const { return P() & VF; }
auto carry() const { return P() & CF; }
// Branching
auto branch(const register16_t destination, const int condition) {
const auto page = PC().high;
if (condition) {
jump(destination);
if (UNLIKELY(PC().high != page))
Processor::busRead({ PC().low, page });
}
return !!condition;
}
void branch(const int condition) {
if (branch(Address_relative_byte(), condition))
addCycle();
}
// Miscellaneous
void branch(int condition);
auto through(const uint8_t data) {
adjustNZ(data);
return data;

69
M6502/src/mos6502.cpp
View File

@ -106,7 +106,7 @@ int EightBit::MOS6502::execute() {
case 0x07: slo(AM_ZeroPage()); break; // *SLO (zero page)
case 0x08: addCycle(); php(); break; // PHP (implied)
case 0x09: A() = orr(A(), AM_Immediate()); break; // ORA (immediate)
case 0x0a: addCycle(); A() = asl(A()); break; // ASL A (implied)
case 0x0a: busRead(); A() = asl(A()); break; // ASL A (implied)
case 0x0b: addCycle(); anc(AM_Immediate()); break; // *ANC (immediate)
case 0x0c: AM_Absolute(); break; // *NOP (absolute)
case 0x0d: A() = orr(A(), AM_Absolute()); break; // ORA (absolute)
@ -121,9 +121,9 @@ int EightBit::MOS6502::execute() {
case 0x15: A() = orr(A(), AM_ZeroPageX()); break; // ORA (zero page, X)
case 0x16: busReadModifyWrite(asl(AM_ZeroPageX())); break; // ASL (zero page, X)
case 0x17: slo(AM_ZeroPageX()); break; // *SLO (zero page, X)
case 0x18: addCycle(); clearFlag(P(), CF); break; // CLC (implied)
case 0x18: busRead(); clearFlag(P(), CF); break; // CLC (implied)
case 0x19: A() = orr(A(), AM_AbsoluteY()); break; // ORA (absolute, Y)
case 0x1a: addCycle(); break; // *NOP (implied)
case 0x1a: busRead(); break; // *NOP (implied)
case 0x1b: slo(AM_AbsoluteY()); break; // *SLO (absolute, Y)
case 0x1c: AM_AbsoluteX(); break; // *NOP (absolute, X)
case 0x1d: A() = orr(A(), AM_AbsoluteX()); break; // ORA (absolute, X)
@ -140,7 +140,7 @@ int EightBit::MOS6502::execute() {
case 0x27: rla(AM_ZeroPage()); break; // *RLA (zero page)
case 0x28: addCycles(2); plp(); break; // PLP (implied)
case 0x29: A() = andr(A(), AM_Immediate()); break; // AND (immediate)
case 0x2a: addCycle(); A() = rol(A()); break; // ROL A (implied)
case 0x2a: busRead(); A() = rol(A()); break; // ROL A (implied)
case 0x2b: addCycle(); anc(AM_Immediate()); break; // *ANC (immediate)
case 0x2c: bit(A(), AM_Absolute()); break; // BIT (absolute)
case 0x2d: A() = andr(A(), AM_Absolute()); break; // AND (absolute)
@ -155,9 +155,9 @@ int EightBit::MOS6502::execute() {
case 0x35: A() = andr(A(), AM_ZeroPageX()); break; // AND (zero page, X)
case 0x36: busReadModifyWrite(rol(AM_ZeroPageX())); break; // ROL (zero page, X)
case 0x37: rla(AM_ZeroPageX()); break; // *RLA (zero page, X)
case 0x38: addCycle(); setFlag(P(), CF); break; // SEC (implied)
case 0x38: busRead(); setFlag(P(), CF); break; // SEC (implied)
case 0x39: A() = andr(A(), AM_AbsoluteY()); break; // AND (absolute, Y)
case 0x3a: addCycle(); break; // *NOP (implied)
case 0x3a: busRead(); break; // *NOP (implied)
case 0x3b: rla(AM_AbsoluteY()); break; // *RLA (absolute, Y)
case 0x3c: AM_AbsoluteX(); break; // *NOP (absolute, X)
case 0x3d: A() = andr(A(), AM_AbsoluteX()); break; // AND (absolute, X)
@ -174,7 +174,7 @@ int EightBit::MOS6502::execute() {
case 0x47: sre(AM_ZeroPage()); break; // *SRE (zero page)
case 0x48: addCycle(); push(A()); break; // PHA (implied)
case 0x49: A() = eorr(A(), AM_Immediate()); break; // EOR (immediate)
case 0x4a: addCycle(); A() = lsr(A()); break; // LSR A (implied)
case 0x4a: busRead(); A() = lsr(A()); break; // LSR A (implied)
case 0x4b: asr(AM_Immediate()); break; // *ASR (immediate)
case 0x4c: jump(Address_Absolute()); break; // JMP (absolute)
case 0x4d: A() = eorr(A(), AM_Absolute()); break; // EOR (absolute)
@ -189,9 +189,9 @@ int EightBit::MOS6502::execute() {
case 0x55: A() = eorr(A(), AM_ZeroPageX()); break; // EOR (zero page, X)
case 0x56: busReadModifyWrite(lsr(AM_ZeroPageX())); break; // LSR (zero page, X)
case 0x57: sre(AM_ZeroPageX()); break; // *SRE (zero page, X)
case 0x58: addCycle(); clearFlag(P(), IF); break; // CLI (implied)
case 0x58: busRead(); clearFlag(P(), IF); break; // CLI (implied)
case 0x59: A() = eorr(A(), AM_AbsoluteY()); break; // EOR (absolute, Y)
case 0x5a: addCycle(); break; // *NOP (implied)
case 0x5a: busRead(); break; // *NOP (implied)
case 0x5b: sre(AM_AbsoluteY()); break; // *SRE (absolute, Y)
case 0x5c: AM_AbsoluteX(); break; // *NOP (absolute, X)
case 0x5d: A() = eorr(A(), AM_AbsoluteX()); break; // EOR (absolute, X)
@ -208,7 +208,7 @@ int EightBit::MOS6502::execute() {
case 0x67: rra(AM_ZeroPage()); break; // *RRA (zero page)
case 0x68: addCycles(2); A() = through(pop()); break; // PLA (implied)
case 0x69: A() = adc(A(), AM_Immediate()); break; // ADC (immediate)
case 0x6a: addCycle(); A() = ror(A()); break; // ROR A (implied)
case 0x6a: busRead(); A() = ror(A()); break; // ROR A (implied)
case 0x6b: addCycle(); arr(AM_Immediate()); break; // *ARR (immediate)
case 0x6c: jump(Address_Indirect()); break; // JMP (indirect)
case 0x6d: A() = adc(A(), AM_Absolute()); break; // ADC (absolute)
@ -223,9 +223,9 @@ int EightBit::MOS6502::execute() {
case 0x75: A() = adc(A(), AM_ZeroPageX()); break; // ADC (zero page, X)
case 0x76: busReadModifyWrite(ror(AM_ZeroPageX())); break; // ROR (zero page, X)
case 0x77: rra(AM_ZeroPageX()); break; // *RRA (zero page, X)
case 0x78: addCycle(); setFlag(P(), IF); break; // SEI (implied)
case 0x78: busRead(); setFlag(P(), IF); break; // SEI (implied)
case 0x79: A() = adc(A(), AM_AbsoluteY()); break; // ADC (absolute, Y)
case 0x7a: addCycle(); break; // *NOP (implied)
case 0x7a: busRead(); break; // *NOP (implied)
case 0x7b: rra(AM_AbsoluteY()); break; // *RRA (absolute, Y)
case 0x7c: AM_AbsoluteX(); break; // *NOP (absolute, X)
case 0x7d: A() = adc(A(), AM_AbsoluteX()); break; // ADC (absolute, X)
@ -240,9 +240,9 @@ int EightBit::MOS6502::execute() {
case 0x85: Processor::busWrite(Address_ZeroPage(), A()); break; // STA (zero page)
case 0x86: Processor::busWrite(Address_ZeroPage(), X()); break; // STX (zero page)
case 0x87: Processor::busWrite(Address_ZeroPage(), A() & X()); break; // *SAX (zero page)
case 0x88: addCycle(); Y() = dec(Y()); break; // DEY (implied)
case 0x88: busRead(); Y() = dec(Y()); break; // DEY (implied)
case 0x89: AM_Immediate(); break; // *NOP (immediate)
case 0x8a: addCycle(); A() = through(X()); break; // TXA (implied)
case 0x8a: busRead(); A() = through(X()); break; // TXA (implied)
case 0x8b: break;
case 0x8c: Processor::busWrite(Address_Absolute(), Y()); break; // STY (absolute)
case 0x8d: Processor::busWrite(Address_Absolute(), A()); break; // STA (absolute)
@ -257,9 +257,9 @@ int EightBit::MOS6502::execute() {
case 0x95: Processor::busWrite(Address_ZeroPageX(), A()); break; // STA (zero page, X)
case 0x96: Processor::busWrite(Address_ZeroPageY(), X()); break; // STX (zero page, Y)
case 0x97: Processor::busWrite(Address_ZeroPageY(), A() & X()); break; // *SAX (zero page, Y)
case 0x98: addCycle(); A() = through(Y()); break; // TYA (implied)
case 0x98: busRead(); A() = through(Y()); break; // TYA (implied)
case 0x99: addCycle(); Processor::busWrite(Address_AbsoluteY().first, A()); break; // STA (absolute, Y)
case 0x9a: addCycle(); S() = X(); break; // TXS (implied)
case 0x9a: busRead(); S() = X(); break; // TXS (implied)
case 0x9b: break;
case 0x9c: break;
case 0x9d: addCycle(); Processor::busWrite(Address_AbsoluteX().first, A()); break; // STA (absolute, X)
@ -274,9 +274,9 @@ int EightBit::MOS6502::execute() {
case 0xa5: A() = through(AM_ZeroPage()); break; // LDA (zero page)
case 0xa6: X() = through(AM_ZeroPage()); break; // LDX (zero page)
case 0xa7: A() = X() = through(AM_ZeroPage()); break; // *LAX (zero page)
case 0xa8: addCycle(); Y() = through(A()); break; // TAY (implied)
case 0xa8: busRead(); Y() = through(A()); break; // TAY (implied)
case 0xa9: A() = through(AM_Immediate()); break; // LDA (immediate)
case 0xaa: addCycle(); X() = through(A()); break; // TAX (implied)
case 0xaa: busRead(); X() = through(A()); break; // TAX (implied)
case 0xab: A() = X() = through(AM_Immediate()); break; // *ATX (immediate)
case 0xac: Y() = through(AM_Absolute()); break; // LDY (absolute)
case 0xad: A() = through(AM_Absolute()); break; // LDA (absolute)
@ -291,9 +291,9 @@ int EightBit::MOS6502::execute() {
case 0xb5: A() = through(AM_ZeroPageX()); break; // LDA (zero page, X)
case 0xb6: X() = through(AM_ZeroPageY()); break; // LDX (zero page, Y)
case 0xb7: A() = X() = through(AM_ZeroPageY()); break; // *LAX (zero page, Y)
case 0xb8: addCycle(); clearFlag(P(), VF); break; // CLV (implied)
case 0xb8: busRead(); clearFlag(P(), VF); break; // CLV (implied)
case 0xb9: A() = through(AM_AbsoluteY()); break; // LDA (absolute, Y)
case 0xba: addCycle(); X() = through(S()); break; // TSX (implied)
case 0xba: busRead(); X() = through(S()); break; // TSX (implied)
case 0xbb: break;
case 0xbc: Y() = through(AM_AbsoluteX()); break; // LDY (absolute, X)
case 0xbd: A() = through(AM_AbsoluteX()); break; // LDA (absolute, X)
@ -308,9 +308,9 @@ int EightBit::MOS6502::execute() {
case 0xc5: cmp(A(), AM_ZeroPage()); break; // CMP (zero page)
case 0xc6: busReadModifyWrite(dec(AM_ZeroPage())); break; // DEC (zero page)
case 0xc7: dcp(AM_ZeroPage()); break; // *DCP (zero page)
case 0xc8: addCycle(); Y() = inc(Y()); break; // INY (implied)
case 0xc8: busRead(); Y() = inc(Y()); break; // INY (implied)
case 0xc9: cmp(A(), AM_Immediate()); break; // CMP (immediate)
case 0xca: addCycle(); X() = dec(X()); break; // DEX (implied)
case 0xca: busRead(); X() = dec(X()); break; // DEX (implied)
case 0xcb: axs(AM_Immediate()); break; // *AXS (immediate)
case 0xcc: cmp(Y(), AM_Absolute()); break; // CPY (absolute)
case 0xcd: cmp(A(), AM_Absolute()); break; // CMP (absolute)
@ -325,9 +325,9 @@ int EightBit::MOS6502::execute() {
case 0xd5: cmp(A(), AM_ZeroPageX()); break; // CMP (zero page, X)
case 0xd6: busReadModifyWrite(dec(AM_ZeroPageX())); break; // DEC (zero page, X)
case 0xd7: dcp(AM_ZeroPageX()); break; // *DCP (zero page, X)
case 0xd8: addCycle(); clearFlag(P(), DF); break; // CLD (implied)
case 0xd8: busRead(); clearFlag(P(), DF); break; // CLD (implied)
case 0xd9: cmp(A(), AM_AbsoluteY()); break; // CMP (absolute, Y)
case 0xda: addCycle(); break; // *NOP (implied)
case 0xda: busRead(); break; // *NOP (implied)
case 0xdb: dcp(AM_AbsoluteY()); break; // *DCP (absolute, Y)
case 0xdc: AM_AbsoluteX(); break; // *NOP (absolute, X)
case 0xdd: cmp(A(), AM_AbsoluteX()); break; // CMP (absolute, X)
@ -342,9 +342,9 @@ int EightBit::MOS6502::execute() {
case 0xe5: A() = sbc(A(), AM_ZeroPage()); break; // SBC (zero page)
case 0xe6: busReadModifyWrite(inc(AM_ZeroPage())); break; // INC (zero page)
case 0xe7: isb(AM_ZeroPage()); break; // *ISB (zero page)
case 0xe8: addCycle(); X() = inc(X()); break; // INX (implied)
case 0xe8: busRead(); X() = inc(X()); break; // INX (implied)
case 0xe9: A() = sbc(A(), AM_Immediate()); break; // SBC (immediate)
case 0xea: addCycle(); break; // NOP (implied)
case 0xea: busRead(); break; // NOP (implied)
case 0xeb: A() = sbc(A(), AM_Immediate()); break; // *SBC (immediate)
case 0xec: cmp(X(), AM_Absolute()); break; // CPX (absolute)
case 0xed: A() = sbc(A(), AM_Absolute()); break; // SBC (absolute)
@ -359,9 +359,9 @@ int EightBit::MOS6502::execute() {
case 0xf5: A() = sbc(A(), AM_ZeroPageX()); break; // SBC (zero page, X)
case 0xf6: busReadModifyWrite(inc(AM_ZeroPageX())); break; // INC (zero page, X)
case 0xf7: isb(AM_ZeroPageX()); break; // *ISB (zero page, X)
case 0xf8: addCycle(); setFlag(P(), DF); break; // SED (implied)
case 0xf8: busRead(); setFlag(P(), DF); break; // SED (implied)
case 0xf9: A() = sbc(A(), AM_AbsoluteY()); break; // SBC (absolute, Y)
case 0xfa: addCycle(); break; // *NOP (implied)
case 0xfa: busRead(); break; // *NOP (implied)
case 0xfb: isb(AM_AbsoluteY()); break; // *ISB (absolute, Y)
case 0xfc: AM_AbsoluteX(); break; // *NOP (absolute, X)
case 0xfd: A() = sbc(A(), AM_AbsoluteX()); break; // SBC (absolute, X)
@ -490,6 +490,19 @@ uint8_t EightBit::MOS6502::AM_IndirectIndexedY() {
////
void EightBit::MOS6502::branch(const int condition) {
const auto destination = Address_relative_byte();
if (condition) {
busRead();
const auto page = PC().high;
jump(destination);
if (UNLIKELY(PC().high != page))
Processor::busRead({ PC().low, page });
}
}
////
uint8_t EightBit::MOS6502::sbc(const uint8_t operand, const uint8_t data) {
const auto returned = sub(operand, data, ~P() & CF);