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In theory, this finishes the 6809 disassembler.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon
parent
67b5fe1658
commit
3dfea03b2e
MC6809
@ -47,15 +47,20 @@ namespace EightBit {
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std::string RR(int which);
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std::string Address_direct(std::string mnemomic);
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std::string Address_indexed(std::string mnemomic);
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std::string Address_extended(std::string mnemomic);
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std::string Address_relative_byte(std::string mnemomic);
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std::string Address_relative_word(std::string mnemomic);
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std::string AM_immediate_byte(std::string mnemomic);
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std::string AM_immediate_word(std::string mnemomic);
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std::string AM_direct_byte(std::string mnemomic);
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std::string AM_direct_word(std::string mnemomic);
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std::string AM_indexed_byte(std::string mnemomic);
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std::string AM_indexed_word(std::string mnemomic);
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std::string AM_extended_byte(std::string mnemomic);
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std::string AM_extended_word(std::string mnemomic);
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//
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@ -66,7 +71,7 @@ namespace EightBit {
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std::string referenceTransfer8(int specifier);
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std::string referenceTransfer16(int specifier);
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std::string tfr();
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std::string tfr(std::string mnemomic);
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//
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@ -131,10 +131,12 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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}
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switch (opcode) {
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// ABX
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case 0x3a: output << "\tABX"; break; // ABX (inherent)
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//// ADC
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case 0x89: output << AM_immediate_byte("ADCA"); break; // ADC (ADCA immediate)
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case 0x99: output << AM_direct_byte("ADCA"); break; // ADC (ADCA direct)
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case 0xa9: output << AM_indexed_byte("ADCA"); break; // ADC (ADCA indexed)
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@ -146,348 +148,350 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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case 0xf9: output << AM_extended_byte("ADCB"); break; // ADC (ADCB extended)
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//// ADD
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//case 0x8b: A() = add(A(), AM_immediate_byte()); break; // ADD (ADDA immediate)
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//case 0x9b: A() = add(A(), AM_direct_byte()); break; // ADD (ADDA direct)
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//case 0xab: A() = add(A(), AM_indexed_byte()); break; // ADD (ADDA indexed)
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//case 0xbb: A() = add(A(), AM_extended_byte()); break; // ADD (ADDA extended)
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//case 0xcb: B() = add(B(), AM_immediate_byte()); break; // ADD (ADDB immediate)
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//case 0xdb: B() = add(B(), AM_direct_byte()); break; // ADD (ADDB direct)
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//case 0xeb: B() = add(B(), AM_indexed_byte()); break; // ADD (ADDB indexed)
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//case 0xfb: B() = add(B(), AM_extended_byte()); break; // ADD (ADDB extended)
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case 0x8b: output << AM_extended_byte("ADDA"); break; // ADD (ADDA immediate)
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case 0x9b: output << AM_direct_byte("ADDA"); break; // ADD (ADDA direct)
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case 0xab: output << AM_indexed_byte("ADDA"); break; // ADD (ADDA indexed)
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case 0xbb: output << AM_extended_byte("ADDA"); break; // ADD (ADDA extended)
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//case 0xc3: D() = add(D(), AM_immediate_word()); break; // ADD (ADDD immediate)
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//case 0xd3: D() = add(D(), AM_direct_word()); break; // ADD (ADDD direct)
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//case 0xe3: D() = add(D(), AM_indexed_word()); break; // ADD (ADDD indexed)
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//case 0xf3: D() = add(D(), AM_extended_word()); break; // ADD (ADDD extended)
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case 0xcb: output << AM_extended_byte("ADDB"); break; // ADD (ADDB immediate)
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case 0xdb: output << AM_direct_byte("ADDB"); break; // ADD (ADDB direct)
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case 0xeb: output << AM_indexed_byte("ADDB"); break; // ADD (ADDB indexed)
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case 0xfb: output << AM_extended_byte("ADDB"); break; // ADD (ADDB extended)
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case 0xc3: output << AM_immediate_word("ADDD"); break; // ADD (ADDD immediate)
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case 0xd3: output << AM_direct_word("ADDD"); break; // ADD (ADDD direct)
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case 0xe3: output << AM_indexed_word("ADDD"); break; // ADD (ADDD indexed)
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case 0xf3: output << AM_extended_word("ADDD"); break; // ADD (ADDD extended)
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//// AND
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//case 0x84: A() = andr(A(), AM_immediate_byte()); break; // AND (ANDA immediate)
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//case 0x94: A() = andr(A(), AM_direct_byte()); break; // AND (ANDA direct)
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//case 0xa4: A() = andr(A(), AM_indexed_byte()); break; // AND (ANDA indexed)
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//case 0xb4: A() = andr(A(), AM_extended_byte()); break; // AND (ANDA extended)
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//case 0xc4: B() = andr(B(), AM_immediate_byte()); break; // AND (ANDB immediate)
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//case 0xd4: B() = andr(B(), AM_direct_byte()); break; // AND (ANDB direct)
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//case 0xe4: B() = andr(B(), AM_indexed_byte()); break; // AND (ANDB indexed)
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//case 0xf4: B() = andr(B(), AM_extended_byte()); break; // AND (ANDB extended)
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case 0x84: output << AM_immediate_byte("ANDA"); break; // AND (ANDA immediate)
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case 0x94: output << AM_direct_byte("ANDA"); break; // AND (ANDA direct)
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case 0xa4: output << AM_indexed_byte("ANDA"); break; // AND (ANDA indexed)
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case 0xb4: output << AM_extended_byte("ANDA"); break; // AND (ANDA extended)
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//case 0x1c: CC() &= AM_immediate_byte(); break; // AND (ANDCC immediate)
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case 0xc4: output << AM_immediate_byte("ANDB"); break; // AND (ANDB immediate)
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case 0xd4: output << AM_direct_byte("ANDB"); break; // AND (ANDB direct)
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case 0xe4: output << AM_indexed_byte("ANDB"); break; // AND (ANDB indexed)
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case 0xf4: output << AM_extended_byte("ANDB"); break; // AND (ANDB extended)
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case 0x1c: output << AM_immediate_byte("ANDCC"); break; // AND (ANDCC immediate)
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//// ASL/LSL
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//case 0x08: BUS().write(asl(AM_direct_byte())); break; // ASL (direct)
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//case 0x48: A() = asl(A()); break; // ASL (ASLA inherent)
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//case 0x58: B() = asl(B()); break; // ASL (ASLB inherent)
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//case 0x68: BUS().write(asl(AM_indexed_byte())); break; // ASL (indexed)
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//case 0x78: BUS().write(asl(AM_extended_byte())); break; // ASL (extended)
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case 0x08: output << AM_direct_byte("ASL"); break; // ASL (direct)
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case 0x48: output << "\tASLA"; break; // ASL (ASLA inherent)
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case 0x58: output << "\tASLB"; break; // ASL (ASLB inherent)
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case 0x68: output << AM_indexed_byte("ASL"); break; // ASL (indexed)
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case 0x78: output << AM_extended_byte("ASL"); break; // ASL (extended)
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//// ASR
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//case 0x07: BUS().write(asr(AM_direct_byte())); break; // ASR (direct)
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//case 0x47: A() = asr(A()); break; // ASR (ASRA inherent)
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//case 0x57: B() = asr(B()); break; // ASR (ASRB inherent)
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//case 0x67: BUS().write(asr(AM_indexed_byte())); break; // ASR (indexed)
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//case 0x77: BUS().write(asr(AM_extended_byte())); break; // ASR (extended)
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case 0x07: output << AM_direct_byte("ASR"); break; // ASR (direct)
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case 0x47: output << "\tASRA"; break; // ASR (ASRA inherent)
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case 0x57: output << "\tASRB"; break; // ASR (ASRB inherent)
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case 0x67: output << AM_indexed_byte("ASR"); break; // ASR (indexed)
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case 0x77: output << AM_extended_byte("ASR"); break; // ASR (extended)
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//// BIT
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//case 0x85: andr(A(), AM_immediate_byte()); break; // BIT (BITA immediate)
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//case 0x95: andr(A(), AM_direct_byte()); break; // BIT (BITA direct)
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//case 0xa5: andr(A(), AM_indexed_byte()); break; // BIT (BITA indexed)
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//case 0xb5: andr(A(), AM_extended_byte()); break; // BIT (BITA extended)
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case 0x85: output << AM_immediate_byte("BITA"); break; // BIT (BITA immediate)
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case 0x95: output << AM_direct_byte("BITA"); break; // BIT (BITA direct)
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case 0xa5: output << AM_indexed_byte("BITA"); break; // BIT (BITA indexed)
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case 0xb5: output << AM_extended_byte("BITA"); break; // BIT (BITA extended)
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//case 0xc5: andr(B(), AM_immediate_byte()); break; // BIT (BITB immediate)
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//case 0xd5: andr(B(), AM_direct_byte()); break; // BIT (BITB direct)
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case 0xe5: output << AM_indexed_byte("BITB"); break; // BIT (BITB indexed)
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//case 0xf5: andr(B(), AM_extended_byte()); break; // BIT (BITB extended)
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case 0xc5: output << AM_immediate_byte("BITB"); break; // BIT (BITB immediate)
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case 0xd5: output << AM_direct_byte("BITB"); break; // BIT (BITB direct)
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case 0xe5: output << AM_indexed_byte("BITB"); break; // BIT (BITB indexed)
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case 0xf5: output << AM_extended_byte("BITB"); break; // BIT (BITB extended)
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//// CLR
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//case 0x0f: BUS().write(Address_direct(), clr()); break; // CLR (direct)
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//case 0x4f: A() = clr(); break; // CLR (CLRA implied)
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//case 0x5f: B() = clr(); break; // CLR (CLRB implied)
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case 0x6f: output << Address_indexed("CLR"); break; // CLR (indexed)
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//case 0x7f: BUS().write(Address_extended(), clr()); break; // CLR (extended)
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case 0x0f: output << Address_direct("CLR"); break; // CLR (direct)
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case 0x4f: output << "\tCLRA"; break; // CLR (CLRA implied)
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case 0x5f: output << "\tCLRB"; break; // CLR (CLRB implied)
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case 0x6f: output << Address_indexed("CLR"); break; // CLR (indexed)
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case 0x7f: output << Address_extended("CLR"); break; // CLR (extended)
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//// CMP
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// CMP
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//// CMPA
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//case 0x81: cmp(A(), AM_immediate_byte()); break; // CMP (CMPA, immediate)
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//case 0x91: cmp(A(), AM_direct_byte()); break; // CMP (CMPA, direct)
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//case 0xa1: cmp(A(), AM_indexed_byte()); break; // CMP (CMPA, indexed)
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//case 0xb1: cmp(A(), AM_extended_byte()); break; // CMP (CMPA, extended)
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// CMPA
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case 0x81: output << AM_immediate_byte("CMPA"); break; // CMP (CMPA, immediate)
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case 0x91: output << AM_direct_byte("CMPA"); break; // CMP (CMPA, direct)
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case 0xa1: output << AM_indexed_byte("CMPA"); break; // CMP (CMPA, indexed)
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case 0xb1: output << AM_extended_byte("CMPA"); break; // CMP (CMPA, extended)
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//// CMPB
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//case 0xc1: cmp(B(), AM_immediate_byte()); break; // CMP (CMPB, immediate)
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//case 0xd1: cmp(B(), AM_direct_byte()); break; // CMP (CMPB, direct)
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//case 0xe1: cmp(B(), AM_indexed_byte()); break; // CMP (CMPB, indexed)
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//case 0xf1: cmp(B(), AM_extended_byte()); break; // CMP (CMPB, extended)
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// CMPB
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case 0xc1: output << AM_immediate_byte("CMPB"); break; // CMP (CMPB, immediate)
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case 0xd1: output << AM_direct_byte("CMPB"); break; // CMP (CMPB, direct)
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case 0xe1: output << AM_indexed_byte("CMPB"); break; // CMP (CMPB, indexed)
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case 0xf1: output << AM_extended_byte("CMPB"); break; // CMP (CMPB, extended)
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//// CMPX
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//case 0x8c: cmp(X(), AM_immediate_word()); break; // CMP (CMPX, immediate)
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//case 0x9c: cmp(X(), AM_direct_word()); break; // CMP (CMPX, direct)
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//case 0xac: cmp(X(), AM_indexed_word()); break; // CMP (CMPX, indexed)
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//case 0xbc: cmp(X(), AM_extended_word()); break; // CMP (CMPX, extended)
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// CMPX
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case 0x8c: output << AM_immediate_word("CMPX"); break; // CMP (CMPX, immediate)
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case 0x9c: output << AM_direct_word("CMPX"); break; // CMP (CMPX, direct)
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case 0xac: output << AM_indexed_word("CMPX"); break; // CMP (CMPX, indexed)
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case 0xbc: output << AM_extended_word("CMPX"); break; // CMP (CMPX, extended)
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//// COM
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//case 0x03: BUS().write(com(AM_direct_byte())); break; // COM (direct)
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//case 0x43: A() = com(A()); break; // COM (COMA inherent)
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//case 0x53: B() = com(B()); break; // COM (COMB inherent)
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//case 0x63: BUS().write(com(AM_indexed_byte())); break; // COM (indexed)
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//case 0x73: BUS().write(com(AM_extended_byte())); break; // COM (extended)
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// COM
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case 0x03: output << AM_direct_byte("COM"); break; // COM (direct)
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case 0x43: output << "\tCOMA"; break; // COM (COMA inherent)
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case 0x53: output << "\tCOMB"; break; // COM (COMB inherent)
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case 0x63: output << AM_indexed_byte("COM"); break; // COM (indexed)
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case 0x73: output << AM_extended_byte("COM"); break; // COM (extended)
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//// CWAI
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//case 0x3c: cwai(AM_direct_byte()); break; // CWAI (direct)
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// CWAI
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case 0x3c: output << AM_direct_byte("CWAI"); break; // CWAI (direct)
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//// DAA
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//case 0x19: A() = da(A()); break; // DAA (inherent)
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// DAA
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case 0x19: output << "\tDAA"; break; // DAA (inherent)
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//// DEC
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//case 0x0a: BUS().write(dec(AM_direct_byte())); break; // DEC (direct)
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case 0x4a: output << "\tDECA"; break; // DEC (DECA inherent)
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case 0x5a: output << "\tDECB"; break; // DEC (DECB inherent)
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//case 0x6a: BUS().write(dec(AM_indexed_byte())); break; // DEC (indexed)
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//case 0x7a: BUS().write(dec(AM_extended_byte())); break; // DEC (extended)
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// DEC
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case 0x0a: output << AM_direct_byte("DEC"); break; // DEC (direct)
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case 0x4a: output << "\tDECA"; break; // DEC (DECA inherent)
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case 0x5a: output << "\tDECB"; break; // DEC (DECB inherent)
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case 0x6a: output << AM_indexed_byte("DEC"); break; // DEC (indexed)
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case 0x7a: output << AM_extended_byte("DEC"); break; // DEC (extended)
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//// EOR
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// EOR
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//// EORA
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//case 0x88: A() = eor(A(), AM_immediate_byte()); break; // EOR (EORA immediate)
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//case 0x98: A() = eor(A(), AM_direct_byte()); break; // EOR (EORA direct)
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//case 0xa8: A() = eor(A(), AM_indexed_byte()); break; // EOR (EORA indexed)
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//case 0xb8: A() = eor(A(), AM_extended_byte()); break; // EOR (EORA extended)
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// EORA
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case 0x88: output << AM_immediate_byte("EORA"); break; // EOR (EORA immediate)
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case 0x98: output << AM_direct_byte("EORA"); break; // EOR (EORA direct)
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case 0xa8: output << AM_indexed_byte("EORA"); break; // EOR (EORA indexed)
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case 0xb8: output << AM_extended_byte("EORA"); break; // EOR (EORA extended)
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//// EORB
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//case 0xc8: B() = eor(B(), AM_immediate_byte()); break; // EOR (EORB immediate)
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//case 0xd8: B() = eor(B(), AM_direct_byte()); break; // EOR (EORB direct)
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//case 0xe8: B() = eor(B(), AM_indexed_byte()); break; // EOR (EORB indexed)
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//case 0xf8: B() = eor(B(), AM_extended_byte()); break; // EOR (EORB extended)
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// EORB
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case 0xc8: output << AM_immediate_byte("EORB"); break; // EOR (EORB immediate)
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case 0xd8: output << AM_direct_byte("EORB"); break; // EOR (EORB direct)
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case 0xe8: output << AM_indexed_byte("EORB"); break; // EOR (EORB indexed)
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case 0xf8: output << AM_extended_byte("EORB"); break; // EOR (EORB extended)
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//// EXG
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//case 0x1e: exg(AM_immediate_byte()); break; // EXG (R1,R2 immediate)
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// EXG
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case 0x1e: output << tfr("EXG"); break; // EXG (R1,R2 immediate)
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//// INC
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//case 0x0c: BUS().write(inc(AM_direct_byte())); break; // INC (direct)
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//case 0x4c: A() = inc(A()); break; // INC (INCA inherent)
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//case 0x5c: B() = inc(B()); break; // INC (INCB inherent)
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//case 0x6c: BUS().write(inc(AM_indexed_byte())); break; // INC (indexed)
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//case 0x7c: BUS().write(inc(AM_extended_byte())); break; // INC (extended)
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// INC
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case 0x0c: output << AM_direct_byte("INC"); break; // INC (direct)
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case 0x4c: output << "\tINCA";; break; // INC (INCA inherent)
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case 0x5c: output << "\tINCB";; break; // INC (INCB inherent)
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case 0x6c: output << AM_indexed_byte("INC"); break; // INC (indexed)
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case 0x7c: output << AM_extended_byte("INC"); break; // INC (extended)
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//// JMP
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//case 0x0e: jump(Address_direct()); break; // JMP (direct)
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case 0x6e: output << Address_indexed("JMP"); break; // JMP (indexed)
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//case 0x7e: jump(Address_extended()); break; // JMP (extended)
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// JMP
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case 0x0e: output << Address_direct("JMP"); break; // JMP (direct)
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case 0x6e: output << Address_indexed("JMP"); break; // JMP (indexed)
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case 0x7e: output << Address_extended("JMP"); break; // JMP (extended)
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//// JSR
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//case 0x9d: call(Address_direct()); break; // JSR (direct)
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//case 0xad: call(Address_indexed()); break; // JSR (indexed)
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//case 0xbd: call(Address_extended()); break; // JSR (extended)
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// JSR
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case 0x9d: output << Address_direct("JSR"); break; // JSR (direct)
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case 0xad: output << Address_indexed("JSR"); break; // JSR (indexed)
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case 0xbd: output << Address_extended("JSR"); break; // JSR (extended)
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//// LD
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// LD
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//// LDA
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case 0x86: output << AM_immediate_byte("LDA"); break; // LD (LDA immediate)
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case 0x96: output << AM_direct_byte("LDA"); break; // LD (LDA direct)
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case 0xa6: output << AM_indexed_byte("LDA"); break; // LD (LDA indexed)
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case 0xb6: output << AM_extended_byte("LDA"); break; // LD (LDA extended)
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// LDA
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case 0x86: output << AM_immediate_byte("LDA"); break; // LD (LDA immediate)
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case 0x96: output << AM_direct_byte("LDA"); break; // LD (LDA direct)
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case 0xa6: output << AM_indexed_byte("LDA"); break; // LD (LDA indexed)
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case 0xb6: output << AM_extended_byte("LDA"); break; // LD (LDA extended)
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//// LDB
|
||||
case 0xc6: output << AM_immediate_byte("LDB"); break; // LD (LDB immediate)
|
||||
case 0xd6: output << AM_direct_byte("LDB"); break; // LD (LDB direct)
|
||||
case 0xe6: output << AM_indexed_byte("LDB"); break; // LD (LDB indexed)
|
||||
case 0xf6: output << AM_extended_byte("LDB"); break; // LD (LDB extended)
|
||||
// LDB
|
||||
case 0xc6: output << AM_immediate_byte("LDB"); break; // LD (LDB immediate)
|
||||
case 0xd6: output << AM_direct_byte("LDB"); break; // LD (LDB direct)
|
||||
case 0xe6: output << AM_indexed_byte("LDB"); break; // LD (LDB indexed)
|
||||
case 0xf6: output << AM_extended_byte("LDB"); break; // LD (LDB extended)
|
||||
|
||||
//// LDD
|
||||
case 0xcc: output << AM_immediate_word("LDD"); break; // LD (LDD immediate)
|
||||
//case 0xdc: D() = ld(AM_direct_word()); break; // LD (LDD direct)
|
||||
//case 0xec: D() = ld(AM_indexed_word()); break; // LD (LDD indexed)
|
||||
//case 0xfc: D() = ld(AM_extended_word()); break; // LD (LDD extended)
|
||||
// LDD
|
||||
case 0xcc: output << AM_immediate_word("LDD"); break; // LD (LDD immediate)
|
||||
case 0xdc: output << AM_direct_word("LDD"); break; // LD (LDD direct)
|
||||
case 0xec: output << AM_indexed_word("LDD"); break; // LD (LDD indexed)
|
||||
case 0xfc: output << AM_extended_word("LDD"); break; // LD (LDD extended)
|
||||
|
||||
//// LDU
|
||||
case 0xce: output << AM_immediate_word("LDU"); break; // LD (LDU immediate)
|
||||
//case 0xde: U() = ld(AM_direct_word()); break; // LD (LDU direct)
|
||||
//case 0xee: U() = ld(AM_indexed_word()); break; // LD (LDU indexed)
|
||||
//case 0xfe: U() = ld(AM_extended_word()); break; // LD (LDU extended)
|
||||
// LDU
|
||||
case 0xce: output << AM_immediate_word("LDU"); break; // LD (LDU immediate)
|
||||
case 0xde: output << AM_direct_word("LDU"); break; // LD (LDU direct)
|
||||
case 0xee: output << AM_indexed_word("LDU"); break; // LD (LDU indexed)
|
||||
case 0xfe: output << AM_extended_word("LDU"); break; // LD (LDU extended)
|
||||
|
||||
//// LDX
|
||||
case 0x8e: output << AM_immediate_word("LDX"); break; // LD (LDX immediate)
|
||||
//case 0x9e: X() = ld(AM_direct_word()); break; // LD (LDX direct)
|
||||
//case 0xae: X() = ld(AM_indexed_word()); break; // LD (LDX indexed)
|
||||
//case 0xbe: X() = ld(AM_extended_word()); break; // LD (LDX extended)
|
||||
// LDX
|
||||
case 0x8e: output << AM_immediate_word("LDX"); break; // LD (LDX immediate)
|
||||
case 0x9e: output << AM_direct_word("LDX"); break; // LD (LDX direct)
|
||||
case 0xae: output << AM_indexed_word("LDX"); break; // LD (LDX indexed)
|
||||
case 0xbe: output << AM_extended_word("LDX"); break; // LD (LDX extended)
|
||||
|
||||
//// LEA
|
||||
//case 0x30: adjustZero(X() = Address_indexed()); break; // LEA (LEAX indexed)
|
||||
case 0x31: output << Address_indexed("LEAY"); break; // LEA (LEAY indexed)
|
||||
//case 0x32: S() = Address_indexed(); break; // LEA (LEAS indexed)
|
||||
//case 0x33: U() = Address_indexed(); break; // LEA (LEAU indexed)
|
||||
// LEA
|
||||
case 0x30: output << Address_indexed("LEAX"); break; // LEA (LEAX indexed)
|
||||
case 0x31: output << Address_indexed("LEAY"); break; // LEA (LEAY indexed)
|
||||
case 0x32: output << Address_indexed("LEAS"); break; // LEA (LEAS indexed)
|
||||
case 0x33: output << Address_indexed("LEAU"); break; // LEA (LEAU indexed)
|
||||
|
||||
//// LSR
|
||||
//case 0x04: BUS().write(lsr(AM_direct_byte())); break; // LSR (direct)
|
||||
//case 0x44: A() = lsr(A()); break; // LSR (LSRA inherent)
|
||||
//case 0x54: B() = lsr(B()); break; // LSR (LSRB inherent)
|
||||
//case 0x64: BUS().write(lsr(AM_indexed_byte())); break; // LSR (indexed)
|
||||
//case 0x74: BUS().write(lsr(AM_extended_byte())); break; // LSR (extended)
|
||||
// LSR
|
||||
case 0x04: output << AM_direct_byte("LSR"); break; // LSR (direct)
|
||||
case 0x44: output << "\tLSRA"; break; // LSR (LSRA inherent)
|
||||
case 0x54: output << "\tLSRB";; break; // LSR (LSRB inherent)
|
||||
case 0x64: output << AM_indexed_byte("LSR"); break; // LSR (indexed)
|
||||
case 0x74: output << AM_extended_byte("LSR"); break; // LSR (extended)
|
||||
|
||||
//// MUL
|
||||
//case 0x3d: D() = mul(A(), B()); break; // MUL (inherent)
|
||||
// MUL
|
||||
case 0x3d: output << "\tMUL";; break; // MUL (inherent)
|
||||
|
||||
//// NEG
|
||||
//case 0x00: BUS().write(neg(AM_direct_byte())); break; // NEG (direct)
|
||||
//case 0x40: A() = neg(A()); break; // NEG (NEGA, inherent)
|
||||
//case 0x50: B() = neg(B()); break; // NEG (NEGB, inherent)
|
||||
//case 0x60: BUS().write(neg(AM_indexed_byte())); break; // NEG (indexed)
|
||||
//case 0x70: BUS().write(neg(AM_extended_byte())); break; // NEG (extended)
|
||||
// NEG
|
||||
case 0x00: output << AM_direct_byte("NEG"); break; // NEG (direct)
|
||||
case 0x40: output << "\tNEGA"; break; // NEG (NEGA, inherent)
|
||||
case 0x50: output << "\tNEGB"; break; // NEG (NEGB, inherent)
|
||||
case 0x60: output << AM_indexed_byte("NEG"); break; // NEG (indexed)
|
||||
case 0x70: output << AM_extended_byte("NEG"); break; // NEG (extended)
|
||||
|
||||
//// NOP
|
||||
//case 0x12: break; // NOP (inherent)
|
||||
// NOP
|
||||
case 0x12: output << "\tNOP"; break; // NOP (inherent)
|
||||
|
||||
//// OR
|
||||
// OR
|
||||
|
||||
//// ORA
|
||||
//case 0x8a: A() = orr(A(), AM_immediate_byte()); break; // OR (ORA immediate)
|
||||
//case 0x9a: A() = orr(A(), AM_direct_byte()); break; // OR (ORA direct)
|
||||
//case 0xaa: A() = orr(A(), AM_indexed_byte()); break; // OR (ORA indexed)
|
||||
//case 0xba: A() = orr(A(), AM_extended_byte()); break; // OR (ORA extended)
|
||||
// ORA
|
||||
case 0x8a: output << AM_immediate_byte("ORA"); break; // OR (ORA immediate)
|
||||
case 0x9a: output << AM_direct_byte("ORA"); break; // OR (ORA direct)
|
||||
case 0xaa: output << AM_indexed_byte("ORA"); break; // OR (ORA indexed)
|
||||
case 0xba: output << AM_extended_byte("ORA"); break; // OR (ORA extended)
|
||||
|
||||
//// ORB
|
||||
//case 0xca: A() = orr(A(), AM_immediate_byte()); break; // OR (ORB immediate)
|
||||
//case 0xda: A() = orr(A(), AM_direct_byte()); break; // OR (ORB direct)
|
||||
//case 0xea: A() = orr(A(), AM_indexed_byte()); break; // OR (ORB indexed)
|
||||
//case 0xfa: A() = orr(A(), AM_extended_byte()); break; // OR (ORB extended)
|
||||
// ORB
|
||||
case 0xca: output << AM_immediate_byte("ORB"); break; // OR (ORB immediate)
|
||||
case 0xda: output << AM_direct_byte("ORB"); break; // OR (ORB direct)
|
||||
case 0xea: output << AM_indexed_byte("ORB"); break; // OR (ORB indexed)
|
||||
case 0xfa: output << AM_extended_byte("ORB"); break; // OR (ORB extended)
|
||||
|
||||
//// ORCC
|
||||
//case 0x1a: CC() |= AM_immediate_byte(); break; // OR (ORCC immediate)
|
||||
// ORCC
|
||||
case 0x1a: output << AM_immediate_byte("ORCC"); break; // OR (ORCC immediate)
|
||||
|
||||
//// PSH
|
||||
//case 0x34: pshs(AM_immediate_byte()); break; // PSH (PSHS immediate)
|
||||
//case 0x36: pshu(AM_immediate_byte()); break; // PSH (PSHU immediate)
|
||||
// PSH
|
||||
case 0x34: output << AM_immediate_byte("PSHS"); break; // PSH (PSHS immediate)
|
||||
case 0x36: output << AM_immediate_byte("PSHU"); break; // PSH (PSHU immediate)
|
||||
|
||||
//// PUL
|
||||
//case 0x35: puls(AM_immediate_byte()); break; // PUL (PULS immediate)
|
||||
//case 0x37: pulu(AM_immediate_byte()); break; // PUL (PULU immediate)
|
||||
// PUL
|
||||
case 0x35: output << AM_immediate_byte("PULS"); break; // PUL (PULS immediate)
|
||||
case 0x37: output << AM_immediate_byte("PULU"); break; // PUL (PULU immediate)
|
||||
|
||||
//// ROL
|
||||
//case 0x09: BUS().write(rol(AM_direct_byte())); break; // ROL (direct)
|
||||
//case 0x49: A() = rol(A()); break; // ROL (ROLA inherent)
|
||||
//case 0x59: B() = rol(B()); break; // ROL (ROLB inherent)
|
||||
//case 0x69: BUS().write(rol(AM_indexed_byte())); break; // ROL (indexed)
|
||||
//case 0x79: BUS().write(rol(AM_extended_byte())); break; // ROL (extended)
|
||||
// ROL
|
||||
case 0x09: output << AM_direct_byte("ROL"); break; // ROL (direct)
|
||||
case 0x49: output << "\tROLA"; break; // ROL (ROLA inherent)
|
||||
case 0x59: output << "\tROLB"; break; // ROL (ROLB inherent)
|
||||
case 0x69: output << AM_indexed_byte("ROL"); break; // ROL (indexed)
|
||||
case 0x79: output << AM_extended_byte("ROL"); break; // ROL (extended)
|
||||
|
||||
//// ROR
|
||||
//case 0x06: BUS().write(ror(AM_direct_byte())); break; // ROR (direct)
|
||||
//case 0x46: A() = ror(A()); break; // ROR (RORA inherent)
|
||||
//case 0x56: B() = ror(B()); break; // ROR (RORB inherent)
|
||||
//case 0x66: BUS().write(ror(AM_indexed_byte())); break; // ROR (indexed)
|
||||
//case 0x76: BUS().write(ror(AM_extended_byte())); break; // ROR (extended)
|
||||
// ROR
|
||||
case 0x06: output << AM_direct_byte("ROR"); break; // ROR (direct)
|
||||
case 0x46: output << "\tRORA"; break; // ROR (RORA inherent)
|
||||
case 0x56: output << "\tRORB"; break; // ROR (RORB inherent)
|
||||
case 0x66: output << AM_indexed_byte("ROR"); break; // ROR (indexed)
|
||||
case 0x76: output << AM_extended_byte("ROR"); break; // ROR (extended)
|
||||
|
||||
//// RTI
|
||||
//case 0x3B: rti(); break; // RTI (inherent)
|
||||
// RTI
|
||||
case 0x3B: output << "\tRTI"; break; // RTI (inherent)
|
||||
|
||||
//// RTS
|
||||
//case 0x39: rts(); break; // RTS (inherent)
|
||||
// RTS
|
||||
case 0x39: output << "\tRTS";; break; // RTS (inherent)
|
||||
|
||||
//// SBC
|
||||
// SBC
|
||||
|
||||
//// SBCA
|
||||
//case 0x82: A() = sbc(A(), AM_immediate_byte()); break; // SBC (SBCA immediate)
|
||||
//case 0x92: A() = sbc(A(), AM_direct_byte()); break; // SBC (SBCA direct)
|
||||
//case 0xa2: A() = sbc(A(), AM_indexed_byte()); break; // SBC (SBCA indexed)
|
||||
//case 0xb2: A() = sbc(A(), AM_extended_byte()); break; // SBC (SBCB extended)
|
||||
// SBCA
|
||||
case 0x82: output << AM_immediate_byte("SBCA"); break; // SBC (SBCA immediate)
|
||||
case 0x92: output << AM_direct_byte("SBCA"); break; // SBC (SBCA direct)
|
||||
case 0xa2: output << AM_indexed_byte("SBCA"); break; // SBC (SBCA indexed)
|
||||
case 0xb2: output << AM_extended_byte("SBCA"); break; // SBC (SBCA extended)
|
||||
|
||||
//// SBCB
|
||||
//case 0xc2: B() = sbc(B(), AM_immediate_byte()); break; // SBC (SBCB immediate)
|
||||
//case 0xd2: B() = sbc(B(), AM_direct_byte()); break; // SBC (SBCB direct)
|
||||
//case 0xe2: B() = sbc(B(), AM_indexed_byte()); break; // SBC (SBCB indexed)
|
||||
//case 0xf2: B() = sbc(B(), AM_extended_byte()); break; // SBC (SBCB extended)
|
||||
// SBCB
|
||||
case 0xc2: output << AM_immediate_byte("SBCB"); break; // SBC (SBCB immediate)
|
||||
case 0xd2: output << AM_direct_byte("SBCB"); break; // SBC (SBCB direct)
|
||||
case 0xe2: output << AM_indexed_byte("SBCB"); break; // SBC (SBCB indexed)
|
||||
case 0xf2: output << AM_extended_byte("SBCB"); break; // SBC (SBCB extended)
|
||||
|
||||
//// SEX
|
||||
//case 0x1d: A() = sex(B()); break; // SEX (inherent)
|
||||
// SEX
|
||||
case 0x1d: output << "\tSEX"; break; // SEX (inherent)
|
||||
|
||||
//// ST
|
||||
// ST
|
||||
|
||||
//// STA
|
||||
//case 0x97: BUS().write(Address_direct(), st(A())); break; // ST (STA direct)
|
||||
case 0xa7: output << Address_indexed("STA"); break; // ST (STA indexed)
|
||||
case 0xb7: output << Address_extended("STA"); break; // ST (STA extended)
|
||||
// STA
|
||||
case 0x97: output << Address_direct("STA"); break; // ST (STA direct)
|
||||
case 0xa7: output << Address_indexed("STA"); break; // ST (STA indexed)
|
||||
case 0xb7: output << Address_extended("STA"); break; // ST (STA extended)
|
||||
|
||||
//// STB
|
||||
//case 0xd7: BUS().write(Address_direct(), st(B())); break; // ST (STB direct)
|
||||
case 0xe7: output << Address_indexed("STB"); break; // ST (STB indexed)
|
||||
//case 0xf7: BUS().write(Address_extended(), st(B())); break; // ST (STB extended)
|
||||
// STB
|
||||
case 0xd7: output << Address_direct("STB"); break; // ST (STB direct)
|
||||
case 0xe7: output << Address_indexed("STB"); break; // ST (STB indexed)
|
||||
case 0xf7: output << Address_extended("STB"); break; // ST (STB extended)
|
||||
|
||||
//// STD
|
||||
//case 0xdd: Processor::setWord(Address_direct(), st(D())); break; // ST (STD direct)
|
||||
//case 0xed: Processor::setWord(Address_indexed(), st(D())); break; // ST (STD indexed)
|
||||
//case 0xfd: Processor::setWord(Address_extended(), st(D())); break; // ST (STD extended)
|
||||
// STD
|
||||
case 0xdd: output << Address_direct("STD"); break; // ST (STD direct)
|
||||
case 0xed: output << Address_indexed("STD"); break; // ST (STD indexed)
|
||||
case 0xfd: output << Address_extended("STD"); break; // ST (STD extended)
|
||||
|
||||
//// STU
|
||||
//case 0xdf: Processor::setWord(Address_direct(), st(U())); break; // ST (STU direct)
|
||||
//case 0xef: Processor::setWord(Address_indexed(), st(U())); break; // ST (STU indexed)
|
||||
//case 0xff: Processor::setWord(Address_extended(), st(U())); break; // ST (STU extended)
|
||||
// STU
|
||||
case 0xdf: output << Address_direct("STU"); break; // ST (STU direct)
|
||||
case 0xef: output << Address_indexed("STU"); break; // ST (STU indexed)
|
||||
case 0xff: output << Address_extended("STU"); break; // ST (STU extended)
|
||||
|
||||
//// STX
|
||||
//case 0x9f: Processor::setWord(Address_direct(), st(X())); break; // ST (STX direct)
|
||||
//case 0xaf: Processor::setWord(Address_indexed(), st(X())); break; // ST (STX indexed)
|
||||
//case 0xbf: Processor::setWord(Address_extended(), st(X())); break; // ST (STX extended)
|
||||
// STX
|
||||
case 0x9f: output << Address_direct("STX"); break; // ST (STX direct)
|
||||
case 0xaf: output << Address_indexed("STX"); break; // ST (STX indexed)
|
||||
case 0xbf: output << Address_extended("STX"); break; // ST (STX extended)
|
||||
|
||||
//// SUB
|
||||
// SUB
|
||||
|
||||
//// SUBA
|
||||
//case 0x80: A() = sub(A(), AM_immediate_byte()); break; // SUB (SUBA immediate)
|
||||
//case 0x90: A() = sub(A(), AM_direct_byte()); break; // SUB (SUBA direct)
|
||||
//case 0xa0: A() = sub(A(), AM_indexed_byte()); break; // SUB (SUBA indexed)
|
||||
//case 0xb0: A() = sub(A(), AM_extended_byte()); break; // SUB (SUBA extended)
|
||||
// SUBA
|
||||
case 0x80: output << AM_immediate_byte("SUBA"); break; // SUB (SUBA immediate)
|
||||
case 0x90: output << AM_direct_byte("SUBA"); break; // SUB (SUBA direct)
|
||||
case 0xa0: output << AM_indexed_byte("SUBA"); break; // SUB (SUBA indexed)
|
||||
case 0xb0: output << AM_extended_byte("SUBA"); break; // SUB (SUBA extended)
|
||||
|
||||
//// SUBB
|
||||
//case 0xc0: B() = sub(B(), AM_immediate_byte()); break; // SUB (SUBB immediate)
|
||||
//case 0xd0: B() = sub(B(), AM_direct_byte()); break; // SUB (SUBB direct)
|
||||
//case 0xe0: B() = sub(B(), AM_indexed_byte()); break; // SUB (SUBB indexed)
|
||||
//case 0xf0: B() = sub(B(), AM_extended_byte()); break; // SUB (SUBB extended)
|
||||
// SUBB
|
||||
case 0xc0: output << AM_immediate_byte("SUBB"); break; // SUB (SUBB immediate)
|
||||
case 0xd0: output << AM_direct_byte("SUBB"); break; // SUB (SUBB direct)
|
||||
case 0xe0: output << AM_indexed_byte("SUBB"); break; // SUB (SUBB indexed)
|
||||
case 0xf0: output << AM_extended_byte("SUBB"); break; // SUB (SUBB extended)
|
||||
|
||||
//// SUBD
|
||||
//case 0x83: D() = sub(D(), AM_immediate_word()); break; // SUB (SUBD immediate)
|
||||
//case 0x93: D() = sub(D(), AM_direct_word()); break; // SUB (SUBD direct)
|
||||
//case 0xa3: D() = sub(D(), AM_indexed_word()); break; // SUB (SUBD indexed)
|
||||
//case 0xb3: D() = sub(D(), AM_extended_word()); break; // SUB (SUBD extended)
|
||||
// SUBD
|
||||
case 0x83: output << AM_immediate_word("SUBD"); break; // SUB (SUBD immediate)
|
||||
case 0x93: output << AM_direct_word("SUBD"); break; // SUB (SUBD direct)
|
||||
case 0xa3: output << AM_indexed_word("SUBD"); break; // SUB (SUBD indexed)
|
||||
case 0xb3: output << AM_extended_word("SUBD"); break; // SUB (SUBD extended)
|
||||
|
||||
//// SWI
|
||||
//case 0x3f: swi(); break; // SWI (inherent)
|
||||
// SWI
|
||||
case 0x3f: output << "\tSWI"; break; // SWI (inherent)
|
||||
|
||||
//// SYNC
|
||||
//case 0x13: halt(); break; // SYNC (inherent)
|
||||
// SYNC
|
||||
case 0x13: output << "\tSYNC"; break; // SYNC (inherent)
|
||||
|
||||
//// TFR
|
||||
case 0x1f: output << tfr(); break; // TFR (immediate)
|
||||
// TFR
|
||||
case 0x1f: output << tfr("tfr"); break; // TFR (immediate)
|
||||
|
||||
//// TST
|
||||
//case 0x0d: tst(AM_direct_byte()); break; // TST (direct)
|
||||
//case 0x4d: tst(A()); break; // TST (TSTA inherent)
|
||||
//case 0x5d: tst(B()); break; // TST (TSTB inherent)
|
||||
//case 0x6d: tst(AM_indexed_byte()); break; // TST (indexed)
|
||||
//case 0x7d: tst(AM_extended_byte()); break; // TST (extended)
|
||||
// TST
|
||||
case 0x0d: output << AM_direct_byte("TST"); break; // TST (direct)
|
||||
case 0x4d: output << "\tTSTA"; break; // TST (TSTA inherent)
|
||||
case 0x5d: output << "\tTSTB"; break; // TST (TSTB inherent)
|
||||
case 0x6d: output << AM_indexed_byte("TST"); break; // TST (indexed)
|
||||
case 0x7d: output << AM_extended_byte("TST"); break; // TST (extended)
|
||||
|
||||
//// Branching
|
||||
// Branching
|
||||
|
||||
//case 0x16: jump(Address_relative_word()); break; // BRA (LBRA relative)
|
||||
//case 0x17: call(Address_relative_word()); break; // BSR (LBSR relative)
|
||||
//case 0x20: jump(Address_relative_byte()); break; // BRA (relative)
|
||||
//case 0x21: Address_relative_byte(); break; // BRN (relative)
|
||||
//case 0x22: branchShort(BHI()); break; // BHI (relative)
|
||||
//case 0x23: branchShort(BLS()); break; // BLS (relative)
|
||||
//case 0x24: branchShort(!carry()); break; // BCC (relative)
|
||||
//case 0x25: branchShort(carry()); break; // BCS (relative)
|
||||
case 0x26: output << branchShort("BNE"); break; // BNE (relative)
|
||||
case 0x27: output << branchShort("BEQ"); break; // BEQ (relative)
|
||||
//case 0x28: branchShort(!overflow()); break; // BVC (relative)
|
||||
//case 0x29: branchShort(overflow()); break; // BVS (relative)
|
||||
//case 0x2a: branchShort(!negative()); break; // BPL (relative)
|
||||
//case 0x2b: branchShort(negative()); break; // BMI (relative)
|
||||
//case 0x2c: branchShort(BGE()); break; // BGE (relative)
|
||||
//case 0x2d: branchShort(BLT()); break; // BLT (relative)
|
||||
//case 0x2e: branchShort(BGT()); break; // BGT (relative)
|
||||
//case 0x2f: branchShort(BLE()); break; // BLE (relative)
|
||||
case 0x16: output << Address_relative_word("LBRA"); break; // BRA (LBRA relative)
|
||||
case 0x17: output << Address_relative_word("LBSR"); break; // BSR (LBSR relative)
|
||||
case 0x20: output << Address_relative_byte("BRA"); break; // BRA (relative)
|
||||
case 0x21: output << Address_relative_byte("BRN"); break; // BRN (relative)
|
||||
case 0x22: output << branchShort("BHI"); break; // BHI (relative)
|
||||
case 0x23: output << branchShort("BLS"); break; // BLS (relative)
|
||||
case 0x24: output << branchShort("BCC"); break; // BCC (relative)
|
||||
case 0x25: output << branchShort("BCS"); break; // BCS (relative)
|
||||
case 0x26: output << branchShort("BNE"); break; // BNE (relative)
|
||||
case 0x27: output << branchShort("BEQ"); break; // BEQ (relative)
|
||||
case 0x28: output << branchShort("BVC"); break; // BVC (relative)
|
||||
case 0x29: output << branchShort("BVS"); break; // BVS (relative)
|
||||
case 0x2a: output << branchShort("BPL"); break; // BPL (relative)
|
||||
case 0x2b: output << branchShort("BMI"); break; // BMI (relative)
|
||||
case 0x2c: output << branchShort("BGE"); break; // BGE (relative)
|
||||
case 0x2d: output << branchShort("BLT"); break; // BLT (relative)
|
||||
case 0x2e: output << branchShort("BGT"); break; // BGT (relative)
|
||||
case 0x2f: output << branchShort("BLE"); break; // BLE (relative)
|
||||
|
||||
//case 0x8d: call(Address_relative_byte()); break; // BSR (relative)
|
||||
case 0x8d: output << Address_relative_byte("BSR"); break; // BSR (relative)
|
||||
|
||||
//default:
|
||||
// UNREACHABLE;
|
||||
default:
|
||||
UNREACHABLE;
|
||||
}
|
||||
|
||||
return output.str();
|
||||
@ -505,64 +509,64 @@ std::string EightBit::Disassembly::disassemble10() {
|
||||
// CMP
|
||||
|
||||
// CMPD
|
||||
//case 0x83: cmp(D(), AM_immediate_word()); break; // CMP (CMPD, immediate)
|
||||
//case 0x93: cmp(D(), AM_direct_word()); break; // CMP (CMPD, direct)
|
||||
//case 0xa3: cmp(D(), AM_indexed_word()); break; // CMP (CMPD, indexed)
|
||||
//case 0xb3: cmp(D(), AM_extended_word()); break; // CMP (CMPD, extended)
|
||||
case 0x83: output << AM_immediate_word("CMPD"); break; // CMP (CMPD, immediate)
|
||||
case 0x93: output << AM_direct_word("CMPD"); break; // CMP (CMPD, direct)
|
||||
case 0xa3: output << AM_indexed_word("CMPD"); break; // CMP (CMPD, indexed)
|
||||
case 0xb3: output << AM_extended_word("CMPD"); break; // CMP (CMPD, extended)
|
||||
|
||||
//// CMPY
|
||||
//case 0x8c: cmp(Y(), AM_immediate_word()); break; // CMP (CMPY, immediate)
|
||||
//case 0x9c: cmp(Y(), AM_direct_word()); break; // CMP (CMPY, direct)
|
||||
//case 0xac: cmp(Y(), AM_indexed_word()); break; // CMP (CMPY, indexed)
|
||||
//case 0xbc: cmp(Y(), AM_extended_word()); break; // CMP (CMPY, extended)
|
||||
// CMPY
|
||||
case 0x8c: output << AM_immediate_word("CMPY"); break; // CMP (CMPY, immediate)
|
||||
case 0x9c: output << AM_direct_word("CMPY"); break; // CMP (CMPY, direct)
|
||||
case 0xac: output << AM_indexed_word("CMPY"); break; // CMP (CMPY, indexed)
|
||||
case 0xbc: output << AM_extended_word("CMPY"); break; // CMP (CMPY, extended)
|
||||
|
||||
//// LD
|
||||
// LD
|
||||
|
||||
//// LDS
|
||||
case 0xce: output << AM_immediate_word("LDS"); break; // LD (LDS immediate)
|
||||
//case 0xde: S() = ld(AM_direct_word()); break; // LD (LDS direct)
|
||||
//case 0xee: S() = ld(AM_indexed_word()); break; // LD (LDS indexed)
|
||||
//case 0xfe: S() = ld(AM_extended_word()); break; // LD (LDS extended)
|
||||
// LDS
|
||||
case 0xce: output << AM_immediate_word("LDS"); break; // LD (LDS immediate)
|
||||
case 0xde: output << AM_direct_word("LDS"); break; // LD (LDS direct)
|
||||
case 0xee: output << AM_indexed_word("LDS"); break; // LD (LDS indexed)
|
||||
case 0xfe: output << AM_extended_word("LDS"); break; // LD (LDS extended)
|
||||
|
||||
//// LDY
|
||||
//case 0x8e: Y() = ld(AM_immediate_word()); break; // LD (LDY immediate)
|
||||
//case 0x9e: Y() = ld(AM_direct_word()); break; // LD (LDY direct)
|
||||
//case 0xae: Y() = ld(AM_indexed_word()); break; // LD (LDY indexed)
|
||||
//case 0xbe: Y() = ld(AM_extended_word()); break; // LD (LDY extended)
|
||||
// LDY
|
||||
case 0x8e: output << AM_immediate_word("LDY"); break; // LD (LDY immediate)
|
||||
case 0x9e: output << AM_direct_word("LDY"); break; // LD (LDY direct)
|
||||
case 0xae: output << AM_indexed_word("LDY"); break; // LD (LDY indexed)
|
||||
case 0xbe: output << AM_extended_word("LDY"); break; // LD (LDY extended)
|
||||
|
||||
//// Branching
|
||||
// Branching
|
||||
|
||||
//case 0x21: Address_relative_word(); break; // BRN (LBRN relative)
|
||||
//case 0x22: if (branchLong(BHI())) addCycle(); break; // BHI (LBHI relative)
|
||||
//case 0x23: if (branchLong(BLS())) addCycle(); break; // BLS (LBLS relative)
|
||||
//case 0x24: if (branchLong(!carry())) addCycle(); break; // BCC (LBCC relative)
|
||||
//case 0x25: if (branchLong(carry())) addCycle(); break; // BCS (LBCS relative)
|
||||
//case 0x26: if (branchLong(!zero())) addCycle(); break; // BNE (LBNE relative)
|
||||
//case 0x27: if (branchLong(zero())) addCycle(); break; // BEQ (LBEQ relative)
|
||||
//case 0x28: if (branchLong(!overflow())) addCycle(); break; // BVC (LBVC relative)
|
||||
//case 0x29: if (branchLong(overflow())) addCycle(); break; // BVS (LBVS relative)
|
||||
//case 0x2a: if (branchLong(!negative())) addCycle(); break; // BPL (LBPL relative)
|
||||
//case 0x2b: if (branchLong(negative())) addCycle(); break; // BMI (LBMI relative)
|
||||
//case 0x2c: if (branchLong(BGE())) addCycle(); break; // BGE (LBGE relative)
|
||||
//case 0x2d: if (branchLong(BLT())) addCycle(); break; // BLT (LBLT relative)
|
||||
//case 0x2e: if (branchLong(BGT())) addCycle(); break; // BGT (LBGT relative)
|
||||
//case 0x2f: if (branchLong(BLE())) addCycle(); break; // BLE (LBLE relative)
|
||||
case 0x21: output << Address_relative_word("LBRN"); break; // BRN (LBRN relative)
|
||||
case 0x22: output << branchLong("LBHI"); break; // BHI (LBHI relative)
|
||||
case 0x23: output << branchLong("LBLS"); break; // BLS (LBLS relative)
|
||||
case 0x24: output << branchLong("LBCC"); break; // BCC (LBCC relative)
|
||||
case 0x25: output << branchLong("LBCS"); break; // BCS (LBCS relative)
|
||||
case 0x26: output << branchLong("LBNE"); break; // BNE (LBNE relative)
|
||||
case 0x27: output << branchLong("LBEQ"); break; // BEQ (LBEQ relative)
|
||||
case 0x28: output << branchLong("LBVC"); break; // BVC (LBVC relative)
|
||||
case 0x29: output << branchLong("LBVS"); break; // BVS (LBVS relative)
|
||||
case 0x2a: output << branchLong("LBPL"); break; // BPL (LBPL relative)
|
||||
case 0x2b: output << branchLong("LBMI"); break; // BMI (LBMI relative)
|
||||
case 0x2c: output << branchLong("LBGE"); break; // BGE (LBGE relative)
|
||||
case 0x2d: output << branchLong("LBLT"); break; // BLT (LBLT relative)
|
||||
case 0x2e: output << branchLong("LBGT"); break; // BGT (LBGT relative)
|
||||
case 0x2f: output << branchLong("LBLE"); break; // BLE (LBLE relative)
|
||||
|
||||
//// STS
|
||||
//case 0xdf: Processor::setWord(Address_direct(), st(S())); break; // ST (STS direct)
|
||||
//case 0xef: Processor::setWord(Address_indexed(), st(S())); break; // ST (STS indexed)
|
||||
//case 0xff: Processor::setWord(Address_extended(), st(S())); break; // ST (STS extended)
|
||||
// STS
|
||||
case 0xdf: output << Address_direct("STS"); break; // ST (STS direct)
|
||||
case 0xef: output << Address_indexed("STS"); break; // ST (STS indexed)
|
||||
case 0xff: output << Address_extended("STS"); break; // ST (STS extended)
|
||||
|
||||
//// STY
|
||||
//case 0x9f: Processor::setWord(Address_extended(), st(Y())); break; // ST (STY direct)
|
||||
//case 0xaf: Processor::setWord(Address_indexed(), st(Y())); break; // ST (STY indexed)
|
||||
//case 0xbf: Processor::setWord(Address_extended(), st(Y())); break; // ST (STY extended)
|
||||
// STY
|
||||
case 0x9f: output << Address_extended("STY"); break; // ST (STY direct)
|
||||
case 0xaf: output << Address_indexed("STY"); break; // ST (STY indexed)
|
||||
case 0xbf: output << Address_extended("STY"); break; // ST (STY extended)
|
||||
|
||||
//// SWI
|
||||
//case 0x3f: swi2(); break; // SWI (SWI2 inherent)
|
||||
// SWI
|
||||
case 0x3f: output << "\tSWI2";; break; // SWI (SWI2 inherent)
|
||||
|
||||
//default:
|
||||
// UNREACHABLE;
|
||||
default:
|
||||
UNREACHABLE;
|
||||
}
|
||||
|
||||
m_prefix10 = false;
|
||||
@ -579,25 +583,25 @@ std::string EightBit::Disassembly::disassemble11() {
|
||||
|
||||
switch (opcode) {
|
||||
|
||||
//// CMP
|
||||
// CMP
|
||||
|
||||
//// CMPU
|
||||
//case 0x83: cmp(U(), AM_immediate_word()); break; // CMP (CMPU, immediate)
|
||||
//case 0x93: cmp(U(), AM_direct_word()); break; // CMP (CMPU, direct)
|
||||
//case 0xa3: cmp(U(), AM_indexed_word()); break; // CMP (CMPU, indexed)
|
||||
//case 0xb3: cmp(U(), AM_extended_word()); break; // CMP (CMPU, extended)
|
||||
// CMPU
|
||||
case 0x83: output << AM_immediate_word("CMPU"); break; // CMP (CMPU, immediate)
|
||||
case 0x93: output << AM_direct_word("CMPU"); break; // CMP (CMPU, direct)
|
||||
case 0xa3: output << AM_indexed_word("CMPU"); break; // CMP (CMPU, indexed)
|
||||
case 0xb3: output << AM_extended_word("CMPU"); break; // CMP (CMPU, extended)
|
||||
|
||||
//// CMPS
|
||||
//case 0x8c: cmp(S(), AM_immediate_word()); break; // CMP (CMPS, immediate)
|
||||
//case 0x9c: cmp(S(), AM_direct_word()); break; // CMP (CMPS, direct)
|
||||
//case 0xac: cmp(S(), AM_indexed_word()); break; // CMP (CMPS, indexed)
|
||||
//case 0xbc: cmp(S(), AM_extended_word()); break; // CMP (CMPS, extended)
|
||||
// CMPS
|
||||
case 0x8c: output << AM_immediate_word("CMPS"); break; // CMP (CMPS, immediate)
|
||||
case 0x9c: output << AM_direct_word("CMPS"); break; // CMP (CMPS, direct)
|
||||
case 0xac: output << AM_indexed_word("CMPS"); break; // CMP (CMPS, indexed)
|
||||
case 0xbc: output << AM_extended_word("CMPS"); break; // CMP (CMPS, extended)
|
||||
|
||||
//// SWI
|
||||
//case 0x3f: swi3(); break; // SWI (SWI3 inherent)
|
||||
// SWI
|
||||
case 0x3f: output << "\tSWI3"; break; // SWI (SWI3 inherent)
|
||||
|
||||
//default:
|
||||
// UNREACHABLE;
|
||||
default:
|
||||
UNREACHABLE;
|
||||
}
|
||||
|
||||
m_prefix11 = false;
|
||||
@ -622,6 +626,16 @@ std::string EightBit::Disassembly::RR(int which) {
|
||||
}
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::Address_direct(std::string mnemomic) {
|
||||
std::ostringstream output;
|
||||
const auto address = getByte(++m_address);
|
||||
output
|
||||
<< dump_ByteValue(address)
|
||||
<< "\t" << mnemomic << "\t"
|
||||
<< "$" << dump_ByteValue(address);
|
||||
return output.str();
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::Address_indexed(std::string mnemomic) {
|
||||
|
||||
std::ostringstream output;
|
||||
@ -720,6 +734,16 @@ std::string EightBit::Disassembly::Address_relative_byte(std::string mnemomic) {
|
||||
return output.str();
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::Address_relative_word(std::string mnemomic) {
|
||||
std::ostringstream output;
|
||||
const auto word = getWord(++m_address);
|
||||
output
|
||||
<< dump_WordValue(word)
|
||||
<< "\t" << mnemomic << "\t"
|
||||
<< "$" << dump_WordValue(++m_address + (int16_t)word);
|
||||
return output.str();
|
||||
}
|
||||
|
||||
////
|
||||
|
||||
std::string EightBit::Disassembly::AM_immediate_byte(std::string mnemomic) {
|
||||
@ -743,21 +767,27 @@ std::string EightBit::Disassembly::AM_immediate_word(std::string mnemomic) {
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::AM_direct_byte(std::string mnemomic) {
|
||||
std::ostringstream output;
|
||||
output
|
||||
<< "\t**" << mnemomic << "**\t";
|
||||
return output.str();
|
||||
return Address_direct(mnemomic);
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::AM_direct_word(std::string mnemomic) {
|
||||
return Address_direct(mnemomic);
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::AM_indexed_byte(std::string mnemomic) {
|
||||
return Address_indexed(mnemomic);
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::AM_indexed_word(std::string mnemomic) {
|
||||
return Address_indexed(mnemomic);
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::AM_extended_byte(std::string mnemomic) {
|
||||
std::ostringstream output;
|
||||
output
|
||||
<< "\t**" << mnemomic << "**\t";
|
||||
return output.str();
|
||||
return Address_extended(mnemomic);
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::AM_extended_word(std::string mnemomic) {
|
||||
return Address_direct(mnemomic);
|
||||
}
|
||||
|
||||
////
|
||||
@ -767,10 +797,7 @@ std::string EightBit::Disassembly::branchShort(std::string mnemomic) {
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::branchLong(std::string mnemomic) {
|
||||
std::ostringstream output;
|
||||
output
|
||||
<< "\t**" << mnemomic << "**\t";
|
||||
return output.str();
|
||||
return Address_relative_word(mnemomic);
|
||||
}
|
||||
|
||||
////
|
||||
@ -809,26 +836,22 @@ std::string EightBit::Disassembly::referenceTransfer16(int specifier) {
|
||||
}
|
||||
}
|
||||
|
||||
std::string EightBit::Disassembly::tfr() {
|
||||
std::string EightBit::Disassembly::tfr(std::string mnemomic) {
|
||||
|
||||
std::ostringstream output;
|
||||
|
||||
output << "\t" << mnemomic << "\t";
|
||||
|
||||
const auto data = getByte(++m_address);
|
||||
const auto reg1 = Processor::highNibble(data);
|
||||
const auto reg2 = Processor::lowNibble(data);
|
||||
|
||||
const bool type8 = !!(reg1 & Processor::Bit3); // 8 bit transfer?
|
||||
const bool type8 = !!(reg1 & Processor::Bit3); // 8 bit?
|
||||
if (type8)
|
||||
output << referenceTransfer8(reg1) << "," << referenceTransfer8(reg2);
|
||||
else
|
||||
output << referenceTransfer16(reg1) << "," << referenceTransfer16(reg2);
|
||||
|
||||
std::string from = "unknown";
|
||||
std::string to = "unknown";
|
||||
if (type8) {
|
||||
from = referenceTransfer8(reg1);
|
||||
to = referenceTransfer8(reg2);
|
||||
} else {
|
||||
from = referenceTransfer16(reg1);
|
||||
to = referenceTransfer16(reg2);
|
||||
}
|
||||
|
||||
std::ostringstream output;
|
||||
output << "\tTFR\t" << from << "," << to;
|
||||
return output.str();
|
||||
}
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user