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Add undocumented 6502 instruction: SRE

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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2018-01-07 23:16:24 +00:00
parent 65b856611e
commit 4d9c0b490a
3 changed files with 20 additions and 3 deletions
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11
M6502/inc/mos6502.h
View File

@ -605,6 +605,17 @@ namespace EightBit {
ANDA(operand);
}
void EORA(uint8_t value) {
adjustNZ(A() ^= value);
}
void SRE(int bbb) {
auto operand = AM_01(bbb);
LSR(operand);
setByte(operand);
EORA(operand);
}
void ROR(uint8_t& output);
void LSR(uint8_t& output);

3
M6502/src/Disassembly.cpp
View File

@ -395,6 +395,9 @@ std::string EightBit::Disassembly::disassemble(uint16_t current) const {
case 0b001:
output << disassemble_AM_01(bbb, "*RLA");
break;
case 0b010:
output << disassemble_AM_01(bbb, "*SRE");
break;
case 0b100:
output << disassemble_AM_11(bbb, "*SAX");
break;

9
M6502/src/mos6502.cpp
View File

@ -9,8 +9,8 @@ EightBit::MOS6502::MOS6502(Bus& bus)
/* 1 */ 2, 5, 0, 7, 4, 4, 6, 6, 2, 4, 2, 6, 4, 4, 7, 6,
/* 2 */ 6, 6, 0, 8, 3, 3, 5, 5, 4, 2, 2, 0, 4, 4, 6, 6,
/* 3 */ 2, 5, 0, 7, 4, 4, 6, 6, 2, 4, 2, 6, 4, 4, 7, 6,
/* 4 */ 6, 6, 0, 0, 3, 3, 5, 0, 3, 2, 2, 0, 3, 4, 6, 0,
/* 5 */ 2, 5, 0, 0, 4, 4, 6, 0, 2, 4, 2, 0, 4, 4, 7, 0,
/* 4 */ 6, 6, 0, 8, 3, 3, 5, 5, 3, 2, 2, 0, 3, 4, 6, 6,
/* 5 */ 2, 5, 0, 7, 4, 4, 6, 6, 2, 4, 2, 6, 4, 4, 7, 6,
/* 6 */ 6, 6, 0, 0, 3, 3, 5, 0, 4, 2, 2, 0, 5, 4, 6, 0,
/* 7 */ 2, 5, 0, 0, 4, 4, 6, 0, 2, 4, 2, 0, 4, 4, 7, 0,
/* 8 */ 2, 6, 0, 6, 3, 3, 3, 3, 2, 0, 2, 0, 4, 4, 4, 4,
@ -300,7 +300,7 @@ int EightBit::MOS6502::execute(uint8_t cell) {
ANDA(AM_01(decoded.bbb));
break;
case 0b010: // EOR
adjustNZ(A() ^= AM_01(decoded.bbb));
EORA(AM_01(decoded.bbb));
break;
case 0b011: // ADC
A() = ADC(A(), AM_01(decoded.bbb));
@ -417,6 +417,9 @@ int EightBit::MOS6502::execute(uint8_t cell) {
case 0b001: // *RLA
RLA(decoded.bbb);
break;
case 0b010: // *SRE
SRE(decoded.bbb);
break;
case 0b100: // *SAX
AM_11(decoded.bbb, A() & X());
break;