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https://github.com/MoleskiCoder/EightBit.git
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Correct a couple of small oddities in the IntelProcessor InputOutput class.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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778aacaef6
commit
5ddbd8a5e8
@ -79,15 +79,15 @@ EightBit::MemoryMapping Fuse::TestRunner::mapping(uint16_t address) {
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const bool io = m_cpu.requestingIO();
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const bool io = m_cpu.requestingIO();
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if (io) {
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if (io) {
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m_ports.setAccessType(EightBit::InputOutput::AccessType::Unknown);
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m_ports.accessType() = EightBit::InputOutput::AccessType::Unknown;
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const bool reading = m_cpu.requestingRead();
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const bool reading = m_cpu.requestingRead();
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if (reading)
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if (reading)
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m_ports.setAccessType(EightBit::InputOutput::AccessType::Reading);
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m_ports.accessType() = EightBit::InputOutput::AccessType::Reading;
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const bool writing = m_cpu.requestingWrite();
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const bool writing = m_cpu.requestingWrite();
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if (writing)
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if (writing)
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m_ports.setAccessType(EightBit::InputOutput::AccessType::Writing);
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m_ports.accessType() = EightBit::InputOutput::AccessType::Writing;
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return {
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return {
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m_ports,
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m_ports,
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@ -20,24 +20,24 @@ namespace EightBit {
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int load(std::string path, int writeOffset = 0, int readOffset = 0, int limit = -1) override;
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int load(std::string path, int writeOffset = 0, int readOffset = 0, int limit = -1) override;
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int load(const std::vector<uint8_t>& bytes, int writeOffset = 0, int readOffset = 0, int limit = -1) override;
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int load(const std::vector<uint8_t>& bytes, int writeOffset = 0, int readOffset = 0, int limit = -1) override;
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[[nodiscard]] AccessType getAccessType() const noexcept { return m_access; }
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[[nodiscard]] const AccessType& accessType() const noexcept { return m_access; }
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void setAccessType(AccessType value) noexcept { m_access = value; }
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[[nodiscard]] AccessType& accessType() noexcept { return m_access; }
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auto readPort(uint8_t port, AccessType access) {
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[[nodiscard]] auto readPort(uint8_t port, AccessType access) {
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setAccessType(access);
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accessType() = access;
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return reference(port);
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return reference(port);
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}
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}
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auto readInputPort(uint8_t port) { return readPort(port, AccessType::Reading); }
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[[nodiscard]] auto readInputPort(uint8_t port) { return readPort(port, AccessType::Reading); }
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auto readOutputPort(uint8_t port) { return readPort(port, AccessType::Writing); }
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[[nodiscard]] auto readOutputPort(uint8_t port) { return readPort(port, AccessType::Writing); }
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void writePort(uint8_t port, uint8_t value, AccessType access) {
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void writePort(uint8_t port, uint8_t value, AccessType access) {
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setAccessType(access);
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accessType() = access;
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reference(port) = value;
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reference(port) = value;
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}
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}
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auto writeInputPort(uint8_t port, uint8_t value) { return writePort(port, value, AccessType::Reading); }
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void writeInputPort(uint8_t port, uint8_t value) { writePort(port, value, AccessType::Reading); }
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auto writeOutputPort(uint8_t port, uint8_t value) { return writePort(port, value, AccessType::Writing); }
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void writeOutputPort(uint8_t port, uint8_t value) { writePort(port, value, AccessType::Writing); }
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protected:
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protected:
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void poke(uint16_t address, uint8_t value) override;
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void poke(uint16_t address, uint8_t value) override;
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@ -15,12 +15,11 @@ uint8_t EightBit::InputOutput::peek(uint16_t) const {
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uint8_t& EightBit::InputOutput::reference(uint16_t address) {
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uint8_t& EightBit::InputOutput::reference(uint16_t address) {
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const auto port = register16_t(address).low;
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const auto port = register16_t(address).low;
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switch (getAccessType()) {
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switch (accessType()) {
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case AccessType::Reading:
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case AccessType::Reading:
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return m_input.reference(port);
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return m_input.reference(port);
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case AccessType::Writing:
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case AccessType::Writing:
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return m_output.reference(port);
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return m_output.reference(port);
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case AccessType::Unknown:
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default:
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default:
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throw std::logic_error("Unknown I/O access type.");
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throw std::logic_error("Unknown I/O access type.");
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}
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}
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