More C++17 tidying up. Should be no user visible changes.

Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2021-01-06 15:30:26 +00:00
parent b4f8c81a94
commit 6261807344
6 changed files with 56 additions and 32 deletions

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@ -68,10 +68,10 @@ namespace EightBit {
int execute() final;
int step() final;
[[nodiscard]] register16_t& AF() final { return m_accumulatorFlags[m_accumulatorFlagsSet]; }
[[nodiscard]] register16_t& BC() final { return m_registers[m_registerSet][BC_IDX]; }
[[nodiscard]] register16_t& DE() final { return m_registers[m_registerSet][DE_IDX]; }
[[nodiscard]] register16_t& HL() final { return m_registers[m_registerSet][HL_IDX]; }
[[nodiscard]] register16_t& AF() final;
[[nodiscard]] register16_t& BC() final;
[[nodiscard]] register16_t& DE() final;
[[nodiscard]] register16_t& HL() final;
[[nodiscard]] auto& IX() { return m_ix; }
[[nodiscard]] auto& IXH() { return IX().high; }
@ -107,11 +107,11 @@ namespace EightBit {
m_accumulatorFlagsSet ^= 1;
}
bool requestingIO() { return lowered(IORQ()); }
bool requestingMemory() { return lowered(MREQ()); }
[[nodiscard]] bool requestingIO() const { return lowered(IORQ()); }
[[nodiscard]] bool requestingMemory() const { return lowered(MREQ()); }
bool requestingRead() { return lowered(RD()); }
bool requestingWrite() { return lowered(WR()); }
[[nodiscard]] bool requestingRead() const { return lowered(RD()); }
[[nodiscard]] bool requestingWrite() const { return lowered(WR()); }
// ** From the Z80 CPU User Manual
// RFSH.Refresh(output, active Low). RFSH, together with MREQ, indicates that the lower
@ -130,10 +130,7 @@ namespace EightBit {
void handleRESET() final;
void handleINT() final;
void pushWord(const register16_t destination) override {
tick();
IntelProcessor::pushWord(destination);
}
void pushWord(register16_t destination) final;
void memoryWrite() final;
uint8_t memoryRead() final;
@ -141,16 +138,8 @@ namespace EightBit {
void busWrite() final;
uint8_t busRead() final;
void jr(int8_t offset) final {
IntelProcessor::jr(offset);
tick(5);
}
int jrConditional(const int condition) final {
if (!IntelProcessor::jrConditional(condition))
tick(3);
return condition;
}
void jr(int8_t offset) final;
int jrConditional(int condition) final;
private:

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@ -41,6 +41,27 @@ DEFINE_PIN_LEVEL_CHANGERS(IORQ, Z80);
DEFINE_PIN_LEVEL_CHANGERS(RD, Z80);
DEFINE_PIN_LEVEL_CHANGERS(WR, Z80);
EightBit::register16_t& EightBit::Z80::AF() {
return m_accumulatorFlags[m_accumulatorFlagsSet];
}
EightBit::register16_t& EightBit::Z80::BC() {
return m_registers[m_registerSet][BC_IDX];
}
EightBit::register16_t& EightBit::Z80::DE() {
return m_registers[m_registerSet][DE_IDX];
}
EightBit::register16_t& EightBit::Z80::HL() {
return m_registers[m_registerSet][HL_IDX];
}
void EightBit::Z80::pushWord(const register16_t destination) {
tick();
IntelProcessor::pushWord(destination);
}
void EightBit::Z80::memoryWrite() {
class _Writer final {
@ -217,6 +238,17 @@ void EightBit::Z80::reti() {
retn();
}
void EightBit::Z80::jr(int8_t offset) {
IntelProcessor::jr(offset);
tick(5);
}
int EightBit::Z80::jrConditional(const int condition) {
if (!IntelProcessor::jrConditional(condition))
tick(3);
return condition;
}
EightBit::register16_t EightBit::Z80::sbc(uint8_t& f, const register16_t operand, const register16_t value) {
const auto subtraction = operand.word - value.word - (f & CF);
@ -582,8 +614,9 @@ bool EightBit::Z80::lddr(uint8_t& f, const uint8_t a) {
void EightBit::Z80::blockIn(register16_t& source, const register16_t destination) {
MEMPTR() = BUS().ADDRESS() = source;
tick();
const auto value = portRead();
IntelProcessor::memoryWrite(destination, value);
portRead();
BUS().ADDRESS() = destination;
memoryWrite();
source.high = decrement(F(), source.high);
F() = setBit(F(), NF);
}
@ -823,7 +856,6 @@ void EightBit::Z80::executeCB(const int x, const int y, const int z) {
const bool memoryZ = z == 6;
const bool indirect = (!m_displaced && memoryZ) || m_displaced;
const bool direct = !indirect;
uint8_t operand;
if (m_displaced) {
@ -868,7 +900,7 @@ void EightBit::Z80::executeCB(const int x, const int y, const int z) {
break;
} case 1: // BIT y, r[z]
bit(F(), y, operand);
F() = adjustXY<Z80>(F(), direct ? operand : MEMPTR().high);
F() = adjustXY<Z80>(F(), indirect ? MEMPTR().high : operand);
if (memoryZ)
tick();
break;

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@ -69,6 +69,9 @@
[[nodiscard]] PinLevel& name () noexcept { \
return m_## name ## _Line; \
} \
[[nodiscard]] const PinLevel& name () const noexcept { \
return m_## name ## _Line; \
} \
visibility : \
DECLARE_PIN_LEVEL_CHANGERS(name) \
private: \

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@ -1,7 +1,6 @@
#pragma once
#include <cassert>
#include <bitset>
#ifdef _MSC_VER
# include <intrin.h>
@ -9,6 +8,8 @@
#ifdef __GNUG__
# include <x86intrin.h>
#else
# include <bitset>
#endif
namespace EightBit {

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@ -1,7 +1,6 @@
#pragma once
#include <cstdint>
#include <array>
#include "Memory.h"
#include "Ram.h"

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@ -1,14 +1,14 @@
#pragma once
#include <cstdint>
//#include <fstream>
#include <fstream>
#include <string>
//#include <ios>
//#include <sstream>
#include <ios>
#include <sstream>
#include <map>
#include <optional>
#include <vector>
//#include <utility>
#include <utility>
namespace EightBit {
class IntelHexFile final {