mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2024-12-21 18:29:57 +00:00
Sort out some exception and member initialisation rules.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
parent
b640da1910
commit
70c70af969
@ -10,7 +10,7 @@
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namespace EightBit {
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namespace EightBit {
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class Disassembler {
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class Disassembler {
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public:
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public:
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Disassembler();
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Disassembler() noexcept;
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static std::string state(Intel8080& cpu);
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static std::string state(Intel8080& cpu);
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std::string disassemble(Intel8080& cpu);
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std::string disassemble(Intel8080& cpu);
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@ -6,7 +6,7 @@
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namespace EightBit {
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namespace EightBit {
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class Profiler {
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class Profiler {
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public:
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public:
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Profiler();
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Profiler() noexcept;
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~Profiler();
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~Profiler();
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void addInstruction(uint8_t instruction);
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void addInstruction(uint8_t instruction);
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@ -8,7 +8,7 @@
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#include <iomanip>
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#include <iomanip>
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#include <bitset>
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#include <bitset>
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EightBit::Disassembler::Disassembler() {
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EightBit::Disassembler::Disassembler() noexcept {
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// Disable exceptions where too many format arguments are available
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// Disable exceptions where too many format arguments are available
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m_formatter.exceptions(boost::io::all_error_bits ^ boost::io::too_many_args_bit);
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m_formatter.exceptions(boost::io::all_error_bits ^ boost::io::too_many_args_bit);
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}
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}
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@ -117,7 +117,7 @@ bool EightBit::Intel8080::callConditionalFlag(int flag) {
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void EightBit::Intel8080::add(register16_t value) {
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void EightBit::Intel8080::add(register16_t value) {
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const auto result = HL().word + value.word;
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const auto result = HL().word + value.word;
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HL().word = result;
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HL() = result;
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setFlag(F(), CF, result & Bit16);
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setFlag(F(), CF, result & Bit16);
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}
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}
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@ -229,7 +229,7 @@ void EightBit::Intel8080::xhtl() {
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MEMPTR().low = BUS().read(SP());
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MEMPTR().low = BUS().read(SP());
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BUS().write(L());
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BUS().write(L());
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L() = MEMPTR().low;
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L() = MEMPTR().low;
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++BUS().ADDRESS().word;
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++BUS().ADDRESS();
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MEMPTR().high = BUS().read();
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MEMPTR().high = BUS().read();
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BUS().write(H());
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BUS().write(H());
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H() = MEMPTR().high;
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H() = MEMPTR().high;
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@ -374,10 +374,10 @@ void EightBit::Intel8080::execute(int x, int y, int z, int p, int q) {
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case 3: // 16-bit INC/DEC
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case 3: // 16-bit INC/DEC
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switch (q) {
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switch (q) {
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case 0: // INC rp
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case 0: // INC rp
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++RP(p).word;
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++RP(p);
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break;
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break;
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case 1: // DEC rp
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case 1: // DEC rp
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--RP(p).word;
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--RP(p);
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break;
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break;
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default:
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default:
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UNREACHABLE;
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UNREACHABLE;
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@ -4,7 +4,7 @@
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#include <iostream>
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#include <iostream>
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EightBit::Profiler::Profiler() {
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EightBit::Profiler::Profiler() noexcept {
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m_instructions.fill(0);
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m_instructions.fill(0);
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m_addresses.fill(0);
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m_addresses.fill(0);
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}
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}
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@ -14,7 +14,7 @@ namespace EightBit {
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Dark
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Dark
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};
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};
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AbstractColourPalette()
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AbstractColourPalette() noexcept
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: m_colours(4) {
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: m_colours(4) {
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}
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}
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@ -13,7 +13,7 @@ namespace EightBit {
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class Disassembler {
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class Disassembler {
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public:
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public:
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Disassembler();
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Disassembler() noexcept;
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static std::string state(LR35902& cpu);
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static std::string state(LR35902& cpu);
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std::string disassemble(LR35902& cpu);
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std::string disassemble(LR35902& cpu);
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@ -37,7 +37,7 @@ namespace EightBit {
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};
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};
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mutable boost::format m_formatter;
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mutable boost::format m_formatter;
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bool m_prefixCB;
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bool m_prefixCB = false;
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void disassemble(std::ostringstream& output, LR35902& cpu, uint16_t pc);
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void disassemble(std::ostringstream& output, LR35902& cpu, uint16_t pc);
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@ -35,12 +35,12 @@ namespace EightBit {
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void loadObjectAttributes();
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void loadObjectAttributes();
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private:
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private:
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std::array<uint32_t, PixelCount> m_pixels;
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std::array<uint32_t, PixelCount> m_pixels = { 0 };
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Bus& m_bus;
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Bus& m_bus;
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Ram& m_oam;
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Ram& m_oam;
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Ram& m_vram;
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Ram& m_vram;
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const AbstractColourPalette* m_colours;
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const AbstractColourPalette* m_colours;
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std::array<ObjectAttribute, 40> m_objectAttributes;
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std::array<ObjectAttribute, 40> m_objectAttributes = { ObjectAttribute() };
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uint8_t m_control = 0;
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uint8_t m_control = 0;
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uint8_t m_scanLine = 0;
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uint8_t m_scanLine = 0;
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@ -33,7 +33,7 @@ namespace EightBit {
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RomPageSize = 0x4000
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RomPageSize = 0x4000
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};
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};
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Bus();
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Bus() noexcept;
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LR35902& CPU() { return m_cpu; }
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LR35902& CPU() { return m_cpu; }
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Ram& VRAM() { return m_videoRam; }
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Ram& VRAM() { return m_videoRam; }
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@ -9,7 +9,7 @@
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#include "LR35902.h"
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#include "LR35902.h"
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#include "IoRegisters.h"
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#include "IoRegisters.h"
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EightBit::GameBoy::Disassembler::Disassembler() {
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EightBit::GameBoy::Disassembler::Disassembler() noexcept {
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// Disable exceptions where too many format arguments are available
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// Disable exceptions where too many format arguments are available
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m_formatter.exceptions(boost::io::all_error_bits ^ boost::io::too_many_args_bit);
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m_formatter.exceptions(boost::io::all_error_bits ^ boost::io::too_many_args_bit);
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}
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}
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@ -2,7 +2,7 @@
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#include "GameBoyBus.h"
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#include "GameBoyBus.h"
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#include "Display.h"
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#include "Display.h"
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EightBit::GameBoy::Bus::Bus()
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EightBit::GameBoy::Bus::Bus() noexcept
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: m_cpu(*this),
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: m_cpu(*this),
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m_ioPorts(*this) {
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m_ioPorts(*this) {
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WrittenByte.connect(std::bind(&GameBoy::Bus::Bus_WrittenByte, this, std::placeholders::_1));
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WrittenByte.connect(std::bind(&GameBoy::Bus::Bus_WrittenByte, this, std::placeholders::_1));
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@ -12,7 +12,7 @@ EightBit::GameBoy::IoRegisters::IoRegisters(Bus& bus)
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void EightBit::GameBoy::IoRegisters::reset() {
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void EightBit::GameBoy::IoRegisters::reset() {
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poke(NR52, 0xf1);
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poke(NR52, 0xf1);
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poke(LCDC, DisplayBackground | BackgroundCharacterDataSelection | LcdEnable);
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poke(LCDC, DisplayBackground | BackgroundCharacterDataSelection | LcdEnable);
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m_divCounter.word = 0xabcc;
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m_divCounter = 0xabcc;
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m_timerCounter = 0;
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m_timerCounter = 0;
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}
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}
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@ -194,7 +194,7 @@ bool EightBit::GameBoy::IoRegisters::timerDisabled() {
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}
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}
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void EightBit::GameBoy::IoRegisters::incrementDIV(int cycles) {
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void EightBit::GameBoy::IoRegisters::incrementDIV(int cycles) {
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m_divCounter.word += cycles;
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m_divCounter += cycles;
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poke(DIV, m_divCounter.high);
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poke(DIV, m_divCounter.high);
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}
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}
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@ -12,7 +12,7 @@ EightBit::GameBoy::LR35902::LR35902(Bus& memory)
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void EightBit::GameBoy::LR35902::reset() {
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void EightBit::GameBoy::LR35902::reset() {
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IntelProcessor::reset();
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IntelProcessor::reset();
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di();
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di();
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SP().word = Mask16 - 1;
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SP() = Mask16 - 1;
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m_prefixCB = false;
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m_prefixCB = false;
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}
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}
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@ -469,11 +469,11 @@ void EightBit::GameBoy::LR35902::executeOther(int x, int y, int z, int p, int q)
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addCycles(2);
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addCycles(2);
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break;
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break;
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case 2: // GB: LDI (HL),A
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case 2: // GB: LDI (HL),A
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BUS().write(HL().word++, A());
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BUS().write(HL()++, A());
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addCycles(2);
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addCycles(2);
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break;
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break;
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case 3: // GB: LDD (HL),A
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case 3: // GB: LDD (HL),A
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BUS().write(HL().word--, A());
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BUS().write(HL()--, A());
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addCycles(2);
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addCycles(2);
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break;
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break;
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default:
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default:
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@ -491,11 +491,11 @@ void EightBit::GameBoy::LR35902::executeOther(int x, int y, int z, int p, int q)
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addCycles(2);
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addCycles(2);
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break;
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break;
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case 2: // GB: LDI A,(HL)
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case 2: // GB: LDI A,(HL)
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A() = BUS().read(HL().word++);
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A() = BUS().read(HL()++);
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addCycles(2);
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addCycles(2);
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break;
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break;
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case 3: // GB: LDD A,(HL)
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case 3: // GB: LDD A,(HL)
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A() = BUS().read(HL().word--);
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A() = BUS().read(HL()--);
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addCycles(2);
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addCycles(2);
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break;
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break;
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default:
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default:
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@ -509,10 +509,10 @@ void EightBit::GameBoy::LR35902::executeOther(int x, int y, int z, int p, int q)
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case 3: // 16-bit INC/DEC
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case 3: // 16-bit INC/DEC
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switch (q) {
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switch (q) {
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case 0: // INC rp
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case 0: // INC rp
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++RP(p).word;
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++RP(p);
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break;
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break;
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case 1: // DEC rp
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case 1: // DEC rp
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--RP(p).word;
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--RP(p);
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break;
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break;
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default:
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default:
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UNREACHABLE;
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UNREACHABLE;
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@ -637,7 +637,7 @@ void EightBit::GameBoy::LR35902::executeOther(int x, int y, int z, int p, int q)
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const auto before = SP().word;
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const auto before = SP().word;
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const int8_t value = fetchByte();
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const int8_t value = fetchByte();
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const auto result = before + value;
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const auto result = before + value;
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SP().word = result;
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SP() = result;
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const auto carried = before ^ value ^ (result & Mask16);
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const auto carried = before ^ value ^ (result & Mask16);
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clearFlag(F(), ZF | NF);
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clearFlag(F(), ZF | NF);
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setFlag(F(), CF, carried & Bit8);
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setFlag(F(), CF, carried & Bit8);
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@ -653,7 +653,7 @@ void EightBit::GameBoy::LR35902::executeOther(int x, int y, int z, int p, int q)
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const auto before = SP().word;
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const auto before = SP().word;
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const int8_t value = fetchByte();
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const int8_t value = fetchByte();
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const auto result = before + value;
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const auto result = before + value;
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HL().word = result;
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HL() = result;
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const auto carried = before ^ value ^ (result & Mask16);
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const auto carried = before ^ value ^ (result & Mask16);
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clearFlag(F(), ZF | NF);
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clearFlag(F(), ZF | NF);
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setFlag(F(), CF, carried & Bit8);
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setFlag(F(), CF, carried & Bit8);
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@ -21,7 +21,7 @@ namespace EightBit {
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MOS6502& processor;
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MOS6502& processor;
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const Symbols& symbols;
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const Symbols& symbols;
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mutable uint16_t m_address;
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mutable uint16_t m_address = 0xffff;
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std::string disassemble_Implied(const std::string& instruction) const {
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std::string disassemble_Implied(const std::string& instruction) const {
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return "\t" + instruction;
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return "\t" + instruction;
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@ -8,7 +8,7 @@
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namespace EightBit {
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namespace EightBit {
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class Symbols {
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class Symbols {
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public:
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public:
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Symbols(std::string path = "");
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Symbols(std::string path = "") noexcept;
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const std::map<uint16_t, std::string>& getLabels() const { return labels; }
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const std::map<uint16_t, std::string>& getLabels() const { return labels; }
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const std::map<uint16_t, std::string>& getConstants() const { return constants; }
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const std::map<uint16_t, std::string>& getConstants() const { return constants; }
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@ -102,14 +102,14 @@ namespace EightBit {
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std::tuple<register16_t, bool> Address_AbsoluteX() {
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std::tuple<register16_t, bool> Address_AbsoluteX() {
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auto address = Address_Absolute();
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auto address = Address_Absolute();
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const auto page = address.high;
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const auto page = address.high;
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address.word += X();
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address += X();
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return std::tuple<register16_t, bool>(address, address.high != page);
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return std::tuple<register16_t, bool>(address, address.high != page);
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}
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}
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std::tuple<register16_t, bool> Address_AbsoluteY() {
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std::tuple<register16_t, bool> Address_AbsoluteY() {
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auto address = Address_Absolute();
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auto address = Address_Absolute();
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const auto page = address.high;
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const auto page = address.high;
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address.word += Y();
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address += Y();
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return std::tuple<register16_t, bool>(address, address.high != page);
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return std::tuple<register16_t, bool>(address, address.high != page);
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}
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}
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@ -120,7 +120,7 @@ namespace EightBit {
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std::tuple<register16_t, bool> Address_IndirectIndexedY() {
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std::tuple<register16_t, bool> Address_IndirectIndexedY() {
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auto address = Address_ZeroPageIndirect();
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auto address = Address_ZeroPageIndirect();
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const auto page = address.high;
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const auto page = address.high;
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address.word += Y();
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address += Y();
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return std::tuple<register16_t, bool>(address, address.high != page);
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return std::tuple<register16_t, bool>(address, address.high != page);
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}
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}
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@ -10,7 +10,7 @@
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#include <boost/algorithm/string/regex.hpp>
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#include <boost/algorithm/string/regex.hpp>
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#include <boost/regex.hpp>
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#include <boost/regex.hpp>
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EightBit::Symbols::Symbols(std::string path) {
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EightBit::Symbols::Symbols(std::string path) noexcept {
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if (!path.empty()) {
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if (!path.empty()) {
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Parse(path);
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Parse(path);
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AssignSymbols();
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AssignSymbols();
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@ -488,7 +488,7 @@ uint8_t EightBit::MOS6502::ADD_d(uint8_t operand, uint8_t data, int carry) {
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void EightBit::MOS6502::Branch(int8_t displacement) {
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void EightBit::MOS6502::Branch(int8_t displacement) {
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const auto page = PC().high;
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const auto page = PC().high;
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PC().word += displacement;
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PC() += displacement;
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if (UNLIKELY(PC().high != page))
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if (UNLIKELY(PC().high != page))
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addCycle();
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addCycle();
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addCycle();
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addCycle();
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@ -514,7 +514,7 @@ void EightBit::MOS6502::PLP() {
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|
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void EightBit::MOS6502::JSR_abs() {
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void EightBit::MOS6502::JSR_abs() {
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const auto address = Address_Absolute();
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const auto address = Address_Absolute();
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--PC().word;
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--PC();
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call(address);
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call(address);
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}
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}
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@ -525,7 +525,7 @@ void EightBit::MOS6502::RTI() {
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|
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void EightBit::MOS6502::RTS() {
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void EightBit::MOS6502::RTS() {
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ret();
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ret();
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++PC().word;
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++PC();
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}
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}
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void EightBit::MOS6502::JMP_abs() {
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void EightBit::MOS6502::JMP_abs() {
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@ -537,8 +537,7 @@ void EightBit::MOS6502::JMP_ind() {
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}
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}
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void EightBit::MOS6502::BRK() {
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void EightBit::MOS6502::BRK() {
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++PC().word;
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pushWord(++PC());
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pushWord(PC());
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PHP();
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PHP();
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setFlag(P(), IF);
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setFlag(P(), IF);
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jump(getWordPaged(0xff, IRQvector));
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jump(getWordPaged(0xff, IRQvector));
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@ -9,7 +9,7 @@ namespace EightBit {
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|
|
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class Disassembler {
|
class Disassembler {
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public:
|
public:
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Disassembler();
|
Disassembler() noexcept;
|
||||||
|
|
||||||
static std::string state(Z80& cpu);
|
static std::string state(Z80& cpu);
|
||||||
std::string disassemble(Z80& cpu);
|
std::string disassemble(Z80& cpu);
|
||||||
@ -25,10 +25,10 @@ namespace EightBit {
|
|||||||
|
|
||||||
private:
|
private:
|
||||||
mutable boost::format m_formatter;
|
mutable boost::format m_formatter;
|
||||||
bool m_prefixCB;
|
bool m_prefixCB = false;
|
||||||
bool m_prefixDD;
|
bool m_prefixDD = false;
|
||||||
bool m_prefixED;
|
bool m_prefixED = false;
|
||||||
bool m_prefixFD;
|
bool m_prefixFD = false;
|
||||||
|
|
||||||
void disassemble(std::ostringstream& output, Z80& cpu, uint16_t pc);
|
void disassemble(std::ostringstream& output, Z80& cpu, uint16_t pc);
|
||||||
|
|
||||||
|
@ -364,7 +364,7 @@ namespace EightBit {
|
|||||||
|
|
||||||
void xhtl();
|
void xhtl();
|
||||||
|
|
||||||
void blockCompare();
|
void blockCompare(register16_t source, register16_t& counter);
|
||||||
|
|
||||||
void cpi();
|
void cpi();
|
||||||
bool cpir();
|
bool cpir();
|
||||||
@ -372,7 +372,7 @@ namespace EightBit {
|
|||||||
void cpd();
|
void cpd();
|
||||||
bool cpdr();
|
bool cpdr();
|
||||||
|
|
||||||
void blockLoad(register16_t source, register16_t destination);
|
void blockLoad(register16_t source, register16_t destination, register16_t& counter);
|
||||||
|
|
||||||
void ldi();
|
void ldi();
|
||||||
bool ldir();
|
bool ldir();
|
||||||
|
@ -10,7 +10,7 @@
|
|||||||
|
|
||||||
#include "Z80.h"
|
#include "Z80.h"
|
||||||
|
|
||||||
EightBit::Disassembler::Disassembler() {
|
EightBit::Disassembler::Disassembler() noexcept {
|
||||||
// Disable exceptions where too many format arguments are available
|
// Disable exceptions where too many format arguments are available
|
||||||
m_formatter.exceptions(boost::io::all_error_bits ^ boost::io::too_many_args_bit);
|
m_formatter.exceptions(boost::io::all_error_bits ^ boost::io::too_many_args_bit);
|
||||||
}
|
}
|
||||||
|
108
Z80/src/Z80.cpp
108
Z80/src/Z80.cpp
@ -183,7 +183,7 @@ void EightBit::Z80::sbc(const register16_t value) {
|
|||||||
const auto valueNegative = value.high & SF;
|
const auto valueNegative = value.high & SF;
|
||||||
|
|
||||||
const auto result = MEMPTR().word - value.word - (F() & CF);
|
const auto result = MEMPTR().word - value.word - (F() & CF);
|
||||||
HL2().word = result;
|
HL2() = result;
|
||||||
|
|
||||||
const auto afterNegative = HL2().high & SF;
|
const auto afterNegative = HL2().high & SF;
|
||||||
|
|
||||||
@ -195,7 +195,7 @@ void EightBit::Z80::sbc(const register16_t value) {
|
|||||||
setFlag(F(), CF, result & Bit16);
|
setFlag(F(), CF, result & Bit16);
|
||||||
adjustXY<Z80>(F(), HL2().high);
|
adjustXY<Z80>(F(), HL2().high);
|
||||||
|
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::adc(const register16_t value) {
|
void EightBit::Z80::adc(const register16_t value) {
|
||||||
@ -206,7 +206,7 @@ void EightBit::Z80::adc(const register16_t value) {
|
|||||||
const auto valueNegative = value.high & SF;
|
const auto valueNegative = value.high & SF;
|
||||||
|
|
||||||
const auto result = MEMPTR().word + value.word + (F() & CF);
|
const auto result = MEMPTR().word + value.word + (F() & CF);
|
||||||
HL2().word = result;
|
HL2() = result;
|
||||||
|
|
||||||
const auto afterNegative = HL2().high & SF;
|
const auto afterNegative = HL2().high & SF;
|
||||||
|
|
||||||
@ -218,7 +218,7 @@ void EightBit::Z80::adc(const register16_t value) {
|
|||||||
setFlag(F(), CF, result & Bit16);
|
setFlag(F(), CF, result & Bit16);
|
||||||
adjustXY<Z80>(F(), HL2().high);
|
adjustXY<Z80>(F(), HL2().high);
|
||||||
|
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::add(const register16_t value) {
|
void EightBit::Z80::add(const register16_t value) {
|
||||||
@ -227,14 +227,14 @@ void EightBit::Z80::add(const register16_t value) {
|
|||||||
|
|
||||||
const auto result = MEMPTR().word + value.word;
|
const auto result = MEMPTR().word + value.word;
|
||||||
|
|
||||||
HL2().word = result;
|
HL2() = result;
|
||||||
|
|
||||||
clearFlag(F(), NF);
|
clearFlag(F(), NF);
|
||||||
setFlag(F(), CF, result & Bit16);
|
setFlag(F(), CF, result & Bit16);
|
||||||
adjustHalfCarryAdd(F(), MEMPTR().high, value.high, HL2().high);
|
adjustHalfCarryAdd(F(), MEMPTR().high, value.high, HL2().high);
|
||||||
adjustXY<Z80>(F(), HL2().high);
|
adjustXY<Z80>(F(), HL2().high);
|
||||||
|
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::add(const uint8_t value, const int carry) {
|
void EightBit::Z80::add(const uint8_t value, const int carry) {
|
||||||
@ -438,18 +438,18 @@ void EightBit::Z80::xhtl() {
|
|||||||
MEMPTR().low = BUS().read(SP());
|
MEMPTR().low = BUS().read(SP());
|
||||||
BUS().write(HL2().low);
|
BUS().write(HL2().low);
|
||||||
HL2().low = MEMPTR().low;
|
HL2().low = MEMPTR().low;
|
||||||
++BUS().ADDRESS().word;
|
++BUS().ADDRESS();
|
||||||
MEMPTR().high = BUS().read();
|
MEMPTR().high = BUS().read();
|
||||||
BUS().write(HL2().high);
|
BUS().write(HL2().high);
|
||||||
HL2().high = MEMPTR().high;
|
HL2().high = MEMPTR().high;
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::blockCompare() {
|
void EightBit::Z80::blockCompare(register16_t source, register16_t& counter) {
|
||||||
|
|
||||||
const auto value = BUS().read(HL());
|
const auto value = BUS().read(source);
|
||||||
uint8_t result = A() - value;
|
uint8_t result = A() - value;
|
||||||
|
|
||||||
setFlag(F(), PF, --BC().word);
|
setFlag(F(), PF, --counter.word);
|
||||||
|
|
||||||
adjustSZ<Z80>(F(), result);
|
adjustSZ<Z80>(F(), result);
|
||||||
adjustHalfCarrySub(F(), A(), value, result);
|
adjustHalfCarrySub(F(), A(), value, result);
|
||||||
@ -462,15 +462,13 @@ void EightBit::Z80::blockCompare() {
|
|||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::cpi() {
|
void EightBit::Z80::cpi() {
|
||||||
blockCompare();
|
blockCompare(HL()++, BC());
|
||||||
++HL().word;
|
++MEMPTR();
|
||||||
++MEMPTR().word;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::cpd() {
|
void EightBit::Z80::cpd() {
|
||||||
blockCompare();
|
blockCompare(HL()--, BC());
|
||||||
--HL().word;
|
--MEMPTR();
|
||||||
--MEMPTR().word;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bool EightBit::Z80::cpir() {
|
bool EightBit::Z80::cpir() {
|
||||||
@ -483,26 +481,22 @@ bool EightBit::Z80::cpdr() {
|
|||||||
return (F() & PF) && !(F() & ZF); // See CPD
|
return (F() & PF) && !(F() & ZF); // See CPD
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::blockLoad(const register16_t source, const register16_t destination) {
|
void EightBit::Z80::blockLoad(const register16_t source, const register16_t destination, register16_t& counter) {
|
||||||
const auto value = BUS().read(source);
|
const auto value = BUS().read(source);
|
||||||
BUS().write(destination, value);
|
BUS().write(destination, value);
|
||||||
const auto xy = A() + value;
|
const auto xy = A() + value;
|
||||||
setFlag(F(), XF, xy & 8);
|
setFlag(F(), XF, xy & 8);
|
||||||
setFlag(F(), YF, xy & 2);
|
setFlag(F(), YF, xy & 2);
|
||||||
clearFlag(F(), NF | HC);
|
clearFlag(F(), NF | HC);
|
||||||
setFlag(F(), PF, --BC().word);
|
setFlag(F(), PF, --counter.word);
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::ldd() {
|
void EightBit::Z80::ldd() {
|
||||||
blockLoad(HL(), DE());
|
blockLoad(HL()--, DE()--, BC());
|
||||||
--HL().word;
|
|
||||||
--DE().word;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::ldi() {
|
void EightBit::Z80::ldi() {
|
||||||
blockLoad(HL(), DE());
|
blockLoad(HL()++, DE()++, BC());
|
||||||
++HL().word;
|
|
||||||
++DE().word;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bool EightBit::Z80::ldir() {
|
bool EightBit::Z80::ldir() {
|
||||||
@ -517,18 +511,18 @@ bool EightBit::Z80::lddr() {
|
|||||||
|
|
||||||
void EightBit::Z80::ini() {
|
void EightBit::Z80::ini() {
|
||||||
MEMPTR() = BUS().ADDRESS() = BC();
|
MEMPTR() = BUS().ADDRESS() = BC();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
const auto value = readPort();
|
const auto value = readPort();
|
||||||
BUS().write(HL().word++, value);
|
BUS().write(HL()++, value);
|
||||||
decrement(B());
|
decrement(B());
|
||||||
setFlag(F(), NF);
|
setFlag(F(), NF);
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::ind() {
|
void EightBit::Z80::ind() {
|
||||||
MEMPTR() = BUS().ADDRESS() = BC();
|
MEMPTR() = BUS().ADDRESS() = BC();
|
||||||
--MEMPTR().word;
|
--MEMPTR();
|
||||||
const auto value = readPort();
|
const auto value = readPort();
|
||||||
BUS().write(HL().word--, value);
|
BUS().write(HL()--, value);
|
||||||
decrement(B());
|
decrement(B());
|
||||||
setFlag(F(), NF);
|
setFlag(F(), NF);
|
||||||
}
|
}
|
||||||
@ -554,15 +548,15 @@ void EightBit::Z80::blockOut() {
|
|||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::outi() {
|
void EightBit::Z80::outi() {
|
||||||
BUS().ADDRESS().word = HL().word++;
|
BUS().ADDRESS() = HL()++;
|
||||||
blockOut();
|
blockOut();
|
||||||
MEMPTR().word = BC().word + 1;
|
MEMPTR() = BC().word + 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::Z80::outd() {
|
void EightBit::Z80::outd() {
|
||||||
BUS().ADDRESS().word = HL().word--;
|
BUS().ADDRESS() = HL()--;
|
||||||
blockOut();
|
blockOut();
|
||||||
MEMPTR().word = BC().word - 1;
|
MEMPTR() = BC().word - 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool EightBit::Z80::otir() {
|
bool EightBit::Z80::otir() {
|
||||||
@ -577,7 +571,7 @@ bool EightBit::Z80::otdr() {
|
|||||||
|
|
||||||
void EightBit::Z80::rrd() {
|
void EightBit::Z80::rrd() {
|
||||||
MEMPTR() = BUS().ADDRESS() = HL();
|
MEMPTR() = BUS().ADDRESS() = HL();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
const auto memory = BUS().read();
|
const auto memory = BUS().read();
|
||||||
BUS().write(promoteNibble(A()) | highNibble(memory));
|
BUS().write(promoteNibble(A()) | highNibble(memory));
|
||||||
A() = higherNibble(A()) | lowerNibble(memory);
|
A() = higherNibble(A()) | lowerNibble(memory);
|
||||||
@ -587,7 +581,7 @@ void EightBit::Z80::rrd() {
|
|||||||
|
|
||||||
void EightBit::Z80::rld() {
|
void EightBit::Z80::rld() {
|
||||||
MEMPTR() = BUS().ADDRESS() = HL();
|
MEMPTR() = BUS().ADDRESS() = HL();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
const auto memory = BUS().read();
|
const auto memory = BUS().read();
|
||||||
BUS().write(promoteNibble(memory) | lowNibble(A()));
|
BUS().write(promoteNibble(memory) | lowNibble(A()));
|
||||||
A() = higherNibble(A()) | highNibble(memory);
|
A() = higherNibble(A()) | highNibble(memory);
|
||||||
@ -818,7 +812,7 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
|
|||||||
switch (z) {
|
switch (z) {
|
||||||
case 0: // Input from port with 16-bit address
|
case 0: // Input from port with 16-bit address
|
||||||
MEMPTR() = BUS().ADDRESS() = BC();
|
MEMPTR() = BUS().ADDRESS() = BC();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
readPort();
|
readPort();
|
||||||
if (LIKELY(y != 6)) // IN r[y],(C)
|
if (LIKELY(y != 6)) // IN r[y],(C)
|
||||||
R(y, BUS().DATA());
|
R(y, BUS().DATA());
|
||||||
@ -828,7 +822,7 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
|
|||||||
break;
|
break;
|
||||||
case 1: // Output to port with 16-bit address
|
case 1: // Output to port with 16-bit address
|
||||||
MEMPTR() = BUS().ADDRESS() = BC();
|
MEMPTR() = BUS().ADDRESS() = BC();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
if (UNLIKELY(y == 6)) // OUT (C),0
|
if (UNLIKELY(y == 6)) // OUT (C),0
|
||||||
BUS().DATA() = 0;
|
BUS().DATA() = 0;
|
||||||
else // OUT (C),r[y]
|
else // OUT (C),r[y]
|
||||||
@ -955,15 +949,15 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
|
|||||||
break;
|
break;
|
||||||
case 6: // LDIR
|
case 6: // LDIR
|
||||||
if (LIKELY(ldir())) {
|
if (LIKELY(ldir())) {
|
||||||
MEMPTR().word = --PC().word;
|
MEMPTR() = --PC();
|
||||||
--PC().word;
|
--PC();
|
||||||
addCycles(5);
|
addCycles(5);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 7: // LDDR
|
case 7: // LDDR
|
||||||
if (LIKELY(lddr())) {
|
if (LIKELY(lddr())) {
|
||||||
MEMPTR().word = --PC().word;
|
MEMPTR()= --PC();
|
||||||
--PC().word;
|
--PC();
|
||||||
addCycles(5);
|
addCycles(5);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -979,18 +973,18 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
|
|||||||
break;
|
break;
|
||||||
case 6: // CPIR
|
case 6: // CPIR
|
||||||
if (LIKELY(cpir())) {
|
if (LIKELY(cpir())) {
|
||||||
MEMPTR().word = --PC().word;
|
MEMPTR()= --PC();
|
||||||
--PC().word;
|
--PC();
|
||||||
addCycles(5);
|
addCycles(5);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 7: // CPDR
|
case 7: // CPDR
|
||||||
if (LIKELY(cpdr())) {
|
if (LIKELY(cpdr())) {
|
||||||
MEMPTR().word = --PC().word;
|
MEMPTR()= --PC();
|
||||||
--PC().word;
|
--PC();
|
||||||
addCycles(5);
|
addCycles(5);
|
||||||
} else {
|
} else {
|
||||||
MEMPTR().word = PC().word - 2;
|
MEMPTR() = PC() - 2;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@ -1005,13 +999,13 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
|
|||||||
break;
|
break;
|
||||||
case 6: // INIR
|
case 6: // INIR
|
||||||
if (LIKELY(inir())) {
|
if (LIKELY(inir())) {
|
||||||
PC().word -= 2;
|
PC() -= 2;
|
||||||
addCycles(5);
|
addCycles(5);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 7: // INDR
|
case 7: // INDR
|
||||||
if (LIKELY(indr())) {
|
if (LIKELY(indr())) {
|
||||||
PC().word -= 2;
|
PC() -= 2;
|
||||||
addCycles(5);
|
addCycles(5);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -1027,13 +1021,13 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
|
|||||||
break;
|
break;
|
||||||
case 6: // OTIR
|
case 6: // OTIR
|
||||||
if (LIKELY(otir())) {
|
if (LIKELY(otir())) {
|
||||||
PC().word -= 2;
|
PC() -= 2;
|
||||||
addCycles(5);
|
addCycles(5);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case 7: // OTDR
|
case 7: // OTDR
|
||||||
if (LIKELY(otdr())) {
|
if (LIKELY(otdr())) {
|
||||||
PC().word -= 2;
|
PC() -= 2;
|
||||||
addCycles(5);
|
addCycles(5);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -1109,14 +1103,14 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
|
|||||||
switch (p) {
|
switch (p) {
|
||||||
case 0: // LD (BC),A
|
case 0: // LD (BC),A
|
||||||
MEMPTR() = BUS().ADDRESS() = BC();
|
MEMPTR() = BUS().ADDRESS() = BC();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
MEMPTR().high = BUS().DATA() = A();
|
MEMPTR().high = BUS().DATA() = A();
|
||||||
BUS().write();
|
BUS().write();
|
||||||
addCycles(7);
|
addCycles(7);
|
||||||
break;
|
break;
|
||||||
case 1: // LD (DE),A
|
case 1: // LD (DE),A
|
||||||
MEMPTR() = BUS().ADDRESS() = DE();
|
MEMPTR() = BUS().ADDRESS() = DE();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
MEMPTR().high = BUS().DATA() = A();
|
MEMPTR().high = BUS().DATA() = A();
|
||||||
BUS().write();
|
BUS().write();
|
||||||
addCycles(7);
|
addCycles(7);
|
||||||
@ -1128,7 +1122,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
|
|||||||
break;
|
break;
|
||||||
case 3: // LD (nn),A
|
case 3: // LD (nn),A
|
||||||
MEMPTR() = BUS().ADDRESS() = fetchWord();
|
MEMPTR() = BUS().ADDRESS() = fetchWord();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
MEMPTR().high = BUS().DATA() = A();
|
MEMPTR().high = BUS().DATA() = A();
|
||||||
BUS().write();
|
BUS().write();
|
||||||
addCycles(13);
|
addCycles(13);
|
||||||
@ -1141,13 +1135,13 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
|
|||||||
switch (p) {
|
switch (p) {
|
||||||
case 0: // LD A,(BC)
|
case 0: // LD A,(BC)
|
||||||
MEMPTR() = BUS().ADDRESS() = BC();
|
MEMPTR() = BUS().ADDRESS() = BC();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
A() = BUS().read();
|
A() = BUS().read();
|
||||||
addCycles(7);
|
addCycles(7);
|
||||||
break;
|
break;
|
||||||
case 1: // LD A,(DE)
|
case 1: // LD A,(DE)
|
||||||
MEMPTR() = BUS().ADDRESS() = DE();
|
MEMPTR() = BUS().ADDRESS() = DE();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
A() = BUS().read();
|
A() = BUS().read();
|
||||||
addCycles(7);
|
addCycles(7);
|
||||||
break;
|
break;
|
||||||
@ -1158,7 +1152,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
|
|||||||
break;
|
break;
|
||||||
case 3: // LD A,(nn)
|
case 3: // LD A,(nn)
|
||||||
MEMPTR() = BUS().ADDRESS() = fetchWord();
|
MEMPTR() = BUS().ADDRESS() = fetchWord();
|
||||||
++MEMPTR().word;
|
++MEMPTR();
|
||||||
A() = BUS().read();
|
A() = BUS().read();
|
||||||
addCycles(13);
|
addCycles(13);
|
||||||
break;
|
break;
|
||||||
@ -1173,10 +1167,10 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
|
|||||||
case 3: // 16-bit INC/DEC
|
case 3: // 16-bit INC/DEC
|
||||||
switch (q) {
|
switch (q) {
|
||||||
case 0: // INC rp
|
case 0: // INC rp
|
||||||
++RP(p).word;
|
++RP(p);
|
||||||
break;
|
break;
|
||||||
case 1: // DEC rp
|
case 1: // DEC rp
|
||||||
--RP(p).word;
|
--RP(p);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
UNREACHABLE;
|
UNREACHABLE;
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
#include "stdafx.h"
|
#include "stdafx.h"
|
||||||
#include "Configuration.h"
|
#include "Configuration.h"
|
||||||
|
|
||||||
Configuration::Configuration()
|
Configuration::Configuration() noexcept
|
||||||
: m_debugMode(false),
|
: m_debugMode(false),
|
||||||
m_profileMode(false),
|
m_profileMode(false),
|
||||||
m_romDirectory("roms") {
|
m_romDirectory("roms") {
|
||||||
|
@ -6,7 +6,7 @@
|
|||||||
|
|
||||||
class Configuration {
|
class Configuration {
|
||||||
public:
|
public:
|
||||||
Configuration();
|
Configuration() noexcept;
|
||||||
|
|
||||||
bool isDebugMode() const {
|
bool isDebugMode() const {
|
||||||
return m_debugMode;
|
return m_debugMode;
|
||||||
|
@ -33,7 +33,7 @@ namespace EightBit {
|
|||||||
void OnWrittenPort(uint8_t port);
|
void OnWrittenPort(uint8_t port);
|
||||||
|
|
||||||
private:
|
private:
|
||||||
std::array<uint8_t, 0x100> m_input;
|
std::array<uint8_t, 0x100> m_input = { 0 };
|
||||||
std::array<uint8_t, 0x100> m_output;
|
std::array<uint8_t, 0x100> m_output = { 0 };
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
@ -156,7 +156,7 @@ namespace EightBit {
|
|||||||
}
|
}
|
||||||
|
|
||||||
void jr(const int8_t offset) {
|
void jr(const int8_t offset) {
|
||||||
MEMPTR().word = PC().word + offset;
|
MEMPTR() = PC() + offset;
|
||||||
jump(MEMPTR());
|
jump(MEMPTR());
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -105,11 +105,11 @@ namespace EightBit {
|
|||||||
virtual void reset();
|
virtual void reset();
|
||||||
|
|
||||||
bool halted() { return lowered(HALT()); }
|
bool halted() { return lowered(HALT()); }
|
||||||
void halt() { --PC().word; lower(HALT()); }
|
void halt() { --PC(); lower(HALT()); }
|
||||||
void proceed() { ++PC().word; raise(HALT()); }
|
void proceed() { ++PC(); raise(HALT()); }
|
||||||
|
|
||||||
uint8_t fetchByte() {
|
uint8_t fetchByte() {
|
||||||
return BUS().read(PC().word++);
|
return BUS().read(PC()++);
|
||||||
}
|
}
|
||||||
|
|
||||||
register16_t fetchWord() {
|
register16_t fetchWord() {
|
||||||
|
@ -32,6 +32,48 @@ namespace EightBit {
|
|||||||
uint16_t word;
|
uint16_t word;
|
||||||
register16_t() noexcept : word(0) {}
|
register16_t() noexcept : word(0) {}
|
||||||
register16_t(uint16_t w) noexcept : word(w) {}
|
register16_t(uint16_t w) noexcept : word(w) {}
|
||||||
register16_t(uint8_t l, uint8_t h) noexcept : low(l), high(h) {}
|
register16_t(uint8_t l, uint8_t h) noexcept : low(l), high(h) {}
|
||||||
} ;
|
|
||||||
|
register16_t& operator++() noexcept {
|
||||||
|
++word;
|
||||||
|
return *this;
|
||||||
|
}
|
||||||
|
|
||||||
|
register16_t& operator--() noexcept {
|
||||||
|
--word;
|
||||||
|
return *this;
|
||||||
|
}
|
||||||
|
|
||||||
|
register16_t operator++(int) noexcept {
|
||||||
|
register16_t temporary(*this);
|
||||||
|
operator++();
|
||||||
|
return temporary;
|
||||||
|
}
|
||||||
|
|
||||||
|
register16_t operator--(int) noexcept {
|
||||||
|
register16_t temporary(*this);
|
||||||
|
operator--();
|
||||||
|
return temporary;
|
||||||
|
}
|
||||||
|
|
||||||
|
register16_t& operator+=(const register16_t rhs) noexcept {
|
||||||
|
this->word += rhs.word;
|
||||||
|
return *this;
|
||||||
|
}
|
||||||
|
|
||||||
|
register16_t& operator-=(const register16_t rhs) noexcept {
|
||||||
|
this->word -= rhs.word;
|
||||||
|
return *this;
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
|
inline register16_t operator+(register16_t lhs, const register16_t rhs) noexcept {
|
||||||
|
lhs += rhs;
|
||||||
|
return lhs;
|
||||||
|
}
|
||||||
|
|
||||||
|
inline register16_t operator-(register16_t lhs, const register16_t rhs) noexcept {
|
||||||
|
lhs -= rhs;
|
||||||
|
return lhs;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
@ -9,26 +9,26 @@ EightBit::IntelProcessor::IntelProcessor(Bus& bus)
|
|||||||
|
|
||||||
void EightBit::IntelProcessor::reset() {
|
void EightBit::IntelProcessor::reset() {
|
||||||
Processor::reset();
|
Processor::reset();
|
||||||
SP().word = AF().word = BC().word = DE().word = HL().word = Mask16;
|
SP() = AF() = BC() = DE() = HL() = Mask16;
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::IntelProcessor::push(const uint8_t value) {
|
void EightBit::IntelProcessor::push(const uint8_t value) {
|
||||||
BUS().write(--SP().word, value);
|
BUS().write(--SP(), value);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t EightBit::IntelProcessor::pop() {
|
uint8_t EightBit::IntelProcessor::pop() {
|
||||||
return BUS().read(SP().word++);
|
return BUS().read(SP()++);
|
||||||
}
|
}
|
||||||
|
|
||||||
EightBit::register16_t EightBit::IntelProcessor::getWord() {
|
EightBit::register16_t EightBit::IntelProcessor::getWord() {
|
||||||
BUS().ADDRESS().word = MEMPTR().word++;
|
BUS().ADDRESS() = MEMPTR()++;
|
||||||
const auto low = BUS().read();
|
const auto low = BUS().read();
|
||||||
++BUS().ADDRESS().word;
|
++BUS().ADDRESS();
|
||||||
const auto high = BUS().read();
|
const auto high = BUS().read();
|
||||||
return register16_t(low, high);
|
return register16_t(low, high);
|
||||||
}
|
}
|
||||||
|
|
||||||
void EightBit::IntelProcessor::setWord(const register16_t value) {
|
void EightBit::IntelProcessor::setWord(const register16_t value) {
|
||||||
BUS().write(MEMPTR().word++, value.low);
|
BUS().write(MEMPTR()++, value.low);
|
||||||
BUS().write(++BUS().ADDRESS().word, value.high);
|
BUS().write(++BUS().ADDRESS(), value.high);
|
||||||
}
|
}
|
||||||
|
@ -11,14 +11,13 @@ void EightBit::Processor::reset() {
|
|||||||
raise(INT());
|
raise(INT());
|
||||||
raise(NMI());
|
raise(NMI());
|
||||||
raise(RESET());
|
raise(RESET());
|
||||||
PC().word = 0;
|
PC() = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int EightBit::Processor::run(const int limit) {
|
int EightBit::Processor::run(const int limit) {
|
||||||
int current = 0;
|
int current = 0;
|
||||||
while (LIKELY(powered()) && current < limit) {
|
while (LIKELY(powered()) && current < limit)
|
||||||
current += singleStep();
|
current += singleStep();
|
||||||
}
|
|
||||||
return current;
|
return current;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user