mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2024-12-22 09:30:32 +00:00
Reduce code density a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon
parent
7d25962f3c
commit
757d8f3c32
@ -55,14 +55,14 @@ void EightBit::Z80::reset() {
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exxAF();
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exx();
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AF().word = 0xffff;
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AF() = 0xffff;
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BC().word = 0xffff;
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DE().word = 0xffff;
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HL().word = 0xffff;
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BC() = 0xffff;
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DE() = 0xffff;
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HL() = 0xffff;
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IX().word = 0xffff;
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IY().word = 0xffff;
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IX() = 0xffff;
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IY() = 0xffff;
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m_prefixCB = m_prefixDD = m_prefixED = m_prefixFD = false;
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}
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@ -260,11 +260,9 @@ void EightBit::Z80::add(const uint8_t value, const int carry) {
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adjustHalfCarryAdd(F(), A(), value, result.low);
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adjustOverflowAdd(F(), A(), value, result.low);
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A() = result.low;
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clearFlag(F(), NF);
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setFlag(F(), CF, result.word & Bit8);
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adjustSZXY<Z80>(F(), A());
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adjustSZXY<Z80>(F(), A() = result.low);
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}
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void EightBit::Z80::adc(const uint8_t value) {
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@ -278,11 +276,9 @@ void EightBit::Z80::subtract(uint8_t& operand, const uint8_t value, const int ca
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adjustHalfCarrySub(F(), operand, value, result.low);
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adjustOverflowSub(F(), operand, value, result.low);
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operand = result.low;
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setFlag(F(), NF);
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setFlag(F(), CF, result.word & Bit8);
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adjustSZ<Z80>(F(), operand);
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adjustSZ<Z80>(F(), operand = result.low);
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}
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void EightBit::Z80::sub(const uint8_t value, const int carry) {
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@ -319,33 +315,29 @@ void EightBit::Z80::compare(const uint8_t value) {
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void EightBit::Z80::rlc(uint8_t& operand) {
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clearFlag(F(), NF | HC);
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const auto carry = operand & Bit7;
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operand = (operand << 1) | (carry >> 7);
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setFlag(F(), CF, carry);
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adjustXY<Z80>(F(), operand);
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adjustXY<Z80>(F(), operand = (operand << 1) | (carry >> 7));
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}
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void EightBit::Z80::rrc(uint8_t& operand) {
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clearFlag(F(), NF | HC);
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const auto carry = operand & Bit0;
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operand = (operand >> 1) | (carry << 7);
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setFlag(F(), CF, carry);
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adjustXY<Z80>(F(), operand);
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adjustXY<Z80>(F(), operand = (operand >> 1) | (carry << 7));
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}
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void EightBit::Z80::rl(uint8_t& operand) {
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clearFlag(F(), NF | HC);
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const auto carry = F() & CF;
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setFlag(F(), CF, operand & Bit7);
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operand = (operand << 1) | carry;
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adjustXY<Z80>(F(), operand);
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adjustXY<Z80>(F(), operand = (operand << 1) | carry);
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}
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void EightBit::Z80::rr(uint8_t& operand) {
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clearFlag(F(), NF | HC);
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const auto carry = F() & CF;
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setFlag(F(), CF, operand & Bit0);
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operand = (operand >> 1) | (carry << 7);
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adjustXY<Z80>(F(), operand);
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adjustXY<Z80>(F(), operand = (operand >> 1) | (carry << 7));
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}
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//
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@ -353,22 +345,19 @@ void EightBit::Z80::rr(uint8_t& operand) {
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void EightBit::Z80::sla(uint8_t& operand) {
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clearFlag(F(), NF | HC);
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setFlag(F(), CF, operand & Bit7);
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operand <<= 1;
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adjustXY<Z80>(F(), operand);
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adjustXY<Z80>(F(), operand <<= 1);
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}
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void EightBit::Z80::sra(uint8_t& operand) {
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clearFlag(F(), NF | HC);
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setFlag(F(), CF, operand & Bit0);
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operand = (operand >> 1) | (operand & Bit7);
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adjustXY<Z80>(F(), operand);
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adjustXY<Z80>(F(), operand = (operand >> 1) | (operand & Bit7));
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}
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void EightBit::Z80::sll(uint8_t& operand) {
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clearFlag(F(), NF | HC);
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setFlag(F(), CF, operand & Bit7);
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operand = (operand << 1) | Bit0;
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adjustXY<Z80>(F(), operand);
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adjustXY<Z80>(F(), operand = (operand << 1) | Bit0);
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}
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void EightBit::Z80::srl(uint8_t& operand) {
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@ -877,13 +866,12 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
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addCycles(15);
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break;
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case 3: // Retrieve/store register pair from/to immediate address
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MEMPTR() = fetchWord();
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switch (q) {
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case 0: // LD (nn), rp[p]
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MEMPTR() = fetchWord();
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setWord(RP(p));
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break;
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case 1: // LD rp[p], (nn)
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MEMPTR() = fetchWord();
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RP(p) = getWord();
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break;
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default:
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@ -940,15 +928,13 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
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addCycles(9);
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break;
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case 2: // LD A,I
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A() = IV();
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adjustSZXY<Z80>(F(), A());
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adjustSZXY<Z80>(F(), A() = IV());
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clearFlag(F(), NF | HC);
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setFlag(F(), PF, IFF2());
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addCycles(9);
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break;
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case 3: // LD A,R
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A() = REFRESH();
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adjustSZXY<Z80>(F(), A());
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adjustSZXY<Z80>(F(), A() = REFRESH());
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clearFlag(F(), NF | HC);
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setFlag(F(), PF, IFF2());
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addCycles(9);
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@ -1316,42 +1302,44 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
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}
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addCycles(4);
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break;
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case 2: // Operate on accumulator and register/memory location
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case 2: { // Operate on accumulator and register/memory location
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if (UNLIKELY(z == 6)) {
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addCycles(3);
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if (UNLIKELY(m_displaced))
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fetchDisplacement();
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}
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const auto value = R(z);
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switch (y) {
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case 0: // ADD A,r
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add(R(z));
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add(value);
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break;
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case 1: // ADC A,r
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adc(R(z));
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adc(value);
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break;
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case 2: // SUB r
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sub(R(z));
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sub(value);
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break;
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case 3: // SBC A,r
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sbc(R(z));
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sbc(value);
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break;
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case 4: // AND r
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andr(R(z));
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andr(value);
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break;
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case 5: // XOR r
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xorr(R(z));
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xorr(value);
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break;
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case 6: // OR r
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orr(R(z));
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orr(value);
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break;
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case 7: // CP r
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compare(R(z));
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compare(value);
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break;
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default:
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UNREACHABLE;
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}
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addCycles(4);
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break;
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}
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case 3:
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switch (z) {
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case 0: // Conditional return
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@ -1477,37 +1465,39 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
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UNREACHABLE;
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}
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break;
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case 6: // Operate on accumulator and immediate operand: alu[y] n
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case 6: { // Operate on accumulator and immediate operand: alu[y] n
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const auto operand = fetchByte();
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switch (y) {
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case 0: // ADD A,n
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add(fetchByte());
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add(operand);
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break;
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case 1: // ADC A,n
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adc(fetchByte());
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adc(operand);
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break;
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case 2: // SUB n
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sub(fetchByte());
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sub(operand);
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break;
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case 3: // SBC A,n
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sbc(fetchByte());
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sbc(operand);
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break;
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case 4: // AND n
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andr(fetchByte());
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andr(operand);
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break;
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case 5: // XOR n
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xorr(fetchByte());
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xorr(operand);
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break;
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case 6: // OR n
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orr(fetchByte());
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orr(operand);
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break;
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case 7: // CP n
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compare(fetchByte());
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compare(operand);
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break;
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default:
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UNREACHABLE;
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}
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addCycles(7);
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break;
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}
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case 7: // Restart: RST y * 8
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restart(y << 3);
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addCycles(11);
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