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Fix an optimisation instruction ordering issue: fetchByte on both rhs/lhs.

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This caused two failing tests in the debug build of the fuse test suite.

Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
This commit is contained in:
Adrian.Conlon 2017-06-24 21:38:42 +01:00
parent 993fe5d2b4
commit a7d9cb0116
1 changed files with 7 additions and 4 deletions
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11
Z80/src/Z80.cpp
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@ -18,7 +18,9 @@ EightBit::Z80::Z80(Memory& memory, InputOutput& ports)
m_prefixCB(false),
m_prefixDD(false),
m_prefixED(false),
m_prefixFD(false) {
m_prefixFD(false),
m_displacement(0),
m_displaced(false) {
IX().word = 0xffff;
IY().word = 0xffff;
}
@ -1230,13 +1232,14 @@ void EightBit::Z80::executeOther(int x, int y, int z, int p, int q) {
if (y == 6)
cycles += 7;
break;
case 6: // 8-bit load immediate
R(y) = fetchByte(); // LD r,n
case 6: { // 8-bit load immediate
auto& r = R(y); // LD r,n
r = fetchByte();
cycles += 7;
if (y == 6)
cycles += 3;
break;
case 7: // Assorted operations on accumulator/flags
} case 7: // Assorted operations on accumulator/flags
switch (y) {
case 0:
rlc(A());