6502/EightBit
1
0
Fork 0
mirror of https://github.com/MoleskiCoder/EightBit.git synced 2024-11-05 19:05:32 +00:00
Code Issues Projects Releases Wiki Activity

Port the 6502 to the new bus architecture.

Browse Source
This commit is contained in:
Adrian Conlon 2018-12-29 19:40:02 +00:00
parent f38d326ca7
commit adb60a6e90
2 changed files with 51 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
M6502/inc/mos6502.h
View File

@ -30,7 +30,7 @@ namespace EightBit {
Signal<MOS6502> ExecutingInstruction;
Signal<MOS6502> ExecutedInstruction;
virtual int execute(uint8_t opcode) final;
virtual int execute() final;
virtual int step() final;
virtual void powerOn() final;

100
M6502/src/mos6502.cpp
View File

@ -33,7 +33,7 @@ int EightBit::MOS6502::step() {
else if (UNLIKELY(lowered(IRQ()) && !interruptMasked()))
handleIRQ();
else
execute(fetchByte());
Processor::execute(fetchByte());
}
ExecutedInstruction.fire(*this);
return cycles();
@ -47,7 +47,7 @@ void EightBit::MOS6502::handleSO() {
}
void EightBit::MOS6502::handleHALT() {
execute(0xea); // NOP
Processor::execute(0xea); // NOP
addCycles(2);
}
@ -80,9 +80,9 @@ void EightBit::MOS6502::interrupt(uint8_t vector) {
//
int EightBit::MOS6502::execute(const uint8_t opcode) {
int EightBit::MOS6502::execute() {
switch (opcode) {
switch (opcode()) {
case 0x00: addCycles(7); brk(); break; // BRK
case 0x01: addCycles(6); A() = orr(A(), AM_IndexedIndirectX()); break; // ORA (indexed indirect X)
@ -90,7 +90,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x03: break;
case 0x04: break;
case 0x05: addCycles(3); A() = orr(A(), AM_ZeroPage()); break; // ORA (zero page)
case 0x06: addCycles(5); BUS().write(asl(AM_ZeroPage())); break; // ASL (zero page)
case 0x06: addCycles(5); busWrite(asl(AM_ZeroPage())); break; // ASL (zero page)
case 0x07: break;
case 0x08: addCycles(3); php(); break; // PHP
case 0x09: addCycles(2); A() = orr(A(), AM_Immediate()); break; // ORA (immediate)
@ -98,7 +98,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x0b: break;
case 0x0c: break;
case 0x0d: addCycles(4); A() = orr(A(), AM_Absolute()); break; // ORA (absolute)
case 0x0e: addCycles(6); BUS().write(asl(AM_Absolute())); break; // ASL (absolute)
case 0x0e: addCycles(6); busWrite(asl(AM_Absolute())); break; // ASL (absolute)
case 0x0f: break;
case 0x10: addCycles(2); branch(!negative()); break; // BPL (relative)
@ -107,7 +107,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x13: break;
case 0x14: break;
case 0x15: addCycles(4); A() = orr(A(), AM_ZeroPageX()); break; // ORA (zero page, X)
case 0x16: addCycles(6); BUS().write(asl(AM_ZeroPageX())); break; // ASL (zero page, X)
case 0x16: addCycles(6); busWrite(asl(AM_ZeroPageX())); break; // ASL (zero page, X)
case 0x17: break;
case 0x18: addCycles(2); clearFlag(P(), CF); break; // CLC
case 0x19: addCycles(4); A() = orr(A(), AM_AbsoluteY()); break; // ORA (absolute, Y)
@ -115,7 +115,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x1b: break;
case 0x1c: break;
case 0x1d: addCycles(4); A() = orr(A(), AM_AbsoluteX()); break; // ORA (absolute, X)
case 0x1e: addCycles(7); BUS().write(asl(AM_AbsoluteX())); break; // ASL (absolute, X)
case 0x1e: addCycles(7); busWrite(asl(AM_AbsoluteX())); break; // ASL (absolute, X)
case 0x1f: break;
case 0x20: addCycles(6); jsr(Address_Absolute()); break; // JSR (absolute)
@ -124,7 +124,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x23: break;
case 0x24: addCycles(3); bit(A(), AM_ZeroPage()); break; // BIT (zero page)
case 0x25: addCycles(3); A() = andr(A(), AM_ZeroPage()); break; // AND (zero page)
case 0x26: addCycles(5); BUS().write(rol(AM_ZeroPage())); break; // ROL (zero page)
case 0x26: addCycles(5); busWrite(rol(AM_ZeroPage())); break; // ROL (zero page)
case 0x27: break;
case 0x28: addCycles(4); plp(); break; // PLP
case 0x29: addCycles(2); A() = andr(A(), AM_Immediate()); break; // AND (immediate)
@ -132,7 +132,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x2b: break;
case 0x2c: addCycles(4); bit(A(), AM_Absolute()); break; // BIT (absolute)
case 0x2d: addCycles(4); A() = andr(A(), AM_Absolute()); break; // AND (absolute)
case 0x2e: addCycles(6); BUS().write(rol(AM_Absolute())); break; // ROL (absolute)
case 0x2e: addCycles(6); busWrite(rol(AM_Absolute())); break; // ROL (absolute)
case 0x2f: break;
case 0x30: addCycles(2); branch(negative()); break; // BMI
@ -141,7 +141,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x33: break;
case 0x34: break;
case 0x35: addCycles(4); A() = andr(A(), AM_ZeroPageX()); break; // AND (zero page, X)
case 0x36: addCycles(6); BUS().write(rol(AM_ZeroPageX())); break; // ROL (zero page, X)
case 0x36: addCycles(6); busWrite(rol(AM_ZeroPageX())); break; // ROL (zero page, X)
case 0x37: break;
case 0x38: addCycles(2); setFlag(P(), CF); break; // SEC
case 0x39: addCycles(4); A() = andr(A(), AM_AbsoluteY()); break; // AND (absolute, Y)
@ -149,7 +149,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x3b: break;
case 0x3c: break;
case 0x3d: addCycles(4); A() = andr(A(), AM_AbsoluteX()); break; // AND (absolute, X)
case 0x3e: addCycles(7); BUS().write(rol(AM_AbsoluteX())); break; // ROL (absolute, X)
case 0x3e: addCycles(7); busWrite(rol(AM_AbsoluteX())); break; // ROL (absolute, X)
case 0x3f: break;
case 0x40: addCycles(6); rti(); break; // RTI
@ -158,7 +158,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x43: break;
case 0x44: break;
case 0x45: addCycles(3); A() = eorr(A(), AM_ZeroPage()); break; // EOR (zero page)
case 0x46: addCycles(5); BUS().write(lsr(AM_ZeroPage())); break; // LSR (zero page)
case 0x46: addCycles(5); busWrite(lsr(AM_ZeroPage())); break; // LSR (zero page)
case 0x47: break;
case 0x48: addCycles(3); push(A()); break; // PHA
case 0x49: addCycles(2); A() = eorr(A(), AM_Immediate()); break; // EOR (immediate)
@ -166,7 +166,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x4b: break;
case 0x4c: addCycles(3); jump(Address_Absolute()); break; // JMP (absolute)
case 0x4d: addCycles(4); A() = eorr(A(), AM_Absolute()); break; // EOR (absolute)
case 0x4e: addCycles(6); BUS().write(lsr(AM_Absolute())); break; // LSR (absolute)
case 0x4e: addCycles(6); busWrite(lsr(AM_Absolute())); break; // LSR (absolute)
case 0x4f: break;
case 0x50: addCycles(2); branch(!overflow()); break; // BVC (relative)
@ -175,7 +175,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x53: break;
case 0x54: break;
case 0x55: addCycles(4); A() = eorr(A(), AM_ZeroPageX()); break; // EOR (zero page, X)
case 0x56: addCycles(6); BUS().write(lsr(AM_ZeroPageX())); break; // LSR (zero page, X)
case 0x56: addCycles(6); busWrite(lsr(AM_ZeroPageX())); break; // LSR (zero page, X)
case 0x57: break;
case 0x58: addCycles(2); clearFlag(P(), IF); break; // CLI
case 0x59: addCycles(4); A() = eorr(A(), AM_AbsoluteY()); break; // EOR (absolute, Y)
@ -183,7 +183,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x5b: break;
case 0x5c: break;
case 0x5d: addCycles(4); A() = eorr(A(), AM_AbsoluteX()); break; // EOR (absolute, X)
case 0x5e: addCycles(7); BUS().write(lsr(AM_AbsoluteX())); break; // LSR (absolute, X)
case 0x5e: addCycles(7); busWrite(lsr(AM_AbsoluteX())); break; // LSR (absolute, X)
case 0x5f: break;
case 0x60: addCycles(6); rts(); break; // RTS
@ -192,7 +192,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x63: break;
case 0x64: break;
case 0x65: addCycles(3); A() = adc(A(), AM_ZeroPage()); break; // ADC (zero page)
case 0x66: addCycles(5); BUS().write(ror(AM_ZeroPage())); break; // ROR (zero page)
case 0x66: addCycles(5); busWrite(ror(AM_ZeroPage())); break; // ROR (zero page)
case 0x67: break;
case 0x68: addCycles(4); A() = through(pop()); break; // PLA
case 0x69: addCycles(2); A() = adc(A(), AM_Immediate()); break; // ADC (immediate)
@ -200,7 +200,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x6b: break;
case 0x6c: addCycles(5); jump(Address_Indirect()); break; // JMP (indirect)
case 0x6d: addCycles(4); A() = adc(A(), AM_Absolute()); break; // ADC (absolute)
case 0x6e: addCycles(6); BUS().write(ror(AM_Absolute())); break; // ROR (absolute)
case 0x6e: addCycles(6); busWrite(ror(AM_Absolute())); break; // ROR (absolute)
case 0x6f: break;
case 0x70: addCycles(2); branch(overflow()); break; // BVS (relative)
@ -209,7 +209,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x73: break;
case 0x74: break;
case 0x75: addCycles(4); A() = adc(A(), AM_ZeroPageX()); break; // ADC (zero page, X)
case 0x76: addCycles(6); BUS().write(ror(AM_ZeroPageX())); break; // ROR (zero page, X)
case 0x76: addCycles(6); busWrite(ror(AM_ZeroPageX())); break; // ROR (zero page, X)
case 0x77: break;
case 0x78: addCycles(2); setFlag(P(), IF); break; // SEI
case 0x79: addCycles(4); A() = adc(A(), AM_AbsoluteY()); break; // ADC (absolute, Y)
@ -217,40 +217,40 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0x7b: break;
case 0x7c: break;
case 0x7d: addCycles(4); A() = adc(A(), AM_AbsoluteX()); break; // ADC (absolute, X)
case 0x7e: addCycles(7); BUS().write(ror(AM_AbsoluteX())); break; // ROR (absolute, X)
case 0x7e: addCycles(7); busWrite(ror(AM_AbsoluteX())); break; // ROR (absolute, X)
case 0x7f: break;
case 0x80: break;
case 0x81: addCycles(6); BUS().write(Address_IndexedIndirectX(), A()); break; // STA (indexed indirect X)
case 0x81: addCycles(6); busWrite(Address_IndexedIndirectX(), A()); break; // STA (indexed indirect X)
case 0x82: break;
case 0x83: break;
case 0x84: addCycles(3); BUS().write(Address_ZeroPage(), Y()); break; // STY (zero page)
case 0x85: addCycles(3); BUS().write(Address_ZeroPage(), A()); break; // STA (zero page)
case 0x86: addCycles(3); BUS().write(Address_ZeroPage(), X()); break; // STX (zero page)
case 0x84: addCycles(3); busWrite(Address_ZeroPage(), Y()); break; // STY (zero page)
case 0x85: addCycles(3); busWrite(Address_ZeroPage(), A()); break; // STA (zero page)
case 0x86: addCycles(3); busWrite(Address_ZeroPage(), X()); break; // STX (zero page)
case 0x87: break;
case 0x88: addCycles(2); Y() = dec(Y()); break; // DEY
case 0x89: break;
case 0x8a: addCycles(2); A() = through(X()); break; // TXA
case 0x8b: break;
case 0x8c: addCycles(4); BUS().write(Address_Absolute(), Y()); break; // STY (absolute)
case 0x8d: addCycles(4); BUS().write(Address_Absolute(), A()); break; // STA (absolute)
case 0x8e: addCycles(4); BUS().write(Address_Absolute(), X()); break; // STX (absolute)
case 0x8c: addCycles(4); busWrite(Address_Absolute(), Y()); break; // STY (absolute)
case 0x8d: addCycles(4); busWrite(Address_Absolute(), A()); break; // STA (absolute)
case 0x8e: addCycles(4); busWrite(Address_Absolute(), X()); break; // STX (absolute)
case 0x8f: break;
case 0x90: addCycles(2); branch(!carry()); break; // BCC
case 0x91: addCycles(6); BUS().write(Address_IndirectIndexedY().first, A()); break; // STA (indirect indexed Y)
case 0x91: addCycles(6); busWrite(Address_IndirectIndexedY().first, A()); break; // STA (indirect indexed Y)
case 0x92: break;
case 0x93: break;
case 0x94: addCycles(4); BUS().write(Address_ZeroPageX(), Y()); break; // STY (zero page, X)
case 0x95: addCycles(4); BUS().write(Address_ZeroPageX(), A()); break; // STA (zero page, X)
case 0x96: addCycles(4); BUS().write(Address_ZeroPageY(), X()); break; // STX (zero page, X)
case 0x94: addCycles(4); busWrite(Address_ZeroPageX(), Y()); break; // STY (zero page, X)
case 0x95: addCycles(4); busWrite(Address_ZeroPageX(), A()); break; // STA (zero page, X)
case 0x96: addCycles(4); busWrite(Address_ZeroPageY(), X()); break; // STX (zero page, X)
case 0x97: break;
case 0x98: addCycles(2); A() = through(Y()); break; // TYA
case 0x99: addCycles(5); BUS().write(Address_AbsoluteY().first, A()); break; // STA (absolute, Y)
case 0x99: addCycles(5); busWrite(Address_AbsoluteY().first, A()); break; // STA (absolute, Y)
case 0x9a: addCycles(2); S() = X(); break; // TXS
case 0x9b: break;
case 0x9c: break;
case 0x9d: addCycles(5); BUS().write(Address_AbsoluteX().first, A()); break; // STA (absolute, X)
case 0x9d: addCycles(5); busWrite(Address_AbsoluteX().first, A()); break; // STA (absolute, X)
case 0x9e: break;
case 0x9f: break;
@ -294,7 +294,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0xc3: break;
case 0xc4: addCycles(3); cmp(Y(), AM_ZeroPage()); break; // CPY (zero page)
case 0xc5: addCycles(3); cmp(A(), AM_ZeroPage()); break; // CMP (zero page)
case 0xc6: addCycles(5); BUS().write(dec(AM_ZeroPage())); break; // DEC (zero page)
case 0xc6: addCycles(5); busWrite(dec(AM_ZeroPage())); break; // DEC (zero page)
case 0xc7: break;
case 0xc8: addCycles(2); Y() = inc(Y()); break; // INY
case 0xc9: addCycles(2); cmp(A(), AM_Immediate()); break; // CMP (immediate)
@ -302,7 +302,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0xcb: break;
case 0xcc: addCycles(4); cmp(Y(), AM_Absolute()); break; // CPY (absolute)
case 0xcd: addCycles(4); cmp(A(), AM_Absolute()); break; // CMP (absolute)
case 0xce: addCycles(6); BUS().write(dec(AM_Absolute())); break; // DEC (absolute)
case 0xce: addCycles(6); busWrite(dec(AM_Absolute())); break; // DEC (absolute)
case 0xcf: break;
case 0xd0: addCycles(2); branch(!zero()); break; // BNE
@ -311,7 +311,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0xd3: break;
case 0xd4: break;
case 0xd5: addCycles(4); cmp(A(), AM_ZeroPageX()); break; // CMP (zero page, X)
case 0xd6: addCycles(6); BUS().write(dec(AM_ZeroPageX())); break; // DEC (zero page, X)
case 0xd6: addCycles(6); busWrite(dec(AM_ZeroPageX())); break; // DEC (zero page, X)
case 0xd7: break;
case 0xd8: addCycles(2); clearFlag(P(), DF); break; // CLD
case 0xd9: addCycles(4); cmp(A(), AM_AbsoluteY()); break; // CMP (absolute, Y)
@ -319,7 +319,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0xdb: break;
case 0xdc: break;
case 0xdd: addCycles(4); cmp(A(), AM_AbsoluteX()); break; // CMP (absolute, X)
case 0xde: addCycles(7); BUS().write(dec(AM_AbsoluteX())); break; // DEC (absolute, X)
case 0xde: addCycles(7); busWrite(dec(AM_AbsoluteX())); break; // DEC (absolute, X)
case 0xdf: break;
case 0xe0: addCycles(2); cmp(X(), AM_Immediate()); break; // CPX (immediate)
@ -328,15 +328,15 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0xe3: break;
case 0xe4: addCycles(3); cmp(X(), AM_ZeroPage()); break; // CPX (zero page)
case 0xe5: addCycles(3); A() = sbc(A(), AM_ZeroPage()); break; // SBC (zero page)
case 0xe6: addCycles(5); BUS().write(inc(AM_ZeroPage())); break; // INC (zero page)
case 0xe6: addCycles(5); busWrite(inc(AM_ZeroPage())); break; // INC (zero page)
case 0xe7: break;
case 0xe8: addCycles(2); X() = inc(X()); break; // INX
case 0xe9: addCycles(2); A() = sbc(A(), AM_Immediate()); break; // SBC (immediate)
case 0xea: break;
case 0xea: addCycles(2); break;
case 0xeb: break;
case 0xec: addCycles(4); cmp(X(), AM_Absolute()); break; // CPX (absolute)
case 0xed: addCycles(4); A() = sbc(A(), AM_Absolute()); break; // SBC (absolute)
case 0xee: addCycles(6); BUS().write(inc(AM_Absolute())); break; // INC (absolute)
case 0xee: addCycles(6); busWrite(inc(AM_Absolute())); break; // INC (absolute)
case 0xef: break;
case 0xf0: addCycles(2); branch(zero()); break; // BEQ
@ -345,7 +345,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0xf3: break;
case 0xf4: break;
case 0xf5: addCycles(4); A() = sbc(A(), AM_ZeroPageX()); break; // SBC (zero page, X)
case 0xf6: addCycles(6); BUS().write(inc(AM_ZeroPageX())); break; // INC (zero page, X)
case 0xf6: addCycles(6); busWrite(inc(AM_ZeroPageX())); break; // INC (zero page, X)
case 0xf7: break;
case 0xf8: addCycles(2); setFlag(P(), DF); break; // SED
case 0xf9: addCycles(4); A() = sbc(A(), AM_AbsoluteY()); break; // SBC (absolute, Y)
@ -353,7 +353,7 @@ int EightBit::MOS6502::execute(const uint8_t opcode) {
case 0xfb: break;
case 0xfc: break;
case 0xfd: addCycles(4); A() = sbc(A(), AM_AbsoluteX()); break; // SBC (absolute, X)
case 0xfe: addCycles(7); BUS().write(inc(AM_AbsoluteX())); break; // INC (absolute, X)
case 0xfe: addCycles(7); busWrite(inc(AM_AbsoluteX())); break; // INC (absolute, X)
case 0xff: break;
}
@ -434,44 +434,44 @@ uint8_t EightBit::MOS6502::AM_Immediate() {
}
uint8_t EightBit::MOS6502::AM_Absolute() {
return BUS().read(Address_Absolute());
return busRead(Address_Absolute());
}
uint8_t EightBit::MOS6502::AM_ZeroPage() {
return BUS().read(Address_ZeroPage());
return busRead(Address_ZeroPage());
}
uint8_t EightBit::MOS6502::AM_AbsoluteX() {
const auto [address, paged] = Address_AbsoluteX();
if (UNLIKELY(paged))
addCycle();
return BUS().read(address);
return busRead(address);
}
uint8_t EightBit::MOS6502::AM_AbsoluteY() {
const auto [address, paged] = Address_AbsoluteY();
if (UNLIKELY(paged))
addCycle();
return BUS().read(address);
return busRead(address);
}
uint8_t EightBit::MOS6502::AM_ZeroPageX() {
return BUS().read(Address_ZeroPageX());
return busRead(Address_ZeroPageX());
}
uint8_t EightBit::MOS6502::AM_ZeroPageY() {
return BUS().read(Address_ZeroPageY());
return busRead(Address_ZeroPageY());
}
uint8_t EightBit::MOS6502::AM_IndexedIndirectX() {
return BUS().read(Address_IndexedIndirectX());
return busRead(Address_IndexedIndirectX());
}
uint8_t EightBit::MOS6502::AM_IndirectIndexedY() {
const auto [address, paged] = Address_IndirectIndexedY();
if (UNLIKELY(paged))
addCycle();
return BUS().read(address);
return busRead(address);
}
////