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Optimisation: Prefer return by value to return by reference. ~10% speed-up!

Browse Source 
Just watch a video by Chandler Carruth from 2015, where he talked about C++ optimisers...

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2018-02-25 19:48:01 +00:00
parent d34b161255
commit adf506a41e
7 changed files with 48 additions and 46 deletions
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18
Intel8080/src/Intel8080.cpp
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@ -322,7 +322,7 @@ void EightBit::Intel8080::execute(uint8_t& a, uint8_t& f, int x, int y, int z, i
case 1: // 16-bit load immediate/add case 1: // 16-bit load immediate/add
switch (q) { switch (q) {
case 0: // LD rp,nn case 0: // LD rp,nn
fetchWord(RP(p)); RP(p) = fetchWord();
addCycles(10); addCycles(10);
break; break;
case 1: // ADD HL,rp case 1: // ADD HL,rp
@ -346,12 +346,12 @@ void EightBit::Intel8080::execute(uint8_t& a, uint8_t& f, int x, int y, int z, i
addCycles(7); addCycles(7);
break; break;
case 2: // LD (nn),HL case 2: // LD (nn),HL
fetchWord(); MEMPTR() = fetchWord();
setWord(HL()); setWord(HL());
addCycles(16); addCycles(16);
break; break;
case 3: // LD (nn),A case 3: // LD (nn),A
fetchWord(); MEMPTR() = fetchWord();
setByte(MEMPTR(), a); setByte(MEMPTR(), a);
addCycles(13); addCycles(13);
break; break;
@ -370,12 +370,12 @@ void EightBit::Intel8080::execute(uint8_t& a, uint8_t& f, int x, int y, int z, i
addCycles(7); addCycles(7);
break; break;
case 2: // LD HL,(nn) case 2: // LD HL,(nn)
fetchWord(); MEMPTR() = fetchWord();
getWord(HL()); HL() = getWord();
addCycles(16); addCycles(16);
break; break;
case 3: // LD A,(nn) case 3: // LD A,(nn)
fetchWord(); MEMPTR() = fetchWord();
a = getByte(MEMPTR()); a = getByte(MEMPTR());
addCycles(13); addCycles(13);
break; break;
@ -508,7 +508,7 @@ void EightBit::Intel8080::execute(uint8_t& a, uint8_t& f, int x, int y, int z, i
case 1: // POP & various ops case 1: // POP & various ops
switch (q) { switch (q) {
case 0: // POP rp2[p] case 0: // POP rp2[p]
popWord(RP2(p)); RP2(p) = popWord();
addCycles(10); addCycles(10);
break; break;
case 1: case 1:
@ -538,7 +538,7 @@ void EightBit::Intel8080::execute(uint8_t& a, uint8_t& f, int x, int y, int z, i
case 3: // Assorted operations case 3: // Assorted operations
switch (y) { switch (y) {
case 0: // JP nn case 0: // JP nn
fetchWord(); MEMPTR() = fetchWord();
jump(); jump();
addCycles(10); addCycles(10);
break; break;
@ -582,7 +582,7 @@ void EightBit::Intel8080::execute(uint8_t& a, uint8_t& f, int x, int y, int z, i
case 1: case 1:
switch (p) { switch (p) {
case 0: // CALL nn case 0: // CALL nn
fetchWord(); MEMPTR() = fetchWord();
call(); call();
addCycles(17); addCycles(17);
break; break;

14
LR35902/src/LR35902.cpp
View File

@ -424,7 +424,7 @@ void EightBit::GameBoy::LR35902::executeOther(uint8_t& a, uint8_t& f, int x, int
addCycle(); addCycle();
break; break;
case 1: // GB: LD (nn),SP case 1: // GB: LD (nn),SP
fetchWord(); MEMPTR() = fetchWord();
setWord(SP()); setWord(SP());
addCycles(5); addCycles(5);
break; break;
@ -451,7 +451,7 @@ void EightBit::GameBoy::LR35902::executeOther(uint8_t& a, uint8_t& f, int x, int
case 1: // 16-bit load immediate/add case 1: // 16-bit load immediate/add
switch (q) { switch (q) {
case 0: // LD rp,nn case 0: // LD rp,nn
fetchWord(RP(p)); RP(p) = fetchWord();
addCycles(3); addCycles(3);
break; break;
case 1: // ADD HL,rp case 1: // ADD HL,rp
@ -674,7 +674,7 @@ void EightBit::GameBoy::LR35902::executeOther(uint8_t& a, uint8_t& f, int x, int
case 1: // POP & various ops case 1: // POP & various ops
switch (q) { switch (q) {
case 0: // POP rp2[p] case 0: // POP rp2[p]
popWord(RP2(p)); RP2(p) = popWord();
addCycles(3); addCycles(3);
break; break;
case 1: case 1:
@ -717,7 +717,7 @@ void EightBit::GameBoy::LR35902::executeOther(uint8_t& a, uint8_t& f, int x, int
addCycles(2); addCycles(2);
break; break;
case 5: // GB: LD (nn),A case 5: // GB: LD (nn),A
fetchWord(); MEMPTR() = fetchWord();
setByte(MEMPTR(), a); setByte(MEMPTR(), a);
addCycles(4); addCycles(4);
break; break;
@ -726,7 +726,7 @@ void EightBit::GameBoy::LR35902::executeOther(uint8_t& a, uint8_t& f, int x, int
addCycles(2); addCycles(2);
break; break;
case 7: // GB: LD A,(nn) case 7: // GB: LD A,(nn)
fetchWord(); MEMPTR() = fetchWord();
a = getByte(MEMPTR()); a = getByte(MEMPTR());
addCycles(4); addCycles(4);
break; break;
@ -737,7 +737,7 @@ void EightBit::GameBoy::LR35902::executeOther(uint8_t& a, uint8_t& f, int x, int
case 3: // Assorted operations case 3: // Assorted operations
switch (y) { switch (y) {
case 0: // JP nn case 0: // JP nn
fetchWord(); MEMPTR() = fetchWord();
jump(); jump();
addCycles(4); addCycles(4);
break; break;
@ -769,7 +769,7 @@ void EightBit::GameBoy::LR35902::executeOther(uint8_t& a, uint8_t& f, int x, int
case 1: case 1:
switch (p) { switch (p) {
case 0: // CALL nn case 0: // CALL nn
fetchWord(); MEMPTR() = fetchWord();
call(); call();
addCycles(6); addCycles(6);
break; break;

2
M6502/inc/mos6502.h
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@ -75,7 +75,7 @@ namespace EightBit {
// Address resolution // Address resolution
void Address_Absolute() { void Address_Absolute() {
fetchWord(); MEMPTR() = fetchWord();
} }
void Address_ZeroPage() { void Address_ZeroPage() {

24
Z80/src/Z80.cpp
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@ -870,12 +870,12 @@ void EightBit::Z80::executeED(uint8_t& a, uint8_t& f, const int x, const int y,
case 3: // Retrieve/store register pair from/to immediate address case 3: // Retrieve/store register pair from/to immediate address
switch (q) { switch (q) {
case 0: // LD (nn), rp[p] case 0: // LD (nn), rp[p]
fetchWord(); MEMPTR() = fetchWord();
setWord(RP(p)); setWord(RP(p));
break; break;
case 1: // LD rp[p], (nn) case 1: // LD rp[p], (nn)
fetchWord(); MEMPTR() = fetchWord();
getWord(RP(p)); RP(p) = getWord();
break; break;
default: default:
UNREACHABLE; UNREACHABLE;
@ -1097,7 +1097,7 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
case 1: // 16-bit load immediate/add case 1: // 16-bit load immediate/add
switch (q) { switch (q) {
case 0: // LD rp,nn case 0: // LD rp,nn
fetchWord(RP(p)); RP(p) = fetchWord();
addCycles(10); addCycles(10);
break; break;
case 1: // ADD HL,rp case 1: // ADD HL,rp
@ -1125,12 +1125,12 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
addCycles(7); addCycles(7);
break; break;
case 2: // LD (nn),HL case 2: // LD (nn),HL
fetchWord(); MEMPTR() = fetchWord();
setWord(HL2()); setWord(HL2());
addCycles(16); addCycles(16);
break; break;
case 3: // LD (nn),A case 3: // LD (nn),A
fetchWord(); MEMPTR() = fetchWord();
setByte(MEMPTR().word++, a); setByte(MEMPTR().word++, a);
MEMPTR().high = a; MEMPTR().high = a;
addCycles(13); addCycles(13);
@ -1152,12 +1152,12 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
addCycles(7); addCycles(7);
break; break;
case 2: // LD HL,(nn) case 2: // LD HL,(nn)
fetchWord(); MEMPTR() = fetchWord();
getWord(HL2()); HL2() = getWord();
addCycles(16); addCycles(16);
break; break;
case 3: // LD A,(nn) case 3: // LD A,(nn)
fetchWord(); MEMPTR() = fetchWord();
a = getByte(MEMPTR().word++); a = getByte(MEMPTR().word++);
addCycles(13); addCycles(13);
break; break;
@ -1328,7 +1328,7 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
case 1: // POP & various ops case 1: // POP & various ops
switch (q) { switch (q) {
case 0: // POP rp2[p] case 0: // POP rp2[p]
popWord(RP2(p)); RP2(p) = popWord();
addCycles(10); addCycles(10);
break; break;
case 1: case 1:
@ -1364,7 +1364,7 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
case 3: // Assorted operations case 3: // Assorted operations
switch (y) { switch (y) {
case 0: // JP nn case 0: // JP nn
fetchWord(); MEMPTR() = fetchWord();
jump(); jump();
addCycles(10); addCycles(10);
break; break;
@ -1417,7 +1417,7 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
case 1: case 1:
switch (p) { switch (p) {
case 0: // CALL nn case 0: // CALL nn
fetchWord(); MEMPTR() = fetchWord();
call(); call();
addCycles(17); addCycles(17);
break; break;

6
inc/IntelProcessor.h
View File

@ -120,7 +120,7 @@ namespace EightBit {
// //
void getWord(register16_t& value); register16_t getWord();
void setWord(register16_t value); void setWord(register16_t value);
// //
@ -132,14 +132,14 @@ namespace EightBit {
} }
bool callConditional(int condition) { bool callConditional(int condition) {
fetchWord(); MEMPTR() = fetchWord();
if (condition) if (condition)
call(); call();
return condition != 0; return condition != 0;
} }
bool jumpConditional(int conditional) { bool jumpConditional(int conditional) {
fetchWord(); MEMPTR() = fetchWord();
if (conditional) if (conditional)
jump(); jump();
return conditional != 0; return conditional != 0;

22
inc/Processor.h
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@ -110,13 +110,11 @@ namespace EightBit {
return getByte(PC().word++); return getByte(PC().word++);
} }
void fetchWord(register16_t& output) { register16_t fetchWord() {
output.low = fetchByte(); register16_t returned;
output.high = fetchByte(); returned.low = fetchByte();
} returned.high = fetchByte();
return returned;
void fetchWord() {
fetchWord(MEMPTR());
} }
uint8_t getByte() { return BUS().read(); } uint8_t getByte() { return BUS().read(); }
@ -133,9 +131,11 @@ namespace EightBit {
push(value.low); push(value.low);
} }
void popWord(register16_t& output) { register16_t popWord() {
output.low = pop(); register16_t returned;
output.high = pop(); returned.low = pop();
returned.high = pop();
return returned;
} }
void jump() { void jump() {
@ -148,7 +148,7 @@ namespace EightBit {
} }
void ret() { void ret() {
popWord(MEMPTR()); MEMPTR() = popWord();
jump(); jump();
} }

8
src/IntelProcessor.cpp
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@ -20,10 +20,12 @@ uint8_t EightBit::IntelProcessor::pop() {
return getByte(SP().word++); return getByte(SP().word++);
} }
void EightBit::IntelProcessor::getWord(register16_t& value) { EightBit::register16_t EightBit::IntelProcessor::getWord() {
value.low = getByte(MEMPTR().word++); register16_t returned;
returned.low = getByte(MEMPTR().word++);
BUS().ADDRESS().word++; BUS().ADDRESS().word++;
value.high = getByte(); returned.high = getByte();
return returned;
} }
void EightBit::IntelProcessor::setWord(register16_t value) { void EightBit::IntelProcessor::setWord(register16_t value) {