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EightBit
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read/modify/write tidy

This commit is contained in:
Adrian Conlon 2024-03-15 07:01:37 +00:00
parent a81dec6c6e
commit bc71a4f3a6
2 changed files with 49 additions and 58 deletions
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23
M6502/inc/mos6502.h
View File

@ -173,14 +173,7 @@ namespace EightBit {
return data;
}
#define FIXUP_RMW(OPERATION) \
{ \
fixup(); \
RMW(OPERATION); \
}
#define RMW(OPERATION) \
{ \
#define RMW(OPERATION) { \
const auto data = memoryRead(); \
const auto result = OPERATION(data); \
memoryWrite(); \
@ -188,19 +181,19 @@ namespace EightBit {
}
void maybe_fixup() noexcept {
const auto fixed = BUS().ADDRESS();
BUS().ADDRESS() = { fixed.low, m_unfixed_page };
if (m_unfixed_page != fixed.high) {
const auto fixed_page = BUS().ADDRESS().high;
BUS().ADDRESS().high = m_unfixed_page;
if (m_unfixed_page != fixed_page) {
memoryRead();
BUS().ADDRESS().high = fixed.high;
BUS().ADDRESS().high = fixed_page;
}
}
void fixup() noexcept {
const auto fixed = BUS().ADDRESS();
BUS().ADDRESS() = { fixed.low, m_unfixed_page };
const auto fixed_page = BUS().ADDRESS().high;
BUS().ADDRESS().high = m_unfixed_page;
memoryRead();
BUS().ADDRESS().high = fixed.high;
BUS().ADDRESS().high = fixed_page;
}
// Status flag operations

84
M6502/src/mos6502.cpp
View File

@ -145,24 +145,24 @@ void EightBit::MOS6502::execute() noexcept {
case 0x0c: Address_Absolute(); break; // *NOP (absolute)
case 0x0d: AM_Absolute(); orr(); break; // ORA (absolute)
case 0x0e: Address_Absolute(); RMW(asl); break; // ASL (absolute)
case 0x0f: Processor::execute(0x0e); orr(); break; // *SLO (absolute)
case 0x0f: Address_Absolute(); RMW(asl); orr(); break; // *SLO (absolute)
case 0x10: branch(negative() == 0); break; // BPL (relative)
case 0x11: AM_IndirectIndexedY(); orr(); break; // ORA (indirect indexed Y)
case 0x12: jam(); break; // *JAM
case 0x13: Address_IndirectIndexedY(); FIXUP_RMW(asl); orr(); break; // *SLO (indirect indexed Y)
case 0x13: Address_IndirectIndexedY(); fixup(); RMW(asl); orr(); break; // *SLO (indirect indexed Y)
case 0x14: AM_ZeroPageX(); break; // *NOP (zero page, X)
case 0x15: AM_ZeroPageX(); orr(); break; // ORA (zero page, X)
case 0x16: Address_ZeroPageX(); RMW(asl); break; // ASL (zero page, X)
case 0x17: Processor::execute(0x16); orr(); break; // *SLO (zero page, X)
case 0x17: Address_ZeroPageX(); RMW(asl); orr(); break; // *SLO (zero page, X)
case 0x18: swallow(); reset_flag(CF); break; // CLC (implied)
case 0x19: AM_AbsoluteY(); orr(); break; // ORA (absolute, Y)
case 0x1a: swallow(); break; // *NOP (implied)
case 0x1b: Address_AbsoluteY(); FIXUP_RMW(asl); orr(); break; // *SLO (absolute, Y)
case 0x1b: Address_AbsoluteY(); fixup(); RMW(asl); orr(); break; // *SLO (absolute, Y)
case 0x1c: Address_AbsoluteX(); fixup(); break; // *NOP (absolute, X)
case 0x1d: AM_AbsoluteX(); orr(); break; // ORA (absolute, X)
case 0x1e: Address_AbsoluteX(); FIXUP_RMW(asl); break; // ASL (absolute, X)
case 0x1f: Processor::execute(0x1e); orr(); break; // *SLO (absolute, X)
case 0x1e: Address_AbsoluteX(); fixup(); RMW(asl); break; // ASL (absolute, X)
case 0x1f: Address_AbsoluteX(); fixup(); RMW(asl); orr(); break; // *SLO (absolute, X)
case 0x20: jsr(); break; // JSR (absolute)
case 0x21: AM_IndexedIndirectX(); andr(); break; // AND (indexed indirect X)
@ -171,7 +171,7 @@ void EightBit::MOS6502::execute() noexcept {
case 0x24: AM_ZeroPage(); bit(A()); break; // BIT (zero page)
case 0x25: AM_ZeroPage(); andr(); break; // AND (zero page)
case 0x26: Address_ZeroPage(); RMW(rol); break; // ROL (zero page)
case 0x27: Processor::execute(0x26); andr(); break; // *RLA (zero page)
case 0x27: Address_ZeroPage(); RMW(rol); andr(); break; // *RLA (zero page)
case 0x28: swallow(); plp(); break; // PLP (implied)
case 0x29: AM_Immediate(); andr(); break; // AND (immediate)
case 0x2a: swallow(); A() = rol(A()); break; // ROL A (implied)
@ -179,24 +179,24 @@ void EightBit::MOS6502::execute() noexcept {
case 0x2c: AM_Absolute(); bit(A()); break; // BIT (absolute)
case 0x2d: AM_Absolute(); andr(); break; // AND (absolute)
case 0x2e: Address_Absolute(); RMW(rol); break; // ROL (absolute)
case 0x2f: Processor::execute(0x2e); andr(); break; // *RLA (absolute)
case 0x2f: Address_Absolute(); RMW(rol); andr(); break; // *RLA (absolute)
case 0x30: branch(negative()); break; // BMI (relative)
case 0x31: AM_IndirectIndexedY(); andr(); break; // AND (indirect indexed Y)
case 0x32: jam(); break; // *JAM
case 0x33: Address_IndirectIndexedY(); FIXUP_RMW(rol); andr(); break; // *RLA (indirect indexed Y)
case 0x33: Address_IndirectIndexedY(); fixup(); RMW(rol); andr(); break; // *RLA (indirect indexed Y)
case 0x34: AM_ZeroPageX(); break; // *NOP (zero page, X)
case 0x35: AM_ZeroPageX(); andr(); break; // AND (zero page, X)
case 0x36: Address_ZeroPageX(); RMW(rol); break; // ROL (zero page, X)
case 0x37: Processor::execute(0x36); andr(); break; // *RLA (zero page, X)
case 0x37: Address_ZeroPageX(); RMW(rol); andr(); break; // *RLA (zero page, X)
case 0x38: swallow(); set_flag(CF); break; // SEC (implied)
case 0x39: AM_AbsoluteY(); andr(); break; // AND (absolute, Y)
case 0x3a: swallow(); break; // *NOP (implied)
case 0x3b: Address_AbsoluteY(); FIXUP_RMW(rol); andr(); break; // *RLA (absolute, Y)
case 0x3b: Address_AbsoluteY(); fixup(); RMW(rol); andr(); break; // *RLA (absolute, Y)
case 0x3c: Address_AbsoluteX(); fixup(); break; // *NOP (absolute, X)
case 0x3d: AM_AbsoluteX(); andr(); break; // AND (absolute, X)
case 0x3e: Address_AbsoluteX(); FIXUP_RMW(rol); break; // ROL (absolute, X)
case 0x3f: Processor::execute(0x3e); andr(); break; // *RLA (absolute, X)
case 0x3e: Address_AbsoluteX(); fixup(); RMW(rol); break; // ROL (absolute, X)
case 0x3f: Address_AbsoluteX(); fixup(); RMW(rol); andr(); break; // *RLA (absolute, X)
case 0x40: swallow(); rti(); break; // RTI (implied)
case 0x41: AM_IndexedIndirectX(); eorr(); break; // EOR (indexed indirect X)
@ -205,7 +205,7 @@ void EightBit::MOS6502::execute() noexcept {
case 0x44: AM_ZeroPage(); break; // *NOP (zero page)
case 0x45: AM_ZeroPage(); eorr(); break; // EOR (zero page)
case 0x46: Address_ZeroPage(); RMW(lsr); break; // LSR (zero page)
case 0x47: Processor::execute(0x46); eorr(); break; // *SRE (zero page)
case 0x47: Address_ZeroPage(); RMW(lsr); eorr(); break; // *SRE (zero page)
case 0x48: swallow(); push(A()); break; // PHA (implied)
case 0x49: AM_Immediate(); eorr(); break; // EOR (immediate)
case 0x4a: swallow(); A() = lsr(A()); break; // LSR A (implied)
@ -213,24 +213,24 @@ void EightBit::MOS6502::execute() noexcept {
case 0x4c: Address_Absolute(); jump(BUS().ADDRESS()); break; // JMP (absolute)
case 0x4d: AM_Absolute(); eorr(); break; // EOR (absolute)
case 0x4e: Address_Absolute(); RMW(lsr); break; // LSR (absolute)
case 0x4f: Processor::execute(0x4e); eorr(); break; // *SRE (absolute)
case 0x4f: Address_Absolute(); RMW(lsr); eorr(); break; // *SRE (absolute)
case 0x50: branch(overflow() == 0); break; // BVC (relative)
case 0x51: AM_IndirectIndexedY(); eorr(); break; // EOR (indirect indexed Y)
case 0x52: jam(); break; // *JAM
case 0x53: Address_IndirectIndexedY(); FIXUP_RMW(lsr); eorr(); break; // *SRE (indirect indexed Y)
case 0x53: Address_IndirectIndexedY(); fixup(); RMW(lsr); eorr(); break; // *SRE (indirect indexed Y)
case 0x54: AM_ZeroPageX(); break; // *NOP (zero page, X)
case 0x55: AM_ZeroPageX(); eorr(); break; // EOR (zero page, X)
case 0x56: Address_ZeroPageX(); RMW(lsr); break; // LSR (zero page, X)
case 0x57: Processor::execute(0x56); eorr(); break; // *SRE (zero page, X)
case 0x57: Address_ZeroPageX(); RMW(lsr); eorr(); break; // *SRE (zero page, X)
case 0x58: swallow(); reset_flag(IF); break; // CLI (implied)
case 0x59: AM_AbsoluteY(); eorr(); break; // EOR (absolute, Y)
case 0x5a: swallow(); break; // *NOP (implied)
case 0x5b: Address_AbsoluteY(); FIXUP_RMW(lsr); eorr(); break; // *SRE (absolute, Y)
case 0x5b: Address_AbsoluteY(); fixup(); RMW(lsr); eorr(); break; // *SRE (absolute, Y)
case 0x5c: Address_AbsoluteX(); fixup(); break; // *NOP (absolute, X)
case 0x5d: AM_AbsoluteX(); eorr(); break; // EOR (absolute, X)
case 0x5e: Address_AbsoluteX(); FIXUP_RMW(lsr); break; // LSR (absolute, X)
case 0x5f: Processor::execute(0x5e); eorr(); break; // *SRE (absolute, X)
case 0x5e: Address_AbsoluteX(); fixup(); RMW(lsr); break; // LSR (absolute, X)
case 0x5f: Address_AbsoluteX(); fixup(); RMW(lsr); eorr(); break; // *SRE (absolute, X)
case 0x60: swallow(); rts(); break; // RTS (implied)
case 0x61: AM_IndexedIndirectX(); adc(); break; // ADC (indexed indirect X)
@ -239,7 +239,7 @@ void EightBit::MOS6502::execute() noexcept {
case 0x64: AM_ZeroPage(); break; // *NOP (zero page)
case 0x65: AM_ZeroPage(); adc(); break; // ADC (zero page)
case 0x66: Address_ZeroPage(); RMW(ror); break; // ROR (zero page)
case 0x67: Processor::execute(0x66); adc(); break; // *RRA (zero page)
case 0x67: Address_ZeroPage(); RMW(ror); adc(); break; // *RRA (zero page)
case 0x68: swallow(); swallow_stack(); A() = through(pop()); break; // PLA (implied)
case 0x69: AM_Immediate(); adc(); break; // ADC (immediate)
case 0x6a: swallow(); A() = ror(A()); break; // ROR A (implied)
@ -247,24 +247,24 @@ void EightBit::MOS6502::execute() noexcept {
case 0x6c: Address_Indirect(); jump(BUS().ADDRESS()); break; // JMP (indirect)
case 0x6d: AM_Absolute(); adc(); break; // ADC (absolute)
case 0x6e: Address_Absolute(); RMW(ror); break; // ROR (absolute)
case 0x6f: Processor::execute(0x6e); adc(); break; // *RRA (absolute)
case 0x6f: Address_Absolute(); RMW(ror); adc(); break; // *RRA (absolute)
case 0x70: branch(overflow()); break; // BVS (relative)
case 0x71: AM_IndirectIndexedY(); adc(); break; // ADC (indirect indexed Y)
case 0x72: jam(); break; // *JAM
case 0x73: Address_IndirectIndexedY(); FIXUP_RMW(ror); adc(); break; // *RRA (indirect indexed Y)
case 0x73: Address_IndirectIndexedY(); fixup(); RMW(ror); adc(); break; // *RRA (indirect indexed Y)
case 0x74: AM_ZeroPageX(); break; // *NOP (zero page, X)
case 0x75: AM_ZeroPageX(); adc(); break; // ADC (zero page, X)
case 0x76: Address_ZeroPageX(); RMW(ror); break; // ROR (zero page, X)
case 0x77: Processor::execute(0x76); adc(); break; // *RRA (zero page, X)
case 0x77: Address_ZeroPageX(); RMW(ror); adc(); break; // *RRA (zero page, X)
case 0x78: swallow(); set_flag(IF); break; // SEI (implied)
case 0x79: AM_AbsoluteY(); adc(); break; // ADC (absolute, Y)
case 0x7a: swallow(); break; // *NOP (implied)
case 0x7b: Address_AbsoluteY(); FIXUP_RMW(ror); adc(); break; // *RRA (absolute, Y)
case 0x7b: Address_AbsoluteY(); fixup(); RMW(ror); adc(); break; // *RRA (absolute, Y)
case 0x7c: Address_AbsoluteX(); fixup(); break; // *NOP (absolute, X)
case 0x7d: AM_AbsoluteX(); adc(); break; // ADC (absolute, X)
case 0x7e: Address_AbsoluteX(); FIXUP_RMW(ror); break; // ROR (absolute, X)
case 0x7f: Processor::execute(0x7e); adc(); break; // *RRA (absolute, X)
case 0x7e: Address_AbsoluteX(); fixup(); RMW(ror); break; // ROR (absolute, X)
case 0x7f: Address_AbsoluteX(); fixup(); RMW(ror); adc(); break; // *RRA (absolute, X)
case 0x80: AM_Immediate(); break; // *NOP (immediate)
case 0x81: Address_IndexedIndirectX(); memoryWrite(A()); break; // STA (indexed indirect X)
@ -343,7 +343,7 @@ void EightBit::MOS6502::execute() noexcept {
case 0xc4: AM_ZeroPage(); cmp(Y()); break; // CPY (zero page)
case 0xc5: AM_ZeroPage(); cmp(A()); break; // CMP (zero page)
case 0xc6: Address_ZeroPage(); RMW(dec); break; // DEC (zero page)
case 0xc7: Processor::execute(0xc6); cmp(A()); break; // *DCP (zero page)
case 0xc7: Address_ZeroPage(); RMW(dec); cmp(A()); break; // *DCP (zero page)
case 0xc8: swallow(); Y() = inc(Y()); break; // INY (implied)
case 0xc9: AM_Immediate(); cmp(A()); break; // CMP (immediate)
case 0xca: swallow(); X() = dec(X()); break; // DEX (implied)
@ -351,24 +351,24 @@ void EightBit::MOS6502::execute() noexcept {
case 0xcc: AM_Absolute(); cmp(Y()); break; // CPY (absolute)
case 0xcd: AM_Absolute(); cmp(A()); break; // CMP (absolute)
case 0xce: Address_Absolute(); RMW(dec); break; // DEC (absolute)
case 0xcf: Processor::execute(0xce); cmp(A()); break; // *DCP (absolute)
case 0xcf: Address_Absolute(); RMW(dec); cmp(A()); break; // *DCP (absolute)
case 0xd0: branch(zero() == 0); break; // BNE (relative)
case 0xd1: AM_IndirectIndexedY(); cmp(A()); break; // CMP (indirect indexed Y)
case 0xd2: jam(); break; // *JAM
case 0xd3: Address_IndirectIndexedY(); FIXUP_RMW(dec); cmp(A()); break; // *DCP (indirect indexed Y)
case 0xd3: Address_IndirectIndexedY(); fixup(); RMW(dec); cmp(A()); break; // *DCP (indirect indexed Y)
case 0xd4: AM_ZeroPageX(); break; // *NOP (zero page, X)
case 0xd5: AM_ZeroPageX(); cmp(A()); break; // CMP (zero page, X)
case 0xd6: Address_ZeroPageX(); RMW(dec); break; // DEC (zero page, X)
case 0xd7: Processor::execute(0xd6); cmp(A()); break; // *DCP (zero page, X)
case 0xd7: Address_ZeroPageX(); RMW(dec); cmp(A()); break; // *DCP (zero page, X)
case 0xd8: swallow(); reset_flag(DF); break; // CLD (implied)
case 0xd9: AM_AbsoluteY(); cmp(A()); break; // CMP (absolute, Y)
case 0xda: swallow(); break; // *NOP (implied)
case 0xdb: Address_AbsoluteY(); FIXUP_RMW(dec); cmp(A()); break; // *DCP (absolute, Y)
case 0xdb: Address_AbsoluteY(); fixup(); RMW(dec); cmp(A()); break; // *DCP (absolute, Y)
case 0xdc: Address_AbsoluteX(); fixup(); break; // *NOP (absolute, X)
case 0xdd: AM_AbsoluteX(); cmp(A()); break; // CMP (absolute, X)
case 0xde: Address_AbsoluteX(); FIXUP_RMW(dec); break; // DEC (absolute, X)
case 0xdf: Processor::execute(0xde); cmp(A()); break; // *DCP (absolute, X)
case 0xde: Address_AbsoluteX(); fixup(); RMW(dec); break; // DEC (absolute, X)
case 0xdf: Address_AbsoluteX(); fixup(); RMW(dec); cmp(A()); break; // *DCP (absolute, X)
case 0xe0: AM_Immediate(); cmp(X()); break; // CPX (immediate)
case 0xe1: AM_IndexedIndirectX(); sbc(); break; // SBC (indexed indirect X)
@ -377,7 +377,7 @@ void EightBit::MOS6502::execute() noexcept {
case 0xe4: AM_ZeroPage(); cmp(X()); break; // CPX (zero page)
case 0xe5: AM_ZeroPage(); sbc(); break; // SBC (zero page)
case 0xe6: Address_ZeroPage(); RMW(inc); break; // INC (zero page)
case 0xe7: Processor::execute(0xe6); sbc(); break; // *ISB (zero page)
case 0xe7: Address_ZeroPage(); RMW(inc); sbc(); break; // *ISB (zero page)
case 0xe8: swallow(); X() = inc(X()); break; // INX (implied)
case 0xe9: AM_Immediate(); sbc(); break; // SBC (immediate)
case 0xea: swallow(); break; // NOP (implied)
@ -385,24 +385,24 @@ void EightBit::MOS6502::execute() noexcept {
case 0xec: AM_Absolute(); cmp(X()); break; // CPX (absolute)
case 0xed: AM_Absolute(); sbc(); break; // SBC (absolute)
case 0xee: Address_Absolute(); RMW(inc); break; // INC (absolute)
case 0xef: Processor::execute(0xee); sbc(); break; // *ISB (absolute)
case 0xef: Address_Absolute(); RMW(inc); sbc(); break; // *ISB (absolute)
case 0xf0: branch(zero()); break; // BEQ (relative)
case 0xf1: AM_IndirectIndexedY(); sbc(); break; // SBC (indirect indexed Y)
case 0xf2: jam(); break; // *JAM
case 0xf3: Address_IndirectIndexedY(); FIXUP_RMW(inc); sbc(); break; // *ISB (indirect indexed Y)
case 0xf3: Address_IndirectIndexedY(); fixup(); RMW(inc); sbc(); break; // *ISB (indirect indexed Y)
case 0xf4: AM_ZeroPageX(); break; // *NOP (zero page, X)
case 0xf5: AM_ZeroPageX(); sbc(); break; // SBC (zero page, X)
case 0xf6: Address_ZeroPageX(); RMW(inc); break; // INC (zero page, X)
case 0xf7: Processor::execute(0xf6); sbc(); break; // *ISB (zero page, X)
case 0xf7: Address_ZeroPageX(); RMW(inc); sbc(); break; // *ISB (zero page, X)
case 0xf8: swallow(); set_flag(DF); break; // SED (implied)
case 0xf9: AM_AbsoluteY(); sbc(); break; // SBC (absolute, Y)
case 0xfa: swallow(); break; // *NOP (implied)
case 0xfb: Address_AbsoluteY(); FIXUP_RMW(inc); sbc(); break; // *ISB (absolute, Y)
case 0xfb: Address_AbsoluteY(); fixup(); RMW(inc); sbc(); break; // *ISB (absolute, Y)
case 0xfc: Address_AbsoluteX(); fixup(); break; // *NOP (absolute, X)
case 0xfd: AM_AbsoluteX(); sbc(); break; // SBC (absolute, X)
case 0xfe: Address_AbsoluteX(); FIXUP_RMW(inc); break; // INC (absolute, X)
case 0xff: Processor::execute(0xfe); sbc(); break; // *ISB (absolute, X)
case 0xfe: Address_AbsoluteX(); fixup(); RMW(inc); break; // INC (absolute, X)
case 0xff: Address_AbsoluteX(); fixup(); RMW(inc); sbc(); break; // *ISB (absolute, X)
}
}
@ -437,13 +437,11 @@ void EightBit::MOS6502::Address_Indirect() noexcept {
void EightBit::MOS6502::Address_ZeroPageX() noexcept {
AM_ZeroPage();
assert(BUS().ADDRESS().high == 0);
BUS().ADDRESS().low += X();
}
void EightBit::MOS6502::Address_ZeroPageY() noexcept {
AM_ZeroPage();
assert(BUS().ADDRESS().high == 0);
BUS().ADDRESS().low += Y();
}