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Share instruction decoding mechanism between Intel derived processors.

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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
This commit is contained in:
Adrian.Conlon 2017-07-21 13:33:17 +01:00
parent 7c3fc469a8
commit beca76d733
5 changed files with 74 additions and 33 deletions
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46
LR35902/src/LR35902.cpp
View File

@ -383,12 +383,14 @@ int EightBit::LR35902::step() {
int EightBit::LR35902::execute(uint8_t opcode) {
auto x = (opcode & 0b11000000) >> 6;
auto y = (opcode & 0b111000) >> 3;
auto z = (opcode & 0b111);
const auto& decoded = getDecodedOpcode(opcode);
auto p = (y & 0b110) >> 1;
auto q = (y & 1);
auto x = decoded.x;
auto y = decoded.y;
auto z = decoded.z;
auto p = decoded.p;
auto q = decoded.q;
if (m_prefixCB)
executeCB(x, y, z, p, q);
@ -431,6 +433,8 @@ void EightBit::LR35902::executeCB(int x, int y, int z, int p, int q) {
case 7:
adjustZero<LR35902>(f, srl(f, R(z, a)));
break;
default:
__assume(0);
}
cycles += 2;
if (z == 6) {
@ -462,6 +466,8 @@ void EightBit::LR35902::executeCB(int x, int y, int z, int p, int q) {
cycles += 2;
}
break;
default:
__assume(0);
}
}
@ -497,6 +503,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
cycles++;
cycles += 2;
break;
default:
__assume(0);
}
break;
case 1: // 16-bit load immediate/add
@ -509,6 +517,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
add(f, HL(), RP(p));
cycles += 2;
break;
default:
__assume(0);
}
break;
case 2: // Indirect loading
@ -531,6 +541,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
m_memory.write(HL().word--, a);
cycles += 2;
break;
default:
__assume(0);
}
break;
case 1:
@ -551,6 +563,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
a = m_memory.read(HL().word--);
cycles += 2;
break;
default:
__assume(0);
}
break;
}
@ -563,6 +577,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
case 1: // DEC rp
--RP(p).word;
break;
default:
__assume(0);
}
cycles += 2;
break;
@ -614,6 +630,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
case 7:
ccf(a, f);
break;
default:
__assume(0);
}
cycles++;
break;
@ -660,6 +678,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
case 7: // CP r
compare(f, a, R(z, a));
break;
default:
__assume(0);
}
cycles++;
if (z == 6) {
@ -709,6 +729,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
}
cycles += 3;
break;
default:
__assume(0);
}
break;
case 1: // POP & various ops
@ -735,7 +757,12 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
SP() = HL();
cycles += 2;
break;
default:
__assume(0);
}
break;
default:
__assume(0);
}
break;
case 2: // Conditional jump
@ -765,6 +792,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
a = m_bus.read(MEMPTR().word);
cycles += 4;
break;
default:
__assume(0);
}
break;
case 3: // Assorted operations
@ -807,6 +836,9 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
cycles += 6;
break;
}
break;
default:
__assume(0);
}
break;
case 6: // Operate on accumulator and immediate operand: alu[y] n
@ -835,6 +867,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
case 7: // CP n
compare(f, a, fetchByte());
break;
default:
__assume(0);
}
cycles += 2;
break;
@ -842,6 +876,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
restart(y << 3);
cycles += 4;
break;
default:
__assume(0);
}
break;
}

23
Z80/inc/Z80.h
View File

@ -29,27 +29,6 @@ namespace EightBit {
}
};
struct opcode_decoded_t {
int x;
int y;
int z;
int p;
int q;
opcode_decoded_t() {
x = y = z = p = q = 0;
}
opcode_decoded_t(uint8_t opcode) {
x = (opcode & 0b11000000) >> 6; // 0 - 3
y = (opcode & 0b00111000) >> 3; // 0 - 7
z = (opcode & 0b00000111); // 0 - 7
p = (y & 0b110) >> 1; // 0 - 3
q = (y & 1); // 0 - 1
}
};
enum StatusBits {
SF = Bit7,
ZF = Bit6,
@ -154,8 +133,6 @@ namespace EightBit {
int8_t m_displacement;
bool m_displaced;
std::array<opcode_decoded_t, 0x100> m_decodedOpcodes;
int fetchExecute() {
M1() = true;
return execute(fetchByte());

6
Z80/src/Z80.cpp
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@ -34,10 +34,6 @@ void EightBit::Z80::initialise() {
IntelProcessor::initialise();
for (int i = 0; i < 0x100; ++i) {
m_decodedOpcodes[i] = i;
}
IM() = 0;
AF().word = 0xffff;
@ -774,7 +770,7 @@ int EightBit::Z80::execute(uint8_t opcode) {
M1() = false;
}
const auto& decoded = m_decodedOpcodes[opcode];
const auto& decoded = getDecodedOpcode(opcode);
auto x = decoded.x;
auto y = decoded.y;

27
inc/IntelProcessor.h
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@ -9,6 +9,31 @@ namespace EightBit {
class IntelProcessor : public Processor
{
public:
struct opcode_decoded_t {
int x;
int y;
int z;
int p;
int q;
opcode_decoded_t() {
x = y = z = p = q = 0;
}
opcode_decoded_t(uint8_t opcode) {
x = (opcode & 0b11000000) >> 6; // 0 - 3
y = (opcode & 0b00111000) >> 3; // 0 - 7
z = (opcode & 0b00000111); // 0 - 7
p = (y & 0b110) >> 1; // 0 - 3
q = (y & 1); // 0 - 1
}
};
const opcode_decoded_t& getDecodedOpcode(const int i) const {
return m_decodedOpcodes[i];
}
register16_t& MEMPTR() { return m_memptr; }
virtual void initialise();
@ -203,6 +228,8 @@ namespace EightBit {
}
private:
std::array<opcode_decoded_t, 0x100> m_decodedOpcodes;
register16_t m_memptr;
register16_t sp;
};

5
src/IntelProcessor.cpp
View File

@ -9,6 +9,11 @@ EightBit::IntelProcessor::IntelProcessor(Memory& memory)
void EightBit::IntelProcessor::initialise() {
Processor::initialise();
for (int i = 0; i < 0x100; ++i) {
m_decodedOpcodes[i] = i;
}
MEMPTR().word = 0;
SP().word = 0xffff;
}