mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2025-01-26 22:31:38 +00:00
Fill out more 6809 disassembly + fix a bug in the TFR/EXG instructions: muddled up 8/16 bit transfers.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
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fbc743a608
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@ -44,12 +44,31 @@ namespace EightBit {
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std::string disassemble11();
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std::string disassemble11();
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//
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//
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std::string RR(int which);
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std::string RR(int which);
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std::string Address_indexed(std::string mnemomic);
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std::string Address_indexed(std::string mnemomic);
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std::string Address_extended(std::string mnemomic);
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std::string Address_relative_byte(std::string mnemomic);
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std::string AM_immediate_byte(std::string mnemomic);
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std::string AM_immediate_byte(std::string mnemomic);
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std::string AM_immediate_word(std::string mnemomic);
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std::string AM_immediate_word(std::string mnemomic);
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std::string AM_direct_byte(std::string mnemomic);
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std::string AM_indexed_byte(std::string mnemomic);
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std::string AM_extended_byte(std::string mnemomic);
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//
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std::string branchShort(std::string mnemomic);
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std::string branchLong(std::string mnemomic);
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//
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std::string referenceTransfer8(int specifier);
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std::string referenceTransfer16(int specifier);
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std::string tfr();
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//
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std::string dump_Byte(uint16_t address);
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std::string dump_Byte(uint16_t address);
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std::string dump_DByte(uint16_t address);
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std::string dump_DByte(uint16_t address);
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@ -135,18 +135,18 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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switch (opcode) {
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switch (opcode) {
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// ABX
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// ABX
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//case 0x3a: X() += B(); break; // ABX (inherent)
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case 0x3a: output << "\tABX"; break; // ABX (inherent)
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//// ADC
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//// ADC
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//case 0x89: A() = adc(A(), AM_immediate_byte()); break; // ADC (ADCA immediate)
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case 0x89: output << AM_immediate_byte("ADCA"); break; // ADC (ADCA immediate)
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//case 0x99: A() = adc(A(), AM_direct_byte()); break; // ADC (ADCA direct)
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case 0x99: output << AM_direct_byte("ADCA"); break; // ADC (ADCA direct)
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//case 0xa9: A() = adc(A(), AM_indexed_byte()); break; // ADC (ADCA indexed)
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case 0xa9: output << AM_indexed_byte("ADCA"); break; // ADC (ADCA indexed)
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//case 0xb9: A() = adc(A(), AM_extended_byte()); break; // ADC (ADCA extended)
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case 0xb9: output << AM_extended_byte("ADCA"); break; // ADC (ADCA extended)
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//case 0xc9: B() = adc(B(), AM_immediate_byte()); break; // ADC (ADCB immediate)
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case 0xc9: output << AM_immediate_byte("ADCB"); break; // ADC (ADCB immediate)
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//case 0xd9: B() = adc(B(), AM_direct_byte()); break; // ADC (ADCB direct)
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case 0xd9: output << AM_direct_byte("ADCB"); break; // ADC (ADCB direct)
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//case 0xe9: B() = adc(B(), AM_indexed_byte()); break; // ADC (ADCB indexed)
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case 0xe9: output << AM_indexed_byte("ADCB"); break; // ADC (ADCB indexed)
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//case 0xf9: B() = adc(B(), AM_extended_byte()); break; // ADC (ADCB extended)
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case 0xf9: output << AM_extended_byte("ADCB"); break; // ADC (ADCB extended)
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//// ADD
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//// ADD
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//case 0x8b: A() = add(A(), AM_immediate_byte()); break; // ADD (ADDA immediate)
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//case 0x8b: A() = add(A(), AM_immediate_byte()); break; // ADD (ADDA immediate)
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@ -245,7 +245,7 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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//// DEC
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//// DEC
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//case 0x0a: BUS().write(dec(AM_direct_byte())); break; // DEC (direct)
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//case 0x0a: BUS().write(dec(AM_direct_byte())); break; // DEC (direct)
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case 0x4a: output << "\tDECA"; break; // DEC (DECA inherent)
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case 0x4a: output << "\tDECA"; break; // DEC (DECA inherent)
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//case 0x5a: B() = dec(B()); break; // DEC (DECB inherent)
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case 0x5a: output << "\tDECB"; break; // DEC (DECB inherent)
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//case 0x6a: BUS().write(dec(AM_indexed_byte())); break; // DEC (indexed)
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//case 0x6a: BUS().write(dec(AM_indexed_byte())); break; // DEC (indexed)
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//case 0x7a: BUS().write(dec(AM_extended_byte())); break; // DEC (extended)
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//case 0x7a: BUS().write(dec(AM_extended_byte())); break; // DEC (extended)
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@ -292,7 +292,7 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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//case 0xb6: A() = ld(AM_extended_byte()); break; // LD (LDA extended)
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//case 0xb6: A() = ld(AM_extended_byte()); break; // LD (LDA extended)
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//// LDB
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//// LDB
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//case 0xc6: B() = ld(AM_immediate_byte()); break; // LD (LDB immediate)
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case 0xc6: output << AM_immediate_byte("LDB"); break; // LD (LDB immediate)
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//case 0xd6: B() = ld(AM_direct_byte()); break; // LD (LDB direct)
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//case 0xd6: B() = ld(AM_direct_byte()); break; // LD (LDB direct)
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//case 0xe6: B() = ld(AM_indexed_byte()); break; // LD (LDB indexed)
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//case 0xe6: B() = ld(AM_indexed_byte()); break; // LD (LDB indexed)
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//case 0xf6: B() = ld(AM_extended_byte()); break; // LD (LDB extended)
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//case 0xf6: B() = ld(AM_extended_byte()); break; // LD (LDB extended)
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@ -304,7 +304,7 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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//case 0xfc: D() = ld(AM_extended_word()); break; // LD (LDD extended)
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//case 0xfc: D() = ld(AM_extended_word()); break; // LD (LDD extended)
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//// LDU
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//// LDU
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//case 0xce: U() = ld(AM_immediate_word()); break; // LD (LDU immediate)
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case 0xce: output << AM_immediate_word("LDU"); break; // LD (LDU immediate)
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//case 0xde: U() = ld(AM_direct_word()); break; // LD (LDU direct)
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//case 0xde: U() = ld(AM_direct_word()); break; // LD (LDU direct)
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//case 0xee: U() = ld(AM_indexed_word()); break; // LD (LDU indexed)
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//case 0xee: U() = ld(AM_indexed_word()); break; // LD (LDU indexed)
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//case 0xfe: U() = ld(AM_extended_word()); break; // LD (LDU extended)
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//case 0xfe: U() = ld(AM_extended_word()); break; // LD (LDU extended)
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@ -408,7 +408,7 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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//// STA
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//// STA
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//case 0x97: BUS().write(Address_direct(), st(A())); break; // ST (STA direct)
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//case 0x97: BUS().write(Address_direct(), st(A())); break; // ST (STA direct)
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case 0xa7: output << Address_indexed("STA"); break; // ST (STA indexed)
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case 0xa7: output << Address_indexed("STA"); break; // ST (STA indexed)
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//case 0xb7: BUS().write(Address_extended(), st(A())); break; // ST (STA extended)
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case 0xb7: output << Address_extended("STA"); break; // ST (STA extended)
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//// STB
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//// STB
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//case 0xd7: BUS().write(Address_direct(), st(B())); break; // ST (STB direct)
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//case 0xd7: BUS().write(Address_direct(), st(B())); break; // ST (STB direct)
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@ -457,7 +457,7 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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//case 0x13: halt(); break; // SYNC (inherent)
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//case 0x13: halt(); break; // SYNC (inherent)
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//// TFR
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//// TFR
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//case 0x1f: tfr(AM_immediate_byte()); break; // TFR (immediate)
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case 0x1f: output << tfr(); break; // TFR (immediate)
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//// TST
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//// TST
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//case 0x0d: tst(AM_direct_byte()); break; // TST (direct)
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//case 0x0d: tst(AM_direct_byte()); break; // TST (direct)
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@ -476,7 +476,7 @@ std::string EightBit::Disassembly::disassembleUnprefixed() {
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//case 0x23: branchShort(BLS()); break; // BLS (relative)
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//case 0x23: branchShort(BLS()); break; // BLS (relative)
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//case 0x24: branchShort(!carry()); break; // BCC (relative)
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//case 0x24: branchShort(!carry()); break; // BCC (relative)
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//case 0x25: branchShort(carry()); break; // BCS (relative)
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//case 0x25: branchShort(carry()); break; // BCS (relative)
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//case 0x26: branchShort(!zero()); break; // BNE (relative)
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case 0x26: output << branchShort("BNE"); break; // BNE (relative)
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//case 0x27: branchShort(zero()); break; // BEQ (relative)
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//case 0x27: branchShort(zero()); break; // BEQ (relative)
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//case 0x28: branchShort(!overflow()); break; // BVC (relative)
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//case 0x28: branchShort(!overflow()); break; // BVC (relative)
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//case 0x29: branchShort(overflow()); break; // BVS (relative)
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//case 0x29: branchShort(overflow()); break; // BVS (relative)
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@ -522,7 +522,7 @@ std::string EightBit::Disassembly::disassemble10() {
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//// LD
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//// LD
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//// LDS
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//// LDS
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//case 0xce: S() = ld(AM_immediate_word()); break; // LD (LDS immediate)
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case 0xce: output << AM_immediate_word("LDS"); break; // LD (LDS immediate)
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//case 0xde: S() = ld(AM_direct_word()); break; // LD (LDS direct)
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//case 0xde: S() = ld(AM_direct_word()); break; // LD (LDS direct)
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//case 0xee: S() = ld(AM_indexed_word()); break; // LD (LDS indexed)
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//case 0xee: S() = ld(AM_indexed_word()); break; // LD (LDS indexed)
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//case 0xfe: S() = ld(AM_extended_word()); break; // LD (LDS extended)
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//case 0xfe: S() = ld(AM_extended_word()); break; // LD (LDS extended)
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@ -699,6 +699,26 @@ std::string EightBit::Disassembly::Address_indexed(std::string mnemomic) {
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return output.str();
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return output.str();
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}
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}
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std::string EightBit::Disassembly::Address_extended(std::string mnemomic) {
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std::ostringstream output;
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const auto word = getWord(++m_address);
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output
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<< dump_WordValue(word)
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<< "\t" << mnemomic << "\t"
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<< "$" << dump_WordValue(word);
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return output.str();
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}
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std::string EightBit::Disassembly::Address_relative_byte(std::string mnemomic) {
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std::ostringstream output;
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const auto byte = getByte(++m_address);
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output
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<< dump_ByteValue(byte)
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<< "\t" << mnemomic << "\t"
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<< "$" << dump_WordValue(++m_address + (int8_t)byte);
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return output.str();
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}
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////
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////
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std::string EightBit::Disassembly::AM_immediate_byte(std::string mnemomic) {
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std::string EightBit::Disassembly::AM_immediate_byte(std::string mnemomic) {
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@ -721,6 +741,99 @@ std::string EightBit::Disassembly::AM_immediate_word(std::string mnemomic) {
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return output.str();
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return output.str();
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}
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}
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std::string EightBit::Disassembly::AM_direct_byte(std::string mnemomic) {
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std::ostringstream output;
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output
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<< "\t**" << mnemomic << "**\t";
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return output.str();
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}
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std::string EightBit::Disassembly::AM_indexed_byte(std::string mnemomic) {
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std::ostringstream output;
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output
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<< "\t**" << mnemomic << "**\t";
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return output.str();
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}
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std::string EightBit::Disassembly::AM_extended_byte(std::string mnemomic) {
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std::ostringstream output;
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output
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<< "\t**" << mnemomic << "**\t";
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return output.str();
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}
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////
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std::string EightBit::Disassembly::branchShort(std::string mnemomic) {
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return Address_relative_byte(mnemomic);
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}
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std::string EightBit::Disassembly::branchLong(std::string mnemomic) {
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std::ostringstream output;
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output
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<< "\t**" << mnemomic << "**\t";
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return output.str();
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}
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////
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std::string EightBit::Disassembly::referenceTransfer8(int specifier) {
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switch (specifier) {
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case 0b1000:
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return "A";
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case 0b1001:
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return "B";
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case 0b1010:
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return "CC";
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case 0b1011:
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return "DP";
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default:
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UNREACHABLE;
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}
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}
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std::string EightBit::Disassembly::referenceTransfer16(int specifier) {
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switch (specifier) {
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case 0b0000:
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return "D";
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case 0b0001:
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return "X";
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case 0b0010:
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return "Y";
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case 0b0011:
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return "U";
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case 0b0100:
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return "S";
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case 0b0101:
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return "PC";
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default:
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UNREACHABLE;
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}
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}
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std::string EightBit::Disassembly::tfr() {
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const auto data = getByte(++m_address);
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const auto reg1 = Processor::highNibble(data);
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const auto reg2 = Processor::lowNibble(data);
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const bool type8 = !!(reg1 & Processor::Bit3); // 8 bit transfer?
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std::string from = "unknown";
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std::string to = "unknown";
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if (type8) {
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from = referenceTransfer8(reg1);
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to = referenceTransfer8(reg2);
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} else {
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from = referenceTransfer16(reg1);
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to = referenceTransfer16(reg2);
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}
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std::ostringstream output;
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output << "\tTFR\t" << from << "," << to;
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return output.str();
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}
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////
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////
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uint8_t EightBit::Disassembly::getByte(uint16_t address) {
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uint8_t EightBit::Disassembly::getByte(uint16_t address) {
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@ -877,13 +877,13 @@ void EightBit::mc6809::exg(uint8_t data) {
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const auto reg1 = highNibble(data);
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const auto reg1 = highNibble(data);
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const auto reg2 = lowNibble(data);
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const auto reg2 = lowNibble(data);
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const bool type16 = !!(reg1 & Bit3); // 16 bit exchange?
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const bool type8 = !(reg1 & Bit3); // 8 bit exchange?
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ASSUME(type16 == !!(reg2 & Bit3)); // Regardless, the register exchange must be equivalent
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ASSUME(type8 == !(reg2 & Bit3)); // Regardless, the register exchange must be equivalent
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if (type16)
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if (type8)
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std::swap(referenceTransfer16(reg1), referenceTransfer16(reg2));
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else
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std::swap(referenceTransfer8(reg1), referenceTransfer8(reg2));
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std::swap(referenceTransfer8(reg1), referenceTransfer8(reg2));
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else
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std::swap(referenceTransfer16(reg1), referenceTransfer16(reg2));
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}
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}
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uint8_t EightBit::mc6809::inc(uint8_t operand) {
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uint8_t EightBit::mc6809::inc(uint8_t operand) {
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@ -1136,13 +1136,13 @@ void EightBit::mc6809::tfr(uint8_t data) {
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const auto reg1 = highNibble(data);
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const auto reg1 = highNibble(data);
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const auto reg2 = lowNibble(data);
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const auto reg2 = lowNibble(data);
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const bool type16 = !!(reg1 & Bit3); // 16 bit transfer?
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const bool type8 = !!(reg1 & Bit3); // 8 bit transfer?
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ASSUME(type16 == !!(reg2 & Bit3)); // Regardless, the register transfer must be equivalent
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ASSUME(type8 == !!(reg2 & Bit3)); // Regardless, the register transfer must be equivalent
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if (type16)
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if (type8)
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referenceTransfer16(reg2) = referenceTransfer16(reg1);
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else
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referenceTransfer8(reg2) = referenceTransfer8(reg1);
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referenceTransfer8(reg2) = referenceTransfer8(reg1);
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else
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referenceTransfer16(reg2) = referenceTransfer16(reg1);
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}
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}
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uint8_t EightBit::mc6809::st(uint8_t data) {
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uint8_t EightBit::mc6809::st(uint8_t data) {
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