More consolidation of instruction implementations.

Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
This commit is contained in:
Adrian.Conlon
2017-08-28 21:18:08 +01:00
parent 329fd269ed
commit d710a28526
4 changed files with 54 additions and 63 deletions

View File

@@ -72,8 +72,6 @@ namespace EightBit {
virtual int execute(uint8_t opcode); virtual int execute(uint8_t opcode);
private: private:
register16_t& MEMPTR() { return m_memptr; }
void adjustZero(uint8_t datum) { clearFlag(P(), ZF, datum); } void adjustZero(uint8_t datum) { clearFlag(P(), ZF, datum); }
void adjustNegative(uint8_t datum) { setFlag(P(), NF, datum & NF); } void adjustNegative(uint8_t datum) { setFlag(P(), NF, datum & NF); }
@@ -90,7 +88,7 @@ namespace EightBit {
#pragma region Addresses #pragma region Addresses
void Address_Absolute() { void Address_Absolute() {
fetchWord(MEMPTR()); fetchWord();
} }
void Address_ZeroPage() { void Address_ZeroPage() {
@@ -530,8 +528,6 @@ namespace EightBit {
uint8_t s; // stack pointer uint8_t s; // stack pointer
uint8_t p; // processor status uint8_t p; // processor status
register16_t m_memptr;
std::array<int, 0x100> m_timings; std::array<int, 0x100> m_timings;
std::array<opcode_decoded_t, 0x100> m_decodedOpcodes; std::array<opcode_decoded_t, 0x100> m_decodedOpcodes;
}; };

View File

@@ -515,28 +515,27 @@ void EightBit::MOS6502::PLP() {
void EightBit::MOS6502::JSR_abs() { void EightBit::MOS6502::JSR_abs() {
Address_Absolute(); Address_Absolute();
PC().word--; PC().word--;
pushWord(PC()); call();
PC() = MEMPTR();
} }
void EightBit::MOS6502::RTI() { void EightBit::MOS6502::RTI() {
PLP(); PLP();
popWord(PC()); ret();
} }
void EightBit::MOS6502::RTS() { void EightBit::MOS6502::RTS() {
popWord(PC()); ret();
PC().word++; PC().word++;
} }
void EightBit::MOS6502::JMP_abs() { void EightBit::MOS6502::JMP_abs() {
Address_Absolute(); Address_Absolute();
PC() = MEMPTR(); jump();
} }
void EightBit::MOS6502::JMP_ind() { void EightBit::MOS6502::JMP_ind() {
Address_Indirect(); Address_Indirect();
PC() = MEMPTR(); jump();
} }
void EightBit::MOS6502::BRK() { void EightBit::MOS6502::BRK() {

View File

@@ -34,8 +34,6 @@ namespace EightBit {
return m_decodedOpcodes[i]; return m_decodedOpcodes[i];
} }
register16_t& MEMPTR() { return m_memptr; }
virtual void initialise(); virtual void initialise();
register16_t& SP() { return sp; } register16_t& SP() { return sp; }
@@ -68,9 +66,7 @@ namespace EightBit {
} }
template<class T> static void adjustParity(uint8_t& f, uint8_t value) { template<class T> static void adjustParity(uint8_t& f, uint8_t value) {
static const int lookup[0x10] = { 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4 }; clearFlag(f, T::PF, __popcnt(value) % 2);
auto set = lookup[highNibble(value)] + lookup[lowNibble(value)];
clearFlag(f, T::PF, set % 2);
} }
template<class T> static void adjustSZ(uint8_t& f, uint8_t value) { template<class T> static void adjustSZ(uint8_t& f, uint8_t value) {
@@ -127,10 +123,6 @@ namespace EightBit {
return getByte(SP().word++); return getByte(SP().word++);
} }
void fetchWord() {
Processor::fetchWord(MEMPTR());
}
// //
void memptrReference() { void memptrReference() {
@@ -154,15 +146,6 @@ namespace EightBit {
// //
void jump() {
PC() = MEMPTR();
}
void call() {
pushWord(PC());
jump();
}
void restart(uint8_t address) { void restart(uint8_t address) {
MEMPTR().low = address; MEMPTR().low = address;
MEMPTR().high = 0; MEMPTR().high = 0;
@@ -183,11 +166,6 @@ namespace EightBit {
return conditional != 0; return conditional != 0;
} }
void ret() {
popWord(MEMPTR());
jump();
}
bool returnConditional(int condition) { bool returnConditional(int condition) {
if (condition) if (condition)
ret(); ret();
@@ -208,8 +186,6 @@ namespace EightBit {
private: private:
std::array<opcode_decoded_t, 0x100> m_decodedOpcodes; std::array<opcode_decoded_t, 0x100> m_decodedOpcodes;
register16_t m_memptr;
register16_t sp; register16_t sp;
}; };
} }

View File

@@ -7,35 +7,35 @@
namespace EightBit { namespace EightBit {
class Processor { class Processor {
public: public:
enum Masks { enum Bits {
Mask1 = 0x01, Bit0 = 1,
Mask2 = 0x03, Bit1 = Bit0 << 1,
Mask3 = 0x07, Bit2 = Bit1 << 1,
Mask4 = 0x0f, Bit3 = Bit2 << 1,
Mask5 = 0x1f, Bit4 = Bit3 << 1,
Mask6 = 0x3f, Bit5 = Bit4 << 1,
Mask7 = 0x7f, Bit6 = Bit5 << 1,
Mask8 = 0xff, Bit7 = Bit6 << 1,
Bit8 = Bit7 << 1,
Bit9 = Bit8 << 1,
Bit10 = Bit9 << 1,
Bit11 = Bit10 << 1,
Bit12 = Bit11 << 1,
Bit13 = Bit12 << 1,
Bit14 = Bit13 << 1,
Bit15 = Bit14 << 1,
Bit16 = Bit15 << 1,
}; };
enum Bits { enum Masks {
Bit16 = 0x10000, Mask1 = Bit1 - 1,
Bit15 = 0x8000, Mask2 = Bit2 - 1,
Bit14 = 0x4000, Mask3 = Bit3 - 1,
Bit13 = 0x2000, Mask4 = Bit4 - 1,
Bit12 = 0x1000, Mask5 = Bit5 - 1,
Bit11 = 0x800, Mask6 = Bit6 - 1,
Bit10 = 0x400, Mask7 = Bit7 - 1,
Bit9 = 0x200, Mask8 = Bit8 - 1,
Bit8 = 0x100,
Bit7 = 0x80,
Bit6 = 0x40,
Bit5 = 0x20,
Bit4 = 0x10,
Bit3 = 0x8,
Bit2 = 0x4,
Bit1 = 0x2,
Bit0 = 0x1,
}; };
static int highNibble(int value) { return value >> 4; } static int highNibble(int value) { return value >> 4; }
@@ -47,6 +47,7 @@ namespace EightBit {
Memory& getMemory() { return m_memory; } Memory& getMemory() { return m_memory; }
register16_t& PC() { return pc; } register16_t& PC() { return pc; }
register16_t& MEMPTR() { return m_memptr; }
bool isHalted() const { return m_halted; } bool isHalted() const { return m_halted; }
void halt() { --PC().word; m_halted = true; } void halt() { --PC().word; m_halted = true; }
@@ -84,6 +85,10 @@ namespace EightBit {
output.high = fetchByte(); output.high = fetchByte();
} }
void fetchWord() {
fetchWord(MEMPTR());
}
virtual int fetchExecute() { virtual int fetchExecute() {
return execute(fetchByte()); return execute(fetchByte());
} }
@@ -107,8 +112,23 @@ namespace EightBit {
output.high = pop(); output.high = pop();
} }
void jump() {
PC() = MEMPTR();
}
void call() {
pushWord(PC());
jump();
}
void ret() {
popWord(MEMPTR());
jump();
}
private: private:
register16_t pc; register16_t pc;
register16_t m_memptr;
bool m_halted; bool m_halted;
}; };
} }